On Thu, Mar 09, 2017 at 07:31:27PM +0800, Chen-Yu Tsai wrote:
Additionally, the mux registers are only valid in the first TCON, meaning it must available be active in 2 pipeline chips. It's also why we'd pass "struct drm_device *" instead of "struct sun4i_tcon *".
Hmmmm. That's going to be tricky to support. Has this been confirmed somehow? Is the register used for something else on TCON1?
At this point, the only reference is Allwinner's kernel, and the old 3.4 kernel for A10/A20. I could try getting HDMI working on the A31 to get some real results.
FWIW, the registers do not seem to be aliased across the two TCONs.
Then maybe we don't need to care, and we can just always write to the mux?
Maxime