From: suijingfeng suijingfeng@loongson.cn
For board specific devices which is outside of the cpu and bridge chip
Signed-off-by: suijingfeng suijingfeng@loongson.cn Signed-off-by: Sui Jingfeng 15330273260@189.cn --- arch/mips/boot/dts/loongson/lemote_a1901.dts | 64 +++++++++++++++++ .../boot/dts/loongson/ls3a4000_7a1000_evb.dts | 69 +++++++++++++++++++ arch/mips/boot/dts/loongson/ls7a-pch.dtsi | 2 +- 3 files changed, 134 insertions(+), 1 deletion(-) create mode 100644 arch/mips/boot/dts/loongson/lemote_a1901.dts create mode 100644 arch/mips/boot/dts/loongson/ls3a4000_7a1000_evb.dts
diff --git a/arch/mips/boot/dts/loongson/lemote_a1901.dts b/arch/mips/boot/dts/loongson/lemote_a1901.dts new file mode 100644 index 000000000000..81828945ba52 --- /dev/null +++ b/arch/mips/boot/dts/loongson/lemote_a1901.dts @@ -0,0 +1,64 @@ +// SPDX-License-Identifier: GPL-2.0 + +/dts-v1/; + +#include "loongson64g-package.dtsi" +#include "ls7a-pch.dtsi" + +/ { + compatible = "lemode,a1901", "loongson,loongson64g-4core-ls7a"; + model = "lemode,a1901"; +}; + +&package0 { + htvec: interrupt-controller@efdfb000080 { + compatible = "loongson,htvec-1.0"; + reg = <0xefd 0xfb000080 0x40>; + interrupt-controller; + #interrupt-cells = <1>; + + interrupt-parent = <&liointc>; + interrupts = <24 IRQ_TYPE_LEVEL_HIGH>, + <25 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <28 IRQ_TYPE_LEVEL_HIGH>, + <29 IRQ_TYPE_LEVEL_HIGH>, + <30 IRQ_TYPE_LEVEL_HIGH>, + <31 IRQ_TYPE_LEVEL_HIGH>; + }; +}; + +&pch { + msi: msi-controller@2ff00000 { + compatible = "loongson,pch-msi-1.0"; + reg = <0 0x2ff00000 0 0x8>; + interrupt-controller; + msi-controller; + loongson,msi-base-vec = <64>; + loongson,msi-num-vecs = <192>; + interrupt-parent = <&htvec>; + }; +}; + +&lsdc { + /* use_vram_helper; */ + output-ports = <&dvo0 &dvo1>; + + #address-cells = <1>; + #size-cells = <0>; + + dvo0: dvo@0 { + /* 0 for DVO0 */ + reg = <0>; + status = "disabled"; + }; + + dvo1: dvo@1 { + /* 1 for DVO1 */ + reg = <1>; + connector = "vga-connector"; + encoder = "adi,adv7125"; + status = "okay"; + }; +}; diff --git a/arch/mips/boot/dts/loongson/ls3a4000_7a1000_evb.dts b/arch/mips/boot/dts/loongson/ls3a4000_7a1000_evb.dts new file mode 100644 index 000000000000..abe7d3fb1633 --- /dev/null +++ b/arch/mips/boot/dts/loongson/ls3a4000_7a1000_evb.dts @@ -0,0 +1,69 @@ +// SPDX-License-Identifier: GPL-2.0 + +/dts-v1/; + +#include "loongson64g-package.dtsi" +#include "ls7a-pch.dtsi" + +/ { + compatible = "loongson,loongson64g-4core-ls7a"; + model = "loongson,ls3a4000_7a1000_evb"; + version = "v1.4"; +}; + +&package0 { + htvec: interrupt-controller@efdfb000080 { + compatible = "loongson,htvec-1.0"; + reg = <0xefd 0xfb000080 0x40>; + interrupt-controller; + #interrupt-cells = <1>; + + interrupt-parent = <&liointc>; + interrupts = <24 IRQ_TYPE_LEVEL_HIGH>, + <25 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <28 IRQ_TYPE_LEVEL_HIGH>, + <29 IRQ_TYPE_LEVEL_HIGH>, + <30 IRQ_TYPE_LEVEL_HIGH>, + <31 IRQ_TYPE_LEVEL_HIGH>; + }; +}; + +&pch { + msi: msi-controller@2ff00000 { + compatible = "loongson,pch-msi-1.0"; + reg = <0 0x2ff00000 0 0x8>; + interrupt-controller; + msi-controller; + loongson,msi-base-vec = <64>; + loongson,msi-num-vecs = <192>; + interrupt-parent = <&htvec>; + }; +}; + + +&lsdc { + /* use_vram_helper; */ + output-ports = <&dvo0 &dvo1>; + + #address-cells = <1>; + #size-cells = <0>; + + dvo0: dvo@0 { + /* 0 for DVO0 */ + reg = <0>; + connector = "vga-connector"; + encoder = "adi,adv7125"; + status = "okey"; + }; + + dvo1: dvo@1 { + /* 1 for DVO1 */ + reg = <1>; + connector = "dvi-connector"; + encoder = "ti,tfp410"; + digital; + status = "okay"; + }; +}; diff --git a/arch/mips/boot/dts/loongson/ls7a-pch.dtsi b/arch/mips/boot/dts/loongson/ls7a-pch.dtsi index 2f45fce2cdc4..70a0b7ac0839 100644 --- a/arch/mips/boot/dts/loongson/ls7a-pch.dtsi +++ b/arch/mips/boot/dts/loongson/ls7a-pch.dtsi @@ -160,7 +160,7 @@ interrupt-parent = <&pic>; };
- dc@6,1 { + lsdc: dc@6,1 { compatible = "pci0014,7a06.0", "pci0014,7a06", "pciclass030000",