Hi Laurentiu,
On Fri, 2019-12-06 at 11:52 +0200, Laurentiu Palcu wrote:
Add bindings for iMX8MQ Display Controller Subsystem.
Signed-off-by: Laurentiu Palcu laurentiu.palcu@nxp.com Reviewed-by: Rob Herring robh@kernel.org
.../bindings/display/imx/nxp,imx8mq-dcss.yaml | 86 ++++++++++++++++++++++ 1 file changed, 86 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml
diff --git a/Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml b/Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml new file mode 100644 index 00000000..efd2494 --- /dev/null +++ b/Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml @@ -0,0 +1,86 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2019 NXP +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/display/imx/nxp,imx8mq-dcss.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+title: iMX8MQ Display Controller Subsystem (DCSS)
+maintainers:
- Laurentiu Palcu laurentiu.palcu@nxp.com
+description:
- The DCSS (display controller sub system) is used to source up to three
- display buffers, compose them, and drive a display using HDMI 2.0a(with HDCP
- 2.2) or MIPI-DSI. The DCSS is intended to support up to 4kp60 displays. HDR10
- image processing capabilities are included to provide a solution capable of
- driving next generation high dynamic range displays.
+properties:
- compatible:
- const: nxp,imx8mq-dcss
- reg:
- maxItems: 2
- interrupts:
- maxItems: 3
- items:
- description: Context loader completion and error interrupt- description: DTG interrupt used to signal context loader trigger time- description: DTG interrupt for Vblank- interrupt-names:
- maxItems: 3
- items:
- const: ctx_ld- const: ctxld_kick- const: vblank- clocks:
- maxItems: 5
- items:
- description: Display APB clock for all peripheral PIO access interfaces- description: Display AXI clock needed by DPR, Scaler, RTRAM_CTRL- description: RTRAM clock- description: Pixel clock, can be driver either by HDMI phy clock or MIPI- description: DTRC clock, needed by video decompressor- clock-names:
- items:
- const: apb- const: axi- const: rtrm- const: pix- const: dtrc- port@0:
If there is just a single output port, I think the @0 unit address should be dropped. Otherwise the port node needs to contain a "reg = <0>;" property in the example below:
- type: object
- description: A port node pointing to a hdmi_in or mipi_in port node.
+examples:
- |
- dcss: display-controller@32e00000 {
#address-cells = <1>;#size-cells = <0>;
/soc@0/bus@32c00000/display-controller@32e00000: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
compatible = "nxp,imx8mq-dcss";reg = <0x32e00000 0x2d000>, <0x32e2f000 0x1000>;interrupts = <6>, <8>, <9>;interrupt-names = "ctx_ld", "ctxld_kick", "vblank";interrupt-parent = <&irqsteer>;clocks = <&clk 248>, <&clk 247>, <&clk 249>,<&clk 254>,<&clk 122>;clock-names = "apb", "axi", "rtrm", "pix", "dtrc";assigned-clocks = <&clk 107>, <&clk 109>, <&clk 266>;assigned-clock-parents = <&clk 78>, <&clk 78>, <&clk 3>;assigned-clock-rates = <800000000>,<400000000>;port@0 {
/soc@0/bus@32c00000/display-controller@32e00000/port@0: node has a unit name, but no reg property
regards Philipp