https://bugs.freedesktop.org/show_bug.cgi?id=82050
--- Comment #8 from Andy Furniss adf.lists@gmail.com --- kernel -
fb240a2534802a86742db51b7334138675bc435e is the first bad commit commit fb240a2534802a86742db51b7334138675bc435e Author: Michel Dänzer michel.daenzer@amd.com Date: Thu Jul 31 18:43:49 2014 +0900
drm/radeon: Always flush the HDP cache before submitting a CS to the GPU
This ensures the GPU sees all previous CPU writes to VRAM, which makes it safe:
* For userspace to stream data from CPU to GPU via VRAM instead of GTT * For IBs to be stored in VRAM instead of GTT * For ring buffers to be stored in VRAM instead of GTT, if the HPD flush is performed via MMIO
Signed-off-by: Michel Dänzer michel.daenzer@amd.com Signed-off-by: Alex Deucher alexander.deucher@amd.com