Hi Chandan,
This issue we found on the Zork project which uses the kernel 5.4 on. So I just implemented it on kernel 5.4. For finding out which is 3250c, I referenced the function which is implemented from another function. Below is the part where I found it.
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c- case CHIP_RAVEN: if (adev->rev_id >= 8) chip_name = "raven2"; else if (adev->pdev->device == 0x15d8) chip_name = "picasso"; else chip_name = "raven"; break;
BR, Ryan Lin.
Suggest you to rebase to amd-staging-drm-next tip and update your changes accordingly and re-submit.
Hi Ryan,
Is this change applicable on a specific kernel version? On latest I see IP DISCOVERY based impl for CHIP_RAVEN.
[Why] External displays take priority over internal display when there are fewer display controllers than displays.
[How] The root cause is because of that number of the crtc is not correct. The number of the crtc on the 3250c is 3, but on the 3500c is 4. On the source code, we can see that number of the crtc has been fixed at 4. Needs to set the num_crtc to 3 for 3250c platform.
v2:
- remove unnecessary comments and Id
Signed-off-by: Ryan Lin tsung-hua.lin@amd.com
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index 40c91b448f7da..455a2c45e8cda 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -2738,9 +2738,15 @@ static int dm_early_init(void *handle) break; #if defined(CONFIG_DRM_AMD_DC_DCN1_0) case CHIP_RAVEN:
adev->mode_info.num_crtc = 4;adev->mode_info.num_hpd = 4;adev->mode_info.num_dig = 4;
if (adev->rev_id >= 8) {May I know what this ">=8" indicate? Also, should it be external_rev_id if its based on old version?
adev->mode_info.num_crtc = 3;adev->mode_info.num_hpd = 3;adev->mode_info.num_dig = 3;} else {adev->mode_info.num_crtc = 4;adev->mode_info.num_hpd = 4;adev->mode_info.num_dig = 4;}#endif
#if defined(CONFIG_DRM_AMD_DC_DCN2_0)
2.25.1
BR, Chandan V N