On 6/24/2021 00:05, Matthew Brost wrote:
GuC will notify the driver, via G2H, if it fails to reset an engine. We recover by resorting to a full GPU reset.
Signed-off-by: Matthew Brost matthew.brost@intel.com Signed-off-by: Fernando Pacheco fernando.pacheco@intel.com
Reviewed-by: John Harrison John.C.Harrison@Intel.com
drivers/gpu/drm/i915/gt/uc/intel_guc.h | 2 + drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 3 ++ .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 43 +++++++++++++++++++ 3 files changed, 48 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc.h index e94b0ef733da..99742625e6ff 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h @@ -264,6 +264,8 @@ int intel_guc_sched_done_process_msg(struct intel_guc *guc, const u32 *msg, u32 len); int intel_guc_context_reset_process_msg(struct intel_guc *guc, const u32 *msg, u32 len); +int intel_guc_engine_failure_process_msg(struct intel_guc *guc,
const u32 *msg, u32 len);void intel_guc_submission_reset_prepare(struct intel_guc *guc); void intel_guc_submission_reset(struct intel_guc *guc, bool stalled);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c index a2020373b8e8..dd6177c8d75c 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c @@ -948,6 +948,9 @@ static int ct_process_request(struct intel_guc_ct *ct, struct ct_incoming_msg *r case INTEL_GUC_ACTION_CONTEXT_RESET_NOTIFICATION: ret = intel_guc_context_reset_process_msg(guc, payload, len); break;
- case INTEL_GUC_ACTION_ENGINE_FAILURE_NOTIFICATION:
ret = intel_guc_engine_failure_process_msg(guc, payload, len);break;diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c index 9845c5bd9832..c3223958dfe0 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c @@ -2227,6 +2227,49 @@ int intel_guc_context_reset_process_msg(struct intel_guc *guc, return 0; }
+static struct intel_engine_cs * +guc_lookup_engine(struct intel_guc *guc, u8 guc_class, u8 instance) +{
- struct intel_gt *gt = guc_to_gt(guc);
- u8 engine_class = guc_class_to_engine_class(guc_class);
- /* Class index is checked in class converter */
- GEM_BUG_ON(instance > MAX_ENGINE_INSTANCE);
- return gt->engine_class[engine_class][instance];
+}
+int intel_guc_engine_failure_process_msg(struct intel_guc *guc,
const u32 *msg, u32 len)+{
- struct intel_engine_cs *engine;
- u8 guc_class, instance;
- u32 reason;
- if (unlikely(len != 3)) {
drm_dbg(&guc_to_gt(guc)->i915->drm, "Invalid length %u", len);return -EPROTO;- }
- guc_class = msg[0];
- instance = msg[1];
- reason = msg[2];
- engine = guc_lookup_engine(guc, guc_class, instance);
- if (unlikely(!engine)) {
drm_dbg(&guc_to_gt(guc)->i915->drm,"Invalid engine %d:%d", guc_class, instance);return -EPROTO;- }
- intel_gt_handle_error(guc_to_gt(guc), engine->mask,
I915_ERROR_CAPTURE,"GuC failed to reset %s (reason=0x%08x)\n",engine->name, reason);- return 0;
+}
- void intel_guc_log_submission_info(struct intel_guc *guc, struct drm_printer *p) {