From: Alex Deucher alexander.deucher@amd.com
Switch all the asic specific mc idle calls to use the asic callback.
Signed-off-by: Alex Deucher alexander.deucher@amd.com --- drivers/gpu/drm/radeon/evergreen.c | 6 +++--- drivers/gpu/drm/radeon/ni.c | 3 +-- drivers/gpu/drm/radeon/r100.c | 2 +- drivers/gpu/drm/radeon/r300.c | 4 ++-- drivers/gpu/drm/radeon/r520.c | 4 ++-- drivers/gpu/drm/radeon/r600.c | 7 +++---- drivers/gpu/drm/radeon/rs400.c | 4 ++-- drivers/gpu/drm/radeon/rs600.c | 5 ++--- drivers/gpu/drm/radeon/rs690.c | 4 ++-- drivers/gpu/drm/radeon/rv515.c | 5 ++--- drivers/gpu/drm/radeon/rv770.c | 4 ++-- 11 files changed, 22 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 758f04b..755a2a9 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c @@ -1270,7 +1270,7 @@ void evergreen_mc_program(struct radeon_device *rdev) WREG32(HDP_REG_COHERENCY_FLUSH_CNTL, 0);
evergreen_mc_stop(rdev, &save); - if (evergreen_mc_wait_for_idle(rdev)) { + if (radeon_mc_wait_for_idle(rdev)) { dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); } /* Lockout access through VGA aperture*/ @@ -1318,7 +1318,7 @@ void evergreen_mc_program(struct radeon_device *rdev) WREG32(MC_VM_AGP_TOP, 0x0FFFFFFF); WREG32(MC_VM_AGP_BOT, 0x0FFFFFFF); } - if (evergreen_mc_wait_for_idle(rdev)) { + if (radeon_mc_wait_for_idle(rdev)) { dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); } evergreen_mc_resume(rdev, &save); @@ -2425,7 +2425,7 @@ static int evergreen_gpu_soft_reset(struct radeon_device *rdev) dev_info(rdev->dev, " SRBM_STATUS=0x%08X\n", RREG32(SRBM_STATUS)); evergreen_mc_stop(rdev, &save); - if (evergreen_mc_wait_for_idle(rdev)) { + if (radeon_mc_wait_for_idle(rdev)) { dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); } /* Disable CP parsing/prefetching */ diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c index 160799c..92f5eec 100644 --- a/drivers/gpu/drm/radeon/ni.c +++ b/drivers/gpu/drm/radeon/ni.c @@ -36,7 +36,6 @@
extern void evergreen_mc_stop(struct radeon_device *rdev, struct evergreen_mc_save *save); extern void evergreen_mc_resume(struct radeon_device *rdev, struct evergreen_mc_save *save); -extern int evergreen_mc_wait_for_idle(struct radeon_device *rdev); extern void evergreen_mc_program(struct radeon_device *rdev); extern void evergreen_irq_suspend(struct radeon_device *rdev); extern int evergreen_mc_init(struct radeon_device *rdev); @@ -1385,7 +1384,7 @@ static int cayman_gpu_soft_reset(struct radeon_device *rdev) RREG32(0x14DC));
evergreen_mc_stop(rdev, &save); - if (evergreen_mc_wait_for_idle(rdev)) { + if (radeon_mc_wait_for_idle(rdev)) { dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); } /* Disable CP parsing/prefetching */ diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c index 42ae955..6dd7cf8 100644 --- a/drivers/gpu/drm/radeon/r100.c +++ b/drivers/gpu/drm/radeon/r100.c @@ -3882,7 +3882,7 @@ static void r100_mc_program(struct radeon_device *rdev) WREG32(R_00015C_AGP_BASE_2, 0); } /* Wait for mc idle */ - if (r100_mc_wait_for_idle(rdev)) + if (radeon_mc_wait_for_idle(rdev)) dev_warn(rdev->dev, "Wait for MC idle timeout.\n"); /* Program MC, should be a 32bits limited address space */ WREG32(R_000148_MC_FB_LOCATION, diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c index fa14383..d10b6be 100644 --- a/drivers/gpu/drm/radeon/r300.c +++ b/drivers/gpu/drm/radeon/r300.c @@ -369,7 +369,7 @@ void r300_gpu_init(struct radeon_device *rdev) printk(KERN_WARNING "Failed to wait GUI idle while " "programming pipes. Bad things might happen.\n"); } - if (r300_mc_wait_for_idle(rdev)) { + if (radeon_mc_wait_for_idle(rdev)) { printk(KERN_WARNING "Failed to wait MC idle while " "programming pipes. Bad things might happen.\n"); } @@ -1339,7 +1339,7 @@ void r300_mc_program(struct radeon_device *rdev) WREG32(R_00015C_AGP_BASE_2, 0); } /* Wait for mc idle */ - if (r300_mc_wait_for_idle(rdev)) + if (radeon_mc_wait_for_idle(rdev)) DRM_INFO("Failed to wait MC idle before programming MC.\n"); /* Program MC, should be a 32bits limited address space */ WREG32(R_000148_MC_FB_LOCATION, diff --git a/drivers/gpu/drm/radeon/r520.c b/drivers/gpu/drm/radeon/r520.c index ebcc15b..0513360 100644 --- a/drivers/gpu/drm/radeon/r520.c +++ b/drivers/gpu/drm/radeon/r520.c @@ -85,7 +85,7 @@ static void r520_gpu_init(struct radeon_device *rdev) tmp = (1 << pipe_select_current) | (((gb_pipe_select >> 8) & 0xF) << 4); WREG32_PLL(0x000D, tmp); - if (r520_mc_wait_for_idle(rdev)) { + if (radeon_mc_wait_for_idle(rdev)) { printk(KERN_WARNING "Failed to wait MC idle while " "programming pipes. Bad things might happen.\n"); } @@ -139,7 +139,7 @@ void r520_mc_program(struct radeon_device *rdev) rv515_mc_stop(rdev, &save);
/* Wait for mc idle */ - if (r520_mc_wait_for_idle(rdev)) + if (radeon_mc_wait_for_idle(rdev)) dev_warn(rdev->dev, "Wait MC idle timeout before updating MC.\n"); /* Write VRAM size in case we are limiting it */ WREG32(R_0000F8_CONFIG_MEMSIZE, rdev->mc.real_vram_size); diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index 72dea59..fb85f80 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c @@ -96,7 +96,6 @@ MODULE_FIRMWARE("radeon/SUMO2_me.bin"); int r600_debugfs_mc_info_init(struct radeon_device *rdev);
/* r600,rv610,rv630,rv620,rv635,rv670 */ -int r600_mc_wait_for_idle(struct radeon_device *rdev); void r600_gpu_init(struct radeon_device *rdev); void r600_fini(struct radeon_device *rdev); void r600_irq_disable(struct radeon_device *rdev); @@ -1052,7 +1051,7 @@ static void r600_mc_program(struct radeon_device *rdev) WREG32(HDP_REG_COHERENCY_FLUSH_CNTL, 0);
rv515_mc_stop(rdev, &save); - if (r600_mc_wait_for_idle(rdev)) { + if (radeon_mc_wait_for_idle(rdev)) { dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); } /* Lockout access through VGA aperture (doesn't exist before R600) */ @@ -1092,7 +1091,7 @@ static void r600_mc_program(struct radeon_device *rdev) WREG32(MC_VM_AGP_TOP, 0x0FFFFFFF); WREG32(MC_VM_AGP_BOT, 0x0FFFFFFF); } - if (r600_mc_wait_for_idle(rdev)) { + if (radeon_mc_wait_for_idle(rdev)) { dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); } rv515_mc_resume(rdev, &save); @@ -1298,7 +1297,7 @@ int r600_gpu_soft_reset(struct radeon_device *rdev) dev_info(rdev->dev, " R_000E50_SRBM_STATUS=0x%08X\n", RREG32(R_000E50_SRBM_STATUS)); rv515_mc_stop(rdev, &save); - if (r600_mc_wait_for_idle(rdev)) { + if (radeon_mc_wait_for_idle(rdev)) { dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); } /* Disable CP parsing/prefetching */ diff --git a/drivers/gpu/drm/radeon/rs400.c b/drivers/gpu/drm/radeon/rs400.c index 4cf381b..2191bb3 100644 --- a/drivers/gpu/drm/radeon/rs400.c +++ b/drivers/gpu/drm/radeon/rs400.c @@ -246,7 +246,7 @@ void rs400_gpu_init(struct radeon_device *rdev) { /* FIXME: is this correct ? */ r420_pipes_init(rdev); - if (rs400_mc_wait_for_idle(rdev)) { + if (radeon_mc_wait_for_idle(rdev)) { printk(KERN_WARNING "rs400: Failed to wait MC idle while " "programming pipes. Bad things might happen. %08x\n", RREG32(RADEON_MC_STATUS)); } @@ -378,7 +378,7 @@ void rs400_mc_program(struct radeon_device *rdev) r100_mc_stop(rdev, &save);
/* Wait for mc idle */ - if (rs400_mc_wait_for_idle(rdev)) + if (radeon_mc_wait_for_idle(rdev)) dev_warn(rdev->dev, "rs400: Wait MC idle timeout before updating MC.\n"); WREG32(R_000148_MC_FB_LOCATION, S_000148_MC_FB_START(rdev->mc.vram_start >> 16) | diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c index d25cf86..495afae 100644 --- a/drivers/gpu/drm/radeon/rs600.c +++ b/drivers/gpu/drm/radeon/rs600.c @@ -44,7 +44,6 @@ #include "rs600_reg_safe.h"
void rs600_gpu_init(struct radeon_device *rdev); -int rs600_mc_wait_for_idle(struct radeon_device *rdev);
void avivo_wait_for_vblank(struct radeon_device *rdev, int crtc) { @@ -734,7 +733,7 @@ void rs600_gpu_init(struct radeon_device *rdev) { r420_pipes_init(rdev); /* Wait for mc idle */ - if (rs600_mc_wait_for_idle(rdev)) + if (radeon_mc_wait_for_idle(rdev)) dev_warn(rdev->dev, "Wait MC idle timeout before updating MC.\n"); }
@@ -820,7 +819,7 @@ static void rs600_mc_program(struct radeon_device *rdev) rv515_mc_stop(rdev, &save);
/* Wait for mc idle */ - if (rs600_mc_wait_for_idle(rdev)) + if (radeon_mc_wait_for_idle(rdev)) dev_warn(rdev->dev, "Wait MC idle timeout before updating MC.\n");
/* FIXME: What does AGP means for such chipset ? */ diff --git a/drivers/gpu/drm/radeon/rs690.c b/drivers/gpu/drm/radeon/rs690.c index f2c3b9d..4bf94bf 100644 --- a/drivers/gpu/drm/radeon/rs690.c +++ b/drivers/gpu/drm/radeon/rs690.c @@ -50,7 +50,7 @@ static void rs690_gpu_init(struct radeon_device *rdev) { /* FIXME: is this correct ? */ r420_pipes_init(rdev); - if (rs690_mc_wait_for_idle(rdev)) { + if (radeon_mc_wait_for_idle(rdev)) { printk(KERN_WARNING "Failed to wait MC idle while " "programming pipes. Bad things might happen.\n"); } @@ -589,7 +589,7 @@ void rs690_mc_program(struct radeon_device *rdev) rv515_mc_stop(rdev, &save);
/* Wait for mc idle */ - if (rs690_mc_wait_for_idle(rdev)) + if (radeon_mc_wait_for_idle(rdev)) dev_warn(rdev->dev, "Wait MC idle timeout before updating MC.\n"); /* Program MC, should be a 32bits limited address space */ WREG32_MC(R_000100_MCCFG_FB_LOCATION, diff --git a/drivers/gpu/drm/radeon/rv515.c b/drivers/gpu/drm/radeon/rv515.c index c0549b1..136768e 100644 --- a/drivers/gpu/drm/radeon/rv515.c +++ b/drivers/gpu/drm/radeon/rv515.c @@ -38,7 +38,6 @@ int rv515_debugfs_pipes_info_init(struct radeon_device *rdev); int rv515_debugfs_ga_info_init(struct radeon_device *rdev); void rv515_gpu_init(struct radeon_device *rdev); -int rv515_mc_wait_for_idle(struct radeon_device *rdev);
void rv515_debugfs(struct radeon_device *rdev) { @@ -163,7 +162,7 @@ void rv515_gpu_init(struct radeon_device *rdev) printk(KERN_WARNING "Failed to wait GUI idle while " "reseting GPU. Bad things might happen.\n"); } - if (rv515_mc_wait_for_idle(rdev)) { + if (radeon_mc_wait_for_idle(rdev)) { printk(KERN_WARNING "Failed to wait MC idle while " "programming pipes. Bad things might happen.\n"); } @@ -331,7 +330,7 @@ void rv515_mc_program(struct radeon_device *rdev) rv515_mc_stop(rdev, &save);
/* Wait for mc idle */ - if (rv515_mc_wait_for_idle(rdev)) + if (radeon_mc_wait_for_idle(rdev)) dev_warn(rdev->dev, "Wait MC idle timeout before updating MC.\n"); /* Write VRAM size in case we are limiting it */ WREG32(R_0000F8_CONFIG_MEMSIZE, rdev->mc.real_vram_size); diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c index c62ae4b..efe2864 100644 --- a/drivers/gpu/drm/radeon/rv770.c +++ b/drivers/gpu/drm/radeon/rv770.c @@ -254,7 +254,7 @@ static void rv770_mc_program(struct radeon_device *rdev) tmp = RREG32(HDP_DEBUG1);
rv515_mc_stop(rdev, &save); - if (r600_mc_wait_for_idle(rdev)) { + if (radeon_mc_wait_for_idle(rdev)) { dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); } /* Lockout access through VGA aperture*/ @@ -296,7 +296,7 @@ static void rv770_mc_program(struct radeon_device *rdev) WREG32(MC_VM_AGP_TOP, 0x0FFFFFFF); WREG32(MC_VM_AGP_BOT, 0x0FFFFFFF); } - if (r600_mc_wait_for_idle(rdev)) { + if (radeon_mc_wait_for_idle(rdev)) { dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); } rv515_mc_resume(rdev, &save);