Hi, Yongqiang:
On Thu, 2019-08-29 at 22:50 +0800, yongqiang.niu@mediatek.com wrote:
From: Yongqiang Niu yongqiang.niu@mediatek.com
This patch add connection from OVL0 to OVL_2L0
Reviewed-by: CK Hu ck.hu@mediatek.com
Signed-off-by: Yongqiang Niu yongqiang.niu@mediatek.com
drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 5 +++++ 1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c index effc24a..42a130a 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c @@ -137,6 +137,8 @@ #define DPI_SEL_IN_BLS 0x0 #define DSI_SEL_IN_RDMA 0x1
+#define OVL0_MOUT_EN_OVL0_2L BIT(4)
struct mtk_disp_mutex { int id; bool claimed; @@ -299,6 +301,9 @@ static unsigned int mtk_ddp_mout_en(const struct mtk_mmsys_reg_data *data, } else if (cur == DDP_COMPONENT_OD1 && next == DDP_COMPONENT_RDMA1) { *addr = DISP_REG_CONFIG_DISP_OD_MOUT_EN; value = OD1_MOUT_EN_RDMA1;
- } else if (cur == DDP_COMPONENT_OVL0 && next == DDP_COMPONENT_OVL_2L0) {
*addr = data->ovl0_mout_en;value = OVL0_MOUT_EN_OVL0_2L;