On Wed, May 27, 2020 at 8:50 AM Maxime Ripard maxime@cerno.tech wrote:
The BCM2711 has 5 pixelvalves, so now that our driver is ready, let's add support for them.
Signed-off-by: Maxime Ripard maxime@cerno.tech
drivers/gpu/drm/vc4/vc4_crtc.c | 84 ++++++++++++++++++++++++++++++++++- drivers/gpu/drm/vc4/vc4_regs.h | 6 +++- 2 files changed, 88 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c index 9efd7cb25590..a577ed8f929f 100644 --- a/drivers/gpu/drm/vc4/vc4_crtc.c +++ b/drivers/gpu/drm/vc4/vc4_crtc.c @@ -229,6 +229,13 @@ static u32 vc4_get_fifo_full_level(struct vc4_crtc *vc4_crtc, u32 format) case PV_CONTROL_FORMAT_24: case PV_CONTROL_FORMAT_DSIV_24: default:
/*
* For some reason, the pixelvalve4 doesn't work with
* the usual formula and will only work with 32.
*/
if (vc4_crtc->data->hvs_output == 5)
return 32;
return fifo_len_bytes - 3 * HVS_FIFO_LATENCY_PIX; }
} @@ -237,9 +244,14 @@ static u32 vc4_crtc_get_fifo_full_level_bits(struct vc4_crtc *vc4_crtc, u32 format) { u32 level = vc4_get_fifo_full_level(vc4_crtc, format);
u32 ret = 0;
return VC4_SET_FIELD(level & 0x3f,
PV_CONTROL_FIFO_LEVEL);
if (level > 0x3f)
ret |= VC4_SET_FIELD((level >> 6) & 0x3,
PV5_CONTROL_FIFO_LEVEL_HIGH);
I would drop the conditional here (ORing in zero is fine), and also the & 3 because it would be good to get a warning if you picked a fifo full level that doesn't fit in the field.
return ret | VC4_SET_FIELD(level & 0x3f,
PV_CONTROL_FIFO_LEVEL);
}
/* @@ -277,6 +289,8 @@ static void vc4_crtc_pixelvalve_reset(struct drm_crtc *crtc)
static void vc4_crtc_config_pv(struct drm_crtc *crtc) {
struct drm_device *dev = crtc->dev;
struct vc4_dev *vc4 = to_vc4_dev(dev); struct drm_encoder *encoder = vc4_get_crtc_encoder(crtc); struct vc4_encoder *vc4_encoder = to_vc4_encoder(encoder); struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
@@ -356,6 +370,10 @@ static void vc4_crtc_config_pv(struct drm_crtc *crtc) if (is_dsi) CRTC_WRITE(PV_HACT_ACT, mode->hdisplay * pixel_rep);
if (vc4->hvs->hvs5)
CRTC_WRITE(PV_MUX_CFG,
VC4_SET_FIELD(8, PV_MUX_CFG_RGB_PIXEL_MUX_MODE));
Can we get some #defines in the reg header instead of a magic value?
Other than that, r-b.