Hi guys,
Well let's face it AGP is a total headache to maintain and dead for at least 10+ years.
We have a lot of x86 specific stuff in the architecture independent graphics memory management to get the caching right, abusing the DMA API on multiple occasions, need to distinct between AGP and driver specific page tables etc etc...
So the idea here is to just go ahead and remove the support from Radeon and Nouveau and then drop the necessary code from TTM.
For Radeon this means that we just switch over to the driver specific page tables and everything should more or less continue to work.
For Nouveau I'm not 100% sure, but from the code it of hand looks like we can do it similar to Radeon.
Please comment what you think about this.
Regards, Christian.
AGP is deprecated for 10+ years now and not used any more on modern hardware.
Old hardware should continue to work in PCI mode.
Signed-off-by: Christian König christian.koenig@amd.com --- drivers/gpu/drm/radeon/Makefile | 4 +- drivers/gpu/drm/radeon/evergreen.c | 7 - drivers/gpu/drm/radeon/r100.c | 10 +- drivers/gpu/drm/radeon/r300.c | 9 - drivers/gpu/drm/radeon/r420.c | 9 - drivers/gpu/drm/radeon/r520.c | 8 - drivers/gpu/drm/radeon/r600.c | 6 - drivers/gpu/drm/radeon/radeon.h | 11 - drivers/gpu/drm/radeon/radeon_agp.c | 290 ------------------------- drivers/gpu/drm/radeon/radeon_device.c | 23 +- drivers/gpu/drm/radeon/radeon_drv.c | 9 - drivers/gpu/drm/radeon/radeon_ttm.c | 39 ---- drivers/gpu/drm/radeon/rv515.c | 9 - drivers/gpu/drm/radeon/rv770.c | 7 - 14 files changed, 4 insertions(+), 437 deletions(-) delete mode 100644 drivers/gpu/drm/radeon/radeon_agp.c
diff --git a/drivers/gpu/drm/radeon/Makefile b/drivers/gpu/drm/radeon/Makefile index c693b2ca0329..77429cfd303e 100644 --- a/drivers/gpu/drm/radeon/Makefile +++ b/drivers/gpu/drm/radeon/Makefile @@ -61,8 +61,8 @@ radeon-y := radeon_drv.o
# add KMS driver radeon-y += radeon_device.o radeon_asic.o radeon_kms.o \ - radeon_atombios.o radeon_agp.o atombios_crtc.o radeon_combios.o \ - atom.o radeon_fence.o radeon_ttm.o radeon_object.o radeon_gart.o \ + radeon_atombios.o atombios_crtc.o radeon_combios.o atom.o \ + radeon_fence.o radeon_ttm.o radeon_object.o radeon_gart.o \ radeon_legacy_crtc.o radeon_legacy_encoders.o radeon_connectors.o \ radeon_encoders.o radeon_display.o radeon_cursor.o radeon_i2c.o \ radeon_clocks.o radeon_fb.o radeon_gem.o radeon_ring.o radeon_irq_kms.o \ diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 14d90dc376e7..66b3d9a2c6dd 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c @@ -5216,12 +5216,6 @@ int evergreen_init(struct radeon_device *rdev) r = radeon_fence_driver_init(rdev); if (r) return r; - /* initialize AGP */ - if (rdev->flags & RADEON_IS_AGP) { - r = radeon_agp_init(rdev); - if (r) - radeon_agp_disable(rdev); - } /* initialize memory controller */ r = evergreen_mc_init(rdev); if (r) @@ -5315,7 +5309,6 @@ void evergreen_fini(struct radeon_device *rdev) r600_vram_scratch_fini(rdev); radeon_gem_fini(rdev); radeon_fence_driver_fini(rdev); - radeon_agp_fini(rdev); radeon_bo_fini(rdev); radeon_atombios_fini(rdev); kfree(rdev->bios); diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c index 24c8db673931..320b1b40a30a 100644 --- a/drivers/gpu/drm/radeon/r100.c +++ b/drivers/gpu/drm/radeon/r100.c @@ -3382,7 +3382,7 @@ void r100_bandwidth_update(struct radeon_device *rdev)
if (rdev->flags & RADEON_IS_AGP) { fixed20_12 agpmode_ff; - agpmode_ff.full = dfixed_const(radeon_agpmode); + agpmode_ff.full = dfixed_const(0); temp_ff.full = dfixed_const_666(16); sclk_eff_ff.full -= dfixed_mul(agpmode_ff, temp_ff); } @@ -3992,7 +3992,6 @@ void r100_fini(struct radeon_device *rdev) radeon_gem_fini(rdev); if (rdev->flags & RADEON_IS_PCI) r100_pci_gart_fini(rdev); - radeon_agp_fini(rdev); radeon_irq_kms_fini(rdev); radeon_fence_driver_fini(rdev); radeon_bo_fini(rdev); @@ -4068,13 +4067,6 @@ int r100_init(struct radeon_device *rdev) r100_errata(rdev); /* Initialize clocks */ radeon_get_clock_info(rdev->ddev); - /* initialize AGP */ - if (rdev->flags & RADEON_IS_AGP) { - r = radeon_agp_init(rdev); - if (r) { - radeon_agp_disable(rdev); - } - } /* initialize VRAM */ r100_mc_init(rdev); /* Fence driver */ diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c index 3b7ead5be5bf..afd688629cf9 100644 --- a/drivers/gpu/drm/radeon/r300.c +++ b/drivers/gpu/drm/radeon/r300.c @@ -1498,7 +1498,6 @@ void r300_fini(struct radeon_device *rdev) rv370_pcie_gart_fini(rdev); if (rdev->flags & RADEON_IS_PCI) r100_pci_gart_fini(rdev); - radeon_agp_fini(rdev); radeon_irq_kms_fini(rdev); radeon_fence_driver_fini(rdev); radeon_bo_fini(rdev); @@ -1547,13 +1546,6 @@ int r300_init(struct radeon_device *rdev) r300_errata(rdev); /* Initialize clocks */ radeon_get_clock_info(rdev->ddev); - /* initialize AGP */ - if (rdev->flags & RADEON_IS_AGP) { - r = radeon_agp_init(rdev); - if (r) { - radeon_agp_disable(rdev); - } - } /* initialize memory controller */ r300_mc_init(rdev); /* Fence driver */ @@ -1592,7 +1584,6 @@ int r300_init(struct radeon_device *rdev) rv370_pcie_gart_fini(rdev); if (rdev->flags & RADEON_IS_PCI) r100_pci_gart_fini(rdev); - radeon_agp_fini(rdev); rdev->accel_working = false; } return 0; diff --git a/drivers/gpu/drm/radeon/r420.c b/drivers/gpu/drm/radeon/r420.c index 1d4c04e0a449..3cb337dacd56 100644 --- a/drivers/gpu/drm/radeon/r420.c +++ b/drivers/gpu/drm/radeon/r420.c @@ -366,7 +366,6 @@ void r420_fini(struct radeon_device *rdev) rv370_pcie_gart_fini(rdev); if (rdev->flags & RADEON_IS_PCI) r100_pci_gart_fini(rdev); - radeon_agp_fini(rdev); radeon_irq_kms_fini(rdev); radeon_fence_driver_fini(rdev); radeon_bo_fini(rdev); @@ -419,13 +418,6 @@ int r420_init(struct radeon_device *rdev)
/* Initialize clocks */ radeon_get_clock_info(rdev->ddev); - /* initialize AGP */ - if (rdev->flags & RADEON_IS_AGP) { - r = radeon_agp_init(rdev); - if (r) { - radeon_agp_disable(rdev); - } - } /* initialize memory controller */ r300_mc_init(rdev); r420_debugfs(rdev); @@ -470,7 +462,6 @@ int r420_init(struct radeon_device *rdev) rv370_pcie_gart_fini(rdev); if (rdev->flags & RADEON_IS_PCI) r100_pci_gart_fini(rdev); - radeon_agp_fini(rdev); rdev->accel_working = false; } return 0; diff --git a/drivers/gpu/drm/radeon/r520.c b/drivers/gpu/drm/radeon/r520.c index fc78e64ae727..76ac87d72406 100644 --- a/drivers/gpu/drm/radeon/r520.c +++ b/drivers/gpu/drm/radeon/r520.c @@ -288,13 +288,6 @@ int r520_init(struct radeon_device *rdev) } /* Initialize clocks */ radeon_get_clock_info(rdev->ddev); - /* initialize AGP */ - if (rdev->flags & RADEON_IS_AGP) { - r = radeon_agp_init(rdev); - if (r) { - radeon_agp_disable(rdev); - } - } /* initialize memory controller */ r520_mc_init(rdev); rv515_debugfs(rdev); @@ -324,7 +317,6 @@ int r520_init(struct radeon_device *rdev) radeon_ib_pool_fini(rdev); radeon_irq_kms_fini(rdev); rv370_pcie_gart_fini(rdev); - radeon_agp_fini(rdev); rdev->accel_working = false; } return 0; diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index d9a33ca768f3..4a5ac15893c2 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c @@ -3286,11 +3286,6 @@ int r600_init(struct radeon_device *rdev) r = radeon_fence_driver_init(rdev); if (r) return r; - if (rdev->flags & RADEON_IS_AGP) { - r = radeon_agp_init(rdev); - if (r) - radeon_agp_disable(rdev); - } r = r600_mc_init(rdev); if (r) return r; @@ -3353,7 +3348,6 @@ void r600_fini(struct radeon_device *rdev) radeon_irq_kms_fini(rdev); r600_pcie_gart_fini(rdev); r600_vram_scratch_fini(rdev); - radeon_agp_fini(rdev); radeon_gem_fini(rdev); radeon_fence_driver_fini(rdev); radeon_bo_fini(rdev); diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index 30e32adc1fc6..377e1403b134 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h @@ -91,7 +91,6 @@ extern int radeon_no_wb; extern int radeon_modeset; extern int radeon_dynclks; extern int radeon_r4xx_atom; -extern int radeon_agpmode; extern int radeon_vram_limit; extern int radeon_gart_size; extern int radeon_benchmarking; @@ -1116,16 +1115,6 @@ typedef int (*radeon_packet0_check_t)(struct radeon_cs_parser *p, typedef int (*radeon_packet3_check_t)(struct radeon_cs_parser *p, struct radeon_cs_packet *pkt);
- -/* - * AGP - */ -int radeon_agp_init(struct radeon_device *rdev); -void radeon_agp_resume(struct radeon_device *rdev); -void radeon_agp_suspend(struct radeon_device *rdev); -void radeon_agp_fini(struct radeon_device *rdev); - - /* * Writeback */ diff --git a/drivers/gpu/drm/radeon/radeon_agp.c b/drivers/gpu/drm/radeon/radeon_agp.c deleted file mode 100644 index 0aca7bdf54c7..000000000000 --- a/drivers/gpu/drm/radeon/radeon_agp.c +++ /dev/null @@ -1,290 +0,0 @@ -/* - * Copyright 2008 Red Hat Inc. - * Copyright 2009 Jerome Glisse. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Dave Airlie - * Jerome Glisse glisse@freedesktop.org - */ - -#include <linux/pci.h> - -#include <drm/drm_agpsupport.h> -#include <drm/drm_device.h> -#include <drm/radeon_drm.h> - -#include "radeon.h" - -#if IS_ENABLED(CONFIG_AGP) - -struct radeon_agpmode_quirk { - u32 hostbridge_vendor; - u32 hostbridge_device; - u32 chip_vendor; - u32 chip_device; - u32 subsys_vendor; - u32 subsys_device; - u32 default_mode; -}; - -static struct radeon_agpmode_quirk radeon_agpmode_quirk_list[] = { - /* Intel E7505 Memory Controller Hub / RV350 AR [Radeon 9600XT] Needs AGPMode 4 (deb #515326) */ - { PCI_VENDOR_ID_INTEL, 0x2550, PCI_VENDOR_ID_ATI, 0x4152, 0x1458, 0x4038, 4}, - /* Intel 82865G/PE/P DRAM Controller/Host-Hub / Mobility 9800 Needs AGPMode 4 (deb #462590) */ - { PCI_VENDOR_ID_INTEL, 0x2570, PCI_VENDOR_ID_ATI, 0x4a4e, PCI_VENDOR_ID_DELL, 0x5106, 4}, - /* Intel 82865G/PE/P DRAM Controller/Host-Hub / RV280 [Radeon 9200 SE] Needs AGPMode 4 (lp #300304) */ - { PCI_VENDOR_ID_INTEL, 0x2570, PCI_VENDOR_ID_ATI, 0x5964, - 0x148c, 0x2073, 4}, - /* Intel 82855PM Processor to I/O Controller / Mobility M6 LY Needs AGPMode 1 (deb #467235) */ - { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c59, - PCI_VENDOR_ID_IBM, 0x052f, 1}, - /* Intel 82855PM host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (lp #195051) */ - { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4e50, - PCI_VENDOR_ID_IBM, 0x0550, 1}, - /* Intel 82855PM host bridge / RV250/M9 GL [Mobility FireGL 9000/Radeon 9000] needs AGPMode 1 (Thinkpad T40p) */ - { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c66, - PCI_VENDOR_ID_IBM, 0x054d, 1}, - /* Intel 82855PM host bridge / Mobility M7 needs AGPMode 1 */ - { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c57, - PCI_VENDOR_ID_IBM, 0x0530, 1}, - /* Intel 82855PM host bridge / FireGL Mobility T2 RV350 Needs AGPMode 2 (fdo #20647) */ - { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4e54, - PCI_VENDOR_ID_IBM, 0x054f, 2}, - /* Intel 82855PM host bridge / Mobility M9+ / VaioPCG-V505DX Needs AGPMode 2 (fdo #17928) */ - { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x5c61, - PCI_VENDOR_ID_SONY, 0x816b, 2}, - /* Intel 82855PM Processor to I/O Controller / Mobility M9+ Needs AGPMode 8 (phoronix forum) */ - { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x5c61, - PCI_VENDOR_ID_SONY, 0x8195, 8}, - /* Intel 82830 830 Chipset Host Bridge / Mobility M6 LY Needs AGPMode 2 (fdo #17360)*/ - { PCI_VENDOR_ID_INTEL, 0x3575, PCI_VENDOR_ID_ATI, 0x4c59, - PCI_VENDOR_ID_DELL, 0x00e3, 2}, - /* Intel 82852/82855 host bridge / Mobility FireGL 9000 RV250 Needs AGPMode 1 (lp #296617) */ - { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4c66, - PCI_VENDOR_ID_DELL, 0x0149, 1}, - /* Intel 82855PM host bridge / Mobility FireGL 9000 RV250 Needs AGPMode 1 for suspend/resume */ - { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c66, - PCI_VENDOR_ID_IBM, 0x0531, 1}, - /* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (deb #467460) */ - { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50, - 0x1025, 0x0061, 1}, - /* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (lp #203007) */ - { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50, - 0x1025, 0x0064, 1}, - /* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (lp #141551) */ - { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50, - PCI_VENDOR_ID_ASUSTEK, 0x1942, 1}, - /* Intel 82852/82855 host bridge / Mobility 9600/9700 Needs AGPMode 1 (deb #510208) */ - { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50, - 0x10cf, 0x127f, 1}, - /* ASRock K7VT4A+ AGP 8x / ATI Radeon 9250 AGP Needs AGPMode 4 (lp #133192) */ - { 0x1849, 0x3189, PCI_VENDOR_ID_ATI, 0x5960, - 0x1787, 0x5960, 4}, - /* VIA K8M800 Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 4 (fdo #12544) */ - { PCI_VENDOR_ID_VIA, 0x0204, PCI_VENDOR_ID_ATI, 0x5960, - 0x17af, 0x2020, 4}, - /* VIA KT880 Host Bridge / RV350 [Radeon 9550] Needs AGPMode 4 (fdo #19981) */ - { PCI_VENDOR_ID_VIA, 0x0269, PCI_VENDOR_ID_ATI, 0x4153, - PCI_VENDOR_ID_ASUSTEK, 0x003c, 4}, - /* VIA VT8363 Host Bridge / R200 QL [Radeon 8500] Needs AGPMode 2 (lp #141551) */ - { PCI_VENDOR_ID_VIA, 0x0305, PCI_VENDOR_ID_ATI, 0x514c, - PCI_VENDOR_ID_ATI, 0x013a, 2}, - /* VIA VT82C693A Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 2 (deb #515512) */ - { PCI_VENDOR_ID_VIA, 0x0691, PCI_VENDOR_ID_ATI, 0x5960, - PCI_VENDOR_ID_ASUSTEK, 0x004c, 2}, - /* VIA VT82C693A Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 2 */ - { PCI_VENDOR_ID_VIA, 0x0691, PCI_VENDOR_ID_ATI, 0x5960, - PCI_VENDOR_ID_ASUSTEK, 0x0054, 2}, - /* VIA VT8377 Host Bridge / R200 QM [Radeon 9100] Needs AGPMode 4 (deb #461144) */ - { PCI_VENDOR_ID_VIA, 0x3189, PCI_VENDOR_ID_ATI, 0x514d, - 0x174b, 0x7149, 4}, - /* VIA VT8377 Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 4 (lp #312693) */ - { PCI_VENDOR_ID_VIA, 0x3189, PCI_VENDOR_ID_ATI, 0x5960, - 0x1462, 0x0380, 4}, - /* VIA VT8377 Host Bridge / RV280 Needs AGPMode 4 (ati ML) */ - { PCI_VENDOR_ID_VIA, 0x3189, PCI_VENDOR_ID_ATI, 0x5964, - 0x148c, 0x2073, 4}, - /* ATI Host Bridge / RV280 [M9+] Needs AGPMode 1 (phoronix forum) */ - { PCI_VENDOR_ID_ATI, 0xcbb2, PCI_VENDOR_ID_ATI, 0x5c61, - PCI_VENDOR_ID_SONY, 0x8175, 1}, - { 0, 0, 0, 0, 0, 0, 0 }, -}; -#endif - -int radeon_agp_init(struct radeon_device *rdev) -{ -#if IS_ENABLED(CONFIG_AGP) - struct radeon_agpmode_quirk *p = radeon_agpmode_quirk_list; - struct drm_agp_mode mode; - struct drm_agp_info info; - uint32_t agp_status; - int default_mode; - bool is_v3; - int ret; - - /* Acquire AGP. */ - ret = drm_agp_acquire(rdev->ddev); - if (ret) { - DRM_ERROR("Unable to acquire AGP: %d\n", ret); - return ret; - } - - ret = drm_agp_info(rdev->ddev, &info); - if (ret) { - drm_agp_release(rdev->ddev); - DRM_ERROR("Unable to get AGP info: %d\n", ret); - return ret; - } - - if (rdev->ddev->agp->agp_info.aper_size < 32) { - drm_agp_release(rdev->ddev); - dev_warn(rdev->dev, "AGP aperture too small (%zuM) " - "need at least 32M, disabling AGP\n", - rdev->ddev->agp->agp_info.aper_size); - return -EINVAL; - } - - mode.mode = info.mode; - /* chips with the agp to pcie bridge don't have the AGP_STATUS register - * Just use the whatever mode the host sets up. - */ - if (rdev->family <= CHIP_RV350) - agp_status = (RREG32(RADEON_AGP_STATUS) | RADEON_AGPv3_MODE) & mode.mode; - else - agp_status = mode.mode; - is_v3 = !!(agp_status & RADEON_AGPv3_MODE); - - if (is_v3) { - default_mode = (agp_status & RADEON_AGPv3_8X_MODE) ? 8 : 4; - } else { - if (agp_status & RADEON_AGP_4X_MODE) { - default_mode = 4; - } else if (agp_status & RADEON_AGP_2X_MODE) { - default_mode = 2; - } else { - default_mode = 1; - } - } - - /* Apply AGPMode Quirks */ - while (p && p->chip_device != 0) { - if (info.id_vendor == p->hostbridge_vendor && - info.id_device == p->hostbridge_device && - rdev->pdev->vendor == p->chip_vendor && - rdev->pdev->device == p->chip_device && - rdev->pdev->subsystem_vendor == p->subsys_vendor && - rdev->pdev->subsystem_device == p->subsys_device) { - default_mode = p->default_mode; - } - ++p; - } - - if (radeon_agpmode > 0) { - if ((radeon_agpmode < (is_v3 ? 4 : 1)) || - (radeon_agpmode > (is_v3 ? 8 : 4)) || - (radeon_agpmode & (radeon_agpmode - 1))) { - DRM_ERROR("Illegal AGP Mode: %d (valid %s), leaving at %d\n", - radeon_agpmode, is_v3 ? "4, 8" : "1, 2, 4", - default_mode); - radeon_agpmode = default_mode; - } else { - DRM_INFO("AGP mode requested: %d\n", radeon_agpmode); - } - } else { - radeon_agpmode = default_mode; - } - - mode.mode &= ~RADEON_AGP_MODE_MASK; - if (is_v3) { - switch (radeon_agpmode) { - case 8: - mode.mode |= RADEON_AGPv3_8X_MODE; - break; - case 4: - default: - mode.mode |= RADEON_AGPv3_4X_MODE; - break; - } - } else { - switch (radeon_agpmode) { - case 4: - mode.mode |= RADEON_AGP_4X_MODE; - break; - case 2: - mode.mode |= RADEON_AGP_2X_MODE; - break; - case 1: - default: - mode.mode |= RADEON_AGP_1X_MODE; - break; - } - } - - mode.mode &= ~RADEON_AGP_FW_MODE; /* disable fw */ - ret = drm_agp_enable(rdev->ddev, mode); - if (ret) { - DRM_ERROR("Unable to enable AGP (mode = 0x%lx)\n", mode.mode); - drm_agp_release(rdev->ddev); - return ret; - } - - rdev->mc.agp_base = rdev->ddev->agp->agp_info.aper_base; - rdev->mc.gtt_size = rdev->ddev->agp->agp_info.aper_size << 20; - rdev->mc.gtt_start = rdev->mc.agp_base; - rdev->mc.gtt_end = rdev->mc.gtt_start + rdev->mc.gtt_size - 1; - dev_info(rdev->dev, "GTT: %lluM 0x%08llX - 0x%08llX\n", - rdev->mc.gtt_size >> 20, rdev->mc.gtt_start, rdev->mc.gtt_end); - - /* workaround some hw issues */ - if (rdev->family < CHIP_R200) { - WREG32(RADEON_AGP_CNTL, RREG32(RADEON_AGP_CNTL) | 0x000e0000); - } - return 0; -#else - return 0; -#endif -} - -void radeon_agp_resume(struct radeon_device *rdev) -{ -#if IS_ENABLED(CONFIG_AGP) - int r; - if (rdev->flags & RADEON_IS_AGP) { - r = radeon_agp_init(rdev); - if (r) - dev_warn(rdev->dev, "radeon AGP reinit failed\n"); - } -#endif -} - -void radeon_agp_fini(struct radeon_device *rdev) -{ -#if IS_ENABLED(CONFIG_AGP) - if (rdev->ddev->agp && rdev->ddev->agp->acquired) { - drm_agp_release(rdev->ddev); - } -#endif -} - -void radeon_agp_suspend(struct radeon_device *rdev) -{ - radeon_agp_fini(rdev); -} diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c index 266e3cbbd09b..12e5c5d81c47 100644 --- a/drivers/gpu/drm/radeon/radeon_device.c +++ b/drivers/gpu/drm/radeon/radeon_device.c @@ -1145,22 +1145,6 @@ static void radeon_check_arguments(struct radeon_device *rdev) } rdev->mc.gtt_size = (uint64_t)radeon_gart_size << 20;
- /* AGP mode can only be -1, 1, 2, 4, 8 */ - switch (radeon_agpmode) { - case -1: - case 0: - case 1: - case 2: - case 4: - case 8: - break; - default: - dev_warn(rdev->dev, "invalid AGP mode %d (valid mode: " - "-1, 0, 1, 2, 4, 8)\n", radeon_agpmode); - radeon_agpmode = 0; - break; - } - if (!radeon_check_pot_argument(radeon_vm_size)) { dev_warn(rdev->dev, "VM size (%d) must be a power of 2\n", radeon_vm_size); @@ -1348,9 +1332,8 @@ int radeon_device_init(struct radeon_device *rdev, rdev->flags &= ~RADEON_IS_AGP; }
- if (rdev->flags & RADEON_IS_AGP && radeon_agpmode == -1) { + if (rdev->flags & RADEON_IS_AGP) radeon_agp_disable(rdev); - }
/* Set the internal MC address mask * This is the max address of the GPU's @@ -1636,8 +1619,6 @@ int radeon_suspend_kms(struct drm_device *dev, bool suspend, */ radeon_bo_evict_vram(rdev);
- radeon_agp_suspend(rdev); - pci_save_state(dev->pdev); if (freeze && rdev->family >= CHIP_CEDAR && !(rdev->flags & RADEON_IS_IGP)) { rdev->asic->asic_reset(rdev, true); @@ -1687,8 +1668,6 @@ int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon) return -1; } } - /* resume AGP if in use */ - radeon_agp_resume(rdev); radeon_resume(rdev);
r = radeon_ib_ring_tests(rdev); diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c index bbb0883e8ce6..62a5dfaf990b 100644 --- a/drivers/gpu/drm/radeon/radeon_drv.c +++ b/drivers/gpu/drm/radeon/radeon_drv.c @@ -171,12 +171,6 @@ int radeon_no_wb; int radeon_modeset = -1; int radeon_dynclks = -1; int radeon_r4xx_atom = 0; -#ifdef __powerpc__ -/* Default to PCI on PowerPC (fdo #95017) */ -int radeon_agpmode = -1; -#else -int radeon_agpmode = 0; -#endif int radeon_vram_limit = 0; int radeon_gart_size = -1; /* auto */ int radeon_benchmarking = 0; @@ -220,9 +214,6 @@ module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444); MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes"); module_param_named(vramlimit, radeon_vram_limit, int, 0600);
-MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)"); -module_param_named(agpmode, radeon_agpmode, int, 0444); - MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto)"); module_param_named(gartsize, radeon_gart_size, int, 0600);
diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c index 5d50c9edbe80..21bb3706c13c 100644 --- a/drivers/gpu/drm/radeon/radeon_ttm.c +++ b/drivers/gpu/drm/radeon/radeon_ttm.c @@ -86,20 +86,6 @@ static int radeon_init_mem_type(struct ttm_bo_device *bdev, uint32_t type, man->available_caching = TTM_PL_MASK_CACHING; man->default_caching = TTM_PL_FLAG_CACHED; man->flags = TTM_MEMTYPE_FLAG_MAPPABLE | TTM_MEMTYPE_FLAG_CMA; -#if IS_ENABLED(CONFIG_AGP) - if (rdev->flags & RADEON_IS_AGP) { - if (!rdev->ddev->agp) { - DRM_ERROR("AGP is not enabled for memory type %u\n", - (unsigned)type); - return -EINVAL; - } - if (!rdev->ddev->agp->cant_use_aperture) - man->flags = TTM_MEMTYPE_FLAG_MAPPABLE; - man->available_caching = TTM_PL_FLAG_UNCACHED | - TTM_PL_FLAG_WC; - man->default_caching = TTM_PL_FLAG_WC; - } -#endif break; case TTM_PL_VRAM: /* "On-card" video ram */ @@ -411,14 +397,6 @@ static int radeon_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_ /* system memory */ return 0; case TTM_PL_TT: -#if IS_ENABLED(CONFIG_AGP) - if (rdev->flags & RADEON_IS_AGP) { - /* RADEON_IS_AGP is set only if AGP is active */ - mem->bus.offset = mem->start << PAGE_SHIFT; - mem->bus.base = rdev->mc.agp_base; - mem->bus.is_iomem = !rdev->ddev->agp->cant_use_aperture; - } -#endif break; case TTM_PL_VRAM: mem->bus.offset = mem->start << PAGE_SHIFT; @@ -631,12 +609,6 @@ static struct ttm_tt *radeon_ttm_tt_create(struct ttm_buffer_object *bo, struct radeon_ttm_tt *gtt;
rdev = radeon_get_rdev(bo->bdev); -#if IS_ENABLED(CONFIG_AGP) - if (rdev->flags & RADEON_IS_AGP) { - return ttm_agp_tt_create(bo, rdev->ddev->agp->bridge, - page_flags); - } -#endif
gtt = kzalloc(sizeof(struct radeon_ttm_tt), GFP_KERNEL); if (gtt == NULL) { @@ -683,11 +655,6 @@ static int radeon_ttm_tt_populate(struct ttm_tt *ttm, }
rdev = radeon_get_rdev(ttm->bdev); -#if IS_ENABLED(CONFIG_AGP) - if (rdev->flags & RADEON_IS_AGP) { - return ttm_agp_tt_populate(ttm, ctx); - } -#endif
#ifdef CONFIG_SWIOTLB if (rdev->need_swiotlb && swiotlb_nr_tbl()) { @@ -714,12 +681,6 @@ static void radeon_ttm_tt_unpopulate(struct ttm_tt *ttm) return;
rdev = radeon_get_rdev(ttm->bdev); -#if IS_ENABLED(CONFIG_AGP) - if (rdev->flags & RADEON_IS_AGP) { - ttm_agp_tt_unpopulate(ttm); - return; - } -#endif
#ifdef CONFIG_SWIOTLB if (rdev->need_swiotlb && swiotlb_nr_tbl()) { diff --git a/drivers/gpu/drm/radeon/rv515.c b/drivers/gpu/drm/radeon/rv515.c index 147e5cf8348d..8a2f16320869 100644 --- a/drivers/gpu/drm/radeon/rv515.c +++ b/drivers/gpu/drm/radeon/rv515.c @@ -622,7 +622,6 @@ void rv515_fini(struct radeon_device *rdev) radeon_ib_pool_fini(rdev); radeon_gem_fini(rdev); rv370_pcie_gart_fini(rdev); - radeon_agp_fini(rdev); radeon_irq_kms_fini(rdev); radeon_fence_driver_fini(rdev); radeon_bo_fini(rdev); @@ -667,13 +666,6 @@ int rv515_init(struct radeon_device *rdev) return -EINVAL; /* Initialize clocks */ radeon_get_clock_info(rdev->ddev); - /* initialize AGP */ - if (rdev->flags & RADEON_IS_AGP) { - r = radeon_agp_init(rdev); - if (r) { - radeon_agp_disable(rdev); - } - } /* initialize memory controller */ rv515_mc_init(rdev); rv515_debugfs(rdev); @@ -703,7 +695,6 @@ int rv515_init(struct radeon_device *rdev) radeon_ib_pool_fini(rdev); radeon_irq_kms_fini(rdev); rv370_pcie_gart_fini(rdev); - radeon_agp_fini(rdev); rdev->accel_working = false; } return 0; diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c index 21f653ae1e1b..20bf54266f24 100644 --- a/drivers/gpu/drm/radeon/rv770.c +++ b/drivers/gpu/drm/radeon/rv770.c @@ -1943,12 +1943,6 @@ int rv770_init(struct radeon_device *rdev) r = radeon_fence_driver_init(rdev); if (r) return r; - /* initialize AGP */ - if (rdev->flags & RADEON_IS_AGP) { - r = radeon_agp_init(rdev); - if (r) - radeon_agp_disable(rdev); - } r = rv770_mc_init(rdev); if (r) return r; @@ -2015,7 +2009,6 @@ void rv770_fini(struct radeon_device *rdev) r600_vram_scratch_fini(rdev); radeon_gem_fini(rdev); radeon_fence_driver_fini(rdev); - radeon_agp_fini(rdev); radeon_bo_fini(rdev); radeon_atombios_fini(rdev); kfree(rdev->bios);
On Mon, May 11, 2020 at 1:17 PM Christian König ckoenig.leichtzumerken@gmail.com wrote:
AGP is deprecated for 10+ years now and not used any more on modern hardware.
Old hardware should continue to work in PCI mode.
Might want to clarify that there is no loss of functionality here. Something like:
"There is no loss of functionality here. GPUs will continue to function. This just drops the use of the AGP MMU in the chipset in favor of the MMU on the device which has proven to be much more reliable. Due to its unreliability, AGP support has been disabled on PowerPC for years already so there is no change on PowerPC."
With that updated, patches 1, 3: Reviewed-by: Alex Deucher alexander.deucher@amd.com patch 2: Acked-by: Alex Deucher alexander.deucher@amd.com
Signed-off-by: Christian König christian.koenig@amd.com
drivers/gpu/drm/radeon/Makefile | 4 +- drivers/gpu/drm/radeon/evergreen.c | 7 - drivers/gpu/drm/radeon/r100.c | 10 +- drivers/gpu/drm/radeon/r300.c | 9 - drivers/gpu/drm/radeon/r420.c | 9 - drivers/gpu/drm/radeon/r520.c | 8 - drivers/gpu/drm/radeon/r600.c | 6 - drivers/gpu/drm/radeon/radeon.h | 11 - drivers/gpu/drm/radeon/radeon_agp.c | 290 ------------------------- drivers/gpu/drm/radeon/radeon_device.c | 23 +- drivers/gpu/drm/radeon/radeon_drv.c | 9 - drivers/gpu/drm/radeon/radeon_ttm.c | 39 ---- drivers/gpu/drm/radeon/rv515.c | 9 - drivers/gpu/drm/radeon/rv770.c | 7 - 14 files changed, 4 insertions(+), 437 deletions(-) delete mode 100644 drivers/gpu/drm/radeon/radeon_agp.c
diff --git a/drivers/gpu/drm/radeon/Makefile b/drivers/gpu/drm/radeon/Makefile index c693b2ca0329..77429cfd303e 100644 --- a/drivers/gpu/drm/radeon/Makefile +++ b/drivers/gpu/drm/radeon/Makefile @@ -61,8 +61,8 @@ radeon-y := radeon_drv.o
# add KMS driver radeon-y += radeon_device.o radeon_asic.o radeon_kms.o \
radeon_atombios.o radeon_agp.o atombios_crtc.o radeon_combios.o \atom.o radeon_fence.o radeon_ttm.o radeon_object.o radeon_gart.o \
radeon_atombios.o atombios_crtc.o radeon_combios.o atom.o \radeon_fence.o radeon_ttm.o radeon_object.o radeon_gart.o \ radeon_legacy_crtc.o radeon_legacy_encoders.o radeon_connectors.o \ radeon_encoders.o radeon_display.o radeon_cursor.o radeon_i2c.o \ radeon_clocks.o radeon_fb.o radeon_gem.o radeon_ring.o radeon_irq_kms.o \diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 14d90dc376e7..66b3d9a2c6dd 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c @@ -5216,12 +5216,6 @@ int evergreen_init(struct radeon_device *rdev) r = radeon_fence_driver_init(rdev); if (r) return r;
/* initialize AGP */if (rdev->flags & RADEON_IS_AGP) {r = radeon_agp_init(rdev);if (r)radeon_agp_disable(rdev);} /* initialize memory controller */ r = evergreen_mc_init(rdev); if (r)@@ -5315,7 +5309,6 @@ void evergreen_fini(struct radeon_device *rdev) r600_vram_scratch_fini(rdev); radeon_gem_fini(rdev); radeon_fence_driver_fini(rdev);
radeon_agp_fini(rdev); radeon_bo_fini(rdev); radeon_atombios_fini(rdev); kfree(rdev->bios);diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c index 24c8db673931..320b1b40a30a 100644 --- a/drivers/gpu/drm/radeon/r100.c +++ b/drivers/gpu/drm/radeon/r100.c @@ -3382,7 +3382,7 @@ void r100_bandwidth_update(struct radeon_device *rdev)
if (rdev->flags & RADEON_IS_AGP) { fixed20_12 agpmode_ff;
agpmode_ff.full = dfixed_const(radeon_agpmode);
agpmode_ff.full = dfixed_const(0); temp_ff.full = dfixed_const_666(16); sclk_eff_ff.full -= dfixed_mul(agpmode_ff, temp_ff); }@@ -3992,7 +3992,6 @@ void r100_fini(struct radeon_device *rdev) radeon_gem_fini(rdev); if (rdev->flags & RADEON_IS_PCI) r100_pci_gart_fini(rdev);
radeon_agp_fini(rdev); radeon_irq_kms_fini(rdev); radeon_fence_driver_fini(rdev); radeon_bo_fini(rdev);@@ -4068,13 +4067,6 @@ int r100_init(struct radeon_device *rdev) r100_errata(rdev); /* Initialize clocks */ radeon_get_clock_info(rdev->ddev);
/* initialize AGP */if (rdev->flags & RADEON_IS_AGP) {r = radeon_agp_init(rdev);if (r) {radeon_agp_disable(rdev);}} /* initialize VRAM */ r100_mc_init(rdev); /* Fence driver */diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c index 3b7ead5be5bf..afd688629cf9 100644 --- a/drivers/gpu/drm/radeon/r300.c +++ b/drivers/gpu/drm/radeon/r300.c @@ -1498,7 +1498,6 @@ void r300_fini(struct radeon_device *rdev) rv370_pcie_gart_fini(rdev); if (rdev->flags & RADEON_IS_PCI) r100_pci_gart_fini(rdev);
radeon_agp_fini(rdev); radeon_irq_kms_fini(rdev); radeon_fence_driver_fini(rdev); radeon_bo_fini(rdev);@@ -1547,13 +1546,6 @@ int r300_init(struct radeon_device *rdev) r300_errata(rdev); /* Initialize clocks */ radeon_get_clock_info(rdev->ddev);
/* initialize AGP */if (rdev->flags & RADEON_IS_AGP) {r = radeon_agp_init(rdev);if (r) {radeon_agp_disable(rdev);}} /* initialize memory controller */ r300_mc_init(rdev); /* Fence driver */@@ -1592,7 +1584,6 @@ int r300_init(struct radeon_device *rdev) rv370_pcie_gart_fini(rdev); if (rdev->flags & RADEON_IS_PCI) r100_pci_gart_fini(rdev);
radeon_agp_fini(rdev); rdev->accel_working = false; } return 0;diff --git a/drivers/gpu/drm/radeon/r420.c b/drivers/gpu/drm/radeon/r420.c index 1d4c04e0a449..3cb337dacd56 100644 --- a/drivers/gpu/drm/radeon/r420.c +++ b/drivers/gpu/drm/radeon/r420.c @@ -366,7 +366,6 @@ void r420_fini(struct radeon_device *rdev) rv370_pcie_gart_fini(rdev); if (rdev->flags & RADEON_IS_PCI) r100_pci_gart_fini(rdev);
radeon_agp_fini(rdev); radeon_irq_kms_fini(rdev); radeon_fence_driver_fini(rdev); radeon_bo_fini(rdev);@@ -419,13 +418,6 @@ int r420_init(struct radeon_device *rdev)
/* Initialize clocks */ radeon_get_clock_info(rdev->ddev);
/* initialize AGP */if (rdev->flags & RADEON_IS_AGP) {r = radeon_agp_init(rdev);if (r) {radeon_agp_disable(rdev);}} /* initialize memory controller */ r300_mc_init(rdev); r420_debugfs(rdev);@@ -470,7 +462,6 @@ int r420_init(struct radeon_device *rdev) rv370_pcie_gart_fini(rdev); if (rdev->flags & RADEON_IS_PCI) r100_pci_gart_fini(rdev);
radeon_agp_fini(rdev); rdev->accel_working = false; } return 0;diff --git a/drivers/gpu/drm/radeon/r520.c b/drivers/gpu/drm/radeon/r520.c index fc78e64ae727..76ac87d72406 100644 --- a/drivers/gpu/drm/radeon/r520.c +++ b/drivers/gpu/drm/radeon/r520.c @@ -288,13 +288,6 @@ int r520_init(struct radeon_device *rdev) } /* Initialize clocks */ radeon_get_clock_info(rdev->ddev);
/* initialize AGP */if (rdev->flags & RADEON_IS_AGP) {r = radeon_agp_init(rdev);if (r) {radeon_agp_disable(rdev);}} /* initialize memory controller */ r520_mc_init(rdev); rv515_debugfs(rdev);@@ -324,7 +317,6 @@ int r520_init(struct radeon_device *rdev) radeon_ib_pool_fini(rdev); radeon_irq_kms_fini(rdev); rv370_pcie_gart_fini(rdev);
radeon_agp_fini(rdev); rdev->accel_working = false; } return 0;diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index d9a33ca768f3..4a5ac15893c2 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c @@ -3286,11 +3286,6 @@ int r600_init(struct radeon_device *rdev) r = radeon_fence_driver_init(rdev); if (r) return r;
if (rdev->flags & RADEON_IS_AGP) {r = radeon_agp_init(rdev);if (r)radeon_agp_disable(rdev);} r = r600_mc_init(rdev); if (r) return r;@@ -3353,7 +3348,6 @@ void r600_fini(struct radeon_device *rdev) radeon_irq_kms_fini(rdev); r600_pcie_gart_fini(rdev); r600_vram_scratch_fini(rdev);
radeon_agp_fini(rdev); radeon_gem_fini(rdev); radeon_fence_driver_fini(rdev); radeon_bo_fini(rdev);diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index 30e32adc1fc6..377e1403b134 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h @@ -91,7 +91,6 @@ extern int radeon_no_wb; extern int radeon_modeset; extern int radeon_dynclks; extern int radeon_r4xx_atom; -extern int radeon_agpmode; extern int radeon_vram_limit; extern int radeon_gart_size; extern int radeon_benchmarking; @@ -1116,16 +1115,6 @@ typedef int (*radeon_packet0_check_t)(struct radeon_cs_parser *p, typedef int (*radeon_packet3_check_t)(struct radeon_cs_parser *p, struct radeon_cs_packet *pkt);
-/*
- AGP
- */
-int radeon_agp_init(struct radeon_device *rdev); -void radeon_agp_resume(struct radeon_device *rdev); -void radeon_agp_suspend(struct radeon_device *rdev); -void radeon_agp_fini(struct radeon_device *rdev);
/*
- Writeback
*/ diff --git a/drivers/gpu/drm/radeon/radeon_agp.c b/drivers/gpu/drm/radeon/radeon_agp.c deleted file mode 100644 index 0aca7bdf54c7..000000000000 --- a/drivers/gpu/drm/radeon/radeon_agp.c +++ /dev/null @@ -1,290 +0,0 @@ -/*
- Copyright 2008 Red Hat Inc.
- Copyright 2009 Jerome Glisse.
- Permission is hereby granted, free of charge, to any person obtaining a
- copy of this software and associated documentation files (the "Software"),
- to deal in the Software without restriction, including without limitation
- the rights to use, copy, modify, merge, publish, distribute, sublicense,
- and/or sell copies of the Software, and to permit persons to whom the
- Software is furnished to do so, subject to the following conditions:
- The above copyright notice and this permission notice shall be included in
- all copies or substantial portions of the Software.
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- OTHER DEALINGS IN THE SOFTWARE.
- Authors:
- Dave Airlie
- Jerome Glisse glisse@freedesktop.org
- */
-#include <linux/pci.h>
-#include <drm/drm_agpsupport.h> -#include <drm/drm_device.h> -#include <drm/radeon_drm.h>
-#include "radeon.h"
-#if IS_ENABLED(CONFIG_AGP)
-struct radeon_agpmode_quirk {
u32 hostbridge_vendor;u32 hostbridge_device;u32 chip_vendor;u32 chip_device;u32 subsys_vendor;u32 subsys_device;u32 default_mode;-};
-static struct radeon_agpmode_quirk radeon_agpmode_quirk_list[] = {
/* Intel E7505 Memory Controller Hub / RV350 AR [Radeon 9600XT] Needs AGPMode 4 (deb #515326) */{ PCI_VENDOR_ID_INTEL, 0x2550, PCI_VENDOR_ID_ATI, 0x4152, 0x1458, 0x4038, 4},/* Intel 82865G/PE/P DRAM Controller/Host-Hub / Mobility 9800 Needs AGPMode 4 (deb #462590) */{ PCI_VENDOR_ID_INTEL, 0x2570, PCI_VENDOR_ID_ATI, 0x4a4e, PCI_VENDOR_ID_DELL, 0x5106, 4},/* Intel 82865G/PE/P DRAM Controller/Host-Hub / RV280 [Radeon 9200 SE] Needs AGPMode 4 (lp #300304) */{ PCI_VENDOR_ID_INTEL, 0x2570, PCI_VENDOR_ID_ATI, 0x5964,0x148c, 0x2073, 4},/* Intel 82855PM Processor to I/O Controller / Mobility M6 LY Needs AGPMode 1 (deb #467235) */{ PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c59,PCI_VENDOR_ID_IBM, 0x052f, 1},/* Intel 82855PM host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (lp #195051) */{ PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4e50,PCI_VENDOR_ID_IBM, 0x0550, 1},/* Intel 82855PM host bridge / RV250/M9 GL [Mobility FireGL 9000/Radeon 9000] needs AGPMode 1 (Thinkpad T40p) */{ PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c66,PCI_VENDOR_ID_IBM, 0x054d, 1},/* Intel 82855PM host bridge / Mobility M7 needs AGPMode 1 */{ PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c57,PCI_VENDOR_ID_IBM, 0x0530, 1},/* Intel 82855PM host bridge / FireGL Mobility T2 RV350 Needs AGPMode 2 (fdo #20647) */{ PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4e54,PCI_VENDOR_ID_IBM, 0x054f, 2},/* Intel 82855PM host bridge / Mobility M9+ / VaioPCG-V505DX Needs AGPMode 2 (fdo #17928) */{ PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x5c61,PCI_VENDOR_ID_SONY, 0x816b, 2},/* Intel 82855PM Processor to I/O Controller / Mobility M9+ Needs AGPMode 8 (phoronix forum) */{ PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x5c61,PCI_VENDOR_ID_SONY, 0x8195, 8},/* Intel 82830 830 Chipset Host Bridge / Mobility M6 LY Needs AGPMode 2 (fdo #17360)*/{ PCI_VENDOR_ID_INTEL, 0x3575, PCI_VENDOR_ID_ATI, 0x4c59,PCI_VENDOR_ID_DELL, 0x00e3, 2},/* Intel 82852/82855 host bridge / Mobility FireGL 9000 RV250 Needs AGPMode 1 (lp #296617) */{ PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4c66,PCI_VENDOR_ID_DELL, 0x0149, 1},/* Intel 82855PM host bridge / Mobility FireGL 9000 RV250 Needs AGPMode 1 for suspend/resume */{ PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c66,PCI_VENDOR_ID_IBM, 0x0531, 1},/* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (deb #467460) */{ PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50,0x1025, 0x0061, 1},/* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (lp #203007) */{ PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50,0x1025, 0x0064, 1},/* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (lp #141551) */{ PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50,PCI_VENDOR_ID_ASUSTEK, 0x1942, 1},/* Intel 82852/82855 host bridge / Mobility 9600/9700 Needs AGPMode 1 (deb #510208) */{ PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50,0x10cf, 0x127f, 1},/* ASRock K7VT4A+ AGP 8x / ATI Radeon 9250 AGP Needs AGPMode 4 (lp #133192) */{ 0x1849, 0x3189, PCI_VENDOR_ID_ATI, 0x5960,0x1787, 0x5960, 4},/* VIA K8M800 Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 4 (fdo #12544) */{ PCI_VENDOR_ID_VIA, 0x0204, PCI_VENDOR_ID_ATI, 0x5960,0x17af, 0x2020, 4},/* VIA KT880 Host Bridge / RV350 [Radeon 9550] Needs AGPMode 4 (fdo #19981) */{ PCI_VENDOR_ID_VIA, 0x0269, PCI_VENDOR_ID_ATI, 0x4153,PCI_VENDOR_ID_ASUSTEK, 0x003c, 4},/* VIA VT8363 Host Bridge / R200 QL [Radeon 8500] Needs AGPMode 2 (lp #141551) */{ PCI_VENDOR_ID_VIA, 0x0305, PCI_VENDOR_ID_ATI, 0x514c,PCI_VENDOR_ID_ATI, 0x013a, 2},/* VIA VT82C693A Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 2 (deb #515512) */{ PCI_VENDOR_ID_VIA, 0x0691, PCI_VENDOR_ID_ATI, 0x5960,PCI_VENDOR_ID_ASUSTEK, 0x004c, 2},/* VIA VT82C693A Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 2 */{ PCI_VENDOR_ID_VIA, 0x0691, PCI_VENDOR_ID_ATI, 0x5960,PCI_VENDOR_ID_ASUSTEK, 0x0054, 2},/* VIA VT8377 Host Bridge / R200 QM [Radeon 9100] Needs AGPMode 4 (deb #461144) */{ PCI_VENDOR_ID_VIA, 0x3189, PCI_VENDOR_ID_ATI, 0x514d,0x174b, 0x7149, 4},/* VIA VT8377 Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 4 (lp #312693) */{ PCI_VENDOR_ID_VIA, 0x3189, PCI_VENDOR_ID_ATI, 0x5960,0x1462, 0x0380, 4},/* VIA VT8377 Host Bridge / RV280 Needs AGPMode 4 (ati ML) */{ PCI_VENDOR_ID_VIA, 0x3189, PCI_VENDOR_ID_ATI, 0x5964,0x148c, 0x2073, 4},/* ATI Host Bridge / RV280 [M9+] Needs AGPMode 1 (phoronix forum) */{ PCI_VENDOR_ID_ATI, 0xcbb2, PCI_VENDOR_ID_ATI, 0x5c61,PCI_VENDOR_ID_SONY, 0x8175, 1},{ 0, 0, 0, 0, 0, 0, 0 },-}; -#endif
-int radeon_agp_init(struct radeon_device *rdev) -{ -#if IS_ENABLED(CONFIG_AGP)
struct radeon_agpmode_quirk *p = radeon_agpmode_quirk_list;struct drm_agp_mode mode;struct drm_agp_info info;uint32_t agp_status;int default_mode;bool is_v3;int ret;/* Acquire AGP. */ret = drm_agp_acquire(rdev->ddev);if (ret) {DRM_ERROR("Unable to acquire AGP: %d\n", ret);return ret;}ret = drm_agp_info(rdev->ddev, &info);if (ret) {drm_agp_release(rdev->ddev);DRM_ERROR("Unable to get AGP info: %d\n", ret);return ret;}if (rdev->ddev->agp->agp_info.aper_size < 32) {drm_agp_release(rdev->ddev);dev_warn(rdev->dev, "AGP aperture too small (%zuM) ""need at least 32M, disabling AGP\n",rdev->ddev->agp->agp_info.aper_size);return -EINVAL;}mode.mode = info.mode;/* chips with the agp to pcie bridge don't have the AGP_STATUS register* Just use the whatever mode the host sets up.*/if (rdev->family <= CHIP_RV350)agp_status = (RREG32(RADEON_AGP_STATUS) | RADEON_AGPv3_MODE) & mode.mode;elseagp_status = mode.mode;is_v3 = !!(agp_status & RADEON_AGPv3_MODE);if (is_v3) {default_mode = (agp_status & RADEON_AGPv3_8X_MODE) ? 8 : 4;} else {if (agp_status & RADEON_AGP_4X_MODE) {default_mode = 4;} else if (agp_status & RADEON_AGP_2X_MODE) {default_mode = 2;} else {default_mode = 1;}}/* Apply AGPMode Quirks */while (p && p->chip_device != 0) {if (info.id_vendor == p->hostbridge_vendor &&info.id_device == p->hostbridge_device &&rdev->pdev->vendor == p->chip_vendor &&rdev->pdev->device == p->chip_device &&rdev->pdev->subsystem_vendor == p->subsys_vendor &&rdev->pdev->subsystem_device == p->subsys_device) {default_mode = p->default_mode;}++p;}if (radeon_agpmode > 0) {if ((radeon_agpmode < (is_v3 ? 4 : 1)) ||(radeon_agpmode > (is_v3 ? 8 : 4)) ||(radeon_agpmode & (radeon_agpmode - 1))) {DRM_ERROR("Illegal AGP Mode: %d (valid %s), leaving at %d\n",radeon_agpmode, is_v3 ? "4, 8" : "1, 2, 4",default_mode);radeon_agpmode = default_mode;} else {DRM_INFO("AGP mode requested: %d\n", radeon_agpmode);}} else {radeon_agpmode = default_mode;}mode.mode &= ~RADEON_AGP_MODE_MASK;if (is_v3) {switch (radeon_agpmode) {case 8:mode.mode |= RADEON_AGPv3_8X_MODE;break;case 4:default:mode.mode |= RADEON_AGPv3_4X_MODE;break;}} else {switch (radeon_agpmode) {case 4:mode.mode |= RADEON_AGP_4X_MODE;break;case 2:mode.mode |= RADEON_AGP_2X_MODE;break;case 1:default:mode.mode |= RADEON_AGP_1X_MODE;break;}}mode.mode &= ~RADEON_AGP_FW_MODE; /* disable fw */ret = drm_agp_enable(rdev->ddev, mode);if (ret) {DRM_ERROR("Unable to enable AGP (mode = 0x%lx)\n", mode.mode);drm_agp_release(rdev->ddev);return ret;}rdev->mc.agp_base = rdev->ddev->agp->agp_info.aper_base;rdev->mc.gtt_size = rdev->ddev->agp->agp_info.aper_size << 20;rdev->mc.gtt_start = rdev->mc.agp_base;rdev->mc.gtt_end = rdev->mc.gtt_start + rdev->mc.gtt_size - 1;dev_info(rdev->dev, "GTT: %lluM 0x%08llX - 0x%08llX\n",rdev->mc.gtt_size >> 20, rdev->mc.gtt_start, rdev->mc.gtt_end);/* workaround some hw issues */if (rdev->family < CHIP_R200) {WREG32(RADEON_AGP_CNTL, RREG32(RADEON_AGP_CNTL) | 0x000e0000);}return 0;-#else
return 0;-#endif -}
-void radeon_agp_resume(struct radeon_device *rdev) -{ -#if IS_ENABLED(CONFIG_AGP)
int r;if (rdev->flags & RADEON_IS_AGP) {r = radeon_agp_init(rdev);if (r)dev_warn(rdev->dev, "radeon AGP reinit failed\n");}-#endif -}
-void radeon_agp_fini(struct radeon_device *rdev) -{ -#if IS_ENABLED(CONFIG_AGP)
if (rdev->ddev->agp && rdev->ddev->agp->acquired) {drm_agp_release(rdev->ddev);}-#endif -}
-void radeon_agp_suspend(struct radeon_device *rdev) -{
radeon_agp_fini(rdev);-} diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c index 266e3cbbd09b..12e5c5d81c47 100644 --- a/drivers/gpu/drm/radeon/radeon_device.c +++ b/drivers/gpu/drm/radeon/radeon_device.c @@ -1145,22 +1145,6 @@ static void radeon_check_arguments(struct radeon_device *rdev) } rdev->mc.gtt_size = (uint64_t)radeon_gart_size << 20;
/* AGP mode can only be -1, 1, 2, 4, 8 */switch (radeon_agpmode) {case -1:case 0:case 1:case 2:case 4:case 8:break;default:dev_warn(rdev->dev, "invalid AGP mode %d (valid mode: ""-1, 0, 1, 2, 4, 8)\n", radeon_agpmode);radeon_agpmode = 0;break;}if (!radeon_check_pot_argument(radeon_vm_size)) { dev_warn(rdev->dev, "VM size (%d) must be a power of 2\n", radeon_vm_size);@@ -1348,9 +1332,8 @@ int radeon_device_init(struct radeon_device *rdev, rdev->flags &= ~RADEON_IS_AGP; }
if (rdev->flags & RADEON_IS_AGP && radeon_agpmode == -1) {
if (rdev->flags & RADEON_IS_AGP) radeon_agp_disable(rdev);
} /* Set the internal MC address mask * This is the max address of the GPU's@@ -1636,8 +1619,6 @@ int radeon_suspend_kms(struct drm_device *dev, bool suspend, */ radeon_bo_evict_vram(rdev);
radeon_agp_suspend(rdev);pci_save_state(dev->pdev); if (freeze && rdev->family >= CHIP_CEDAR && !(rdev->flags & RADEON_IS_IGP)) { rdev->asic->asic_reset(rdev, true);@@ -1687,8 +1668,6 @@ int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon) return -1; } }
/* resume AGP if in use */radeon_agp_resume(rdev); radeon_resume(rdev); r = radeon_ib_ring_tests(rdev);diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c index bbb0883e8ce6..62a5dfaf990b 100644 --- a/drivers/gpu/drm/radeon/radeon_drv.c +++ b/drivers/gpu/drm/radeon/radeon_drv.c @@ -171,12 +171,6 @@ int radeon_no_wb; int radeon_modeset = -1; int radeon_dynclks = -1; int radeon_r4xx_atom = 0; -#ifdef __powerpc__ -/* Default to PCI on PowerPC (fdo #95017) */ -int radeon_agpmode = -1; -#else -int radeon_agpmode = 0; -#endif int radeon_vram_limit = 0; int radeon_gart_size = -1; /* auto */ int radeon_benchmarking = 0; @@ -220,9 +214,6 @@ module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444); MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes"); module_param_named(vramlimit, radeon_vram_limit, int, 0600);
-MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)"); -module_param_named(agpmode, radeon_agpmode, int, 0444);
MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto)"); module_param_named(gartsize, radeon_gart_size, int, 0600);
diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c index 5d50c9edbe80..21bb3706c13c 100644 --- a/drivers/gpu/drm/radeon/radeon_ttm.c +++ b/drivers/gpu/drm/radeon/radeon_ttm.c @@ -86,20 +86,6 @@ static int radeon_init_mem_type(struct ttm_bo_device *bdev, uint32_t type, man->available_caching = TTM_PL_MASK_CACHING; man->default_caching = TTM_PL_FLAG_CACHED; man->flags = TTM_MEMTYPE_FLAG_MAPPABLE | TTM_MEMTYPE_FLAG_CMA; -#if IS_ENABLED(CONFIG_AGP)
if (rdev->flags & RADEON_IS_AGP) {if (!rdev->ddev->agp) {DRM_ERROR("AGP is not enabled for memory type %u\n",(unsigned)type);return -EINVAL;}if (!rdev->ddev->agp->cant_use_aperture)man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;man->available_caching = TTM_PL_FLAG_UNCACHED |TTM_PL_FLAG_WC;man->default_caching = TTM_PL_FLAG_WC;}-#endif break; case TTM_PL_VRAM: /* "On-card" video ram */ @@ -411,14 +397,6 @@ static int radeon_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_ /* system memory */ return 0; case TTM_PL_TT: -#if IS_ENABLED(CONFIG_AGP)
if (rdev->flags & RADEON_IS_AGP) {/* RADEON_IS_AGP is set only if AGP is active */mem->bus.offset = mem->start << PAGE_SHIFT;mem->bus.base = rdev->mc.agp_base;mem->bus.is_iomem = !rdev->ddev->agp->cant_use_aperture;}-#endif break; case TTM_PL_VRAM: mem->bus.offset = mem->start << PAGE_SHIFT; @@ -631,12 +609,6 @@ static struct ttm_tt *radeon_ttm_tt_create(struct ttm_buffer_object *bo, struct radeon_ttm_tt *gtt;
rdev = radeon_get_rdev(bo->bdev);-#if IS_ENABLED(CONFIG_AGP)
if (rdev->flags & RADEON_IS_AGP) {return ttm_agp_tt_create(bo, rdev->ddev->agp->bridge,page_flags);}-#endif
gtt = kzalloc(sizeof(struct radeon_ttm_tt), GFP_KERNEL); if (gtt == NULL) {@@ -683,11 +655,6 @@ static int radeon_ttm_tt_populate(struct ttm_tt *ttm, }
rdev = radeon_get_rdev(ttm->bdev);-#if IS_ENABLED(CONFIG_AGP)
if (rdev->flags & RADEON_IS_AGP) {return ttm_agp_tt_populate(ttm, ctx);}-#endif
#ifdef CONFIG_SWIOTLB if (rdev->need_swiotlb && swiotlb_nr_tbl()) { @@ -714,12 +681,6 @@ static void radeon_ttm_tt_unpopulate(struct ttm_tt *ttm) return;
rdev = radeon_get_rdev(ttm->bdev);-#if IS_ENABLED(CONFIG_AGP)
if (rdev->flags & RADEON_IS_AGP) {ttm_agp_tt_unpopulate(ttm);return;}-#endif
#ifdef CONFIG_SWIOTLB if (rdev->need_swiotlb && swiotlb_nr_tbl()) { diff --git a/drivers/gpu/drm/radeon/rv515.c b/drivers/gpu/drm/radeon/rv515.c index 147e5cf8348d..8a2f16320869 100644 --- a/drivers/gpu/drm/radeon/rv515.c +++ b/drivers/gpu/drm/radeon/rv515.c @@ -622,7 +622,6 @@ void rv515_fini(struct radeon_device *rdev) radeon_ib_pool_fini(rdev); radeon_gem_fini(rdev); rv370_pcie_gart_fini(rdev);
radeon_agp_fini(rdev); radeon_irq_kms_fini(rdev); radeon_fence_driver_fini(rdev); radeon_bo_fini(rdev);@@ -667,13 +666,6 @@ int rv515_init(struct radeon_device *rdev) return -EINVAL; /* Initialize clocks */ radeon_get_clock_info(rdev->ddev);
/* initialize AGP */if (rdev->flags & RADEON_IS_AGP) {r = radeon_agp_init(rdev);if (r) {radeon_agp_disable(rdev);}} /* initialize memory controller */ rv515_mc_init(rdev); rv515_debugfs(rdev);@@ -703,7 +695,6 @@ int rv515_init(struct radeon_device *rdev) radeon_ib_pool_fini(rdev); radeon_irq_kms_fini(rdev); rv370_pcie_gart_fini(rdev);
radeon_agp_fini(rdev); rdev->accel_working = false; } return 0;diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c index 21f653ae1e1b..20bf54266f24 100644 --- a/drivers/gpu/drm/radeon/rv770.c +++ b/drivers/gpu/drm/radeon/rv770.c @@ -1943,12 +1943,6 @@ int rv770_init(struct radeon_device *rdev) r = radeon_fence_driver_init(rdev); if (r) return r;
/* initialize AGP */if (rdev->flags & RADEON_IS_AGP) {r = radeon_agp_init(rdev);if (r)radeon_agp_disable(rdev);} r = rv770_mc_init(rdev); if (r) return r;@@ -2015,7 +2009,6 @@ void rv770_fini(struct radeon_device *rdev) r600_vram_scratch_fini(rdev); radeon_gem_fini(rdev); radeon_fence_driver_fini(rdev);
radeon_agp_fini(rdev); radeon_bo_fini(rdev); radeon_atombios_fini(rdev); kfree(rdev->bios);-- 2.17.1
amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
On 2020-05-11 10:12 p.m., Alex Deucher wrote:
On Mon, May 11, 2020 at 1:17 PM Christian König ckoenig.leichtzumerken@gmail.com wrote:
AGP is deprecated for 10+ years now and not used any more on modern hardware.
Old hardware should continue to work in PCI mode.
Might want to clarify that there is no loss of functionality here. Something like:
"There is no loss of functionality here. GPUs will continue to function. This just drops the use of the AGP MMU in the chipset in favor of the MMU on the device which has proven to be much more reliable. Due to its unreliability, AGP support has been disabled on PowerPC for years already so there is no change on PowerPC."
There's a difference between something being disabled by default or not being available at all. We may decide it's worth it anyway, but let's do it based on facts.
On Tue, May 12, 2020 at 4:16 AM Michel Dänzer michel@daenzer.net wrote:
On 2020-05-11 10:12 p.m., Alex Deucher wrote:
On Mon, May 11, 2020 at 1:17 PM Christian König ckoenig.leichtzumerken@gmail.com wrote:
AGP is deprecated for 10+ years now and not used any more on modern hardware.
Old hardware should continue to work in PCI mode.
Might want to clarify that there is no loss of functionality here. Something like:
"There is no loss of functionality here. GPUs will continue to function. This just drops the use of the AGP MMU in the chipset in favor of the MMU on the device which has proven to be much more reliable. Due to its unreliability, AGP support has been disabled on PowerPC for years already so there is no change on PowerPC."
There's a difference between something being disabled by default or not being available at all. We may decide it's worth it anyway, but let's do it based on facts.
I didn't mean to imply that AGP GART support was already removed. But for the vast majority of users the end result is the same. If you knew enough re-enable AGP GART, you probably wouldn't have been as confused about what this patch set does either. To reiterate, this patch set does not remove support for AGP cards, it only removes the support for AGP GART. The cards will still be functional using the device GART. There may be performance tradeoffs there in some cases.
Alex
Op 12-05-2020 om 14:36 schreef Alex Deucher:
On Tue, May 12, 2020 at 4:16 AM Michel Dänzer michel@daenzer.net wrote:
On 2020-05-11 10:12 p.m., Alex Deucher wrote:
On Mon, May 11, 2020 at 1:17 PM Christian König ckoenig.leichtzumerken@gmail.com wrote:
AGP is deprecated for 10+ years now and not used any more on modern hardware.
Old hardware should continue to work in PCI mode.
Might want to clarify that there is no loss of functionality here. Something like:
"There is no loss of functionality here. GPUs will continue to function. This just drops the use of the AGP MMU in the chipset in favor of the MMU on the device which has proven to be much more reliable. Due to its unreliability, AGP support has been disabled on PowerPC for years already so there is no change on PowerPC."
There's a difference between something being disabled by default or not being available at all. We may decide it's worth it anyway, but let's do it based on facts.
I didn't mean to imply that AGP GART support was already removed. But for the vast majority of users the end result is the same. If you knew enough re-enable AGP GART, you probably wouldn't have been as confused about what this patch set does either. To reiterate, this patch set does not remove support for AGP cards, it only removes the support for AGP GART. The cards will still be functional using the device GART. There may be performance tradeoffs there in some cases.
I'll volunteer to be the one asking: how big is this performance difference? Have any benchmarks been run before and after removal of AGP GART code on affected nouveau/radeon systems? Or is this code being dropped _just_ because it's cumbersome, with no regard for metrics that determine the value of AGP GART support?
Roy
Alex _______________________________________________ Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
On Tue, May 12, 2020 at 4:52 PM Roy Spliet nouveau@spliet.org wrote:
Op 12-05-2020 om 14:36 schreef Alex Deucher:
On Tue, May 12, 2020 at 4:16 AM Michel Dänzer michel@daenzer.net wrote:
On 2020-05-11 10:12 p.m., Alex Deucher wrote:
On Mon, May 11, 2020 at 1:17 PM Christian König ckoenig.leichtzumerken@gmail.com wrote:
AGP is deprecated for 10+ years now and not used any more on modern hardware.
Old hardware should continue to work in PCI mode.
Might want to clarify that there is no loss of functionality here. Something like:
"There is no loss of functionality here. GPUs will continue to function. This just drops the use of the AGP MMU in the chipset in favor of the MMU on the device which has proven to be much more reliable. Due to its unreliability, AGP support has been disabled on PowerPC for years already so there is no change on PowerPC."
There's a difference between something being disabled by default or not being available at all. We may decide it's worth it anyway, but let's do it based on facts.
I didn't mean to imply that AGP GART support was already removed. But for the vast majority of users the end result is the same. If you knew enough re-enable AGP GART, you probably wouldn't have been as confused about what this patch set does either. To reiterate, this patch set does not remove support for AGP cards, it only removes the support for AGP GART. The cards will still be functional using the device GART. There may be performance tradeoffs there in some cases.
I'll volunteer to be the one asking: how big is this performance difference? Have any benchmarks been run before and after removal of AGP GART code on affected nouveau/radeon systems? Or is this code being dropped _just_ because it's cumbersome, with no regard for metrics that determine the value of AGP GART support?
I don't think anyone has any solid numbers, just anecdotal from memory. I certainly don't have any functional AGP systems at this point. It's mostly just cumbersome and would allow us to clean ttm and probably improve stability at the same time. At least on the radeon side, the only native AGP cards were r1xx, r2xx, and some of the early r3xx boards. Once we switched to pcie mid-way through r3xx, everything was native pcie and the AGP cards used a pcie to AGP bridge chip so they had a decent on chip MMU. Those older cards topped out at maybe 32 or 64 MB of vram, so they are going to be hard pressed to deal with modern desktops anyway. No idea what sort of GART capabilities NV AGP hardware at this time had.
Alex
Roy
Alex _______________________________________________ Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
Am 12.05.20 um 23:12 schrieb Alex Deucher:
On Tue, May 12, 2020 at 4:52 PM Roy Spliet nouveau@spliet.org wrote:
Op 12-05-2020 om 14:36 schreef Alex Deucher:
On Tue, May 12, 2020 at 4:16 AM Michel Dänzer michel@daenzer.net wrote:
On 2020-05-11 10:12 p.m., Alex Deucher wrote:
On Mon, May 11, 2020 at 1:17 PM Christian König ckoenig.leichtzumerken@gmail.com wrote:
AGP is deprecated for 10+ years now and not used any more on modern hardware.
Old hardware should continue to work in PCI mode.
Might want to clarify that there is no loss of functionality here. Something like:
"There is no loss of functionality here. GPUs will continue to function. This just drops the use of the AGP MMU in the chipset in favor of the MMU on the device which has proven to be much more reliable. Due to its unreliability, AGP support has been disabled on PowerPC for years already so there is no change on PowerPC."
There's a difference between something being disabled by default or not being available at all. We may decide it's worth it anyway, but let's do it based on facts.
I didn't mean to imply that AGP GART support was already removed. But for the vast majority of users the end result is the same. If you knew enough re-enable AGP GART, you probably wouldn't have been as confused about what this patch set does either. To reiterate, this patch set does not remove support for AGP cards, it only removes the support for AGP GART. The cards will still be functional using the device GART. There may be performance tradeoffs there in some cases.
I'll volunteer to be the one asking: how big is this performance difference? Have any benchmarks been run before and after removal of AGP GART code on affected nouveau/radeon systems? Or is this code being dropped _just_ because it's cumbersome, with no regard for metrics that determine the value of AGP GART support?
I don't think anyone has any solid numbers, just anecdotal from memory. I certainly don't have any functional AGP systems at this point. It's mostly just cumbersome and would allow us to clean ttm and probably improve stability at the same time. At least on the radeon side, the only native AGP cards were r1xx, r2xx, and some of the early r3xx boards. Once we switched to pcie mid-way through r3xx, everything was native pcie and the AGP cards used a pcie to AGP bridge chip so they had a decent on chip MMU. Those older cards topped out at maybe 32 or 64 MB of vram, so they are going to be hard pressed to deal with modern desktops anyway. No idea what sort of GART capabilities NV AGP hardware at this time had.
I could only test with an old x86 Mac and an r3xx generation hw and in this case making the switch didn't had any noticeable effect at all.
But I didn't do more than playing around with the desktop effects and playing a video.
I do have a PC x86 AGP board lying around somewhere here, going top give that one a try a well.
Christian.
Alex
Roy
Alex _______________________________________________ Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
On 2020-05-13 9:46 a.m., Christian König wrote:
Am 12.05.20 um 23:12 schrieb Alex Deucher:
On Tue, May 12, 2020 at 4:52 PM Roy Spliet nouveau@spliet.org wrote:
I'll volunteer to be the one asking: how big is this performance difference? Have any benchmarks been run before and after removal of AGP GART code on affected nouveau/radeon systems? Or is this code being dropped _just_ because it's cumbersome, with no regard for metrics that determine the value of AGP GART support?
I don't think anyone has any solid numbers, just anecdotal from memory. I certainly don't have any functional AGP systems at this point. It's mostly just cumbersome and would allow us to clean ttm and probably improve stability at the same time. At least on the radeon side, the only native AGP cards were r1xx, r2xx, and some of the early r3xx boards. Once we switched to pcie mid-way through r3xx, everything was native pcie and the AGP cards used a pcie to AGP bridge chip so they had a decent on chip MMU. Those older cards topped out at maybe 32 or 64 MB of vram, so they are going to be hard pressed to deal with modern desktops anyway. No idea what sort of GART capabilities NV AGP hardware at this time had.
I could only test with an old x86 Mac and an r3xx generation hw and in this case making the switch didn't had any noticeable effect at all.
But I didn't do more than playing around with the desktop effects and playing a video.
Yeah, that's not enough to see a difference. Try an OpenGL game, or even just glxgears.
Hi Christian
Am 11.05.20 um 19:17 schrieb Christian König:
AGP is deprecated for 10+ years now and not used any more on modern hardware.
Old hardware should continue to work in PCI mode.
Signed-off-by: Christian König christian.koenig@amd.com
drivers/gpu/drm/radeon/Makefile | 4 +- drivers/gpu/drm/radeon/evergreen.c | 7 - drivers/gpu/drm/radeon/r100.c | 10 +- drivers/gpu/drm/radeon/r300.c | 9 - drivers/gpu/drm/radeon/r420.c | 9 - drivers/gpu/drm/radeon/r520.c | 8 - drivers/gpu/drm/radeon/r600.c | 6 - drivers/gpu/drm/radeon/radeon.h | 11 - drivers/gpu/drm/radeon/radeon_agp.c | 290 ------------------------- drivers/gpu/drm/radeon/radeon_device.c | 23 +- drivers/gpu/drm/radeon/radeon_drv.c | 9 -
In radeon_drv.c, the field drm_device.agp is still being initialized in radeon_pci_probe() and cleaned up in radeon_driver_unload_kms(). Is this intentional?
Best regards Thomas
drivers/gpu/drm/radeon/radeon_ttm.c | 39 ---- drivers/gpu/drm/radeon/rv515.c | 9 - drivers/gpu/drm/radeon/rv770.c | 7 - 14 files changed, 4 insertions(+), 437 deletions(-) delete mode 100644 drivers/gpu/drm/radeon/radeon_agp.c
diff --git a/drivers/gpu/drm/radeon/Makefile b/drivers/gpu/drm/radeon/Makefile index c693b2ca0329..77429cfd303e 100644 --- a/drivers/gpu/drm/radeon/Makefile +++ b/drivers/gpu/drm/radeon/Makefile @@ -61,8 +61,8 @@ radeon-y := radeon_drv.o
# add KMS driver radeon-y += radeon_device.o radeon_asic.o radeon_kms.o \
- radeon_atombios.o radeon_agp.o atombios_crtc.o radeon_combios.o \
- atom.o radeon_fence.o radeon_ttm.o radeon_object.o radeon_gart.o \
- radeon_atombios.o atombios_crtc.o radeon_combios.o atom.o \
- radeon_fence.o radeon_ttm.o radeon_object.o radeon_gart.o \ radeon_legacy_crtc.o radeon_legacy_encoders.o radeon_connectors.o \ radeon_encoders.o radeon_display.o radeon_cursor.o radeon_i2c.o \ radeon_clocks.o radeon_fb.o radeon_gem.o radeon_ring.o radeon_irq_kms.o \
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 14d90dc376e7..66b3d9a2c6dd 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c @@ -5216,12 +5216,6 @@ int evergreen_init(struct radeon_device *rdev) r = radeon_fence_driver_init(rdev); if (r) return r;
- /* initialize AGP */
- if (rdev->flags & RADEON_IS_AGP) {
r = radeon_agp_init(rdev);if (r)radeon_agp_disable(rdev);- } /* initialize memory controller */ r = evergreen_mc_init(rdev); if (r)
@@ -5315,7 +5309,6 @@ void evergreen_fini(struct radeon_device *rdev) r600_vram_scratch_fini(rdev); radeon_gem_fini(rdev); radeon_fence_driver_fini(rdev);
- radeon_agp_fini(rdev); radeon_bo_fini(rdev); radeon_atombios_fini(rdev); kfree(rdev->bios);
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c index 24c8db673931..320b1b40a30a 100644 --- a/drivers/gpu/drm/radeon/r100.c +++ b/drivers/gpu/drm/radeon/r100.c @@ -3382,7 +3382,7 @@ void r100_bandwidth_update(struct radeon_device *rdev)
if (rdev->flags & RADEON_IS_AGP) { fixed20_12 agpmode_ff;
agpmode_ff.full = dfixed_const(radeon_agpmode);
agpmode_ff.full = dfixed_const(0);@@ -3992,7 +3992,6 @@ void r100_fini(struct radeon_device *rdev) radeon_gem_fini(rdev); if (rdev->flags & RADEON_IS_PCI) r100_pci_gart_fini(rdev);
- radeon_agp_fini(rdev); radeon_irq_kms_fini(rdev); radeon_fence_driver_fini(rdev); radeon_bo_fini(rdev);
@@ -4068,13 +4067,6 @@ int r100_init(struct radeon_device *rdev) r100_errata(rdev); /* Initialize clocks */ radeon_get_clock_info(rdev->ddev);
- /* initialize AGP */
- if (rdev->flags & RADEON_IS_AGP) {
r = radeon_agp_init(rdev);if (r) {radeon_agp_disable(rdev);}- } /* initialize VRAM */ r100_mc_init(rdev); /* Fence driver */
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c index 3b7ead5be5bf..afd688629cf9 100644 --- a/drivers/gpu/drm/radeon/r300.c +++ b/drivers/gpu/drm/radeon/r300.c @@ -1498,7 +1498,6 @@ void r300_fini(struct radeon_device *rdev) rv370_pcie_gart_fini(rdev); if (rdev->flags & RADEON_IS_PCI) r100_pci_gart_fini(rdev);
- radeon_agp_fini(rdev); radeon_irq_kms_fini(rdev); radeon_fence_driver_fini(rdev); radeon_bo_fini(rdev);
@@ -1547,13 +1546,6 @@ int r300_init(struct radeon_device *rdev) r300_errata(rdev); /* Initialize clocks */ radeon_get_clock_info(rdev->ddev);
- /* initialize AGP */
- if (rdev->flags & RADEON_IS_AGP) {
r = radeon_agp_init(rdev);if (r) {radeon_agp_disable(rdev);}- } /* initialize memory controller */ r300_mc_init(rdev); /* Fence driver */
@@ -1592,7 +1584,6 @@ int r300_init(struct radeon_device *rdev) rv370_pcie_gart_fini(rdev); if (rdev->flags & RADEON_IS_PCI) r100_pci_gart_fini(rdev);
radeon_agp_fini(rdev);diff --git a/drivers/gpu/drm/radeon/r420.c b/drivers/gpu/drm/radeon/r420.c index 1d4c04e0a449..3cb337dacd56 100644 --- a/drivers/gpu/drm/radeon/r420.c +++ b/drivers/gpu/drm/radeon/r420.c @@ -366,7 +366,6 @@ void r420_fini(struct radeon_device *rdev) rv370_pcie_gart_fini(rdev); if (rdev->flags & RADEON_IS_PCI) r100_pci_gart_fini(rdev);
- radeon_agp_fini(rdev); radeon_irq_kms_fini(rdev); radeon_fence_driver_fini(rdev); radeon_bo_fini(rdev);
@@ -419,13 +418,6 @@ int r420_init(struct radeon_device *rdev)
/* Initialize clocks */ radeon_get_clock_info(rdev->ddev);
- /* initialize AGP */
- if (rdev->flags & RADEON_IS_AGP) {
r = radeon_agp_init(rdev);if (r) {radeon_agp_disable(rdev);}- } /* initialize memory controller */ r300_mc_init(rdev); r420_debugfs(rdev);
@@ -470,7 +462,6 @@ int r420_init(struct radeon_device *rdev) rv370_pcie_gart_fini(rdev); if (rdev->flags & RADEON_IS_PCI) r100_pci_gart_fini(rdev);
radeon_agp_fini(rdev);diff --git a/drivers/gpu/drm/radeon/r520.c b/drivers/gpu/drm/radeon/r520.c index fc78e64ae727..76ac87d72406 100644 --- a/drivers/gpu/drm/radeon/r520.c +++ b/drivers/gpu/drm/radeon/r520.c @@ -288,13 +288,6 @@ int r520_init(struct radeon_device *rdev) } /* Initialize clocks */ radeon_get_clock_info(rdev->ddev);
- /* initialize AGP */
- if (rdev->flags & RADEON_IS_AGP) {
r = radeon_agp_init(rdev);if (r) {radeon_agp_disable(rdev);}- } /* initialize memory controller */ r520_mc_init(rdev); rv515_debugfs(rdev);
@@ -324,7 +317,6 @@ int r520_init(struct radeon_device *rdev) radeon_ib_pool_fini(rdev); radeon_irq_kms_fini(rdev); rv370_pcie_gart_fini(rdev);
radeon_agp_fini(rdev);diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index d9a33ca768f3..4a5ac15893c2 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c @@ -3286,11 +3286,6 @@ int r600_init(struct radeon_device *rdev) r = radeon_fence_driver_init(rdev); if (r) return r;
- if (rdev->flags & RADEON_IS_AGP) {
r = radeon_agp_init(rdev);if (r)radeon_agp_disable(rdev);- } r = r600_mc_init(rdev); if (r) return r;
@@ -3353,7 +3348,6 @@ void r600_fini(struct radeon_device *rdev) radeon_irq_kms_fini(rdev); r600_pcie_gart_fini(rdev); r600_vram_scratch_fini(rdev);
- radeon_agp_fini(rdev); radeon_gem_fini(rdev); radeon_fence_driver_fini(rdev); radeon_bo_fini(rdev);
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index 30e32adc1fc6..377e1403b134 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h @@ -91,7 +91,6 @@ extern int radeon_no_wb; extern int radeon_modeset; extern int radeon_dynclks; extern int radeon_r4xx_atom; -extern int radeon_agpmode; extern int radeon_vram_limit; extern int radeon_gart_size; extern int radeon_benchmarking; @@ -1116,16 +1115,6 @@ typedef int (*radeon_packet0_check_t)(struct radeon_cs_parser *p, typedef int (*radeon_packet3_check_t)(struct radeon_cs_parser *p, struct radeon_cs_packet *pkt);
-/*
- AGP
- */
-int radeon_agp_init(struct radeon_device *rdev); -void radeon_agp_resume(struct radeon_device *rdev); -void radeon_agp_suspend(struct radeon_device *rdev); -void radeon_agp_fini(struct radeon_device *rdev);
/*
- Writeback
*/ diff --git a/drivers/gpu/drm/radeon/radeon_agp.c b/drivers/gpu/drm/radeon/radeon_agp.c deleted file mode 100644 index 0aca7bdf54c7..000000000000 --- a/drivers/gpu/drm/radeon/radeon_agp.c +++ /dev/null @@ -1,290 +0,0 @@ -/*
- Copyright 2008 Red Hat Inc.
- Copyright 2009 Jerome Glisse.
- Permission is hereby granted, free of charge, to any person obtaining a
- copy of this software and associated documentation files (the "Software"),
- to deal in the Software without restriction, including without limitation
- the rights to use, copy, modify, merge, publish, distribute, sublicense,
- and/or sell copies of the Software, and to permit persons to whom the
- Software is furnished to do so, subject to the following conditions:
- The above copyright notice and this permission notice shall be included in
- all copies or substantial portions of the Software.
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- OTHER DEALINGS IN THE SOFTWARE.
- Authors:
- Dave Airlie
- Jerome Glisse glisse@freedesktop.org
- */
-#include <linux/pci.h>
-#include <drm/drm_agpsupport.h> -#include <drm/drm_device.h> -#include <drm/radeon_drm.h>
-#include "radeon.h"
-#if IS_ENABLED(CONFIG_AGP)
-struct radeon_agpmode_quirk {
- u32 hostbridge_vendor;
- u32 hostbridge_device;
- u32 chip_vendor;
- u32 chip_device;
- u32 subsys_vendor;
- u32 subsys_device;
- u32 default_mode;
-};
-static struct radeon_agpmode_quirk radeon_agpmode_quirk_list[] = {
- /* Intel E7505 Memory Controller Hub / RV350 AR [Radeon 9600XT] Needs AGPMode 4 (deb #515326) */
- { PCI_VENDOR_ID_INTEL, 0x2550, PCI_VENDOR_ID_ATI, 0x4152, 0x1458, 0x4038, 4},
- /* Intel 82865G/PE/P DRAM Controller/Host-Hub / Mobility 9800 Needs AGPMode 4 (deb #462590) */
- { PCI_VENDOR_ID_INTEL, 0x2570, PCI_VENDOR_ID_ATI, 0x4a4e, PCI_VENDOR_ID_DELL, 0x5106, 4},
- /* Intel 82865G/PE/P DRAM Controller/Host-Hub / RV280 [Radeon 9200 SE] Needs AGPMode 4 (lp #300304) */
- { PCI_VENDOR_ID_INTEL, 0x2570, PCI_VENDOR_ID_ATI, 0x5964,
0x148c, 0x2073, 4},- /* Intel 82855PM Processor to I/O Controller / Mobility M6 LY Needs AGPMode 1 (deb #467235) */
- { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c59,
PCI_VENDOR_ID_IBM, 0x052f, 1},- /* Intel 82855PM host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (lp #195051) */
- { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4e50,
PCI_VENDOR_ID_IBM, 0x0550, 1},- /* Intel 82855PM host bridge / RV250/M9 GL [Mobility FireGL 9000/Radeon 9000] needs AGPMode 1 (Thinkpad T40p) */
- { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c66,
PCI_VENDOR_ID_IBM, 0x054d, 1},- /* Intel 82855PM host bridge / Mobility M7 needs AGPMode 1 */
- { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c57,
PCI_VENDOR_ID_IBM, 0x0530, 1},- /* Intel 82855PM host bridge / FireGL Mobility T2 RV350 Needs AGPMode 2 (fdo #20647) */
- { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4e54,
PCI_VENDOR_ID_IBM, 0x054f, 2},- /* Intel 82855PM host bridge / Mobility M9+ / VaioPCG-V505DX Needs AGPMode 2 (fdo #17928) */
- { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x5c61,
PCI_VENDOR_ID_SONY, 0x816b, 2},- /* Intel 82855PM Processor to I/O Controller / Mobility M9+ Needs AGPMode 8 (phoronix forum) */
- { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x5c61,
PCI_VENDOR_ID_SONY, 0x8195, 8},- /* Intel 82830 830 Chipset Host Bridge / Mobility M6 LY Needs AGPMode 2 (fdo #17360)*/
- { PCI_VENDOR_ID_INTEL, 0x3575, PCI_VENDOR_ID_ATI, 0x4c59,
PCI_VENDOR_ID_DELL, 0x00e3, 2},- /* Intel 82852/82855 host bridge / Mobility FireGL 9000 RV250 Needs AGPMode 1 (lp #296617) */
- { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4c66,
PCI_VENDOR_ID_DELL, 0x0149, 1},- /* Intel 82855PM host bridge / Mobility FireGL 9000 RV250 Needs AGPMode 1 for suspend/resume */
- { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c66,
PCI_VENDOR_ID_IBM, 0x0531, 1},- /* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (deb #467460) */
- { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50,
0x1025, 0x0061, 1},- /* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (lp #203007) */
- { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50,
0x1025, 0x0064, 1},- /* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (lp #141551) */
- { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50,
PCI_VENDOR_ID_ASUSTEK, 0x1942, 1},- /* Intel 82852/82855 host bridge / Mobility 9600/9700 Needs AGPMode 1 (deb #510208) */
- { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50,
0x10cf, 0x127f, 1},- /* ASRock K7VT4A+ AGP 8x / ATI Radeon 9250 AGP Needs AGPMode 4 (lp #133192) */
- { 0x1849, 0x3189, PCI_VENDOR_ID_ATI, 0x5960,
0x1787, 0x5960, 4},- /* VIA K8M800 Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 4 (fdo #12544) */
- { PCI_VENDOR_ID_VIA, 0x0204, PCI_VENDOR_ID_ATI, 0x5960,
0x17af, 0x2020, 4},- /* VIA KT880 Host Bridge / RV350 [Radeon 9550] Needs AGPMode 4 (fdo #19981) */
- { PCI_VENDOR_ID_VIA, 0x0269, PCI_VENDOR_ID_ATI, 0x4153,
PCI_VENDOR_ID_ASUSTEK, 0x003c, 4},- /* VIA VT8363 Host Bridge / R200 QL [Radeon 8500] Needs AGPMode 2 (lp #141551) */
- { PCI_VENDOR_ID_VIA, 0x0305, PCI_VENDOR_ID_ATI, 0x514c,
PCI_VENDOR_ID_ATI, 0x013a, 2},- /* VIA VT82C693A Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 2 (deb #515512) */
- { PCI_VENDOR_ID_VIA, 0x0691, PCI_VENDOR_ID_ATI, 0x5960,
PCI_VENDOR_ID_ASUSTEK, 0x004c, 2},- /* VIA VT82C693A Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 2 */
- { PCI_VENDOR_ID_VIA, 0x0691, PCI_VENDOR_ID_ATI, 0x5960,
PCI_VENDOR_ID_ASUSTEK, 0x0054, 2},- /* VIA VT8377 Host Bridge / R200 QM [Radeon 9100] Needs AGPMode 4 (deb #461144) */
- { PCI_VENDOR_ID_VIA, 0x3189, PCI_VENDOR_ID_ATI, 0x514d,
0x174b, 0x7149, 4},- /* VIA VT8377 Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 4 (lp #312693) */
- { PCI_VENDOR_ID_VIA, 0x3189, PCI_VENDOR_ID_ATI, 0x5960,
0x1462, 0x0380, 4},- /* VIA VT8377 Host Bridge / RV280 Needs AGPMode 4 (ati ML) */
- { PCI_VENDOR_ID_VIA, 0x3189, PCI_VENDOR_ID_ATI, 0x5964,
0x148c, 0x2073, 4},- /* ATI Host Bridge / RV280 [M9+] Needs AGPMode 1 (phoronix forum) */
- { PCI_VENDOR_ID_ATI, 0xcbb2, PCI_VENDOR_ID_ATI, 0x5c61,
PCI_VENDOR_ID_SONY, 0x8175, 1},- { 0, 0, 0, 0, 0, 0, 0 },
-}; -#endif
-int radeon_agp_init(struct radeon_device *rdev) -{ -#if IS_ENABLED(CONFIG_AGP)
- struct radeon_agpmode_quirk *p = radeon_agpmode_quirk_list;
- struct drm_agp_mode mode;
- struct drm_agp_info info;
- uint32_t agp_status;
- int default_mode;
- bool is_v3;
- int ret;
- /* Acquire AGP. */
- ret = drm_agp_acquire(rdev->ddev);
- if (ret) {
DRM_ERROR("Unable to acquire AGP: %d\n", ret);return ret;- }
- ret = drm_agp_info(rdev->ddev, &info);
- if (ret) {
drm_agp_release(rdev->ddev);DRM_ERROR("Unable to get AGP info: %d\n", ret);return ret;- }
- if (rdev->ddev->agp->agp_info.aper_size < 32) {
drm_agp_release(rdev->ddev);dev_warn(rdev->dev, "AGP aperture too small (%zuM) ""need at least 32M, disabling AGP\n",rdev->ddev->agp->agp_info.aper_size);return -EINVAL;- }
- mode.mode = info.mode;
- /* chips with the agp to pcie bridge don't have the AGP_STATUS register
* Just use the whatever mode the host sets up.*/- if (rdev->family <= CHIP_RV350)
agp_status = (RREG32(RADEON_AGP_STATUS) | RADEON_AGPv3_MODE) & mode.mode;- else
agp_status = mode.mode;- is_v3 = !!(agp_status & RADEON_AGPv3_MODE);
- if (is_v3) {
default_mode = (agp_status & RADEON_AGPv3_8X_MODE) ? 8 : 4;- } else {
if (agp_status & RADEON_AGP_4X_MODE) {default_mode = 4;} else if (agp_status & RADEON_AGP_2X_MODE) {default_mode = 2;} else {default_mode = 1;}- }
- /* Apply AGPMode Quirks */
- while (p && p->chip_device != 0) {
if (info.id_vendor == p->hostbridge_vendor &&info.id_device == p->hostbridge_device &&rdev->pdev->vendor == p->chip_vendor &&rdev->pdev->device == p->chip_device &&rdev->pdev->subsystem_vendor == p->subsys_vendor &&rdev->pdev->subsystem_device == p->subsys_device) {default_mode = p->default_mode;}++p;- }
- if (radeon_agpmode > 0) {
if ((radeon_agpmode < (is_v3 ? 4 : 1)) ||(radeon_agpmode > (is_v3 ? 8 : 4)) ||(radeon_agpmode & (radeon_agpmode - 1))) {DRM_ERROR("Illegal AGP Mode: %d (valid %s), leaving at %d\n",radeon_agpmode, is_v3 ? "4, 8" : "1, 2, 4",default_mode);radeon_agpmode = default_mode;} else {DRM_INFO("AGP mode requested: %d\n", radeon_agpmode);}- } else {
radeon_agpmode = default_mode;- }
- mode.mode &= ~RADEON_AGP_MODE_MASK;
- if (is_v3) {
switch (radeon_agpmode) {case 8:mode.mode |= RADEON_AGPv3_8X_MODE;break;case 4:default:mode.mode |= RADEON_AGPv3_4X_MODE;break;}- } else {
switch (radeon_agpmode) {case 4:mode.mode |= RADEON_AGP_4X_MODE;break;case 2:mode.mode |= RADEON_AGP_2X_MODE;break;case 1:default:mode.mode |= RADEON_AGP_1X_MODE;break;}- }
- mode.mode &= ~RADEON_AGP_FW_MODE; /* disable fw */
- ret = drm_agp_enable(rdev->ddev, mode);
- if (ret) {
DRM_ERROR("Unable to enable AGP (mode = 0x%lx)\n", mode.mode);drm_agp_release(rdev->ddev);return ret;- }
- rdev->mc.agp_base = rdev->ddev->agp->agp_info.aper_base;
The field agp_base seems to be used to program HW registers. Yet I cannot find its initialization after applying the patchset. Does some of this removed setup code need to be moved elsewhere instead?
Best regards Thomas
- rdev->mc.gtt_size = rdev->ddev->agp->agp_info.aper_size << 20;
- rdev->mc.gtt_start = rdev->mc.agp_base;
- rdev->mc.gtt_end = rdev->mc.gtt_start + rdev->mc.gtt_size - 1;
- dev_info(rdev->dev, "GTT: %lluM 0x%08llX - 0x%08llX\n",
rdev->mc.gtt_size >> 20, rdev->mc.gtt_start, rdev->mc.gtt_end);- /* workaround some hw issues */
- if (rdev->family < CHIP_R200) {
WREG32(RADEON_AGP_CNTL, RREG32(RADEON_AGP_CNTL) | 0x000e0000);- }
- return 0;
-#else
- return 0;
-#endif -}
-void radeon_agp_resume(struct radeon_device *rdev) -{ -#if IS_ENABLED(CONFIG_AGP)
- int r;
- if (rdev->flags & RADEON_IS_AGP) {
r = radeon_agp_init(rdev);if (r)dev_warn(rdev->dev, "radeon AGP reinit failed\n");- }
-#endif -}
-void radeon_agp_fini(struct radeon_device *rdev) -{ -#if IS_ENABLED(CONFIG_AGP)
- if (rdev->ddev->agp && rdev->ddev->agp->acquired) {
drm_agp_release(rdev->ddev);- }
-#endif -}
-void radeon_agp_suspend(struct radeon_device *rdev) -{
- radeon_agp_fini(rdev);
-} diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c index 266e3cbbd09b..12e5c5d81c47 100644 --- a/drivers/gpu/drm/radeon/radeon_device.c +++ b/drivers/gpu/drm/radeon/radeon_device.c @@ -1145,22 +1145,6 @@ static void radeon_check_arguments(struct radeon_device *rdev) } rdev->mc.gtt_size = (uint64_t)radeon_gart_size << 20;
- /* AGP mode can only be -1, 1, 2, 4, 8 */
- switch (radeon_agpmode) {
- case -1:
- case 0:
- case 1:
- case 2:
- case 4:
- case 8:
break;- default:
dev_warn(rdev->dev, "invalid AGP mode %d (valid mode: ""-1, 0, 1, 2, 4, 8)\n", radeon_agpmode);radeon_agpmode = 0;break;- }
- if (!radeon_check_pot_argument(radeon_vm_size)) { dev_warn(rdev->dev, "VM size (%d) must be a power of 2\n", radeon_vm_size);
@@ -1348,9 +1332,8 @@ int radeon_device_init(struct radeon_device *rdev, rdev->flags &= ~RADEON_IS_AGP; }
- if (rdev->flags & RADEON_IS_AGP && radeon_agpmode == -1) {
- if (rdev->flags & RADEON_IS_AGP) radeon_agp_disable(rdev);
}
/* Set the internal MC address mask
- This is the max address of the GPU's
@@ -1636,8 +1619,6 @@ int radeon_suspend_kms(struct drm_device *dev, bool suspend, */ radeon_bo_evict_vram(rdev);
- radeon_agp_suspend(rdev);
- pci_save_state(dev->pdev); if (freeze && rdev->family >= CHIP_CEDAR && !(rdev->flags & RADEON_IS_IGP)) { rdev->asic->asic_reset(rdev, true);
@@ -1687,8 +1668,6 @@ int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon) return -1; } }
/* resume AGP if in use */
radeon_agp_resume(rdev); radeon_resume(rdev);
r = radeon_ib_ring_tests(rdev);
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c index bbb0883e8ce6..62a5dfaf990b 100644 --- a/drivers/gpu/drm/radeon/radeon_drv.c +++ b/drivers/gpu/drm/radeon/radeon_drv.c @@ -171,12 +171,6 @@ int radeon_no_wb; int radeon_modeset = -1; int radeon_dynclks = -1; int radeon_r4xx_atom = 0; -#ifdef __powerpc__ -/* Default to PCI on PowerPC (fdo #95017) */ -int radeon_agpmode = -1; -#else -int radeon_agpmode = 0; -#endif int radeon_vram_limit = 0; int radeon_gart_size = -1; /* auto */ int radeon_benchmarking = 0; @@ -220,9 +214,6 @@ module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444); MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes"); module_param_named(vramlimit, radeon_vram_limit, int, 0600);
-MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)"); -module_param_named(agpmode, radeon_agpmode, int, 0444);
MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto)"); module_param_named(gartsize, radeon_gart_size, int, 0600);
diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c index 5d50c9edbe80..21bb3706c13c 100644 --- a/drivers/gpu/drm/radeon/radeon_ttm.c +++ b/drivers/gpu/drm/radeon/radeon_ttm.c @@ -86,20 +86,6 @@ static int radeon_init_mem_type(struct ttm_bo_device *bdev, uint32_t type, man->available_caching = TTM_PL_MASK_CACHING; man->default_caching = TTM_PL_FLAG_CACHED; man->flags = TTM_MEMTYPE_FLAG_MAPPABLE | TTM_MEMTYPE_FLAG_CMA; -#if IS_ENABLED(CONFIG_AGP)
if (rdev->flags & RADEON_IS_AGP) {if (!rdev->ddev->agp) {DRM_ERROR("AGP is not enabled for memory type %u\n",(unsigned)type);return -EINVAL;}if (!rdev->ddev->agp->cant_use_aperture)man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;man->available_caching = TTM_PL_FLAG_UNCACHED |TTM_PL_FLAG_WC;man->default_caching = TTM_PL_FLAG_WC;}-#endif break; case TTM_PL_VRAM: /* "On-card" video ram */ @@ -411,14 +397,6 @@ static int radeon_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_ /* system memory */ return 0; case TTM_PL_TT: -#if IS_ENABLED(CONFIG_AGP)
if (rdev->flags & RADEON_IS_AGP) {/* RADEON_IS_AGP is set only if AGP is active */mem->bus.offset = mem->start << PAGE_SHIFT;mem->bus.base = rdev->mc.agp_base;mem->bus.is_iomem = !rdev->ddev->agp->cant_use_aperture;}-#endif break; case TTM_PL_VRAM: mem->bus.offset = mem->start << PAGE_SHIFT; @@ -631,12 +609,6 @@ static struct ttm_tt *radeon_ttm_tt_create(struct ttm_buffer_object *bo, struct radeon_ttm_tt *gtt;
rdev = radeon_get_rdev(bo->bdev); -#if IS_ENABLED(CONFIG_AGP)
- if (rdev->flags & RADEON_IS_AGP) {
return ttm_agp_tt_create(bo, rdev->ddev->agp->bridge,page_flags);- }
-#endif
gtt = kzalloc(sizeof(struct radeon_ttm_tt), GFP_KERNEL); if (gtt == NULL) { @@ -683,11 +655,6 @@ static int radeon_ttm_tt_populate(struct ttm_tt *ttm, }
rdev = radeon_get_rdev(ttm->bdev); -#if IS_ENABLED(CONFIG_AGP)
- if (rdev->flags & RADEON_IS_AGP) {
return ttm_agp_tt_populate(ttm, ctx);- }
-#endif
#ifdef CONFIG_SWIOTLB if (rdev->need_swiotlb && swiotlb_nr_tbl()) { @@ -714,12 +681,6 @@ static void radeon_ttm_tt_unpopulate(struct ttm_tt *ttm) return;
rdev = radeon_get_rdev(ttm->bdev); -#if IS_ENABLED(CONFIG_AGP)
- if (rdev->flags & RADEON_IS_AGP) {
ttm_agp_tt_unpopulate(ttm);return;- }
-#endif
#ifdef CONFIG_SWIOTLB if (rdev->need_swiotlb && swiotlb_nr_tbl()) { diff --git a/drivers/gpu/drm/radeon/rv515.c b/drivers/gpu/drm/radeon/rv515.c index 147e5cf8348d..8a2f16320869 100644 --- a/drivers/gpu/drm/radeon/rv515.c +++ b/drivers/gpu/drm/radeon/rv515.c @@ -622,7 +622,6 @@ void rv515_fini(struct radeon_device *rdev) radeon_ib_pool_fini(rdev); radeon_gem_fini(rdev); rv370_pcie_gart_fini(rdev);
- radeon_agp_fini(rdev); radeon_irq_kms_fini(rdev); radeon_fence_driver_fini(rdev); radeon_bo_fini(rdev);
@@ -667,13 +666,6 @@ int rv515_init(struct radeon_device *rdev) return -EINVAL; /* Initialize clocks */ radeon_get_clock_info(rdev->ddev);
- /* initialize AGP */
- if (rdev->flags & RADEON_IS_AGP) {
r = radeon_agp_init(rdev);if (r) {radeon_agp_disable(rdev);}- } /* initialize memory controller */ rv515_mc_init(rdev); rv515_debugfs(rdev);
@@ -703,7 +695,6 @@ int rv515_init(struct radeon_device *rdev) radeon_ib_pool_fini(rdev); radeon_irq_kms_fini(rdev); rv370_pcie_gart_fini(rdev);
radeon_agp_fini(rdev);diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c index 21f653ae1e1b..20bf54266f24 100644 --- a/drivers/gpu/drm/radeon/rv770.c +++ b/drivers/gpu/drm/radeon/rv770.c @@ -1943,12 +1943,6 @@ int rv770_init(struct radeon_device *rdev) r = radeon_fence_driver_init(rdev); if (r) return r;
- /* initialize AGP */
- if (rdev->flags & RADEON_IS_AGP) {
r = radeon_agp_init(rdev);if (r)radeon_agp_disable(rdev);- } r = rv770_mc_init(rdev); if (r) return r;
@@ -2015,7 +2009,6 @@ void rv770_fini(struct radeon_device *rdev) r600_vram_scratch_fini(rdev); radeon_gem_fini(rdev); radeon_fence_driver_fini(rdev);
- radeon_agp_fini(rdev); radeon_bo_fini(rdev); radeon_atombios_fini(rdev); kfree(rdev->bios);
On Tue, May 12, 2020 at 2:20 PM Thomas Zimmermann tzimmermann@suse.de wrote:
Hi Christian
Am 11.05.20 um 19:17 schrieb Christian König:
AGP is deprecated for 10+ years now and not used any more on modern hardware.
Old hardware should continue to work in PCI mode.
Signed-off-by: Christian König christian.koenig@amd.com
drivers/gpu/drm/radeon/Makefile | 4 +- drivers/gpu/drm/radeon/evergreen.c | 7 - drivers/gpu/drm/radeon/r100.c | 10 +- drivers/gpu/drm/radeon/r300.c | 9 - drivers/gpu/drm/radeon/r420.c | 9 - drivers/gpu/drm/radeon/r520.c | 8 - drivers/gpu/drm/radeon/r600.c | 6 - drivers/gpu/drm/radeon/radeon.h | 11 - drivers/gpu/drm/radeon/radeon_agp.c | 290 ------------------------- drivers/gpu/drm/radeon/radeon_device.c | 23 +- drivers/gpu/drm/radeon/radeon_drv.c | 9 -
In radeon_drv.c, the field drm_device.agp is still being initialized in radeon_pci_probe() and cleaned up in radeon_driver_unload_kms(). Is this intentional?
Best regards Thomas
drivers/gpu/drm/radeon/radeon_ttm.c | 39 ---- drivers/gpu/drm/radeon/rv515.c | 9 - drivers/gpu/drm/radeon/rv770.c | 7 - 14 files changed, 4 insertions(+), 437 deletions(-) delete mode 100644 drivers/gpu/drm/radeon/radeon_agp.c
diff --git a/drivers/gpu/drm/radeon/Makefile b/drivers/gpu/drm/radeon/Makefile index c693b2ca0329..77429cfd303e 100644 --- a/drivers/gpu/drm/radeon/Makefile +++ b/drivers/gpu/drm/radeon/Makefile @@ -61,8 +61,8 @@ radeon-y := radeon_drv.o
# add KMS driver radeon-y += radeon_device.o radeon_asic.o radeon_kms.o \
radeon_atombios.o radeon_agp.o atombios_crtc.o radeon_combios.o \atom.o radeon_fence.o radeon_ttm.o radeon_object.o radeon_gart.o \
radeon_atombios.o atombios_crtc.o radeon_combios.o atom.o \radeon_fence.o radeon_ttm.o radeon_object.o radeon_gart.o \ radeon_legacy_crtc.o radeon_legacy_encoders.o radeon_connectors.o \ radeon_encoders.o radeon_display.o radeon_cursor.o radeon_i2c.o \ radeon_clocks.o radeon_fb.o radeon_gem.o radeon_ring.o radeon_irq_kms.o \diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 14d90dc376e7..66b3d9a2c6dd 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c @@ -5216,12 +5216,6 @@ int evergreen_init(struct radeon_device *rdev) r = radeon_fence_driver_init(rdev); if (r) return r;
/* initialize AGP */if (rdev->flags & RADEON_IS_AGP) {r = radeon_agp_init(rdev);if (r)radeon_agp_disable(rdev);} /* initialize memory controller */ r = evergreen_mc_init(rdev); if (r)@@ -5315,7 +5309,6 @@ void evergreen_fini(struct radeon_device *rdev) r600_vram_scratch_fini(rdev); radeon_gem_fini(rdev); radeon_fence_driver_fini(rdev);
radeon_agp_fini(rdev); radeon_bo_fini(rdev); radeon_atombios_fini(rdev); kfree(rdev->bios);diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c index 24c8db673931..320b1b40a30a 100644 --- a/drivers/gpu/drm/radeon/r100.c +++ b/drivers/gpu/drm/radeon/r100.c @@ -3382,7 +3382,7 @@ void r100_bandwidth_update(struct radeon_device *rdev)
if (rdev->flags & RADEON_IS_AGP) { fixed20_12 agpmode_ff;
agpmode_ff.full = dfixed_const(radeon_agpmode);
agpmode_ff.full = dfixed_const(0); temp_ff.full = dfixed_const_666(16); sclk_eff_ff.full -= dfixed_mul(agpmode_ff, temp_ff); }@@ -3992,7 +3992,6 @@ void r100_fini(struct radeon_device *rdev) radeon_gem_fini(rdev); if (rdev->flags & RADEON_IS_PCI) r100_pci_gart_fini(rdev);
radeon_agp_fini(rdev); radeon_irq_kms_fini(rdev); radeon_fence_driver_fini(rdev); radeon_bo_fini(rdev);@@ -4068,13 +4067,6 @@ int r100_init(struct radeon_device *rdev) r100_errata(rdev); /* Initialize clocks */ radeon_get_clock_info(rdev->ddev);
/* initialize AGP */if (rdev->flags & RADEON_IS_AGP) {r = radeon_agp_init(rdev);if (r) {radeon_agp_disable(rdev);}} /* initialize VRAM */ r100_mc_init(rdev); /* Fence driver */diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c index 3b7ead5be5bf..afd688629cf9 100644 --- a/drivers/gpu/drm/radeon/r300.c +++ b/drivers/gpu/drm/radeon/r300.c @@ -1498,7 +1498,6 @@ void r300_fini(struct radeon_device *rdev) rv370_pcie_gart_fini(rdev); if (rdev->flags & RADEON_IS_PCI) r100_pci_gart_fini(rdev);
radeon_agp_fini(rdev); radeon_irq_kms_fini(rdev); radeon_fence_driver_fini(rdev); radeon_bo_fini(rdev);@@ -1547,13 +1546,6 @@ int r300_init(struct radeon_device *rdev) r300_errata(rdev); /* Initialize clocks */ radeon_get_clock_info(rdev->ddev);
/* initialize AGP */if (rdev->flags & RADEON_IS_AGP) {r = radeon_agp_init(rdev);if (r) {radeon_agp_disable(rdev);}} /* initialize memory controller */ r300_mc_init(rdev); /* Fence driver */@@ -1592,7 +1584,6 @@ int r300_init(struct radeon_device *rdev) rv370_pcie_gart_fini(rdev); if (rdev->flags & RADEON_IS_PCI) r100_pci_gart_fini(rdev);
radeon_agp_fini(rdev); rdev->accel_working = false; } return 0;diff --git a/drivers/gpu/drm/radeon/r420.c b/drivers/gpu/drm/radeon/r420.c index 1d4c04e0a449..3cb337dacd56 100644 --- a/drivers/gpu/drm/radeon/r420.c +++ b/drivers/gpu/drm/radeon/r420.c @@ -366,7 +366,6 @@ void r420_fini(struct radeon_device *rdev) rv370_pcie_gart_fini(rdev); if (rdev->flags & RADEON_IS_PCI) r100_pci_gart_fini(rdev);
radeon_agp_fini(rdev); radeon_irq_kms_fini(rdev); radeon_fence_driver_fini(rdev); radeon_bo_fini(rdev);@@ -419,13 +418,6 @@ int r420_init(struct radeon_device *rdev)
/* Initialize clocks */ radeon_get_clock_info(rdev->ddev);
/* initialize AGP */if (rdev->flags & RADEON_IS_AGP) {r = radeon_agp_init(rdev);if (r) {radeon_agp_disable(rdev);}} /* initialize memory controller */ r300_mc_init(rdev); r420_debugfs(rdev);@@ -470,7 +462,6 @@ int r420_init(struct radeon_device *rdev) rv370_pcie_gart_fini(rdev); if (rdev->flags & RADEON_IS_PCI) r100_pci_gart_fini(rdev);
radeon_agp_fini(rdev); rdev->accel_working = false; } return 0;diff --git a/drivers/gpu/drm/radeon/r520.c b/drivers/gpu/drm/radeon/r520.c index fc78e64ae727..76ac87d72406 100644 --- a/drivers/gpu/drm/radeon/r520.c +++ b/drivers/gpu/drm/radeon/r520.c @@ -288,13 +288,6 @@ int r520_init(struct radeon_device *rdev) } /* Initialize clocks */ radeon_get_clock_info(rdev->ddev);
/* initialize AGP */if (rdev->flags & RADEON_IS_AGP) {r = radeon_agp_init(rdev);if (r) {radeon_agp_disable(rdev);}} /* initialize memory controller */ r520_mc_init(rdev); rv515_debugfs(rdev);@@ -324,7 +317,6 @@ int r520_init(struct radeon_device *rdev) radeon_ib_pool_fini(rdev); radeon_irq_kms_fini(rdev); rv370_pcie_gart_fini(rdev);
radeon_agp_fini(rdev); rdev->accel_working = false; } return 0;diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index d9a33ca768f3..4a5ac15893c2 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c @@ -3286,11 +3286,6 @@ int r600_init(struct radeon_device *rdev) r = radeon_fence_driver_init(rdev); if (r) return r;
if (rdev->flags & RADEON_IS_AGP) {r = radeon_agp_init(rdev);if (r)radeon_agp_disable(rdev);} r = r600_mc_init(rdev); if (r) return r;@@ -3353,7 +3348,6 @@ void r600_fini(struct radeon_device *rdev) radeon_irq_kms_fini(rdev); r600_pcie_gart_fini(rdev); r600_vram_scratch_fini(rdev);
radeon_agp_fini(rdev); radeon_gem_fini(rdev); radeon_fence_driver_fini(rdev); radeon_bo_fini(rdev);diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index 30e32adc1fc6..377e1403b134 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h @@ -91,7 +91,6 @@ extern int radeon_no_wb; extern int radeon_modeset; extern int radeon_dynclks; extern int radeon_r4xx_atom; -extern int radeon_agpmode; extern int radeon_vram_limit; extern int radeon_gart_size; extern int radeon_benchmarking; @@ -1116,16 +1115,6 @@ typedef int (*radeon_packet0_check_t)(struct radeon_cs_parser *p, typedef int (*radeon_packet3_check_t)(struct radeon_cs_parser *p, struct radeon_cs_packet *pkt);
-/*
- AGP
- */
-int radeon_agp_init(struct radeon_device *rdev); -void radeon_agp_resume(struct radeon_device *rdev); -void radeon_agp_suspend(struct radeon_device *rdev); -void radeon_agp_fini(struct radeon_device *rdev);
/*
- Writeback
*/ diff --git a/drivers/gpu/drm/radeon/radeon_agp.c b/drivers/gpu/drm/radeon/radeon_agp.c deleted file mode 100644 index 0aca7bdf54c7..000000000000 --- a/drivers/gpu/drm/radeon/radeon_agp.c +++ /dev/null @@ -1,290 +0,0 @@ -/*
- Copyright 2008 Red Hat Inc.
- Copyright 2009 Jerome Glisse.
- Permission is hereby granted, free of charge, to any person obtaining a
- copy of this software and associated documentation files (the "Software"),
- to deal in the Software without restriction, including without limitation
- the rights to use, copy, modify, merge, publish, distribute, sublicense,
- and/or sell copies of the Software, and to permit persons to whom the
- Software is furnished to do so, subject to the following conditions:
- The above copyright notice and this permission notice shall be included in
- all copies or substantial portions of the Software.
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- OTHER DEALINGS IN THE SOFTWARE.
- Authors:
- Dave Airlie
- Jerome Glisse glisse@freedesktop.org
- */
-#include <linux/pci.h>
-#include <drm/drm_agpsupport.h> -#include <drm/drm_device.h> -#include <drm/radeon_drm.h>
-#include "radeon.h"
-#if IS_ENABLED(CONFIG_AGP)
-struct radeon_agpmode_quirk {
u32 hostbridge_vendor;u32 hostbridge_device;u32 chip_vendor;u32 chip_device;u32 subsys_vendor;u32 subsys_device;u32 default_mode;-};
-static struct radeon_agpmode_quirk radeon_agpmode_quirk_list[] = {
/* Intel E7505 Memory Controller Hub / RV350 AR [Radeon 9600XT] Needs AGPMode 4 (deb #515326) */{ PCI_VENDOR_ID_INTEL, 0x2550, PCI_VENDOR_ID_ATI, 0x4152, 0x1458, 0x4038, 4},/* Intel 82865G/PE/P DRAM Controller/Host-Hub / Mobility 9800 Needs AGPMode 4 (deb #462590) */{ PCI_VENDOR_ID_INTEL, 0x2570, PCI_VENDOR_ID_ATI, 0x4a4e, PCI_VENDOR_ID_DELL, 0x5106, 4},/* Intel 82865G/PE/P DRAM Controller/Host-Hub / RV280 [Radeon 9200 SE] Needs AGPMode 4 (lp #300304) */{ PCI_VENDOR_ID_INTEL, 0x2570, PCI_VENDOR_ID_ATI, 0x5964,0x148c, 0x2073, 4},/* Intel 82855PM Processor to I/O Controller / Mobility M6 LY Needs AGPMode 1 (deb #467235) */{ PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c59,PCI_VENDOR_ID_IBM, 0x052f, 1},/* Intel 82855PM host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (lp #195051) */{ PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4e50,PCI_VENDOR_ID_IBM, 0x0550, 1},/* Intel 82855PM host bridge / RV250/M9 GL [Mobility FireGL 9000/Radeon 9000] needs AGPMode 1 (Thinkpad T40p) */{ PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c66,PCI_VENDOR_ID_IBM, 0x054d, 1},/* Intel 82855PM host bridge / Mobility M7 needs AGPMode 1 */{ PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c57,PCI_VENDOR_ID_IBM, 0x0530, 1},/* Intel 82855PM host bridge / FireGL Mobility T2 RV350 Needs AGPMode 2 (fdo #20647) */{ PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4e54,PCI_VENDOR_ID_IBM, 0x054f, 2},/* Intel 82855PM host bridge / Mobility M9+ / VaioPCG-V505DX Needs AGPMode 2 (fdo #17928) */{ PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x5c61,PCI_VENDOR_ID_SONY, 0x816b, 2},/* Intel 82855PM Processor to I/O Controller / Mobility M9+ Needs AGPMode 8 (phoronix forum) */{ PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x5c61,PCI_VENDOR_ID_SONY, 0x8195, 8},/* Intel 82830 830 Chipset Host Bridge / Mobility M6 LY Needs AGPMode 2 (fdo #17360)*/{ PCI_VENDOR_ID_INTEL, 0x3575, PCI_VENDOR_ID_ATI, 0x4c59,PCI_VENDOR_ID_DELL, 0x00e3, 2},/* Intel 82852/82855 host bridge / Mobility FireGL 9000 RV250 Needs AGPMode 1 (lp #296617) */{ PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4c66,PCI_VENDOR_ID_DELL, 0x0149, 1},/* Intel 82855PM host bridge / Mobility FireGL 9000 RV250 Needs AGPMode 1 for suspend/resume */{ PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c66,PCI_VENDOR_ID_IBM, 0x0531, 1},/* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (deb #467460) */{ PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50,0x1025, 0x0061, 1},/* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (lp #203007) */{ PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50,0x1025, 0x0064, 1},/* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (lp #141551) */{ PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50,PCI_VENDOR_ID_ASUSTEK, 0x1942, 1},/* Intel 82852/82855 host bridge / Mobility 9600/9700 Needs AGPMode 1 (deb #510208) */{ PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50,0x10cf, 0x127f, 1},/* ASRock K7VT4A+ AGP 8x / ATI Radeon 9250 AGP Needs AGPMode 4 (lp #133192) */{ 0x1849, 0x3189, PCI_VENDOR_ID_ATI, 0x5960,0x1787, 0x5960, 4},/* VIA K8M800 Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 4 (fdo #12544) */{ PCI_VENDOR_ID_VIA, 0x0204, PCI_VENDOR_ID_ATI, 0x5960,0x17af, 0x2020, 4},/* VIA KT880 Host Bridge / RV350 [Radeon 9550] Needs AGPMode 4 (fdo #19981) */{ PCI_VENDOR_ID_VIA, 0x0269, PCI_VENDOR_ID_ATI, 0x4153,PCI_VENDOR_ID_ASUSTEK, 0x003c, 4},/* VIA VT8363 Host Bridge / R200 QL [Radeon 8500] Needs AGPMode 2 (lp #141551) */{ PCI_VENDOR_ID_VIA, 0x0305, PCI_VENDOR_ID_ATI, 0x514c,PCI_VENDOR_ID_ATI, 0x013a, 2},/* VIA VT82C693A Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 2 (deb #515512) */{ PCI_VENDOR_ID_VIA, 0x0691, PCI_VENDOR_ID_ATI, 0x5960,PCI_VENDOR_ID_ASUSTEK, 0x004c, 2},/* VIA VT82C693A Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 2 */{ PCI_VENDOR_ID_VIA, 0x0691, PCI_VENDOR_ID_ATI, 0x5960,PCI_VENDOR_ID_ASUSTEK, 0x0054, 2},/* VIA VT8377 Host Bridge / R200 QM [Radeon 9100] Needs AGPMode 4 (deb #461144) */{ PCI_VENDOR_ID_VIA, 0x3189, PCI_VENDOR_ID_ATI, 0x514d,0x174b, 0x7149, 4},/* VIA VT8377 Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 4 (lp #312693) */{ PCI_VENDOR_ID_VIA, 0x3189, PCI_VENDOR_ID_ATI, 0x5960,0x1462, 0x0380, 4},/* VIA VT8377 Host Bridge / RV280 Needs AGPMode 4 (ati ML) */{ PCI_VENDOR_ID_VIA, 0x3189, PCI_VENDOR_ID_ATI, 0x5964,0x148c, 0x2073, 4},/* ATI Host Bridge / RV280 [M9+] Needs AGPMode 1 (phoronix forum) */{ PCI_VENDOR_ID_ATI, 0xcbb2, PCI_VENDOR_ID_ATI, 0x5c61,PCI_VENDOR_ID_SONY, 0x8175, 1},{ 0, 0, 0, 0, 0, 0, 0 },-}; -#endif
-int radeon_agp_init(struct radeon_device *rdev) -{ -#if IS_ENABLED(CONFIG_AGP)
struct radeon_agpmode_quirk *p = radeon_agpmode_quirk_list;struct drm_agp_mode mode;struct drm_agp_info info;uint32_t agp_status;int default_mode;bool is_v3;int ret;/* Acquire AGP. */ret = drm_agp_acquire(rdev->ddev);if (ret) {DRM_ERROR("Unable to acquire AGP: %d\n", ret);return ret;}ret = drm_agp_info(rdev->ddev, &info);if (ret) {drm_agp_release(rdev->ddev);DRM_ERROR("Unable to get AGP info: %d\n", ret);return ret;}if (rdev->ddev->agp->agp_info.aper_size < 32) {drm_agp_release(rdev->ddev);dev_warn(rdev->dev, "AGP aperture too small (%zuM) ""need at least 32M, disabling AGP\n",rdev->ddev->agp->agp_info.aper_size);return -EINVAL;}mode.mode = info.mode;/* chips with the agp to pcie bridge don't have the AGP_STATUS register* Just use the whatever mode the host sets up.*/if (rdev->family <= CHIP_RV350)agp_status = (RREG32(RADEON_AGP_STATUS) | RADEON_AGPv3_MODE) & mode.mode;elseagp_status = mode.mode;is_v3 = !!(agp_status & RADEON_AGPv3_MODE);if (is_v3) {default_mode = (agp_status & RADEON_AGPv3_8X_MODE) ? 8 : 4;} else {if (agp_status & RADEON_AGP_4X_MODE) {default_mode = 4;} else if (agp_status & RADEON_AGP_2X_MODE) {default_mode = 2;} else {default_mode = 1;}}/* Apply AGPMode Quirks */while (p && p->chip_device != 0) {if (info.id_vendor == p->hostbridge_vendor &&info.id_device == p->hostbridge_device &&rdev->pdev->vendor == p->chip_vendor &&rdev->pdev->device == p->chip_device &&rdev->pdev->subsystem_vendor == p->subsys_vendor &&rdev->pdev->subsystem_device == p->subsys_device) {default_mode = p->default_mode;}++p;}if (radeon_agpmode > 0) {if ((radeon_agpmode < (is_v3 ? 4 : 1)) ||(radeon_agpmode > (is_v3 ? 8 : 4)) ||(radeon_agpmode & (radeon_agpmode - 1))) {DRM_ERROR("Illegal AGP Mode: %d (valid %s), leaving at %d\n",radeon_agpmode, is_v3 ? "4, 8" : "1, 2, 4",default_mode);radeon_agpmode = default_mode;} else {DRM_INFO("AGP mode requested: %d\n", radeon_agpmode);}} else {radeon_agpmode = default_mode;}mode.mode &= ~RADEON_AGP_MODE_MASK;if (is_v3) {switch (radeon_agpmode) {case 8:mode.mode |= RADEON_AGPv3_8X_MODE;break;case 4:default:mode.mode |= RADEON_AGPv3_4X_MODE;break;}} else {switch (radeon_agpmode) {case 4:mode.mode |= RADEON_AGP_4X_MODE;break;case 2:mode.mode |= RADEON_AGP_2X_MODE;break;case 1:default:mode.mode |= RADEON_AGP_1X_MODE;break;}}mode.mode &= ~RADEON_AGP_FW_MODE; /* disable fw */ret = drm_agp_enable(rdev->ddev, mode);if (ret) {DRM_ERROR("Unable to enable AGP (mode = 0x%lx)\n", mode.mode);drm_agp_release(rdev->ddev);return ret;}rdev->mc.agp_base = rdev->ddev->agp->agp_info.aper_base;The field agp_base seems to be used to program HW registers. Yet I cannot find its initialization after applying the patchset. Does some of this removed setup code need to be moved elsewhere instead?
I think we should be ok as long as the RADEON_IS_AGP flag is removed which gets done in radeon_agp_disable.
Alex
Best regards Thomas
rdev->mc.gtt_size = rdev->ddev->agp->agp_info.aper_size << 20;rdev->mc.gtt_start = rdev->mc.agp_base;rdev->mc.gtt_end = rdev->mc.gtt_start + rdev->mc.gtt_size - 1;dev_info(rdev->dev, "GTT: %lluM 0x%08llX - 0x%08llX\n",rdev->mc.gtt_size >> 20, rdev->mc.gtt_start, rdev->mc.gtt_end);/* workaround some hw issues */if (rdev->family < CHIP_R200) {WREG32(RADEON_AGP_CNTL, RREG32(RADEON_AGP_CNTL) | 0x000e0000);}return 0;-#else
return 0;-#endif -}
-void radeon_agp_resume(struct radeon_device *rdev) -{ -#if IS_ENABLED(CONFIG_AGP)
int r;if (rdev->flags & RADEON_IS_AGP) {r = radeon_agp_init(rdev);if (r)dev_warn(rdev->dev, "radeon AGP reinit failed\n");}-#endif -}
-void radeon_agp_fini(struct radeon_device *rdev) -{ -#if IS_ENABLED(CONFIG_AGP)
if (rdev->ddev->agp && rdev->ddev->agp->acquired) {drm_agp_release(rdev->ddev);}-#endif -}
-void radeon_agp_suspend(struct radeon_device *rdev) -{
radeon_agp_fini(rdev);-} diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c index 266e3cbbd09b..12e5c5d81c47 100644 --- a/drivers/gpu/drm/radeon/radeon_device.c +++ b/drivers/gpu/drm/radeon/radeon_device.c @@ -1145,22 +1145,6 @@ static void radeon_check_arguments(struct radeon_device *rdev) } rdev->mc.gtt_size = (uint64_t)radeon_gart_size << 20;
/* AGP mode can only be -1, 1, 2, 4, 8 */switch (radeon_agpmode) {case -1:case 0:case 1:case 2:case 4:case 8:break;default:dev_warn(rdev->dev, "invalid AGP mode %d (valid mode: ""-1, 0, 1, 2, 4, 8)\n", radeon_agpmode);radeon_agpmode = 0;break;}if (!radeon_check_pot_argument(radeon_vm_size)) { dev_warn(rdev->dev, "VM size (%d) must be a power of 2\n", radeon_vm_size);@@ -1348,9 +1332,8 @@ int radeon_device_init(struct radeon_device *rdev, rdev->flags &= ~RADEON_IS_AGP; }
if (rdev->flags & RADEON_IS_AGP && radeon_agpmode == -1) {
if (rdev->flags & RADEON_IS_AGP) radeon_agp_disable(rdev);
} /* Set the internal MC address mask * This is the max address of the GPU's@@ -1636,8 +1619,6 @@ int radeon_suspend_kms(struct drm_device *dev, bool suspend, */ radeon_bo_evict_vram(rdev);
radeon_agp_suspend(rdev);pci_save_state(dev->pdev); if (freeze && rdev->family >= CHIP_CEDAR && !(rdev->flags & RADEON_IS_IGP)) { rdev->asic->asic_reset(rdev, true);@@ -1687,8 +1668,6 @@ int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon) return -1; } }
/* resume AGP if in use */radeon_agp_resume(rdev); radeon_resume(rdev); r = radeon_ib_ring_tests(rdev);diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c index bbb0883e8ce6..62a5dfaf990b 100644 --- a/drivers/gpu/drm/radeon/radeon_drv.c +++ b/drivers/gpu/drm/radeon/radeon_drv.c @@ -171,12 +171,6 @@ int radeon_no_wb; int radeon_modeset = -1; int radeon_dynclks = -1; int radeon_r4xx_atom = 0; -#ifdef __powerpc__ -/* Default to PCI on PowerPC (fdo #95017) */ -int radeon_agpmode = -1; -#else -int radeon_agpmode = 0; -#endif int radeon_vram_limit = 0; int radeon_gart_size = -1; /* auto */ int radeon_benchmarking = 0; @@ -220,9 +214,6 @@ module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444); MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes"); module_param_named(vramlimit, radeon_vram_limit, int, 0600);
-MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)"); -module_param_named(agpmode, radeon_agpmode, int, 0444);
MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto)"); module_param_named(gartsize, radeon_gart_size, int, 0600);
diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c index 5d50c9edbe80..21bb3706c13c 100644 --- a/drivers/gpu/drm/radeon/radeon_ttm.c +++ b/drivers/gpu/drm/radeon/radeon_ttm.c @@ -86,20 +86,6 @@ static int radeon_init_mem_type(struct ttm_bo_device *bdev, uint32_t type, man->available_caching = TTM_PL_MASK_CACHING; man->default_caching = TTM_PL_FLAG_CACHED; man->flags = TTM_MEMTYPE_FLAG_MAPPABLE | TTM_MEMTYPE_FLAG_CMA; -#if IS_ENABLED(CONFIG_AGP)
if (rdev->flags & RADEON_IS_AGP) {if (!rdev->ddev->agp) {DRM_ERROR("AGP is not enabled for memory type %u\n",(unsigned)type);return -EINVAL;}if (!rdev->ddev->agp->cant_use_aperture)man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;man->available_caching = TTM_PL_FLAG_UNCACHED |TTM_PL_FLAG_WC;man->default_caching = TTM_PL_FLAG_WC;}-#endif break; case TTM_PL_VRAM: /* "On-card" video ram */ @@ -411,14 +397,6 @@ static int radeon_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_ /* system memory */ return 0; case TTM_PL_TT: -#if IS_ENABLED(CONFIG_AGP)
if (rdev->flags & RADEON_IS_AGP) {/* RADEON_IS_AGP is set only if AGP is active */mem->bus.offset = mem->start << PAGE_SHIFT;mem->bus.base = rdev->mc.agp_base;mem->bus.is_iomem = !rdev->ddev->agp->cant_use_aperture;}-#endif break; case TTM_PL_VRAM: mem->bus.offset = mem->start << PAGE_SHIFT; @@ -631,12 +609,6 @@ static struct ttm_tt *radeon_ttm_tt_create(struct ttm_buffer_object *bo, struct radeon_ttm_tt *gtt;
rdev = radeon_get_rdev(bo->bdev);-#if IS_ENABLED(CONFIG_AGP)
if (rdev->flags & RADEON_IS_AGP) {return ttm_agp_tt_create(bo, rdev->ddev->agp->bridge,page_flags);}-#endif
gtt = kzalloc(sizeof(struct radeon_ttm_tt), GFP_KERNEL); if (gtt == NULL) {@@ -683,11 +655,6 @@ static int radeon_ttm_tt_populate(struct ttm_tt *ttm, }
rdev = radeon_get_rdev(ttm->bdev);-#if IS_ENABLED(CONFIG_AGP)
if (rdev->flags & RADEON_IS_AGP) {return ttm_agp_tt_populate(ttm, ctx);}-#endif
#ifdef CONFIG_SWIOTLB if (rdev->need_swiotlb && swiotlb_nr_tbl()) { @@ -714,12 +681,6 @@ static void radeon_ttm_tt_unpopulate(struct ttm_tt *ttm) return;
rdev = radeon_get_rdev(ttm->bdev);-#if IS_ENABLED(CONFIG_AGP)
if (rdev->flags & RADEON_IS_AGP) {ttm_agp_tt_unpopulate(ttm);return;}-#endif
#ifdef CONFIG_SWIOTLB if (rdev->need_swiotlb && swiotlb_nr_tbl()) { diff --git a/drivers/gpu/drm/radeon/rv515.c b/drivers/gpu/drm/radeon/rv515.c index 147e5cf8348d..8a2f16320869 100644 --- a/drivers/gpu/drm/radeon/rv515.c +++ b/drivers/gpu/drm/radeon/rv515.c @@ -622,7 +622,6 @@ void rv515_fini(struct radeon_device *rdev) radeon_ib_pool_fini(rdev); radeon_gem_fini(rdev); rv370_pcie_gart_fini(rdev);
radeon_agp_fini(rdev); radeon_irq_kms_fini(rdev); radeon_fence_driver_fini(rdev); radeon_bo_fini(rdev);@@ -667,13 +666,6 @@ int rv515_init(struct radeon_device *rdev) return -EINVAL; /* Initialize clocks */ radeon_get_clock_info(rdev->ddev);
/* initialize AGP */if (rdev->flags & RADEON_IS_AGP) {r = radeon_agp_init(rdev);if (r) {radeon_agp_disable(rdev);}} /* initialize memory controller */ rv515_mc_init(rdev); rv515_debugfs(rdev);@@ -703,7 +695,6 @@ int rv515_init(struct radeon_device *rdev) radeon_ib_pool_fini(rdev); radeon_irq_kms_fini(rdev); rv370_pcie_gart_fini(rdev);
radeon_agp_fini(rdev); rdev->accel_working = false; } return 0;diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c index 21f653ae1e1b..20bf54266f24 100644 --- a/drivers/gpu/drm/radeon/rv770.c +++ b/drivers/gpu/drm/radeon/rv770.c @@ -1943,12 +1943,6 @@ int rv770_init(struct radeon_device *rdev) r = radeon_fence_driver_init(rdev); if (r) return r;
/* initialize AGP */if (rdev->flags & RADEON_IS_AGP) {r = radeon_agp_init(rdev);if (r)radeon_agp_disable(rdev);} r = rv770_mc_init(rdev); if (r) return r;@@ -2015,7 +2009,6 @@ void rv770_fini(struct radeon_device *rdev) r600_vram_scratch_fini(rdev); radeon_gem_fini(rdev); radeon_fence_driver_fini(rdev);
radeon_agp_fini(rdev); radeon_bo_fini(rdev); radeon_atombios_fini(rdev); kfree(rdev->bios);-- Thomas Zimmermann Graphics Driver Developer SUSE Software Solutions Germany GmbH Maxfeldstr. 5, 90409 Nürnberg, Germany (HRB 36809, AG Nürnberg) Geschäftsführer: Felix Imendörffer
amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
AGP is deprecated for 10+ years now and not used any more on modern hardware.
Old hardware should continue to work in PCI mode.
Signed-off-by: Christian König christian.koenig@amd.com --- drivers/gpu/drm/nouveau/nouveau_abi16.c | 16 +- drivers/gpu/drm/nouveau/nouveau_bo.c | 46 +---- drivers/gpu/drm/nouveau/nouveau_chan.c | 32 +--- drivers/gpu/drm/nouveau/nouveau_drv.h | 7 - drivers/gpu/drm/nouveau/nouveau_ttm.c | 14 +- drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.c | 175 ------------------ drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.h | 19 -- .../gpu/drm/nouveau/nvkm/subdev/pci/base.c | 22 +-- 8 files changed, 17 insertions(+), 314 deletions(-) delete mode 100644 drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.c delete mode 100644 drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.h
diff --git a/drivers/gpu/drm/nouveau/nouveau_abi16.c b/drivers/gpu/drm/nouveau/nouveau_abi16.c index e2bae1424502..b6754bfb2f48 100644 --- a/drivers/gpu/drm/nouveau/nouveau_abi16.c +++ b/drivers/gpu/drm/nouveau/nouveau_abi16.c @@ -515,7 +515,6 @@ int nouveau_abi16_ioctl_notifierobj_alloc(ABI16_IOCTL_ARGS) { struct drm_nouveau_notifierobj_alloc *info = data; - struct nouveau_drm *drm = nouveau_drm(dev); struct nouveau_abi16 *abi16 = nouveau_abi16_get(file_priv); struct nouveau_abi16_chan *chan; struct nouveau_abi16_ntfy *ntfy; @@ -555,17 +554,10 @@ nouveau_abi16_ioctl_notifierobj_alloc(ABI16_IOCTL_ARGS) args.start += chan->ntfy_vma->addr; args.limit += chan->ntfy_vma->addr; } else - if (drm->agp.bridge) { - args.target = NV_DMA_V0_TARGET_AGP; - args.access = NV_DMA_V0_ACCESS_RDWR; - args.start += drm->agp.base + chan->ntfy->bo.offset; - args.limit += drm->agp.base + chan->ntfy->bo.offset; - } else { - args.target = NV_DMA_V0_TARGET_VM; - args.access = NV_DMA_V0_ACCESS_RDWR; - args.start += chan->ntfy->bo.offset; - args.limit += chan->ntfy->bo.offset; - } + args.target = NV_DMA_V0_TARGET_VM; + args.access = NV_DMA_V0_ACCESS_RDWR; + args.start += chan->ntfy->bo.offset; + args.limit += chan->ntfy->bo.offset;
client->route = NVDRM_OBJECT_ABI16; client->super = true; diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c index c40f127de3d0..4e12bcd6e629 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bo.c +++ b/drivers/gpu/drm/nouveau/nouveau_bo.c @@ -635,14 +635,6 @@ nouveau_bo_wr32(struct nouveau_bo *nvbo, unsigned index, u32 val) static struct ttm_tt * nouveau_ttm_tt_create(struct ttm_buffer_object *bo, uint32_t page_flags) { -#if IS_ENABLED(CONFIG_AGP) - struct nouveau_drm *drm = nouveau_bdev(bo->bdev); - - if (drm->agp.bridge) { - return ttm_agp_tt_create(bo, drm->agp.bridge, page_flags); - } -#endif - return nouveau_sgdma_create_ttm(bo, page_flags); }
@@ -685,23 +677,11 @@ nouveau_bo_init_mem_type(struct ttm_bo_device *bdev, uint32_t type, if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA) man->func = &nouveau_gart_manager; else - if (!drm->agp.bridge) man->func = &nv04_gart_manager; - else - man->func = &ttm_bo_manager_func; - - if (drm->agp.bridge) { - man->flags = TTM_MEMTYPE_FLAG_MAPPABLE; - man->available_caching = TTM_PL_FLAG_UNCACHED | - TTM_PL_FLAG_WC; - man->default_caching = TTM_PL_FLAG_WC; - } else { - man->flags = TTM_MEMTYPE_FLAG_MAPPABLE | - TTM_MEMTYPE_FLAG_CMA; - man->available_caching = TTM_PL_MASK_CACHING; - man->default_caching = TTM_PL_FLAG_CACHED; - }
+ man->flags = TTM_MEMTYPE_FLAG_MAPPABLE | TTM_MEMTYPE_FLAG_CMA; + man->available_caching = TTM_PL_MASK_CACHING; + man->default_caching = TTM_PL_FLAG_CACHED; break; default: return -EINVAL; @@ -1448,13 +1428,6 @@ nouveau_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_reg *reg) /* System memory */ return 0; case TTM_PL_TT: -#if IS_ENABLED(CONFIG_AGP) - if (drm->agp.bridge) { - reg->bus.offset = reg->start << PAGE_SHIFT; - reg->bus.base = drm->agp.base; - reg->bus.is_iomem = !drm->agp.cma; - } -#endif if (drm->client.mem->oclass < NVIF_CLASS_MEM_NV50 || !mem->kind) /* untiled */ break; @@ -1603,12 +1576,6 @@ nouveau_ttm_tt_populate(struct ttm_tt *ttm, struct ttm_operation_ctx *ctx) drm = nouveau_bdev(ttm->bdev); dev = drm->dev->dev;
-#if IS_ENABLED(CONFIG_AGP) - if (drm->agp.bridge) { - return ttm_agp_tt_populate(ttm, ctx); - } -#endif - #if IS_ENABLED(CONFIG_SWIOTLB) && IS_ENABLED(CONFIG_X86) if (swiotlb_nr_tbl()) { return ttm_dma_populate((void *)ttm, dev, ctx); @@ -1656,13 +1623,6 @@ nouveau_ttm_tt_unpopulate(struct ttm_tt *ttm) drm = nouveau_bdev(ttm->bdev); dev = drm->dev->dev;
-#if IS_ENABLED(CONFIG_AGP) - if (drm->agp.bridge) { - ttm_agp_tt_unpopulate(ttm); - return; - } -#endif - #if IS_ENABLED(CONFIG_SWIOTLB) && IS_ENABLED(CONFIG_X86) if (swiotlb_nr_tbl()) { ttm_dma_unpopulate((void *)ttm, dev); diff --git a/drivers/gpu/drm/nouveau/nouveau_chan.c b/drivers/gpu/drm/nouveau/nouveau_chan.c index d9381a053169..521c495a301a 100644 --- a/drivers/gpu/drm/nouveau/nouveau_chan.c +++ b/drivers/gpu/drm/nouveau/nouveau_chan.c @@ -200,18 +200,10 @@ nouveau_channel_prep(struct nouveau_drm *drm, struct nvif_device *device, args.limit = device->info.ram_user - 1; } } else { - if (chan->drm->agp.bridge) { - args.target = NV_DMA_V0_TARGET_AGP; - args.access = NV_DMA_V0_ACCESS_RDWR; - args.start = chan->drm->agp.base; - args.limit = chan->drm->agp.base + - chan->drm->agp.size - 1; - } else { - args.target = NV_DMA_V0_TARGET_VM; - args.access = NV_DMA_V0_ACCESS_RDWR; - args.start = 0; - args.limit = chan->vmm->vmm.limit - 1; - } + args.target = NV_DMA_V0_TARGET_VM; + args.access = NV_DMA_V0_ACCESS_RDWR; + args.start = 0; + args.limit = chan->vmm->vmm.limit - 1; }
ret = nvif_object_init(&device->object, 0, NV_DMA_FROM_MEMORY, @@ -401,18 +393,10 @@ nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart) args.start = 0; args.limit = chan->vmm->vmm.limit - 1; } else - if (chan->drm->agp.bridge) { - args.target = NV_DMA_V0_TARGET_AGP; - args.access = NV_DMA_V0_ACCESS_RDWR; - args.start = chan->drm->agp.base; - args.limit = chan->drm->agp.base + - chan->drm->agp.size - 1; - } else { - args.target = NV_DMA_V0_TARGET_VM; - args.access = NV_DMA_V0_ACCESS_RDWR; - args.start = 0; - args.limit = chan->vmm->vmm.limit - 1; - } + args.target = NV_DMA_V0_TARGET_VM; + args.access = NV_DMA_V0_ACCESS_RDWR; + args.start = 0; + args.limit = chan->vmm->vmm.limit - 1;
ret = nvif_object_init(&chan->user, gart, NV_DMA_IN_MEMORY, &args, sizeof(args), &chan->gart); diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h index 2a6519737800..508b94a86ae4 100644 --- a/drivers/gpu/drm/nouveau/nouveau_drv.h +++ b/drivers/gpu/drm/nouveau/nouveau_drv.h @@ -142,13 +142,6 @@ struct nouveau_drm {
u8 old_pm_cap;
- struct { - struct agp_bridge_data *bridge; - u32 base; - u32 size; - bool cma; - } agp; - /* TTM interface support */ struct { struct ttm_bo_device bdev; diff --git a/drivers/gpu/drm/nouveau/nouveau_ttm.c b/drivers/gpu/drm/nouveau/nouveau_ttm.c index 7ca0a2498532..061510070350 100644 --- a/drivers/gpu/drm/nouveau/nouveau_ttm.c +++ b/drivers/gpu/drm/nouveau/nouveau_ttm.c @@ -192,7 +192,6 @@ int nouveau_ttm_init(struct nouveau_drm *drm) { struct nvkm_device *device = nvxx_device(&drm->client.device); - struct nvkm_pci *pci = device->pci; struct nvif_mmu *mmu = &drm->client.mmu; struct drm_device *dev = drm->dev; int typei, ret; @@ -222,13 +221,6 @@ nouveau_ttm_init(struct nouveau_drm *drm) drm->ttm.type_vram = -1; }
- if (pci && pci->agp.bridge) { - drm->agp.bridge = pci->agp.bridge; - drm->agp.base = pci->agp.base; - drm->agp.size = pci->agp.size; - drm->agp.cma = pci->agp.cma; - } - ret = ttm_bo_device_init(&drm->ttm.bdev, &nouveau_bo_driver, dev->anon_inode->i_mapping, @@ -256,11 +248,7 @@ nouveau_ttm_init(struct nouveau_drm *drm) device->func->resource_size(device, 1));
/* GART init */ - if (!drm->agp.bridge) { - drm->gem.gart_available = drm->client.vmm.vmm.limit; - } else { - drm->gem.gart_available = drm->agp.size; - } + drm->gem.gart_available = drm->client.vmm.vmm.limit;
ret = ttm_bo_init_mm(&drm->ttm.bdev, TTM_PL_TT, drm->gem.gart_available >> PAGE_SHIFT); diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.c b/drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.c deleted file mode 100644 index 385a90f91ed6..000000000000 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.c +++ /dev/null @@ -1,175 +0,0 @@ -/* - * Copyright 2015 Nouveau Project - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ -#include "agp.h" -#ifdef __NVKM_PCI_AGP_H__ -#include <core/option.h> - -struct nvkm_device_agp_quirk { - u16 hostbridge_vendor; - u16 hostbridge_device; - u16 chip_vendor; - u16 chip_device; - int mode; -}; - -static const struct nvkm_device_agp_quirk -nvkm_device_agp_quirks[] = { - /* VIA Apollo PRO133x / GeForce FX 5600 Ultra - fdo#20341 */ - { PCI_VENDOR_ID_VIA, 0x0691, PCI_VENDOR_ID_NVIDIA, 0x0311, 2 }, - /* SiS 761 does not support AGP cards, use PCI mode */ - { PCI_VENDOR_ID_SI, 0x0761, PCI_ANY_ID, PCI_ANY_ID, 0 }, - {}, -}; - -void -nvkm_agp_fini(struct nvkm_pci *pci) -{ - if (pci->agp.acquired) { - agp_backend_release(pci->agp.bridge); - pci->agp.acquired = false; - } -} - -/* Ensure AGP controller is in a consistent state in case we need to - * execute the VBIOS DEVINIT scripts. - */ -void -nvkm_agp_preinit(struct nvkm_pci *pci) -{ - struct nvkm_device *device = pci->subdev.device; - u32 mode = nvkm_pci_rd32(pci, 0x004c); - u32 save[2]; - - /* First of all, disable fast writes, otherwise if it's already - * enabled in the AGP bridge and we disable the card's AGP - * controller we might be locking ourselves out of it. - */ - if ((mode | pci->agp.mode) & PCI_AGP_COMMAND_FW) { - mode = pci->agp.mode & ~PCI_AGP_COMMAND_FW; - agp_enable(pci->agp.bridge, mode); - } - - /* clear busmaster bit, and disable AGP */ - save[0] = nvkm_pci_rd32(pci, 0x0004); - nvkm_pci_wr32(pci, 0x0004, save[0] & ~0x00000004); - nvkm_pci_wr32(pci, 0x004c, 0x00000000); - - /* reset PGRAPH, PFIFO and PTIMER */ - save[1] = nvkm_mask(device, 0x000200, 0x00011100, 0x00000000); - nvkm_mask(device, 0x000200, 0x00011100, save[1]); - - /* and restore busmaster bit (gives effect of resetting AGP) */ - nvkm_pci_wr32(pci, 0x0004, save[0]); -} - -int -nvkm_agp_init(struct nvkm_pci *pci) -{ - if (!agp_backend_acquire(pci->pdev)) { - nvkm_error(&pci->subdev, "failed to acquire agp\n"); - return -ENODEV; - } - - agp_enable(pci->agp.bridge, pci->agp.mode); - pci->agp.acquired = true; - return 0; -} - -void -nvkm_agp_dtor(struct nvkm_pci *pci) -{ - arch_phys_wc_del(pci->agp.mtrr); -} - -void -nvkm_agp_ctor(struct nvkm_pci *pci) -{ - const struct nvkm_device_agp_quirk *quirk = nvkm_device_agp_quirks; - struct nvkm_subdev *subdev = &pci->subdev; - struct nvkm_device *device = subdev->device; - struct agp_kern_info info; - int mode = -1; - -#ifdef __powerpc__ - /* Disable AGP by default on all PowerPC machines for now -- At - * least some UniNorth-2 AGP bridges are known to be broken: - * DMA from the host to the card works just fine, but writeback - * from the card to the host goes straight to memory - * untranslated bypassing that GATT somehow, making them quite - * painful to deal with... - */ - mode = 0; -#endif - mode = nvkm_longopt(device->cfgopt, "NvAGP", mode); - - /* acquire bridge temporarily, so that we can copy its info */ - if (!(pci->agp.bridge = agp_backend_acquire(pci->pdev))) { - nvkm_warn(subdev, "failed to acquire agp\n"); - return; - } - agp_copy_info(pci->agp.bridge, &info); - agp_backend_release(pci->agp.bridge); - - pci->agp.mode = info.mode; - pci->agp.base = info.aper_base; - pci->agp.size = info.aper_size * 1024 * 1024; - pci->agp.cma = info.cant_use_aperture; - pci->agp.mtrr = -1; - - /* determine if bridge + chipset combination needs a workaround */ - while (quirk->hostbridge_vendor) { - if (info.device->vendor == quirk->hostbridge_vendor && - info.device->device == quirk->hostbridge_device && - (quirk->chip_vendor == (u16)PCI_ANY_ID || - pci->pdev->vendor == quirk->chip_vendor) && - (quirk->chip_device == (u16)PCI_ANY_ID || - pci->pdev->device == quirk->chip_device)) { - nvkm_info(subdev, "forcing default agp mode to %dX, " - "use NvAGP=<mode> to override\n", - quirk->mode); - mode = quirk->mode; - break; - } - quirk++; - } - - /* apply quirk / user-specified mode */ - if (mode >= 1) { - if (pci->agp.mode & 0x00000008) - mode /= 4; /* AGPv3 */ - pci->agp.mode &= ~0x00000007; - pci->agp.mode |= (mode & 0x7); - } else - if (mode == 0) { - pci->agp.bridge = NULL; - return; - } - - /* fast writes appear to be broken on nv18, they make the card - * lock up randomly. - */ - if (device->chipset == 0x18) - pci->agp.mode &= ~PCI_AGP_COMMAND_FW; - - pci->agp.mtrr = arch_phys_wc_add(pci->agp.base, pci->agp.size); -} -#endif diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.h b/drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.h deleted file mode 100644 index ad4d3621d02b..000000000000 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.h +++ /dev/null @@ -1,19 +0,0 @@ -/* SPDX-License-Identifier: MIT */ -#include "priv.h" -#if defined(CONFIG_AGP) || (defined(CONFIG_AGP_MODULE) && defined(MODULE)) -#ifndef __NVKM_PCI_AGP_H__ -#define __NVKM_PCI_AGP_H__ - -void nvkm_agp_ctor(struct nvkm_pci *); -void nvkm_agp_dtor(struct nvkm_pci *); -void nvkm_agp_preinit(struct nvkm_pci *); -int nvkm_agp_init(struct nvkm_pci *); -void nvkm_agp_fini(struct nvkm_pci *); -#endif -#else -static inline void nvkm_agp_ctor(struct nvkm_pci *pci) {} -static inline void nvkm_agp_dtor(struct nvkm_pci *pci) {} -static inline void nvkm_agp_preinit(struct nvkm_pci *pci) {} -static inline int nvkm_agp_init(struct nvkm_pci *pci) { return -ENOSYS; } -static inline void nvkm_agp_fini(struct nvkm_pci *pci) {} -#endif diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pci/base.c b/drivers/gpu/drm/nouveau/nvkm/subdev/pci/base.c index ee2431a7804e..4f84fc1f2499 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/pci/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pci/base.c @@ -22,7 +22,6 @@ * Authors: Ben Skeggs bskeggs@redhat.com */ #include "priv.h" -#include "agp.h"
#include <core/option.h> #include <core/pci.h> @@ -86,20 +85,12 @@ nvkm_pci_intr(int irq, void *arg) static int nvkm_pci_fini(struct nvkm_subdev *subdev, bool suspend) { - struct nvkm_pci *pci = nvkm_pci(subdev); - - if (pci->agp.bridge) - nvkm_agp_fini(pci); - return 0; }
static int nvkm_pci_preinit(struct nvkm_subdev *subdev) { - struct nvkm_pci *pci = nvkm_pci(subdev); - if (pci->agp.bridge) - nvkm_agp_preinit(pci); return 0; }
@@ -128,15 +119,9 @@ static int nvkm_pci_init(struct nvkm_subdev *subdev) { struct nvkm_pci *pci = nvkm_pci(subdev); - int ret;
- if (pci->agp.bridge) { - ret = nvkm_agp_init(pci); - if (ret) - return ret; - } else if (pci_is_pcie(pci->pdev)) { + if (pci_is_pcie(pci->pdev)) nvkm_pcie_init(pci); - }
if (pci->func->init) pci->func->init(pci); @@ -155,8 +140,6 @@ nvkm_pci_dtor(struct nvkm_subdev *subdev) { struct nvkm_pci *pci = nvkm_pci(subdev);
- nvkm_agp_dtor(pci); - if (pci->irq >= 0) { /* freq_irq() will call the handler, we use pci->irq == -1 * to signal that it's been torn down and should be a noop. @@ -196,9 +179,6 @@ nvkm_pci_new_(const struct nvkm_pci_func *func, struct nvkm_device *device, pci->pcie.speed = -1; pci->pcie.width = -1;
- if (device->type == NVKM_DEVICE_AGP) - nvkm_agp_ctor(pci); - switch (pci->pdev->device & 0x0ff0) { case 0x00f0: case 0x02e0:
Not used any more.
Signed-off-by: Christian König christian.koenig@amd.com --- drivers/gpu/drm/ttm/Makefile | 1 - drivers/gpu/drm/ttm/ttm_agp_backend.c | 150 -------------------------- include/drm/ttm/ttm_set_memory.h | 44 -------- include/drm/ttm/ttm_tt.h | 22 ---- 4 files changed, 217 deletions(-) delete mode 100644 drivers/gpu/drm/ttm/ttm_agp_backend.c
diff --git a/drivers/gpu/drm/ttm/Makefile b/drivers/gpu/drm/ttm/Makefile index caea2a099496..8a172122df1c 100644 --- a/drivers/gpu/drm/ttm/Makefile +++ b/drivers/gpu/drm/ttm/Makefile @@ -5,7 +5,6 @@ ttm-y := ttm_memory.o ttm_tt.o ttm_bo.o \ ttm_bo_util.o ttm_bo_vm.o ttm_module.o \ ttm_execbuf_util.o ttm_page_alloc.o ttm_bo_manager.o -ttm-$(CONFIG_AGP) += ttm_agp_backend.o ttm-$(CONFIG_DRM_TTM_DMA_PAGE_POOL) += ttm_page_alloc_dma.o
obj-$(CONFIG_DRM_TTM) += ttm.o diff --git a/drivers/gpu/drm/ttm/ttm_agp_backend.c b/drivers/gpu/drm/ttm/ttm_agp_backend.c deleted file mode 100644 index 6050dc846894..000000000000 --- a/drivers/gpu/drm/ttm/ttm_agp_backend.c +++ /dev/null @@ -1,150 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 OR MIT */ -/************************************************************************** - * - * Copyright (c) 2006-2009 VMware, Inc., Palo Alto, CA., USA - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - **************************************************************************/ -/* - * Authors: Thomas Hellstrom <thellstrom-at-vmware-dot-com> - * Keith Packard. - */ - -#define pr_fmt(fmt) "[TTM] " fmt - -#include <drm/ttm/ttm_module.h> -#include <drm/ttm/ttm_bo_driver.h> -#include <drm/ttm/ttm_page_alloc.h> -#include <drm/ttm/ttm_placement.h> -#include <linux/agp_backend.h> -#include <linux/module.h> -#include <linux/slab.h> -#include <linux/io.h> -#include <asm/agp.h> - -struct ttm_agp_backend { - struct ttm_tt ttm; - struct agp_memory *mem; - struct agp_bridge_data *bridge; -}; - -static int ttm_agp_bind(struct ttm_tt *ttm, struct ttm_mem_reg *bo_mem) -{ - struct ttm_agp_backend *agp_be = container_of(ttm, struct ttm_agp_backend, ttm); - struct page *dummy_read_page = ttm_bo_glob.dummy_read_page; - struct drm_mm_node *node = bo_mem->mm_node; - struct agp_memory *mem; - int ret, cached = (bo_mem->placement & TTM_PL_FLAG_CACHED); - unsigned i; - - mem = agp_allocate_memory(agp_be->bridge, ttm->num_pages, AGP_USER_MEMORY); - if (unlikely(mem == NULL)) - return -ENOMEM; - - mem->page_count = 0; - for (i = 0; i < ttm->num_pages; i++) { - struct page *page = ttm->pages[i]; - - if (!page) - page = dummy_read_page; - - mem->pages[mem->page_count++] = page; - } - agp_be->mem = mem; - - mem->is_flushed = 1; - mem->type = (cached) ? AGP_USER_CACHED_MEMORY : AGP_USER_MEMORY; - - ret = agp_bind_memory(mem, node->start); - if (ret) - pr_err("AGP Bind memory failed\n"); - - return ret; -} - -static int ttm_agp_unbind(struct ttm_tt *ttm) -{ - struct ttm_agp_backend *agp_be = container_of(ttm, struct ttm_agp_backend, ttm); - - if (agp_be->mem) { - if (agp_be->mem->is_bound) - return agp_unbind_memory(agp_be->mem); - agp_free_memory(agp_be->mem); - agp_be->mem = NULL; - } - return 0; -} - -static void ttm_agp_destroy(struct ttm_tt *ttm) -{ - struct ttm_agp_backend *agp_be = container_of(ttm, struct ttm_agp_backend, ttm); - - if (agp_be->mem) - ttm_agp_unbind(ttm); - ttm_tt_fini(ttm); - kfree(agp_be); -} - -static struct ttm_backend_func ttm_agp_func = { - .bind = ttm_agp_bind, - .unbind = ttm_agp_unbind, - .destroy = ttm_agp_destroy, -}; - -struct ttm_tt *ttm_agp_tt_create(struct ttm_buffer_object *bo, - struct agp_bridge_data *bridge, - uint32_t page_flags) -{ - struct ttm_agp_backend *agp_be; - - agp_be = kmalloc(sizeof(*agp_be), GFP_KERNEL); - if (!agp_be) - return NULL; - - agp_be->mem = NULL; - agp_be->bridge = bridge; - agp_be->ttm.func = &ttm_agp_func; - - if (ttm_tt_init(&agp_be->ttm, bo, page_flags)) { - kfree(agp_be); - return NULL; - } - - return &agp_be->ttm; -} -EXPORT_SYMBOL(ttm_agp_tt_create); - -int ttm_agp_tt_populate(struct ttm_tt *ttm, struct ttm_operation_ctx *ctx) -{ - if (ttm->state != tt_unpopulated) - return 0; - - return ttm_pool_populate(ttm, ctx); -} -EXPORT_SYMBOL(ttm_agp_tt_populate); - -void ttm_agp_tt_unpopulate(struct ttm_tt *ttm) -{ - ttm_pool_unpopulate(ttm); -} -EXPORT_SYMBOL(ttm_agp_tt_unpopulate); diff --git a/include/drm/ttm/ttm_set_memory.h b/include/drm/ttm/ttm_set_memory.h index 7c492b49e38c..3966655b72f1 100644 --- a/include/drm/ttm/ttm_set_memory.h +++ b/include/drm/ttm/ttm_set_memory.h @@ -71,48 +71,6 @@ static inline int ttm_set_pages_uc(struct page *page, int numpages)
#else /* for CONFIG_X86 */
-#if IS_ENABLED(CONFIG_AGP) - -#include <asm/agp.h> - -static inline int ttm_set_pages_array_wb(struct page **pages, int addrinarray) -{ - int i; - - for (i = 0; i < addrinarray; i++) - unmap_page_from_agp(pages[i]); - return 0; -} - -static inline int ttm_set_pages_array_wc(struct page **pages, int addrinarray) -{ - int i; - - for (i = 0; i < addrinarray; i++) - map_page_into_agp(pages[i]); - return 0; -} - -static inline int ttm_set_pages_array_uc(struct page **pages, int addrinarray) -{ - int i; - - for (i = 0; i < addrinarray; i++) - map_page_into_agp(pages[i]); - return 0; -} - -static inline int ttm_set_pages_wb(struct page *page, int numpages) -{ - int i; - - for (i = 0; i < numpages; i++) - unmap_page_from_agp(page++); - return 0; -} - -#else /* for CONFIG_AGP */ - static inline int ttm_set_pages_array_wb(struct page **pages, int addrinarray) { return 0; @@ -133,8 +91,6 @@ static inline int ttm_set_pages_wb(struct page *page, int numpages) return 0; }
-#endif /* for CONFIG_AGP */ - static inline int ttm_set_pages_wc(struct page *page, int numpages) { return 0; diff --git a/include/drm/ttm/ttm_tt.h b/include/drm/ttm/ttm_tt.h index c0e928abf592..a57ede2e15ac 100644 --- a/include/drm/ttm/ttm_tt.h +++ b/include/drm/ttm/ttm_tt.h @@ -247,26 +247,4 @@ int ttm_tt_populate(struct ttm_tt *ttm, struct ttm_operation_ctx *ctx); */ void ttm_tt_unpopulate(struct ttm_tt *ttm);
-#if IS_ENABLED(CONFIG_AGP) -#include <linux/agp_backend.h> - -/** - * ttm_agp_tt_create - * - * @bo: Buffer object we allocate the ttm for. - * @bridge: The agp bridge this device is sitting on. - * @page_flags: Page flags as identified by TTM_PAGE_FLAG_XX flags. - * - * - * Create a TTM backend that uses the indicated AGP bridge as an aperture - * for TT memory. This function uses the linux agpgart interface to - * bind and unbind memory backing a ttm_tt. - */ -struct ttm_tt *ttm_agp_tt_create(struct ttm_buffer_object *bo, - struct agp_bridge_data *bridge, - uint32_t page_flags); -int ttm_agp_tt_populate(struct ttm_tt *ttm, struct ttm_operation_ctx *ctx); -void ttm_agp_tt_unpopulate(struct ttm_tt *ttm); -#endif - #endif
On Monday, May 11, 2020, 1:17:19 PM, "Christian König" wrote:
Hi guys,
Well let's face it AGP is a total headache to maintain and dead for at least 10+ years.
We have a lot of x86 specific stuff in the architecture independent graphics memory management to get the caching right, abusing the DMA API on multiple occasions, need to distinct between AGP and driver specific page tables etc etc...
So the idea here is to just go ahead and remove the support from Radeon and Nouveau and then drop the necessary code from TTM.
For Radeon this means that we just switch over to the driver specific page tables and everything should more or less continue to work.
For Nouveau I'm not 100% sure, but from the code it of hand looks like we can do it similar to Radeon.
Please comment what you think about this.
Regards, Christian.
Christian,
I would respectfully ask that this change be rejected.
I'm currently an end user on both Intel (32-bit and 64-bit) and PPC (Macs, IBM Power - BE and LE).
Linux is not just used for modern hardware. There is also a subset of the user base that uses it for what is often termed retro-computing. No it's not commercial usage, but no one can seriously claim that that Linux is for business only.
Often the old hardware is built far batter than the modern junk, and will continue to run for years to come. This group of folks either has existing hardware they wish to continue to use, or are acquiring the same because they are tired of generic locked-down hardware.
A significant percentage of the video hardware that falls in the retro category uses the AGP video bus. Removing that support for those cases where it works would severely limit performance and in some cases functionality. This can mean the difference between being able to run an application, or having it fail.
There are multiple active Linux distributions for PPC Macs. Many folks are moving from running an original Mac OS X because of the recent migration of most Web services to new encryption protocols (TLS 1.2, SSL, etc.) which can not be practically supported by browsers on that OS - even the open source ones. Linux on that same hardware provides the opportunity to work online with current protocols and ensure that they are reasonably secure.
Another group that fits in the retro category is those folks with older PC hardware who are not migrating to the latest Microsoft OS, but instead want to move to Linux.
Some folks suggest the retro folks use an older unmaintained Linux version. That's just not appropriate nor reasonable, again from either a security and protocol point of view.
Myself? I'm a full-time C programmer and Electrical Engineer. My current work project is about 400KLOC. I've done some work on PC and embedded video hardware and software in the past.
My aim is to start out by helping to test the video drivers (on both PC and MAC hardware), and as I gain more knowledge become part of the effort to bring the drivers to the older hardware into a better form (in kernel drivers VS user-space).
Over the last few years I have been collecting a significant (~40) number of video cards of various flavors. Some PCI, but the majority evenly divided between AGP and PCI-X. Most are ATI/Radeon (Mach64+ through R7) with some Nvidia, Matrox and a few others (Chrome and even a Number Nine). I try to have both PC and Mac variants of the same card where-ever possible to make comparisons across architectures easier. This year I have acquired some of the last Sapphire Radeon AGP cards (HD3xxx, HD4xxx). I'm a frequent flyer on eBay and Kijiji.
I've got lots of Macs (PCI, AGP and PCI-X) and a number of full PC systems. I'm setting up a number of dedicated test bench rigs (and full systems) specifically for the video testing. Most are AMD 64-bit capable, but also Intel. Finally, there are a few embedded systems (AMD and a C3).
From the programming side, Amazon has been a good source on older editions of computer graphics books, which should provide background knowledge to help me in my journey.
One glitch is that I'm partway through eye surgery (cornea + cataracts), and my final operation is held up due to COVID-19. After things get back to more of a normal state and that can be completed, my progress should be a lot smoother.
I hope this puts another prospective on your suggested change, from a Linux enthusiast and programmer whose usage set is far different from your own. For that group of Linux users, I ask that you NOT go ahead with this change as it would be far more impactful to that groups than you might think.
Respectfully, Al Dunsmuir
Al
On Mon, May 11, 2020 at 4:22 PM Al Dunsmuir al.dunsmuir@sympatico.ca wrote:
On Monday, May 11, 2020, 1:17:19 PM, "Christian König" wrote:
Hi guys,
Well let's face it AGP is a total headache to maintain and dead for at least 10+ years.
We have a lot of x86 specific stuff in the architecture independent graphics memory management to get the caching right, abusing the DMA API on multiple occasions, need to distinct between AGP and driver specific page tables etc etc...
So the idea here is to just go ahead and remove the support from Radeon and Nouveau and then drop the necessary code from TTM.
For Radeon this means that we just switch over to the driver specific page tables and everything should more or less continue to work.
For Nouveau I'm not 100% sure, but from the code it of hand looks like we can do it similar to Radeon.
Please comment what you think about this.
Regards, Christian.
Christian,
I would respectfully ask that this change be rejected.
I'm currently an end user on both Intel (32-bit and 64-bit) and PPC (Macs, IBM Power - BE and LE).
Linux is not just used for modern hardware. There is also a subset of the user base that uses it for what is often termed retro-computing. No it's not commercial usage, but no one can seriously claim that that Linux is for business only.
Often the old hardware is built far batter than the modern junk, and will continue to run for years to come. This group of folks either has existing hardware they wish to continue to use, or are acquiring the same because they are tired of generic locked-down hardware.
A significant percentage of the video hardware that falls in the retro category uses the AGP video bus. Removing that support for those cases where it works would severely limit performance and in some cases functionality. This can mean the difference between being able to run an application, or having it fail.
Note there is no loss of functionality here, at least on radeon hardware. It just comes down to which MMU gets used for access to system memory, the AGP MMU on the chipset or the MMU built into the GPU. On powerpc hardware, AGP has been particularly unstable, and AGP has been disabled by default on radeon on powerpc for years now. In fact, this will probably make older hardware more reliable as it takes AGP out of the equation.
Alex
There are multiple active Linux distributions for PPC Macs. Many folks are moving from running an original Mac OS X because of the recent migration of most Web services to new encryption protocols (TLS 1.2, SSL, etc.) which can not be practically supported by browsers on that OS - even the open source ones. Linux on that same hardware provides the opportunity to work online with current protocols and ensure that they are reasonably secure.
Another group that fits in the retro category is those folks with older PC hardware who are not migrating to the latest Microsoft OS, but instead want to move to Linux.
Some folks suggest the retro folks use an older unmaintained Linux version. That's just not appropriate nor reasonable, again from either a security and protocol point of view.
Myself? I'm a full-time C programmer and Electrical Engineer. My current work project is about 400KLOC. I've done some work on PC and embedded video hardware and software in the past.
My aim is to start out by helping to test the video drivers (on both PC and MAC hardware), and as I gain more knowledge become part of the effort to bring the drivers to the older hardware into a better form (in kernel drivers VS user-space).
Over the last few years I have been collecting a significant (~40) number of video cards of various flavors. Some PCI, but the majority evenly divided between AGP and PCI-X. Most are ATI/Radeon (Mach64+ through R7) with some Nvidia, Matrox and a few others (Chrome and even a Number Nine). I try to have both PC and Mac variants of the same card where-ever possible to make comparisons across architectures easier. This year I have acquired some of the last Sapphire Radeon AGP cards (HD3xxx, HD4xxx). I'm a frequent flyer on eBay and Kijiji.
I've got lots of Macs (PCI, AGP and PCI-X) and a number of full PC systems. I'm setting up a number of dedicated test bench rigs (and full systems) specifically for the video testing. Most are AMD 64-bit capable, but also Intel. Finally, there are a few embedded systems (AMD and a C3).
From the programming side, Amazon has been a good source on older editions of computer graphics books, which should provide background knowledge to help me in my journey.
One glitch is that I'm partway through eye surgery (cornea + cataracts), and my final operation is held up due to COVID-19. After things get back to more of a normal state and that can be completed, my progress should be a lot smoother.
I hope this puts another prospective on your suggested change, from a Linux enthusiast and programmer whose usage set is far different from your own. For that group of Linux users, I ask that you NOT go ahead with this change as it would be far more impactful to that groups than you might think.
Respectfully, Al Dunsmuir
Al
amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
On Tue, 12 May 2020 at 06:28, Alex Deucher alexdeucher@gmail.com wrote:
On Mon, May 11, 2020 at 4:22 PM Al Dunsmuir al.dunsmuir@sympatico.ca wrote:
On Monday, May 11, 2020, 1:17:19 PM, "Christian König" wrote:
Hi guys,
Well let's face it AGP is a total headache to maintain and dead for at least 10+ years.
We have a lot of x86 specific stuff in the architecture independent graphics memory management to get the caching right, abusing the DMA API on multiple occasions, need to distinct between AGP and driver specific page tables etc etc...
So the idea here is to just go ahead and remove the support from Radeon and Nouveau and then drop the necessary code from TTM.
For Radeon this means that we just switch over to the driver specific page tables and everything should more or less continue to work.
For Nouveau I'm not 100% sure, but from the code it of hand looks like we can do it similar to Radeon.
Please comment what you think about this.
Regards, Christian.
Christian,
I would respectfully ask that this change be rejected.
I'm currently an end user on both Intel (32-bit and 64-bit) and PPC (Macs, IBM Power - BE and LE).
Linux is not just used for modern hardware. There is also a subset of the user base that uses it for what is often termed retro-computing. No it's not commercial usage, but no one can seriously claim that that Linux is for business only.
Often the old hardware is built far batter than the modern junk, and will continue to run for years to come. This group of folks either has existing hardware they wish to continue to use, or are acquiring the same because they are tired of generic locked-down hardware.
A significant percentage of the video hardware that falls in the retro category uses the AGP video bus. Removing that support for those cases where it works would severely limit performance and in some cases functionality. This can mean the difference between being able to run an application, or having it fail.
Note there is no loss of functionality here, at least on radeon hardware. It just comes down to which MMU gets used for access to system memory, the AGP MMU on the chipset or the MMU built into the GPU. On powerpc hardware, AGP has been particularly unstable, and AGP has been disabled by default on radeon on powerpc for years now. In fact, this will probably make older hardware more reliable as it takes AGP out of the equation.
From memory there is quite a loss in speed though, like pretty severe.
The radeon PCI GART has a single slot TLB, if memory serves.
I think this is going to be a hard sell at this stage, I'm guessing users will crawl out of the woodwork, I'm sure with 2 hours after I'm able to access the office, I can boot the 865 AGP box with an rv350 in it on a modern distro.
Maybe we can find some way to compartmentalise AGP further?
Dave.
Hello Dave,
On Monday, May 11, 2020, 4:43:01 PM, Dave Airlie wrote:
On Tue, 12 May 2020 at 06:28, Alex Deucher alexdeucher@gmail.com wrote:
On Mon, May 11, 2020 at 4:22 PM Al Dunsmuir al.dunsmuir@sympatico.ca wrote: Note there is no loss of functionality here, at least on radeon hardware. It just comes down to which MMU gets used for access to system memory, the AGP MMU on the chipset or the MMU built into the GPU. On powerpc hardware, AGP has been particularly unstable, and AGP has been disabled by default on radeon on powerpc for years now. In fact, this will probably make older hardware more reliable as it takes AGP out of the equation.
From memory there is quite a loss in speed though, like pretty severe.
The radeon PCI GART has a single slot TLB, if memory serves.
I think this is going to be a hard sell at this stage, I'm guessing users will crawl out of the woodwork, I'm sure with 2 hours after I'm able to access the office, I can boot the 865 AGP box with an rv350 in it on a modern distro.
Maybe we can find some way to compartmentalise AGP further?
Dave.
Significantly reduced caching on memory accesses definitely sounds like something that would be noticeable and objectionable.
I would speculate that this would also vary a lot across chipsets, depending on the capabilities of the PCI MMU vs the AGP MMU.
In the end, it may be best to leave things as is, or as Dave suggested try to keep AGP in the picture.
Nothing is ever simple, is it? Al
Am 11.05.20 um 22:56 schrieb Al Dunsmuir:
Hello Dave,
On Monday, May 11, 2020, 4:43:01 PM, Dave Airlie wrote:
On Tue, 12 May 2020 at 06:28, Alex Deucher alexdeucher@gmail.com wrote:
[SNIP]
Maybe we can find some way to compartmentalise AGP further? Dave.
Significantly reduced caching on memory accesses definitely sounds like something that would be noticeable and objectionable.
I would speculate that this would also vary a lot across chipsets, depending on the capabilities of the PCI MMU vs the AGP MMU.
In the end, it may be best to leave things as is, or as Dave suggested try to keep AGP in the picture.
The problem is that AGP was never really supported/implemented that well in the first place.
The fact that the core linux kernel and the DMA API doesn't support uncached memory and we had to change the caching attributes of pages under the hood has resulted in a huge number of problems over the years.
Keeping it as it is is also not a really doable option because TTM already has major problems keeping up with the requirements for modern hardware, see my presentation here as well: https://fosdem.org/2020/schedule/event/ttm/
Redesigning the old AGP support into something which isn't so ugly and doesn't blocks the new requirements has the huge risk of breaking things even harder, e.g. black screen instead of just reduced performance.
So removing/disabling AGP by default still sounds like the best option to me for end users.
Nothing is ever simple, is it?
At least not with AGP, no :) It has been a total beast to support and keep working.
Do I get this right that I can ping you to test things?
Thanks for the feedback, Christian.
Al
On Mon, 11 May 2020 at 21:43, Dave Airlie airlied@gmail.com wrote:
On Tue, 12 May 2020 at 06:28, Alex Deucher alexdeucher@gmail.com wrote:
On Mon, May 11, 2020 at 4:22 PM Al Dunsmuir al.dunsmuir@sympatico.ca wrote:
On Monday, May 11, 2020, 1:17:19 PM, "Christian König" wrote:
Hi guys,
Well let's face it AGP is a total headache to maintain and dead for at least 10+ years.
We have a lot of x86 specific stuff in the architecture independent graphics memory management to get the caching right, abusing the DMA API on multiple occasions, need to distinct between AGP and driver specific page tables etc etc...
So the idea here is to just go ahead and remove the support from Radeon and Nouveau and then drop the necessary code from TTM.
For Radeon this means that we just switch over to the driver specific page tables and everything should more or less continue to work.
For Nouveau I'm not 100% sure, but from the code it of hand looks like we can do it similar to Radeon.
Please comment what you think about this.
Regards, Christian.
Christian,
I would respectfully ask that this change be rejected.
I'm currently an end user on both Intel (32-bit and 64-bit) and PPC (Macs, IBM Power - BE and LE).
Linux is not just used for modern hardware. There is also a subset of the user base that uses it for what is often termed retro-computing. No it's not commercial usage, but no one can seriously claim that that Linux is for business only.
Often the old hardware is built far batter than the modern junk, and will continue to run for years to come. This group of folks either has existing hardware they wish to continue to use, or are acquiring the same because they are tired of generic locked-down hardware.
A significant percentage of the video hardware that falls in the retro category uses the AGP video bus. Removing that support for those cases where it works would severely limit performance and in some cases functionality. This can mean the difference between being able to run an application, or having it fail.
Note there is no loss of functionality here, at least on radeon hardware. It just comes down to which MMU gets used for access to system memory, the AGP MMU on the chipset or the MMU built into the GPU. On powerpc hardware, AGP has been particularly unstable, and AGP has been disabled by default on radeon on powerpc for years now. In fact, this will probably make older hardware more reliable as it takes AGP out of the equation.
From memory there is quite a loss in speed though, like pretty severe.
The radeon PCI GART has a single slot TLB, if memory serves.
I think this is going to be a hard sell at this stage, I'm guessing users will crawl out of the woodwork, I'm sure with 2 hours after I'm able to access the office, I can boot the 865 AGP box with an rv350 in it on a modern distro.
I have a system with nforce2 motherboard and Nvidia fx5500 GPU. I could dust it off and some quick performance tests over the weekend.
Unless someone beats me to it, of course :-)
-Emil
On Monday, May 11, 2020, 4:27:55 PM, Alex Deucher wrote:
On Mon, May 11, 2020 at 4:22 PM Al Dunsmuir al.dunsmuir@sympatico.ca wrote:
On Monday, May 11, 2020, 1:17:19 PM, "Christian König" wrote:
Hi guys,
Well let's face it AGP is a total headache to maintain and dead for at least 10+ years.
We have a lot of x86 specific stuff in the architecture independent graphics memory management to get the caching right, abusing the DMA API on multiple occasions, need to distinct between AGP and driver specific page tables etc etc...
So the idea here is to just go ahead and remove the support from Radeon and Nouveau and then drop the necessary code from TTM.
For Radeon this means that we just switch over to the driver specific page tables and everything should more or less continue to work.
For Nouveau I'm not 100% sure, but from the code it of hand looks like we can do it similar to Radeon.
Note there is no loss of functionality here, at least on radeon hardware. It just comes down to which MMU gets used for access to system memory, the AGP MMU on the chipset or the MMU built into the GPU. On powerpc hardware, AGP has been particularly unstable, and AGP has been disabled by default on radeon on powerpc for years now. In fact, this will probably make older hardware more reliable as it takes AGP out of the equation.
Alex,
Thanks for the clarification.
If the actual performance impact is little to none, and we end up with more reliable operation that is certainly beneficial then the change is indeed for the good.
The Phoronix title screaming "AGP Graphics Card Support Proposed For Removal From Linux Radeon/NVIDIA Drivers" was neither accurate, nor helpful.
Al
Hi
Am 11.05.20 um 19:17 schrieb Christian König:
Hi guys,
Well let's face it AGP is a total headache to maintain and dead for at least 10+ years.
We have a lot of x86 specific stuff in the architecture independent graphics memory management to get the caching right, abusing the DMA API on multiple occasions, need to distinct between AGP and driver specific page tables etc etc...
So the idea here is to just go ahead and remove the support from Radeon and Nouveau and then drop the necessary code from TTM.
For Radeon this means that we just switch over to the driver specific page tables and everything should more or less continue to work.
For Nouveau I'm not 100% sure, but from the code it of hand looks like we can do it similar to Radeon.
Please comment what you think about this.
There's some AGP support code in the DRM core. Can some of that declared as legacy?
Specifically, what about these AGP-related ioctl calls? Can they be declared as legacy? It would appear to me that KMS-based drivers don't have to manage AGP by themselves. (?)
Best regards Thomas
Regards, Christian.
Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
On Tue, May 12, 2020 at 2:29 PM Thomas Zimmermann tzimmermann@suse.de wrote:
Hi
Am 11.05.20 um 19:17 schrieb Christian König:
Hi guys,
Well let's face it AGP is a total headache to maintain and dead for at least 10+ years.
We have a lot of x86 specific stuff in the architecture independent graphics memory management to get the caching right, abusing the DMA API on multiple occasions, need to distinct between AGP and driver specific page tables etc etc...
So the idea here is to just go ahead and remove the support from Radeon and Nouveau and then drop the necessary code from TTM.
For Radeon this means that we just switch over to the driver specific page tables and everything should more or less continue to work.
For Nouveau I'm not 100% sure, but from the code it of hand looks like we can do it similar to Radeon.
Please comment what you think about this.
There's some AGP support code in the DRM core. Can some of that declared as legacy?
Specifically, what about these AGP-related ioctl calls? Can they be declared as legacy? It would appear to me that KMS-based drivers don't have to manage AGP by themselves. (?)
The old drm core AGP code is mainly (only?) for the non-KMS drivers. E.g., mach64, r128, sis, savage, etc.
Alex
Best regards Thomas
Regards, Christian.
Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
-- Thomas Zimmermann Graphics Driver Developer SUSE Software Solutions Germany GmbH Maxfeldstr. 5, 90409 Nürnberg, Germany (HRB 36809, AG Nürnberg) Geschäftsführer: Felix Imendörffer
amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Hi Alex
Am 12.05.20 um 20:32 schrieb Alex Deucher:
On Tue, May 12, 2020 at 2:29 PM Thomas Zimmermann tzimmermann@suse.de wrote:
Hi
Am 11.05.20 um 19:17 schrieb Christian König:
Hi guys,
Well let's face it AGP is a total headache to maintain and dead for at least 10+ years.
We have a lot of x86 specific stuff in the architecture independent graphics memory management to get the caching right, abusing the DMA API on multiple occasions, need to distinct between AGP and driver specific page tables etc etc...
So the idea here is to just go ahead and remove the support from Radeon and Nouveau and then drop the necessary code from TTM.
For Radeon this means that we just switch over to the driver specific page tables and everything should more or less continue to work.
For Nouveau I'm not 100% sure, but from the code it of hand looks like we can do it similar to Radeon.
Please comment what you think about this.
There's some AGP support code in the DRM core. Can some of that declared as legacy?
Specifically, what about these AGP-related ioctl calls? Can they be declared as legacy? It would appear to me that KMS-based drivers don't have to manage AGP by themselves. (?)
The old drm core AGP code is mainly (only?) for the non-KMS drivers. E.g., mach64, r128, sis, savage, etc.
Exactly my point. There's one drm_agp_init() call left in radeon. The rest of the AGP code is apparently for legacy non-KMS drivers. Should the related ioctl calls be declared as legacy (i.e., listed with DRM_LEGACY_IOCTL_DEF instead of DRM_IOCTL_DEF)? If so, much of the AGP core code could probably be moved behind CONFIG_DRM_LEGACY as well.
Best regards Thomas
Alex
Best regards Thomas
Regards, Christian.
Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
-- Thomas Zimmermann Graphics Driver Developer SUSE Software Solutions Germany GmbH Maxfeldstr. 5, 90409 Nürnberg, Germany (HRB 36809, AG Nürnberg) Geschäftsführer: Felix Imendörffer
amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
On Tue, May 12, 2020 at 3:10 PM Thomas Zimmermann tzimmermann@suse.de wrote:
Hi Alex
Am 12.05.20 um 20:32 schrieb Alex Deucher:
On Tue, May 12, 2020 at 2:29 PM Thomas Zimmermann tzimmermann@suse.de wrote:
Hi
Am 11.05.20 um 19:17 schrieb Christian König:
Hi guys,
Well let's face it AGP is a total headache to maintain and dead for at least 10+ years.
We have a lot of x86 specific stuff in the architecture independent graphics memory management to get the caching right, abusing the DMA API on multiple occasions, need to distinct between AGP and driver specific page tables etc etc...
So the idea here is to just go ahead and remove the support from Radeon and Nouveau and then drop the necessary code from TTM.
For Radeon this means that we just switch over to the driver specific page tables and everything should more or less continue to work.
For Nouveau I'm not 100% sure, but from the code it of hand looks like we can do it similar to Radeon.
Please comment what you think about this.
There's some AGP support code in the DRM core. Can some of that declared as legacy?
Specifically, what about these AGP-related ioctl calls? Can they be declared as legacy? It would appear to me that KMS-based drivers don't have to manage AGP by themselves. (?)
The old drm core AGP code is mainly (only?) for the non-KMS drivers. E.g., mach64, r128, sis, savage, etc.
Exactly my point. There's one drm_agp_init() call left in radeon. The rest of the AGP code is apparently for legacy non-KMS drivers. Should the related ioctl calls be declared as legacy (i.e., listed with DRM_LEGACY_IOCTL_DEF instead of DRM_IOCTL_DEF)? If so, much of the AGP core code could probably be moved behind CONFIG_DRM_LEGACY as well.
Ah, I forgot about drm_agp_init(). I was just thinking the other AGP stuff. Yeah, I think we could make it legacy.
Alex
Best regards Thomas
Alex
Best regards Thomas
Regards, Christian.
Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
-- Thomas Zimmermann Graphics Driver Developer SUSE Software Solutions Germany GmbH Maxfeldstr. 5, 90409 Nürnberg, Germany (HRB 36809, AG Nürnberg) Geschäftsführer: Felix Imendörffer
amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
-- Thomas Zimmermann Graphics Driver Developer SUSE Software Solutions Germany GmbH Maxfeldstr. 5, 90409 Nürnberg, Germany (HRB 36809, AG Nürnberg) Geschäftsführer: Felix Imendörffer
On Tue, 12 May 2020 at 20:48, Alex Deucher alexdeucher@gmail.com wrote:
There's some AGP support code in the DRM core. Can some of that declared as legacy?
Specifically, what about these AGP-related ioctl calls? Can they be declared as legacy? It would appear to me that KMS-based drivers don't have to manage AGP by themselves. (?)
The old drm core AGP code is mainly (only?) for the non-KMS drivers. E.g., mach64, r128, sis, savage, etc.
Exactly my point. There's one drm_agp_init() call left in radeon. The rest of the AGP code is apparently for legacy non-KMS drivers. Should the related ioctl calls be declared as legacy (i.e., listed with DRM_LEGACY_IOCTL_DEF instead of DRM_IOCTL_DEF)? If so, much of the AGP core code could probably be moved behind CONFIG_DRM_LEGACY as well.
Ah, I forgot about drm_agp_init(). I was just thinking the other AGP stuff. Yeah, I think we could make it legacy.
Fwiw I've got local patches a) removing drm_agp_init() from radeon and b) making the core drm code legacy only. Will try to finish them over the weekend and send out.
Even if AGP GART gets dropped the b) patches will be good ;-)
-Emil
Hi
Am 13.05.20 um 11:27 schrieb Emil Velikov:
On Tue, 12 May 2020 at 20:48, Alex Deucher alexdeucher@gmail.com wrote:
There's some AGP support code in the DRM core. Can some of that declared as legacy?
Specifically, what about these AGP-related ioctl calls? Can they be declared as legacy? It would appear to me that KMS-based drivers don't have to manage AGP by themselves. (?)
The old drm core AGP code is mainly (only?) for the non-KMS drivers. E.g., mach64, r128, sis, savage, etc.
Exactly my point. There's one drm_agp_init() call left in radeon. The rest of the AGP code is apparently for legacy non-KMS drivers. Should the related ioctl calls be declared as legacy (i.e., listed with DRM_LEGACY_IOCTL_DEF instead of DRM_IOCTL_DEF)? If so, much of the AGP core code could probably be moved behind CONFIG_DRM_LEGACY as well.
Ah, I forgot about drm_agp_init(). I was just thinking the other AGP stuff. Yeah, I think we could make it legacy.
Fwiw I've got local patches a) removing drm_agp_init() from radeon and b) making the core drm code legacy only. Will try to finish them over the weekend and send out.
Even if AGP GART gets dropped the b) patches will be good ;-)
Fantastic! Please see one of my other comments in this thread. There's still drm_agp_init() somewhere in radeon_drv.c. So patch a) might still be useful.
Best regards Thomas
-Emil
Hi
Am 11.05.20 um 19:17 schrieb Christian König:
Hi guys,
Well let's face it AGP is a total headache to maintain and dead for at least 10+ years.
We have a lot of x86 specific stuff in the architecture independent graphics memory management to get the caching right, abusing the DMA API on multiple occasions, need to distinct between AGP and driver specific page tables etc etc...
So the idea here is to just go ahead and remove the support from Radeon and Nouveau and then drop the necessary code from TTM.
For Radeon this means that we just switch over to the driver specific page tables and everything should more or less continue to work.
For Nouveau I'm not 100% sure, but from the code it of hand looks like we can do it similar to Radeon.
Please comment what you think about this.
It's probably not much of a problem in practice.
I guess everyone who plays 3d games has upgraded to something newer.
Wrt desktops, I found that some components of modern desktops (KDE, Gnome) now have a hard requirement on SSE2. [1][2] But AGP is mostly used in old 32-bit systems, which don't have SSE2.* So remaining users of the GART functionality probably don't use any of these desktops.
The simpler WMs are usually usable with only little VRAM. At least they should not be hit by any performance penalty.
Best regards Thomas
[1] https://bugzilla.opensuse.org/show_bug.cgi?id=1162283 [2] https://bugzilla.opensuse.org/show_bug.cgi?id=1077870
* First-generation Athlon 64 have SSE2 and AGP support. But there are few systems. Around that time AGP was replaced by PCIe.
Regards, Christian.
Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
dri-devel@lists.freedesktop.org
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Al Dunsmuir -
Alex Deucher -
Christian König -
Dave Airlie -
Emil Velikov -
Michel Dänzer -
Roy Spliet -
Thomas Zimmermann