Add optional property node 'arm,malidp-arqos-value' for the Mali DP500. This property describe the ARQoS levels of DP500's QoS signaling.
Signed-off-by: Wen He wen.he_1@nxp.com --- change in v3: - correction the describe of the node
Documentation/devicetree/bindings/display/arm,malidp.txt | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/arm,malidp.txt b/Documentation/devicetree/bindings/display/arm,malidp.txt index 2f7870983ef1..1f711d32f235 100644 --- a/Documentation/devicetree/bindings/display/arm,malidp.txt +++ b/Documentation/devicetree/bindings/display/arm,malidp.txt @@ -37,6 +37,8 @@ Optional properties: Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt) to be used for the framebuffer; if not present, the framebuffer may be located anywhere in memory. + - arm,malidp-arqos-high-level: phandle to describing the ARQoS levels of DP500's + QoS signaling.
Example: @@ -54,6 +56,7 @@ Example: clocks = <&oscclk2>, <&fpgaosc0>, <&fpgaosc1>, <&fpgaosc1>; clock-names = "pxlclk", "mclk", "aclk", "pclk"; arm,malidp-output-port-lines = /bits/ 8 <8 8 8>; + arm,malidp-arqos-high-level = <&rqosvalue>; port { dp0_output: endpoint { remote-endpoint = <&tda998x_2_input>;
Configure the display Quality of service (QoS) levels priority if the optional property node "arm,malidp-aqros-value" is defined in DTS file.
QoS signaling using AQROS and AWQOS AXI interface signals, the AQROS is driven from the "RQOS" register, so needed to program the RQOS register to avoid the high resolutions flicker issue on the LS1028A platform.
Signed-off-by: Wen He wen.he_1@nxp.com --- change in v3: - after testing more resolutions, if pixelclock > 148.5MHz will get the flickering
drivers/gpu/drm/arm/malidp_drv.c | 6 ++++++ drivers/gpu/drm/arm/malidp_hw.c | 13 +++++++++++++ drivers/gpu/drm/arm/malidp_hw.h | 3 +++ drivers/gpu/drm/arm/malidp_regs.h | 10 ++++++++++ 4 files changed, 32 insertions(+)
diff --git a/drivers/gpu/drm/arm/malidp_drv.c b/drivers/gpu/drm/arm/malidp_drv.c index c27ff456eddc..80e8d15760ac 100644 --- a/drivers/gpu/drm/arm/malidp_drv.c +++ b/drivers/gpu/drm/arm/malidp_drv.c @@ -815,6 +815,12 @@ static int malidp_bind(struct device *dev)
malidp->core_id = version;
+ ret = of_property_read_u32(dev->of_node, + "arm,malidp-arqos-value", + &hwdev->arqos_value); + if (ret) + hwdev->arqos_value = 0x0; + /* set the number of lines used for output of RGB data */ ret = of_property_read_u8_array(dev->of_node, "arm,malidp-output-port-lines", diff --git a/drivers/gpu/drm/arm/malidp_hw.c b/drivers/gpu/drm/arm/malidp_hw.c index 380be66d4c6e..f90a367a5bc9 100644 --- a/drivers/gpu/drm/arm/malidp_hw.c +++ b/drivers/gpu/drm/arm/malidp_hw.c @@ -374,6 +374,19 @@ static void malidp500_modeset(struct malidp_hw_device *hwdev, struct videomode * malidp_hw_setbits(hwdev, MALIDP_DISP_FUNC_ILACED, MALIDP_DE_DISPLAY_FUNC); else malidp_hw_clearbits(hwdev, MALIDP_DISP_FUNC_ILACED, MALIDP_DE_DISPLAY_FUNC); + + /* + * Program the RQoS register to avoid high resolutions flicker + * issue on the LS1028A. + */ + if (hwdev->arqos_value) { + val = hwdev->arqos_value; + + if (mode->pixelclock > 148500000) + malidp_hw_setbits(hwdev, val, MALIDP500_RQOS_QUALITY); + else + malidp_hw_clearbits(hwdev, val, MALIDP500_RQOS_QUALITY); + } }
int malidp_format_get_bpp(u32 fmt) diff --git a/drivers/gpu/drm/arm/malidp_hw.h b/drivers/gpu/drm/arm/malidp_hw.h index 968a65eed371..e4c36bc90bda 100644 --- a/drivers/gpu/drm/arm/malidp_hw.h +++ b/drivers/gpu/drm/arm/malidp_hw.h @@ -251,6 +251,9 @@ struct malidp_hw_device {
/* size of memory used for rotating layers, up to two banks available */ u32 rotation_memory[2]; + + /* priority level of RQOS register used for driven the ARQOS signal */ + u32 arqos_value; };
static inline u32 malidp_hw_read(struct malidp_hw_device *hwdev, u32 reg) diff --git a/drivers/gpu/drm/arm/malidp_regs.h b/drivers/gpu/drm/arm/malidp_regs.h index 993031542fa1..514c50dcb74d 100644 --- a/drivers/gpu/drm/arm/malidp_regs.h +++ b/drivers/gpu/drm/arm/malidp_regs.h @@ -210,6 +210,16 @@ #define MALIDP500_CONFIG_VALID 0x00f00 #define MALIDP500_CONFIG_ID 0x00fd4
+/* + * The quality of service (QoS) register on the DP500. RQOS register values + * are driven by the ARQOS signal, using AXI transacations, dependent on the + * FIFO input level. + * The RQOS register can also set QoS levels for: + * - RED_ARQOS @ A 4-bit signal value for close to underflow conditions + * - GREEN_ARQOS @ A 4-bit signal value for normal conditions + */ +#define MALIDP500_RQOS_QUALITY 0x00500 + /* register offsets and bits specific to DP550/DP650 */ #define MALIDP550_ADDR_SPACE_SIZE 0x10000 #define MALIDP550_DE_CONTROL 0x00010
On Fri, Aug 16, 2019 at 4:14 AM Wen He wen.he_1@nxp.com wrote:
Add optional property node 'arm,malidp-arqos-value' for the Mali DP500. This property describe the ARQoS levels of DP500's QoS signaling.
Signed-off-by: Wen He wen.he_1@nxp.com
change in v3: - correction the describe of the node
Documentation/devicetree/bindings/display/arm,malidp.txt | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/arm,malidp.txt b/Documentation/devicetree/bindings/display/arm,malidp.txt index 2f7870983ef1..1f711d32f235 100644 --- a/Documentation/devicetree/bindings/display/arm,malidp.txt +++ b/Documentation/devicetree/bindings/display/arm,malidp.txt @@ -37,6 +37,8 @@ Optional properties: Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt) to be used for the framebuffer; if not present, the framebuffer may be located anywhere in memory.
- arm,malidp-arqos-high-level: phandle to describing the ARQoS levels of DP500's
- QoS signaling.
The driver is reading a u32... Did you test this?
Example: @@ -54,6 +56,7 @@ Example: clocks = <&oscclk2>, <&fpgaosc0>, <&fpgaosc1>, <&fpgaosc1>; clock-names = "pxlclk", "mclk", "aclk", "pclk"; arm,malidp-output-port-lines = /bits/ 8 <8 8 8>;
arm,malidp-arqos-high-level = <&rqosvalue>; port { dp0_output: endpoint { remote-endpoint = <&tda998x_2_input>;-- 2.17.1
-----Original Message----- From: Rob Herring robh+dt@kernel.org Sent: 2019年8月17日 4:09 To: Wen He wen.he_1@nxp.com Cc: linux-devel@linux.nxdi.nxp.com; Liviu Dudau liviu.dudau@arm.com; Brian Starkey brian.starkey@arm.com; David Airlie airlied@linux.ie; Daniel Vetter daniel@ffwll.ch; Mark Rutland mark.rutland@arm.com; dri-devel dri-devel@lists.freedesktop.org; devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; Leo Li leoyang.li@nxp.com Subject: [EXT] Re: [v3 1/2] dt/bindings: display: Add optional property node for Mali DP500
Caution: EXT Email
On Fri, Aug 16, 2019 at 4:14 AM Wen He wen.he_1@nxp.com wrote:
Add optional property node 'arm,malidp-arqos-value' for the Mali DP500. This property describe the ARQoS levels of DP500's QoS signaling.
Signed-off-by: Wen He wen.he_1@nxp.com
change in v3: - correction the describe of the node
Documentation/devicetree/bindings/display/arm,malidp.txt | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/arm,malidp.txt
b/Documentation/devicetree/bindings/display/arm,malidp.txt
index 2f7870983ef1..1f711d32f235 100644 --- a/Documentation/devicetree/bindings/display/arm,malidp.txt +++ b/Documentation/devicetree/bindings/display/arm,malidp.txt @@ -37,6 +37,8 @@ Optional properties:
Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt)
to be used for the framebuffer; if not present, the framebuffer may be located anywhere in memory.
- arm,malidp-arqos-high-level: phandle to describing the ARQoS levels of
DP500's
- QoS signaling.
The driver is reading a u32... Did you test this?
Sure, actually, here should be use a u32 value....
The older description was correct, sorry, I should be Correction the example node define...
'integer of u32 value describing the ARQoS levels of DP500's QoS signaling',
Example: @@ -54,6 +56,7 @@ Example: clocks = <&oscclk2>, <&fpgaosc0>, <&fpgaosc1>,
<&fpgaosc1>;
clock-names = "pxlclk", "mclk", "aclk", "pclk"; arm,malidp-output-port-lines = /bits/ 8 <8 8 8>;
arm,malidp-arqos-high-level = <&rqosvalue>;
arm,malidp-arqos-high-level = < 0xd000d000>;
Best Regards, Wen
port { dp0_output: endpoint { remote-endpoint =<&tda998x_2_input>;
-- 2.17.1
dri-devel@lists.freedesktop.org
-
Rob Herring -
Wen He