New subject: [PATCH 01/15] dma-buf: add enum dma_resv_usage v4

7 Apr 2022

		      struct dma_fence *fence)

	     struct dma_fence *replacement)

	     struct dma_fence *replacement,

	     enum dma_resv_usage usage)

		    struct dma_fence *fence)

	enum dma_resv_usage usage)

dma_resv_add_excl_fence(obj, fence);

dma_resv_add_shared_fence(obj, fence);

dma_fence_get(f);

if (dma_resv_iter_is_exclusive(&cursor))

if (dma_resv_iter_usage(&cursor) == DMA_RESV_USAGE_WRITE)
excl = f;

	   dma_resv_iter_is_exclusive(&cursor) ?

		"Exclusive" : "Shared");

	   usage[dma_resv_iter_usage(&cursor)]);

dma_resv_add_shared_fence(&resv, f);

dma_resv_add_excl_fence(&resv, f);

dma_resv_add_shared_fence(&resv, f);

dma_resv_add_excl_fence(&resv, f);

if (dma_resv_iter_is_exclusive(&cursor) !=

    (usage >= DMA_RESV_USAGE_READ)) {

if (dma_resv_iter_usage(&cursor) != usage) {
pr_err("Unexpected fence usage\n");
r = -EINVAL;
goto err_unlock;

dma_resv_add_shared_fence(&resv, f);

dma_resv_add_excl_fence(&resv, f);

if (dma_resv_iter_is_exclusive(&cursor) !=

    (usage >= DMA_RESV_USAGE_READ)) {

if (dma_resv_iter_usage(&cursor) != usage) {
pr_err("Unexpected fence usage\n");
r = -EINVAL;
goto err_iter_end;

dma_resv_add_shared_fence(&resv, f);

dma_resv_add_excl_fence(&resv, f);

SUBTEST(test_excl_signaling),

SUBTEST(test_shared_signaling),

SUBTEST(test_excl_for_each),

SUBTEST(test_shared_for_each),

SUBTEST(test_excl_for_each_unlocked),

SUBTEST(test_shared_for_each_unlocked),

SUBTEST(test_excl_get_fences),

SUBTEST(test_shared_get_fences),

SUBTEST(test_signaling),

SUBTEST(test_for_each),

SUBTEST(test_for_each_unlocked),

SUBTEST(test_get_fences),

    ++usage) {

r = subtests(tests, (void *)(unsigned long)usage);

if (r)

	return r;

		replacement);

		replacement, DMA_RESV_USAGE_READ);

dma_resv_add_shared_fence(resv, fence);

dma_resv_add_excl_fence(resv, fence);

	   DMA_RESV_USAGE_WRITE);

bool write = submit->bos[i].flags & ETNA_SUBMIT_BO_WRITE;

if (submit->bos[i].flags & ETNA_SUBMIT_BO_WRITE)

	dma_resv_add_excl_fence(obj->resv,

					  submit->out_fence);

else

	dma_resv_add_shared_fence(obj->resv,

					    submit->out_fence);

dma_resv_add_fence(obj->resv, submit->out_fence, write ?

		   DMA_RESV_USAGE_WRITE : DMA_RESV_USAGE_READ);

if (dma_resv_iter_is_exclusive(&cursor))

	/* Translate the exclusive fence to the READ *and* WRITE engine */

if (dma_resv_iter_usage(&cursor) <= DMA_RESV_USAGE_WRITE)

	/* Translate the write fences to the READ *and* WRITE engine */
args->busy |= busy_check_writer(fence);

	/* Translate shared fences to READ set of engines */

	/* Translate read fences to READ set of engines */
args->busy |= busy_check_reader(fence);

dma_resv_add_excl_fence(obj->base.resv, &clflush->base.dma);

dma_resv_add_fence(obj->base.resv, &clflush->base.dma,

		   DMA_RESV_USAGE_WRITE);

		dma_resv_add_excl_fence(obj->base.resv,

					&rq->fence);

		dma_resv_add_fence(obj->base.resv, &rq->fence,

				   DMA_RESV_USAGE_WRITE);
i915_gem_object_set_moving_fence(obj, &rq->fence);
i915_request_put(rq);

dma_resv_add_excl_fence(obj->base.resv, &rq->fence);

dma_resv_add_fence(obj->base.resv, &rq->fence,

		   DMA_RESV_USAGE_WRITE);

if (fence) {

	dma_resv_add_excl_fence(vma->obj->base.resv, fence);

	dma_resv_add_fence(vma->obj->base.resv, fence,

			   DMA_RESV_USAGE_WRITE);
obj->write_domain = I915_GEM_DOMAIN_RENDER;
obj->read_domains = 0;

if (fence) {

	dma_resv_add_shared_fence(vma->obj->base.resv, fence);

	dma_resv_add_fence(vma->obj->base.resv, fence,

			   DMA_RESV_USAGE_READ);
obj->write_domain = 0;

dma_resv_add_excl_fence(obj->base.resv, &rq->fence);

dma_resv_add_fence(obj->base.resv, &rq->fence,

		   DMA_RESV_USAGE_WRITE);

if (submit->bos[i].flags & LIMA_SUBMIT_BO_WRITE)

	dma_resv_add_excl_fence(lima_bo_resv(bos[i]), fence);

else

	dma_resv_add_shared_fence(lima_bo_resv(bos[i]), fence);

dma_resv_add_fence(lima_bo_resv(bos[i]), fence,

		   submit->bos[i].flags & LIMA_SUBMIT_BO_WRITE ?

		   DMA_RESV_USAGE_WRITE : DMA_RESV_USAGE_READ);

if (submit->bos[i].flags & MSM_SUBMIT_BO_WRITE)

	dma_resv_add_excl_fence(obj->resv, submit->user_fence);

	dma_resv_add_fence(obj->resv, submit->user_fence,

			   DMA_RESV_USAGE_WRITE);

	dma_resv_add_shared_fence(obj->resv, submit->user_fence);

	dma_resv_add_fence(obj->resv, submit->user_fence,

			   DMA_RESV_USAGE_READ);

dma_resv_add_excl_fence(resv, &fence->base);

dma_resv_add_shared_fence(resv, &fence->base);

return;

	   DMA_RESV_USAGE_WRITE : DMA_RESV_USAGE_READ);

	enum dma_resv_usage usage;
struct nouveau_fence *f;

	if (i == 0 && dma_resv_iter_is_exclusive(&cursor))

	usage = dma_resv_iter_usage(&cursor);

	if (i == 0 && usage == DMA_RESV_USAGE_WRITE)
	continue;

f = nouveau_local_fence(fence, chan->drm);

dma_resv_add_excl_fence(bos[i]->resv, fence);

dma_resv_add_fence(bos[i]->resv, fence, DMA_RESV_USAGE_WRITE);

dma_resv_add_shared_fence(bo->base.resv, &release->base);

dma_resv_add_fence(bo->base.resv, &release->base,

		   DMA_RESV_USAGE_READ);

dma_resv_add_shared_fence(resv, &fence->base);

dma_resv_add_excl_fence(resv, &fence->base);

	   DMA_RESV_USAGE_READ : DMA_RESV_USAGE_WRITE);

	   DMA_RESV_USAGE_WRITE);

if (entry->num_shared)

	dma_resv_add_shared_fence(bo->base.resv, fence);

else

	dma_resv_add_excl_fence(bo->base.resv, fence);

dma_resv_add_fence(bo->base.resv, fence, entry->num_shared ?

		   DMA_RESV_USAGE_READ : DMA_RESV_USAGE_WRITE);

dma_resv_add_excl_fence(job->bo[i]->resv,

			job->done_fence);

dma_resv_add_fence(job->bo[i]->resv, job->done_fence,

		   DMA_RESV_USAGE_WRITE);

dma_resv_add_shared_fence(bo->base.base.resv, exec->fence);

dma_resv_add_fence(bo->base.base.resv, exec->fence);

if (arg->flags & VGEM_FENCE_WRITE)

	dma_resv_add_excl_fence(resv, fence);

else

	dma_resv_add_shared_fence(resv, fence);

dma_resv_add_fence(resv, fence, arg->flags & VGEM_FENCE_WRITE ?

		   DMA_RESV_USAGE_WRITE : DMA_RESV_USAGE_READ);

dma_resv_add_excl_fence(objs->objs[i]->resv, fence);

dma_resv_add_fence(objs->objs[i]->resv, fence,

		   DMA_RESV_USAGE_WRITE);

dma_resv_add_excl_fence(bo->base.resv, &fence->base);

dma_resv_add_fence(bo->base.resv, &fence->base,

		   DMA_RESV_USAGE_WRITE);

* - Drivers must add a shared fence through dma_resv_add_shared_fence()

*   for anything the userspace API considers a read access. This highly

*   depends upon the API and window system.

* - Drivers must add a read fence through dma_resv_add_fence() with the

*   DMA_RESV_USAGE_READ flag for anything the userspace API considers a

*   read access. This highly depends upon the API and window system.

* - Similarly drivers must set the exclusive fence through

*   dma_resv_add_excl_fence() for anything the userspace API considers

*   write access.

* - Similarly drivers must add a write fence through

*   dma_resv_add_fence() with the DMA_RESV_USAGE_WRITE flag for

*   anything the userspace API considers write access.

* - Drivers may just always set the exclusive fence, since that only

* - Drivers may just always add a write fence, since that only

* - Dynamic importers must obey the exclusive fence and wait for it to

* - Dynamic importers must obey the write fences and wait for them to

	enum dma_resv_usage usage);

	     struct dma_fence *fence);

	     struct dma_fence *fence,

	     enum dma_resv_usage usage);

dma_resv_add_fence(bo->base.base.resv, exec->fence);

dma_resv_add_fence(bo->base.base.resv, exec->fence,

		   DMA_RESV_USAGE_READ);

dma_resv_add_excl_fence(bo->base.base.resv, exec->fence);

dma_resv_add_fence(bo->base.base.resv, exec->fence,

		   DMA_RESV_USAGE_WRITE);

		     struct dma_fence **fence)

		      struct dma_fence *fence)

return;

		      fence);

return 0;

return ret;

return fence->error;

		     intr, MAX_SCHEDULE_TIMEOUT);

		      struct dma_fence *fence);

		     struct dma_fence **fence);

 struct i915_deps *deps)

ret = i915_deps_add_resv(deps, bo->base.resv, ctx);

i915_deps_init(&deps, GFP_KERNEL | __GFP_NORETRY | __GFP_NOWARN);

ret = prev_deps(bo, ctx, &deps);

ret = i915_deps_add_resv(&deps, bo->base.resv, ctx);

				   DMA_RESV_USAGE_WRITE);

	i915_gem_object_set_moving_fence(obj, &rq->fence);

				   DMA_RESV_USAGE_KERNEL);
i915_request_put(rq);

		   DMA_RESV_USAGE_WRITE);

i915_gem_object_set_moving_fence(obj, &rq->fence);

		   DMA_RESV_USAGE_KERNEL);

err = i915_gem_object_get_moving_fence(vma->obj, &moving);

if (err)

	return err;

moving = NULL;

		     struct dma_fence **fence)

		      struct dma_fence *fence)

return;

		      fence);

return 0;

return ret;

return fence->error;

		     intr, MAX_SCHEDULE_TIMEOUT);

		      struct dma_fence *fence);

		     struct dma_fence **fence);

 struct i915_deps *deps)

ret = i915_deps_add_resv(deps, bo->base.resv, ctx);

i915_deps_init(&deps, GFP_KERNEL | __GFP_NORETRY | __GFP_NOWARN);

ret = prev_deps(bo, ctx, &deps);

ret = i915_deps_add_resv(&deps, bo->base.resv, ctx);

				   DMA_RESV_USAGE_WRITE);

	i915_gem_object_set_moving_fence(obj, &rq->fence);

				   DMA_RESV_USAGE_KERNEL);
i915_request_put(rq);

		   DMA_RESV_USAGE_WRITE);

i915_gem_object_set_moving_fence(obj, &rq->fence);

		   DMA_RESV_USAGE_KERNEL);

err = i915_gem_object_get_moving_fence(vma->obj, &moving);

if (err)

	return err;

moving = NULL;

                            struct dma_fence **fence)

                             struct dma_fence *fence)

       return;

                             fence);

       return 0;

       return ret;

       return fence->error;

                            intr, MAX_SCHEDULE_TIMEOUT);

                             struct dma_fence *fence);

                            struct dma_fence **fence);

 struct i915_deps *deps)

       ret = i915_deps_add_resv(deps, bo->base.resv, ctx);

         i915_deps_init(&deps, GFP_KERNEL | __GFP_NORETRY | __GFP_NOWARN);

       ret = prev_deps(bo, ctx, &deps);

       ret = i915_deps_add_resv(&deps, bo->base.resv, ctx);
       if (ret) {
               i915_refct_sgt_put(dst_rsgt);
               return ret;

                                          DMA_RESV_USAGE_WRITE);

               i915_gem_object_set_moving_fence(obj, &rq->fence);

                                          DMA_RESV_USAGE_KERNEL);
               i915_request_put(rq);
       }
       if (err)

                          DMA_RESV_USAGE_WRITE);

       i915_gem_object_set_moving_fence(obj, &rq->fence);

                          DMA_RESV_USAGE_KERNEL);
       i915_request_put(rq);

       err = i915_gem_object_get_moving_fence(vma->obj, &moving);

       if (err)

               return err;

       moving = NULL;

                            struct dma_fence **fence)

                             struct dma_fence *fence)

       return;

                             fence);

assert_object_held(obj);

       return 0;

       return ret;

       return fence->error;

                            intr, MAX_SCHEDULE_TIMEOUT);

                             struct dma_fence *fence);

                            struct dma_fence **fence);

 struct i915_deps *deps)

       ret = i915_deps_add_resv(deps, bo->base.resv, ctx);

          i915_deps_init(&deps, GFP_KERNEL | __GFP_NORETRY | __GFP_NOWARN);

       ret = prev_deps(bo, ctx, &deps);

       ret = i915_deps_add_resv(&deps, bo->base.resv, ctx);
        if (ret) {
                i915_refct_sgt_put(dst_rsgt);
                return ret;

                                          DMA_RESV_USAGE_WRITE);

               i915_gem_object_set_moving_fence(obj, &rq->fence);

                                          DMA_RESV_USAGE_KERNEL);
                i915_request_put(rq);
        }
        if (err)

                          DMA_RESV_USAGE_WRITE);

       i915_gem_object_set_moving_fence(obj, &rq->fence);

                          DMA_RESV_USAGE_KERNEL);
        i915_request_put(rq);
}
i915_gem_object_unlock(obj);

       err = i915_gem_object_get_moving_fence(vma->obj, &moving);

       if (err)

               return err;

       moving = NULL;

if (flags & PIN_GLOBAL)
        wakeref = intel_runtime_pm_get(&vma->vm->i915->runtime_pm);

		     struct dma_fence **fence)

		      struct dma_fence *fence)

return;

		      fence);

return 0;

return ret;

return fence->error;

		     intr, MAX_SCHEDULE_TIMEOUT);

		      struct dma_fence *fence);

		     struct dma_fence **fence);

 struct i915_deps *deps)

ret = i915_deps_add_resv(deps, bo->base.resv, ctx);

i915_deps_init(&deps, GFP_KERNEL | __GFP_NORETRY | __GFP_NOWARN);

ret = prev_deps(bo, ctx, &deps);

ret = i915_deps_add_resv(&deps, bo->base.resv, ctx);

				   DMA_RESV_USAGE_WRITE);

	i915_gem_object_set_moving_fence(obj, &rq->fence);

				   DMA_RESV_USAGE_KERNEL);
i915_request_put(rq);

		   DMA_RESV_USAGE_WRITE);

i915_gem_object_set_moving_fence(obj, &rq->fence);

		   DMA_RESV_USAGE_KERNEL);

err = i915_gem_object_get_moving_fence(vma->obj, &moving);

if (err)

	return err;

moving = NULL;

		     struct dma_fence **fence)

		      struct dma_fence *fence)

return;

		      fence);

return 0;

return ret;

return fence->error;

		     intr, MAX_SCHEDULE_TIMEOUT);

		      struct dma_fence *fence);

		     struct dma_fence **fence);

 struct i915_deps *deps)

ret = i915_deps_add_resv(deps, bo->base.resv, ctx);

	i915_deps_init(&deps, GFP_KERNEL | __GFP_NORETRY | __GFP_NOWARN);

ret = prev_deps(bo, ctx, &deps);

ret = i915_deps_add_resv(&deps, bo->base.resv, ctx);
if (ret) {
	i915_refct_sgt_put(dst_rsgt);
	return ret;

				   DMA_RESV_USAGE_WRITE);

	i915_gem_object_set_moving_fence(obj, &rq->fence);

				   DMA_RESV_USAGE_KERNEL);
	i915_request_put(rq);
}
if (err)

		   DMA_RESV_USAGE_WRITE);

i915_gem_object_set_moving_fence(obj, &rq->fence);

		   DMA_RESV_USAGE_KERNEL);
i915_request_put(rq);

err = i915_gem_object_get_moving_fence(vma->obj, &moving);

if (err)

	return err;

moving = NULL;

DMA-resv usage

Signed-off-by: Christian König christian.koenig@amd.com

#define seqprop_sequence(s) __seqprop(s, sequence)