Hello Shawn Guo,
The patch 4e986d3705df: "drm: zte: add overlay plane support" from Nov 16, 2016, leads to the following static checker warning:
drivers/gpu/drm/zte/zx_plane.c:170 zx_vl_rsz_setup() warn: always true condition '(fmt >= 0) => (0-u32max >= 0)'
drivers/gpu/drm/zte/zx_plane.c 156 static void zx_vl_rsz_setup(struct zx_plane *zplane, uint32_t format, 157 u32 src_w, u32 src_h, u32 dst_w, u32 dst_h) 158 { 159 void __iomem *rsz = zplane->rsz; 160 u32 src_chroma_w = src_w; 161 u32 src_chroma_h = src_h; 162 u32 fmt; ^^^^^^^ 163 164 /* Set up source and destination resolution */ 165 zx_writel(rsz + RSZ_SRC_CFG, RSZ_VER(src_h - 1) | RSZ_HOR(src_w - 1)); 166 zx_writel(rsz + RSZ_DEST_CFG, RSZ_VER(dst_h - 1) | RSZ_HOR(dst_w - 1)); 167 168 /* Configure data format for VL RSZ */ 169 fmt = zx_vl_rsz_get_fmt(format); ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ If fmt is -EINVAL then don't we just want to return anyway?
170 if (fmt >= 0) 171 zx_writel_mask(rsz + RSZ_VL_CTRL_CFG, RSZ_VL_FMT_MASK, fmt); 172 173 /* Calculate Chroma height and width */ 174 if (fmt == RSZ_VL_FMT_YCBCR420) { 175 src_chroma_w = src_w >> 1; 176 src_chroma_h = src_h >> 1; 177 } else if (fmt == RSZ_VL_FMT_YCBCR422) { 178 src_chroma_w = src_w >> 1; 179 } 180 181 /* Set up Luma and Chroma step registers */ 182 zx_writel(rsz + RSZ_VL_LUMA_HOR, rsz_step_value(src_w, dst_w)); 183 zx_writel(rsz + RSZ_VL_LUMA_VER, rsz_step_value(src_h, dst_h)); 184 zx_writel(rsz + RSZ_VL_CHROMA_HOR, rsz_step_value(src_chroma_w, dst_w)); 185 zx_writel(rsz + RSZ_VL_CHROMA_VER, rsz_step_value(src_chroma_h, dst_h)); 186 187 zx_vl_rsz_set_update(zplane); 188 }
regards, dan carpenter
Oh. Also this one:
drivers/gpu/drm/zte/zx_plane.c:253 zx_vl_plane_atomic_update() warn: always true condition '(fmt >= 0) => (0-u32max >= 0)'
regards, dan carpenter
Hi Dan,
Thanks for the report.
On Wed, Feb 08, 2017 at 09:39:51AM +0300, Dan Carpenter wrote:
Hello Shawn Guo,
The patch 4e986d3705df: "drm: zte: add overlay plane support" from Nov 16, 2016, leads to the following static checker warning:
drivers/gpu/drm/zte/zx_plane.c:170 zx_vl_rsz_setup() warn: always true condition '(fmt >= 0) => (0-u32max >= 0)'
I will send a follow-up patch to fix it by changing 'fmt' to type 'int'.
drivers/gpu/drm/zte/zx_plane.c 156 static void zx_vl_rsz_setup(struct zx_plane *zplane, uint32_t format, 157 u32 src_w, u32 src_h, u32 dst_w, u32 dst_h) 158 { 159 void __iomem *rsz = zplane->rsz; 160 u32 src_chroma_w = src_w; 161 u32 src_chroma_h = src_h; 162 u32 fmt; ^^^^^^^ 163 164 /* Set up source and destination resolution */ 165 zx_writel(rsz + RSZ_SRC_CFG, RSZ_VER(src_h - 1) | RSZ_HOR(src_w - 1)); 166 zx_writel(rsz + RSZ_DEST_CFG, RSZ_VER(dst_h - 1) | RSZ_HOR(dst_w - 1)); 167 168 /* Configure data format for VL RSZ */ 169 fmt = zx_vl_rsz_get_fmt(format); ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ If fmt is -EINVAL then don't we just want to return anyway?
The zx_vl_rsz_setup() is being called by atomic update function, which can not fail anyway. So we give it a best effort by going through the hardware update procedure but skip invalid format.
Shawn
170 if (fmt >= 0) 171 zx_writel_mask(rsz + RSZ_VL_CTRL_CFG, RSZ_VL_FMT_MASK, fmt); 172 173 /* Calculate Chroma height and width */ 174 if (fmt == RSZ_VL_FMT_YCBCR420) { 175 src_chroma_w = src_w >> 1; 176 src_chroma_h = src_h >> 1; 177 } else if (fmt == RSZ_VL_FMT_YCBCR422) { 178 src_chroma_w = src_w >> 1; 179 } 180 181 /* Set up Luma and Chroma step registers */ 182 zx_writel(rsz + RSZ_VL_LUMA_HOR, rsz_step_value(src_w, dst_w)); 183 zx_writel(rsz + RSZ_VL_LUMA_VER, rsz_step_value(src_h, dst_h)); 184 zx_writel(rsz + RSZ_VL_CHROMA_HOR, rsz_step_value(src_chroma_w, dst_w)); 185 zx_writel(rsz + RSZ_VL_CHROMA_VER, rsz_step_value(src_chroma_h, dst_h)); 186 187 zx_vl_rsz_set_update(zplane); 188 }
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