Hi,
This series has a bunch of cleanups. We drop DMA and VRFB rotation, and RFBI output. None of those are supported.
The latter half is about getting rid of enum omap_color_mode and moving to use fourcc pixel formats.
There should be no functional changes caused by this series.
This series is based on my earlier "drm/omap: misc changes" series.
Tomi
Tomi Valkeinen (16): drm/omap: fix passing rotation parameter to dispc drm/omap: fix setting & clearing DOUBLESTRIDE drm/omap: remove CLUT drm/omap: ratelimit OCP error drm/omap: remove rfbi drm/omap: remove dma & vrfb rotation drm/omap: cleanup offset calculation drm/omap: add format_is_yuv() helper drm/omap: remove unneeded prototypes drm/omap: remove unused 'supported_modes' field drm/omap: change supported_modes to an array drm/omap: use DRM_FORMAT_* instead of OMAP_DSS_COLOR_* drm/omap: use u32 instead of enum omap_color_mode drm/omap: remove omap_framebuffer_get_formats() drm/omap: cleanup formats array drm/omap: rename color_mode to fourcc
drivers/gpu/drm/omapdrm/dss/Kconfig | 13 - drivers/gpu/drm/omapdrm/dss/Makefile | 1 - drivers/gpu/drm/omapdrm/dss/core.c | 6 - drivers/gpu/drm/omapdrm/dss/dispc.c | 584 ++++----------- drivers/gpu/drm/omapdrm/dss/dss.h | 4 - drivers/gpu/drm/omapdrm/dss/dss_features.c | 179 ++--- drivers/gpu/drm/omapdrm/dss/dss_features.h | 6 +- drivers/gpu/drm/omapdrm/dss/omapdss.h | 71 +- drivers/gpu/drm/omapdrm/dss/rfbi.c | 1083 ---------------------------- drivers/gpu/drm/omapdrm/omap_drv.h | 2 - drivers/gpu/drm/omapdrm/omap_fb.c | 77 +- drivers/gpu/drm/omapdrm/omap_irq.c | 7 +- drivers/gpu/drm/omapdrm/omap_plane.c | 17 +- 13 files changed, 284 insertions(+), 1766 deletions(-) delete mode 100644 drivers/gpu/drm/omapdrm/dss/rfbi.c
omapdrm does not pass the rotation angle to dispc. We need to pass the rotation angle to fully support TILER rotation with YUV formats.
Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com --- drivers/gpu/drm/omapdrm/omap_fb.c | 12 ++++++++++++ 1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/omapdrm/omap_fb.c b/drivers/gpu/drm/omapdrm/omap_fb.c index 2dca19a0c2ff..4e434b2097ec 100644 --- a/drivers/gpu/drm/omapdrm/omap_fb.c +++ b/drivers/gpu/drm/omapdrm/omap_fb.c @@ -167,6 +167,8 @@ void omap_framebuffer_update_scanout(struct drm_framebuffer *fb, uint32_t w = win->src_w; uint32_t h = win->src_h;
+ /* note: DRM rotates counter-clockwise, TILER + DSS rotates clockwise */ + switch (win->rotation & DRM_ROTATE_MASK) { default: dev_err(fb->dev->dev, "invalid rotation: %02x", @@ -201,6 +203,15 @@ void omap_framebuffer_update_scanout(struct drm_framebuffer *fb, if (orient & MASK_X_INVERT) x += w - 1;
+ if (!(orient & MASK_XY_FLIP) && !(orient & MASK_Y_INVERT)) + info->rotation = OMAP_DSS_ROT_0; + else if (!(orient & MASK_XY_FLIP) && (orient & MASK_Y_INVERT)) + info->rotation = OMAP_DSS_ROT_180; + else if ((orient & MASK_XY_FLIP) && (orient & MASK_Y_INVERT)) + info->rotation = OMAP_DSS_ROT_90; + else if ((orient & MASK_XY_FLIP) && !(orient & MASK_Y_INVERT)) + info->rotation = OMAP_DSS_ROT_270; + omap_gem_rotated_paddr(plane->bo, orient, x, y, &info->paddr); info->rotation_type = OMAP_DSS_ROT_TILER; info->screen_width = omap_gem_tiled_stride(plane->bo, orient); @@ -221,6 +232,7 @@ void omap_framebuffer_update_scanout(struct drm_framebuffer *fb,
info->paddr = get_linear_addr(plane, format, 0, x, y); info->rotation_type = OMAP_DSS_ROT_DMA; + info->rotation = OMAP_DSS_ROT_0; info->screen_width = plane->pitch; }
The code that sets and clears DOUBLESTRIDE is only ran when using NV12. This is not correct, as we might first set the bith when using NV12, but never clear it when using other formats.
Fix it so that when the bit is available (when the HW supports NV12) we always either set or clear the bit.
Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com --- drivers/gpu/drm/omapdrm/dss/dispc.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c b/drivers/gpu/drm/omapdrm/dss/dispc.c index 352fad583571..079ec5d0b624 100644 --- a/drivers/gpu/drm/omapdrm/dss/dispc.c +++ b/drivers/gpu/drm/omapdrm/dss/dispc.c @@ -1864,14 +1864,15 @@ static void dispc_ovl_set_rotation_attrs(enum omap_plane_id plane, u8 rotation, REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), row_repeat ? 1 : 0, 18, 18);
- if (color_mode == OMAP_DSS_COLOR_NV12) { - bool doublestride = (rotation_type == OMAP_DSS_ROT_TILER) && - (rotation == OMAP_DSS_ROT_0 || - rotation == OMAP_DSS_ROT_180); + if (dss_feat_color_mode_supported(plane, OMAP_DSS_COLOR_NV12)) { + bool doublestride = + color_mode == OMAP_DSS_COLOR_NV12 && + rotation_type == OMAP_DSS_ROT_TILER && + (rotation == OMAP_DSS_ROT_0 || rotation == OMAP_DSS_ROT_180); + /* DOUBLESTRIDE */ REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), doublestride, 22, 22); } - }
static int color_mode_to_bpp(enum omap_color_mode color_mode)
Hi Tomi,
Thank you for the patch.
On Thursday 04 May 2017 13:23:18 Tomi Valkeinen wrote:
The code that sets and clears DOUBLESTRIDE is only ran when using NV12. This is not correct, as we might first set the bith when using NV12, but never clear it when using other formats.
Fix it so that when the bit is available (when the HW supports NV12) we always either set or clear the bit.
Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com
Reviewed-by: Laurent Pinchart laurent.pinchart@ideasonboard.com
drivers/gpu/drm/omapdrm/dss/dispc.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c b/drivers/gpu/drm/omapdrm/dss/dispc.c index 352fad583571..079ec5d0b624 100644 --- a/drivers/gpu/drm/omapdrm/dss/dispc.c +++ b/drivers/gpu/drm/omapdrm/dss/dispc.c @@ -1864,14 +1864,15 @@ static void dispc_ovl_set_rotation_attrs(enum omap_plane_id plane, u8 rotation, REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), row_repeat ? 1 : 0, 18, 18);
- if (color_mode == OMAP_DSS_COLOR_NV12) {
bool doublestride = (rotation_type == OMAP_DSS_ROT_TILER) &&(rotation == OMAP_DSS_ROT_0 ||rotation == OMAP_DSS_ROT_180);
- if (dss_feat_color_mode_supported(plane, OMAP_DSS_COLOR_NV12)) {
bool doublestride =color_mode == OMAP_DSS_COLOR_NV12 &&rotation_type == OMAP_DSS_ROT_TILER &&(rotation == OMAP_DSS_ROT_0 || rotation ==
OMAP_DSS_ROT_180);
- /* DOUBLESTRIDE */ REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), doublestride, 22,
22);
}
}
static int color_mode_to_bpp(enum omap_color_mode color_mode)
DSS IP versions 2 and 3 support CLUT modes (color lookup table), but the driver has never supported those. We still have had some code for CLUT modes. As the newer DSS IP versions have dropped CLUT support, we might as well clean up the driver by removing the CLUT related code.
Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com --- drivers/gpu/drm/omapdrm/dss/dispc.c | 57 ++---------------------------- drivers/gpu/drm/omapdrm/dss/dss_features.c | 6 ---- drivers/gpu/drm/omapdrm/dss/omapdss.h | 4 --- 3 files changed, 2 insertions(+), 65 deletions(-)
diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c b/drivers/gpu/drm/omapdrm/dss/dispc.c index 079ec5d0b624..5990c9199f31 100644 --- a/drivers/gpu/drm/omapdrm/dss/dispc.c +++ b/drivers/gpu/drm/omapdrm/dss/dispc.c @@ -946,14 +946,6 @@ static void dispc_ovl_set_color_mode(enum omap_plane_id plane, } } else { switch (color_mode) { - case OMAP_DSS_COLOR_CLUT1: - m = 0x0; break; - case OMAP_DSS_COLOR_CLUT2: - m = 0x1; break; - case OMAP_DSS_COLOR_CLUT4: - m = 0x2; break; - case OMAP_DSS_COLOR_CLUT8: - m = 0x3; break; case OMAP_DSS_COLOR_RGB12U: m = 0x4; break; case OMAP_DSS_COLOR_ARGB16: @@ -1878,13 +1870,6 @@ static void dispc_ovl_set_rotation_attrs(enum omap_plane_id plane, u8 rotation, static int color_mode_to_bpp(enum omap_color_mode color_mode) { switch (color_mode) { - case OMAP_DSS_COLOR_CLUT1: - return 1; - case OMAP_DSS_COLOR_CLUT2: - return 2; - case OMAP_DSS_COLOR_CLUT4: - return 4; - case OMAP_DSS_COLOR_CLUT8: case OMAP_DSS_COLOR_NV12: return 8; case OMAP_DSS_COLOR_RGB12U: @@ -1933,14 +1918,7 @@ static void calc_vrfb_rotation_offset(u8 rotation, bool mirror, { u8 ps;
- /* FIXME CLUT formats */ switch (color_mode) { - case OMAP_DSS_COLOR_CLUT1: - case OMAP_DSS_COLOR_CLUT2: - case OMAP_DSS_COLOR_CLUT4: - case OMAP_DSS_COLOR_CLUT8: - BUG(); - return; case OMAP_DSS_COLOR_YUV2: case OMAP_DSS_COLOR_UYVY: ps = 4; @@ -2019,18 +1997,7 @@ static void calc_dma_rotation_offset(u8 rotation, bool mirror, u8 ps; u16 fbw, fbh;
- /* FIXME CLUT formats */ - switch (color_mode) { - case OMAP_DSS_COLOR_CLUT1: - case OMAP_DSS_COLOR_CLUT2: - case OMAP_DSS_COLOR_CLUT4: - case OMAP_DSS_COLOR_CLUT8: - BUG(); - return; - default: - ps = color_mode_to_bpp(color_mode) / 8; - break; - } + ps = color_mode_to_bpp(color_mode) / 8;
DSSDBG("calc_rot(%d): scrw %d, %dx%d\n", rotation, screen_width, width, height); @@ -2171,17 +2138,7 @@ static void calc_tiler_rotation_offset(u16 screen_width, u16 width, { u8 ps;
- switch (color_mode) { - case OMAP_DSS_COLOR_CLUT1: - case OMAP_DSS_COLOR_CLUT2: - case OMAP_DSS_COLOR_CLUT4: - case OMAP_DSS_COLOR_CLUT8: - BUG(); - return; - default: - ps = color_mode_to_bpp(color_mode) / 8; - break; - } + ps = color_mode_to_bpp(color_mode) / 8;
DSSDBG("scrw %d, width %d\n", screen_width, width);
@@ -2582,16 +2539,6 @@ static int dispc_ovl_calc_scaling(unsigned long pclk, unsigned long lclk, 2 : max_decim_limit; }
- if (color_mode == OMAP_DSS_COLOR_CLUT1 || - color_mode == OMAP_DSS_COLOR_CLUT2 || - color_mode == OMAP_DSS_COLOR_CLUT4 || - color_mode == OMAP_DSS_COLOR_CLUT8) { - *x_predecim = 1; - *y_predecim = 1; - *five_taps = false; - return 0; - } - decim_x = DIV_ROUND_UP(DIV_ROUND_UP(width, out_width), maxdownscale); decim_y = DIV_ROUND_UP(DIV_ROUND_UP(height, out_height), maxdownscale);
diff --git a/drivers/gpu/drm/omapdrm/dss/dss_features.c b/drivers/gpu/drm/omapdrm/dss/dss_features.c index 80c6440a0e08..135b2a511cf0 100644 --- a/drivers/gpu/drm/omapdrm/dss/dss_features.c +++ b/drivers/gpu/drm/omapdrm/dss/dss_features.c @@ -233,8 +233,6 @@ static const enum omap_dss_output_id omap5_dss_supported_outputs[] = {
static const enum omap_color_mode omap2_dss_supported_color_modes[] = { /* OMAP_DSS_GFX */ - OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 | - OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 | OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P,
@@ -251,8 +249,6 @@ static const enum omap_color_mode omap2_dss_supported_color_modes[] = {
static const enum omap_color_mode omap3_dss_supported_color_modes[] = { /* OMAP_DSS_GFX */ - OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 | - OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 | OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_ARGB32 | @@ -273,8 +269,6 @@ static const enum omap_color_mode omap3_dss_supported_color_modes[] = {
static const enum omap_color_mode omap4_dss_supported_color_modes[] = { /* OMAP_DSS_GFX */ - OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 | - OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 | OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_ARGB32 | diff --git a/drivers/gpu/drm/omapdrm/dss/omapdss.h b/drivers/gpu/drm/omapdrm/dss/omapdss.h index 44bf53351e00..cfd6865a0f56 100644 --- a/drivers/gpu/drm/omapdrm/dss/omapdss.h +++ b/drivers/gpu/drm/omapdrm/dss/omapdss.h @@ -93,10 +93,6 @@ enum omap_channel { };
enum omap_color_mode { - OMAP_DSS_COLOR_CLUT1 = 1 << 0, /* BITMAP 1 */ - OMAP_DSS_COLOR_CLUT2 = 1 << 1, /* BITMAP 2 */ - OMAP_DSS_COLOR_CLUT4 = 1 << 2, /* BITMAP 4 */ - OMAP_DSS_COLOR_CLUT8 = 1 << 3, /* BITMAP 8 */ OMAP_DSS_COLOR_RGB12U = 1 << 4, /* RGB12, 16-bit container */ OMAP_DSS_COLOR_ARGB16 = 1 << 5, /* ARGB16 */ OMAP_DSS_COLOR_RGB16 = 1 << 6, /* RGB16 */
Hi Tomi,
Thank you for the patch.
On Thursday 04 May 2017 13:23:19 Tomi Valkeinen wrote:
DSS IP versions 2 and 3 support CLUT modes (color lookup table), but the driver has never supported those. We still have had some code for CLUT modes. As the newer DSS IP versions have dropped CLUT support, we might as well clean up the driver by removing the CLUT related code.
Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com
Reviewed-by: Laurent Pinchart laurent.pinchart@ideasonboard.com
drivers/gpu/drm/omapdrm/dss/dispc.c | 57 ++------------------------ drivers/gpu/drm/omapdrm/dss/dss_features.c | 6 ---- drivers/gpu/drm/omapdrm/dss/omapdss.h | 4 --- 3 files changed, 2 insertions(+), 65 deletions(-)
Use dev_err_ratelimited() when an OCP error happens, to slightly easen the flood.
Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com --- drivers/gpu/drm/omapdrm/omap_irq.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/omapdrm/omap_irq.c b/drivers/gpu/drm/omapdrm/omap_irq.c index 7afe4b90befd..013b0bba712f 100644 --- a/drivers/gpu/drm/omapdrm/omap_irq.c +++ b/drivers/gpu/drm/omapdrm/omap_irq.c @@ -182,12 +182,13 @@ static void omap_irq_fifo_underflow(struct omap_drm_private *priv, pr_cont("(0x%08x)\n", irqstatus); }
-static void omap_irq_ocp_error_handler(u32 irqstatus) +static void omap_irq_ocp_error_handler(struct drm_device *dev, + u32 irqstatus) { if (!(irqstatus & DISPC_IRQ_OCP_ERR)) return;
- DRM_ERROR("OCP error\n"); + dev_err_ratelimited(dev->dev, "OCP error\n"); }
static irqreturn_t omap_irq_handler(int irq, void *arg) @@ -218,7 +219,7 @@ static irqreturn_t omap_irq_handler(int irq, void *arg) omap_crtc_error_irq(crtc, irqstatus); }
- omap_irq_ocp_error_handler(irqstatus); + omap_irq_ocp_error_handler(dev, irqstatus); omap_irq_fifo_underflow(priv, irqstatus);
spin_lock_irqsave(&priv->wait_lock, flags);
Hi Tomi,
Thank you for the patch.
On Thursday 04 May 2017 13:23:20 Tomi Valkeinen wrote:
Use dev_err_ratelimited() when an OCP error happens, to slightly easen the flood.
Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com
Reviewed-by: Laurent Pinchart laurent.pinchart@ideasonboard.com
drivers/gpu/drm/omapdrm/omap_irq.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/omapdrm/omap_irq.c b/drivers/gpu/drm/omapdrm/omap_irq.c index 7afe4b90befd..013b0bba712f 100644 --- a/drivers/gpu/drm/omapdrm/omap_irq.c +++ b/drivers/gpu/drm/omapdrm/omap_irq.c @@ -182,12 +182,13 @@ static void omap_irq_fifo_underflow(struct omap_drm_private *priv, pr_cont("(0x%08x)\n", irqstatus); }
-static void omap_irq_ocp_error_handler(u32 irqstatus) +static void omap_irq_ocp_error_handler(struct drm_device *dev,
- u32 irqstatus)
{ if (!(irqstatus & DISPC_IRQ_OCP_ERR)) return;
- DRM_ERROR("OCP error\n");
- dev_err_ratelimited(dev->dev, "OCP error\n");
}
static irqreturn_t omap_irq_handler(int irq, void *arg) @@ -218,7 +219,7 @@ static irqreturn_t omap_irq_handler(int irq, void *arg) omap_crtc_error_irq(crtc, irqstatus); }
- omap_irq_ocp_error_handler(irqstatus);
omap_irq_ocp_error_handler(dev, irqstatus); omap_irq_fifo_underflow(priv, irqstatus);
spin_lock_irqsave(&priv->wait_lock, flags);
The RFBI driver has not worked nor compiled for many years. There are very few boards out there that use RFBI, and no one has stepped up to fix it.
So let's remove the RFBI code that doesn't even compile.
Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com --- drivers/gpu/drm/omapdrm/dss/Kconfig | 13 - drivers/gpu/drm/omapdrm/dss/Makefile | 1 - drivers/gpu/drm/omapdrm/dss/core.c | 6 - drivers/gpu/drm/omapdrm/dss/dss.h | 4 - drivers/gpu/drm/omapdrm/dss/omapdss.h | 32 - drivers/gpu/drm/omapdrm/dss/rfbi.c | 1083 --------------------------------- 6 files changed, 1139 deletions(-) delete mode 100644 drivers/gpu/drm/omapdrm/dss/rfbi.c
diff --git a/drivers/gpu/drm/omapdrm/dss/Kconfig b/drivers/gpu/drm/omapdrm/dss/Kconfig index f53adb944a0d..8b87d5cf45fc 100644 --- a/drivers/gpu/drm/omapdrm/dss/Kconfig +++ b/drivers/gpu/drm/omapdrm/dss/Kconfig @@ -49,19 +49,6 @@ config OMAP2_DSS_DPI help DPI Interface. This is the Parallel Display Interface.
-config OMAP2_DSS_RFBI - bool "RFBI support" - depends on BROKEN - default n - help - MIPI DBI support (RFBI, Remote Framebuffer Interface, in Texas - Instrument's terminology). - - DBI is a bus between the host processor and a peripheral, - such as a display or a framebuffer chip. - - See http://www.mipi.org/ for DBI specifications. - config OMAP2_DSS_VENC bool "VENC support" default y diff --git a/drivers/gpu/drm/omapdrm/dss/Makefile b/drivers/gpu/drm/omapdrm/dss/Makefile index 75ec30f231c7..688195e448c5 100644 --- a/drivers/gpu/drm/omapdrm/dss/Makefile +++ b/drivers/gpu/drm/omapdrm/dss/Makefile @@ -8,7 +8,6 @@ obj-$(CONFIG_OMAP2_DSS) += omapdss.o omapdss-y := core.o dss.o dss_features.o dispc.o dispc_coefs.o \ pll.o video-pll.o omapdss-$(CONFIG_OMAP2_DSS_DPI) += dpi.o -omapdss-$(CONFIG_OMAP2_DSS_RFBI) += rfbi.o omapdss-$(CONFIG_OMAP2_DSS_VENC) += venc.o omapdss-$(CONFIG_OMAP2_DSS_SDI) += sdi.o omapdss-$(CONFIG_OMAP2_DSS_DSI) += dsi.o diff --git a/drivers/gpu/drm/omapdrm/dss/core.c b/drivers/gpu/drm/omapdrm/dss/core.c index 6a3ebfcd7223..c6024b781f49 100644 --- a/drivers/gpu/drm/omapdrm/dss/core.c +++ b/drivers/gpu/drm/omapdrm/dss/core.c @@ -237,9 +237,6 @@ static int (*dss_output_drv_reg_funcs[])(void) __initdata = { #ifdef CONFIG_OMAP2_DSS_SDI sdi_init_platform_driver, #endif -#ifdef CONFIG_OMAP2_DSS_RFBI - rfbi_init_platform_driver, -#endif #ifdef CONFIG_OMAP2_DSS_VENC venc_init_platform_driver, #endif @@ -261,9 +258,6 @@ static void (*dss_output_drv_unreg_funcs[])(void) = { #ifdef CONFIG_OMAP2_DSS_VENC venc_uninit_platform_driver, #endif -#ifdef CONFIG_OMAP2_DSS_RFBI - rfbi_uninit_platform_driver, -#endif #ifdef CONFIG_OMAP2_DSS_SDI sdi_uninit_platform_driver, #endif diff --git a/drivers/gpu/drm/omapdrm/dss/dss.h b/drivers/gpu/drm/omapdrm/dss/dss.h index 5dd29c98143a..c5bb7b413b81 100644 --- a/drivers/gpu/drm/omapdrm/dss/dss.h +++ b/drivers/gpu/drm/omapdrm/dss/dss.h @@ -389,10 +389,6 @@ void hdmi4_uninit_platform_driver(void); int hdmi5_init_platform_driver(void) __init; void hdmi5_uninit_platform_driver(void);
-/* RFBI */ -int rfbi_init_platform_driver(void) __init; -void rfbi_uninit_platform_driver(void); -
#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS static inline void dss_collect_irq_stats(u32 irqstatus, unsigned *irq_arr) diff --git a/drivers/gpu/drm/omapdrm/dss/omapdss.h b/drivers/gpu/drm/omapdrm/dss/omapdss.h index cfd6865a0f56..33d83f338fa4 100644 --- a/drivers/gpu/drm/omapdrm/dss/omapdss.h +++ b/drivers/gpu/drm/omapdrm/dss/omapdss.h @@ -122,11 +122,6 @@ enum omap_dss_trans_key_type { OMAP_DSS_COLOR_KEY_VID_SRC = 1, };
-enum omap_rfbi_te_mode { - OMAP_DSS_RFBI_TE_MODE_1 = 1, - OMAP_DSS_RFBI_TE_MODE_2 = 2, -}; - enum omap_dss_signal_level { OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH, @@ -216,27 +211,6 @@ enum omap_dss_output_id { OMAP_DSS_OUTPUT_HDMI = 1 << 6, };
-/* RFBI */ - -struct rfbi_timings { - int cs_on_time; - int cs_off_time; - int we_on_time; - int we_off_time; - int re_on_time; - int re_off_time; - int we_cycle_time; - int re_cycle_time; - int cs_pulse_width; - int access_time; - - int clk_div; - - u32 tim[5]; /* set by rfbi_convert_timings() */ - - int converted; -}; - /* DSI */
enum omap_dss_dsi_trans_mode { @@ -633,11 +607,6 @@ struct omap_dss_device { } dpi;
struct { - u8 channel; - u8 data_lines; - } rfbi; - - struct { u8 datapairs; } sdi;
@@ -660,7 +629,6 @@ struct omap_dss_device {
struct { u8 pixel_size; - struct rfbi_timings rfbi_timings; } ctrl;
const char *name; diff --git a/drivers/gpu/drm/omapdrm/dss/rfbi.c b/drivers/gpu/drm/omapdrm/dss/rfbi.c deleted file mode 100644 index 09724757366a..000000000000 --- a/drivers/gpu/drm/omapdrm/dss/rfbi.c +++ /dev/null @@ -1,1083 +0,0 @@ -/* - * linux/drivers/video/omap2/dss/rfbi.c - * - * Copyright (C) 2009 Nokia Corporation - * Author: Tomi Valkeinen tomi.valkeinen@nokia.com - * - * Some code and ideas taken from drivers/video/omap/ driver - * by Imre Deak. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see http://www.gnu.org/licenses/. - */ - -#define DSS_SUBSYS_NAME "RFBI" - -#include <linux/kernel.h> -#include <linux/dma-mapping.h> -#include <linux/export.h> -#include <linux/vmalloc.h> -#include <linux/clk.h> -#include <linux/io.h> -#include <linux/delay.h> -#include <linux/kfifo.h> -#include <linux/ktime.h> -#include <linux/hrtimer.h> -#include <linux/seq_file.h> -#include <linux/semaphore.h> -#include <linux/platform_device.h> -#include <linux/pm_runtime.h> -#include <linux/component.h> - -#include "omapdss.h" -#include "dss.h" - -struct rfbi_reg { u16 idx; }; - -#define RFBI_REG(idx) ((const struct rfbi_reg) { idx }) - -#define RFBI_REVISION RFBI_REG(0x0000) -#define RFBI_SYSCONFIG RFBI_REG(0x0010) -#define RFBI_SYSSTATUS RFBI_REG(0x0014) -#define RFBI_CONTROL RFBI_REG(0x0040) -#define RFBI_PIXEL_CNT RFBI_REG(0x0044) -#define RFBI_LINE_NUMBER RFBI_REG(0x0048) -#define RFBI_CMD RFBI_REG(0x004c) -#define RFBI_PARAM RFBI_REG(0x0050) -#define RFBI_DATA RFBI_REG(0x0054) -#define RFBI_READ RFBI_REG(0x0058) -#define RFBI_STATUS RFBI_REG(0x005c) - -#define RFBI_CONFIG(n) RFBI_REG(0x0060 + (n)*0x18) -#define RFBI_ONOFF_TIME(n) RFBI_REG(0x0064 + (n)*0x18) -#define RFBI_CYCLE_TIME(n) RFBI_REG(0x0068 + (n)*0x18) -#define RFBI_DATA_CYCLE1(n) RFBI_REG(0x006c + (n)*0x18) -#define RFBI_DATA_CYCLE2(n) RFBI_REG(0x0070 + (n)*0x18) -#define RFBI_DATA_CYCLE3(n) RFBI_REG(0x0074 + (n)*0x18) - -#define RFBI_VSYNC_WIDTH RFBI_REG(0x0090) -#define RFBI_HSYNC_WIDTH RFBI_REG(0x0094) - -#define REG_FLD_MOD(idx, val, start, end) \ - rfbi_write_reg(idx, FLD_MOD(rfbi_read_reg(idx), val, start, end)) - -enum omap_rfbi_cycleformat { - OMAP_DSS_RFBI_CYCLEFORMAT_1_1 = 0, - OMAP_DSS_RFBI_CYCLEFORMAT_2_1 = 1, - OMAP_DSS_RFBI_CYCLEFORMAT_3_1 = 2, - OMAP_DSS_RFBI_CYCLEFORMAT_3_2 = 3, -}; - -enum omap_rfbi_datatype { - OMAP_DSS_RFBI_DATATYPE_12 = 0, - OMAP_DSS_RFBI_DATATYPE_16 = 1, - OMAP_DSS_RFBI_DATATYPE_18 = 2, - OMAP_DSS_RFBI_DATATYPE_24 = 3, -}; - -enum omap_rfbi_parallelmode { - OMAP_DSS_RFBI_PARALLELMODE_8 = 0, - OMAP_DSS_RFBI_PARALLELMODE_9 = 1, - OMAP_DSS_RFBI_PARALLELMODE_12 = 2, - OMAP_DSS_RFBI_PARALLELMODE_16 = 3, -}; - -static int rfbi_convert_timings(struct rfbi_timings *t); -static void rfbi_get_clk_info(u32 *clk_period, u32 *max_clk_div); - -static struct { - struct platform_device *pdev; - void __iomem *base; - - unsigned long l4_khz; - - enum omap_rfbi_datatype datatype; - enum omap_rfbi_parallelmode parallelmode; - - enum omap_rfbi_te_mode te_mode; - int te_enabled; - - void (*framedone_callback)(void *data); - void *framedone_callback_data; - - struct omap_dss_device *dssdev[2]; - - struct semaphore bus_lock; - - struct videomode vm; - int pixel_size; - int data_lines; - struct rfbi_timings intf_timings; - - struct omap_dss_device output; -} rfbi; - -static inline void rfbi_write_reg(const struct rfbi_reg idx, u32 val) -{ - __raw_writel(val, rfbi.base + idx.idx); -} - -static inline u32 rfbi_read_reg(const struct rfbi_reg idx) -{ - return __raw_readl(rfbi.base + idx.idx); -} - -static int rfbi_runtime_get(void) -{ - int r; - - DSSDBG("rfbi_runtime_get\n"); - - r = pm_runtime_get_sync(&rfbi.pdev->dev); - WARN_ON(r < 0); - return r < 0 ? r : 0; -} - -static void rfbi_runtime_put(void) -{ - int r; - - DSSDBG("rfbi_runtime_put\n"); - - r = pm_runtime_put_sync(&rfbi.pdev->dev); - WARN_ON(r < 0 && r != -ENOSYS); -} - -static void rfbi_bus_lock(void) -{ - down(&rfbi.bus_lock); -} - -static void rfbi_bus_unlock(void) -{ - up(&rfbi.bus_lock); -} - -static void rfbi_write_command(const void *buf, u32 len) -{ - switch (rfbi.parallelmode) { - case OMAP_DSS_RFBI_PARALLELMODE_8: - { - const u8 *b = buf; - for (; len; len--) - rfbi_write_reg(RFBI_CMD, *b++); - break; - } - - case OMAP_DSS_RFBI_PARALLELMODE_16: - { - const u16 *w = buf; - BUG_ON(len & 1); - for (; len; len -= 2) - rfbi_write_reg(RFBI_CMD, *w++); - break; - } - - case OMAP_DSS_RFBI_PARALLELMODE_9: - case OMAP_DSS_RFBI_PARALLELMODE_12: - default: - BUG(); - } -} - -static void rfbi_read_data(void *buf, u32 len) -{ - switch (rfbi.parallelmode) { - case OMAP_DSS_RFBI_PARALLELMODE_8: - { - u8 *b = buf; - for (; len; len--) { - rfbi_write_reg(RFBI_READ, 0); - *b++ = rfbi_read_reg(RFBI_READ); - } - break; - } - - case OMAP_DSS_RFBI_PARALLELMODE_16: - { - u16 *w = buf; - BUG_ON(len & ~1); - for (; len; len -= 2) { - rfbi_write_reg(RFBI_READ, 0); - *w++ = rfbi_read_reg(RFBI_READ); - } - break; - } - - case OMAP_DSS_RFBI_PARALLELMODE_9: - case OMAP_DSS_RFBI_PARALLELMODE_12: - default: - BUG(); - } -} - -static void rfbi_write_data(const void *buf, u32 len) -{ - switch (rfbi.parallelmode) { - case OMAP_DSS_RFBI_PARALLELMODE_8: - { - const u8 *b = buf; - for (; len; len--) - rfbi_write_reg(RFBI_PARAM, *b++); - break; - } - - case OMAP_DSS_RFBI_PARALLELMODE_16: - { - const u16 *w = buf; - BUG_ON(len & 1); - for (; len; len -= 2) - rfbi_write_reg(RFBI_PARAM, *w++); - break; - } - - case OMAP_DSS_RFBI_PARALLELMODE_9: - case OMAP_DSS_RFBI_PARALLELMODE_12: - default: - BUG(); - - } -} - -static void rfbi_write_pixels(const void __iomem *buf, int scr_width, - u16 x, u16 y, - u16 w, u16 h) -{ - int start_offset = scr_width * y + x; - int horiz_offset = scr_width - w; - int i; - - if (rfbi.datatype == OMAP_DSS_RFBI_DATATYPE_16 && - rfbi.parallelmode == OMAP_DSS_RFBI_PARALLELMODE_8) { - const u16 __iomem *pd = buf; - pd += start_offset; - - for (; h; --h) { - for (i = 0; i < w; ++i) { - const u8 __iomem *b = (const u8 __iomem *)pd; - rfbi_write_reg(RFBI_PARAM, __raw_readb(b+1)); - rfbi_write_reg(RFBI_PARAM, __raw_readb(b+0)); - ++pd; - } - pd += horiz_offset; - } - } else if (rfbi.datatype == OMAP_DSS_RFBI_DATATYPE_24 && - rfbi.parallelmode == OMAP_DSS_RFBI_PARALLELMODE_8) { - const u32 __iomem *pd = buf; - pd += start_offset; - - for (; h; --h) { - for (i = 0; i < w; ++i) { - const u8 __iomem *b = (const u8 __iomem *)pd; - rfbi_write_reg(RFBI_PARAM, __raw_readb(b+2)); - rfbi_write_reg(RFBI_PARAM, __raw_readb(b+1)); - rfbi_write_reg(RFBI_PARAM, __raw_readb(b+0)); - ++pd; - } - pd += horiz_offset; - } - } else if (rfbi.datatype == OMAP_DSS_RFBI_DATATYPE_16 && - rfbi.parallelmode == OMAP_DSS_RFBI_PARALLELMODE_16) { - const u16 __iomem *pd = buf; - pd += start_offset; - - for (; h; --h) { - for (i = 0; i < w; ++i) { - rfbi_write_reg(RFBI_PARAM, __raw_readw(pd)); - ++pd; - } - pd += horiz_offset; - } - } else { - BUG(); - } -} - -static int rfbi_transfer_area(struct omap_dss_device *dssdev, - void (*callback)(void *data), void *data) -{ - u32 l; - int r; - struct omap_overlay_manager *mgr = rfbi.output.manager; - u16 width = rfbi.vm.hactive; - u16 height = rfbi.vm.vactive; - - /*BUG_ON(callback == 0);*/ - BUG_ON(rfbi.framedone_callback != NULL); - - DSSDBG("rfbi_transfer_area %dx%d\n", width, height); - - dss_mgr_set_timings(mgr, &rfbi.vm); - - r = dss_mgr_enable(mgr); - if (r) - return r; - - rfbi.framedone_callback = callback; - rfbi.framedone_callback_data = data; - - rfbi_write_reg(RFBI_PIXEL_CNT, width * height); - - l = rfbi_read_reg(RFBI_CONTROL); - l = FLD_MOD(l, 1, 0, 0); /* enable */ - if (!rfbi.te_enabled) - l = FLD_MOD(l, 1, 4, 4); /* ITE */ - - rfbi_write_reg(RFBI_CONTROL, l); - - return 0; -} - -static void framedone_callback(void *data) -{ - void (*callback)(void *data); - - DSSDBG("FRAMEDONE\n"); - - REG_FLD_MOD(RFBI_CONTROL, 0, 0, 0); - - callback = rfbi.framedone_callback; - rfbi.framedone_callback = NULL; - - if (callback != NULL) - callback(rfbi.framedone_callback_data); -} - -#if 1 /* VERBOSE */ -static void rfbi_print_timings(void) -{ - u32 l; - u32 time; - - l = rfbi_read_reg(RFBI_CONFIG(0)); - time = 1000000000 / rfbi.l4_khz; - if (l & (1 << 4)) - time *= 2; - - DSSDBG("Tick time %u ps\n", time); - l = rfbi_read_reg(RFBI_ONOFF_TIME(0)); - DSSDBG("CSONTIME %d, CSOFFTIME %d, WEONTIME %d, WEOFFTIME %d, " - "REONTIME %d, REOFFTIME %d\n", - l & 0x0f, (l >> 4) & 0x3f, (l >> 10) & 0x0f, (l >> 14) & 0x3f, - (l >> 20) & 0x0f, (l >> 24) & 0x3f); - - l = rfbi_read_reg(RFBI_CYCLE_TIME(0)); - DSSDBG("WECYCLETIME %d, RECYCLETIME %d, CSPULSEWIDTH %d, " - "ACCESSTIME %d\n", - (l & 0x3f), (l >> 6) & 0x3f, (l >> 12) & 0x3f, - (l >> 22) & 0x3f); -} -#else -static void rfbi_print_timings(void) {} -#endif - - - - -static u32 extif_clk_period; - -static inline unsigned long round_to_extif_ticks(unsigned long ps, int div) -{ - int bus_tick = extif_clk_period * div; - return (ps + bus_tick - 1) / bus_tick * bus_tick; -} - -static int calc_reg_timing(struct rfbi_timings *t, int div) -{ - t->clk_div = div; - - t->cs_on_time = round_to_extif_ticks(t->cs_on_time, div); - - t->we_on_time = round_to_extif_ticks(t->we_on_time, div); - t->we_off_time = round_to_extif_ticks(t->we_off_time, div); - t->we_cycle_time = round_to_extif_ticks(t->we_cycle_time, div); - - t->re_on_time = round_to_extif_ticks(t->re_on_time, div); - t->re_off_time = round_to_extif_ticks(t->re_off_time, div); - t->re_cycle_time = round_to_extif_ticks(t->re_cycle_time, div); - - t->access_time = round_to_extif_ticks(t->access_time, div); - t->cs_off_time = round_to_extif_ticks(t->cs_off_time, div); - t->cs_pulse_width = round_to_extif_ticks(t->cs_pulse_width, div); - - DSSDBG("[reg]cson %d csoff %d reon %d reoff %d\n", - t->cs_on_time, t->cs_off_time, t->re_on_time, t->re_off_time); - DSSDBG("[reg]weon %d weoff %d recyc %d wecyc %d\n", - t->we_on_time, t->we_off_time, t->re_cycle_time, - t->we_cycle_time); - DSSDBG("[reg]rdaccess %d cspulse %d\n", - t->access_time, t->cs_pulse_width); - - return rfbi_convert_timings(t); -} - -static int calc_extif_timings(struct rfbi_timings *t) -{ - u32 max_clk_div; - int div; - - rfbi_get_clk_info(&extif_clk_period, &max_clk_div); - for (div = 1; div <= max_clk_div; div++) { - if (calc_reg_timing(t, div) == 0) - break; - } - - if (div <= max_clk_div) - return 0; - - DSSERR("can't setup timings\n"); - return -1; -} - - -static void rfbi_set_timings(int rfbi_module, struct rfbi_timings *t) -{ - int r; - - if (!t->converted) { - r = calc_extif_timings(t); - if (r < 0) - DSSERR("Failed to calc timings\n"); - } - - BUG_ON(!t->converted); - - rfbi_write_reg(RFBI_ONOFF_TIME(rfbi_module), t->tim[0]); - rfbi_write_reg(RFBI_CYCLE_TIME(rfbi_module), t->tim[1]); - - /* TIMEGRANULARITY */ - REG_FLD_MOD(RFBI_CONFIG(rfbi_module), - (t->tim[2] ? 1 : 0), 4, 4); - - rfbi_print_timings(); -} - -static int ps_to_rfbi_ticks(int time, int div) -{ - unsigned long tick_ps; - int ret; - - /* Calculate in picosecs to yield more exact results */ - tick_ps = 1000000000 / (rfbi.l4_khz) * div; - - ret = (time + tick_ps - 1) / tick_ps; - - return ret; -} - -static void rfbi_get_clk_info(u32 *clk_period, u32 *max_clk_div) -{ - *clk_period = 1000000000 / rfbi.l4_khz; - *max_clk_div = 2; -} - -static int rfbi_convert_timings(struct rfbi_timings *t) -{ - u32 l; - int reon, reoff, weon, weoff, cson, csoff, cs_pulse; - int actim, recyc, wecyc; - int div = t->clk_div; - - if (div <= 0 || div > 2) - return -1; - - /* Make sure that after conversion it still holds that: - * weoff > weon, reoff > reon, recyc >= reoff, wecyc >= weoff, - * csoff > cson, csoff >= max(weoff, reoff), actim > reon - */ - weon = ps_to_rfbi_ticks(t->we_on_time, div); - weoff = ps_to_rfbi_ticks(t->we_off_time, div); - if (weoff <= weon) - weoff = weon + 1; - if (weon > 0x0f) - return -1; - if (weoff > 0x3f) - return -1; - - reon = ps_to_rfbi_ticks(t->re_on_time, div); - reoff = ps_to_rfbi_ticks(t->re_off_time, div); - if (reoff <= reon) - reoff = reon + 1; - if (reon > 0x0f) - return -1; - if (reoff > 0x3f) - return -1; - - cson = ps_to_rfbi_ticks(t->cs_on_time, div); - csoff = ps_to_rfbi_ticks(t->cs_off_time, div); - if (csoff <= cson) - csoff = cson + 1; - if (csoff < max(weoff, reoff)) - csoff = max(weoff, reoff); - if (cson > 0x0f) - return -1; - if (csoff > 0x3f) - return -1; - - l = cson; - l |= csoff << 4; - l |= weon << 10; - l |= weoff << 14; - l |= reon << 20; - l |= reoff << 24; - - t->tim[0] = l; - - actim = ps_to_rfbi_ticks(t->access_time, div); - if (actim <= reon) - actim = reon + 1; - if (actim > 0x3f) - return -1; - - wecyc = ps_to_rfbi_ticks(t->we_cycle_time, div); - if (wecyc < weoff) - wecyc = weoff; - if (wecyc > 0x3f) - return -1; - - recyc = ps_to_rfbi_ticks(t->re_cycle_time, div); - if (recyc < reoff) - recyc = reoff; - if (recyc > 0x3f) - return -1; - - cs_pulse = ps_to_rfbi_ticks(t->cs_pulse_width, div); - if (cs_pulse > 0x3f) - return -1; - - l = wecyc; - l |= recyc << 6; - l |= cs_pulse << 12; - l |= actim << 22; - - t->tim[1] = l; - - t->tim[2] = div - 1; - - t->converted = 1; - - return 0; -} - -/* xxx FIX module selection missing */ -static int rfbi_setup_te(enum omap_rfbi_te_mode mode, - unsigned hs_pulse_time, unsigned vs_pulse_time, - int hs_pol_inv, int vs_pol_inv, int extif_div) -{ - int hs, vs; - int min; - u32 l; - - hs = ps_to_rfbi_ticks(hs_pulse_time, 1); - vs = ps_to_rfbi_ticks(vs_pulse_time, 1); - if (hs < 2) - return -EDOM; - if (mode == OMAP_DSS_RFBI_TE_MODE_2) - min = 2; - else /* OMAP_DSS_RFBI_TE_MODE_1 */ - min = 4; - if (vs < min) - return -EDOM; - if (vs == hs) - return -EINVAL; - rfbi.te_mode = mode; - DSSDBG("setup_te: mode %d hs %d vs %d hs_inv %d vs_inv %d\n", - mode, hs, vs, hs_pol_inv, vs_pol_inv); - - rfbi_write_reg(RFBI_HSYNC_WIDTH, hs); - rfbi_write_reg(RFBI_VSYNC_WIDTH, vs); - - l = rfbi_read_reg(RFBI_CONFIG(0)); - if (hs_pol_inv) - l &= ~(1 << 21); - else - l |= 1 << 21; - if (vs_pol_inv) - l &= ~(1 << 20); - else - l |= 1 << 20; - - return 0; -} - -/* xxx FIX module selection missing */ -static int rfbi_enable_te(bool enable, unsigned line) -{ - u32 l; - - DSSDBG("te %d line %d mode %d\n", enable, line, rfbi.te_mode); - if (line > (1 << 11) - 1) - return -EINVAL; - - l = rfbi_read_reg(RFBI_CONFIG(0)); - l &= ~(0x3 << 2); - if (enable) { - rfbi.te_enabled = 1; - l |= rfbi.te_mode << 2; - } else - rfbi.te_enabled = 0; - rfbi_write_reg(RFBI_CONFIG(0), l); - rfbi_write_reg(RFBI_LINE_NUMBER, line); - - return 0; -} - -static int rfbi_configure_bus(int rfbi_module, int bpp, int lines) -{ - u32 l; - int cycle1 = 0, cycle2 = 0, cycle3 = 0; - enum omap_rfbi_cycleformat cycleformat; - enum omap_rfbi_datatype datatype; - enum omap_rfbi_parallelmode parallelmode; - - switch (bpp) { - case 12: - datatype = OMAP_DSS_RFBI_DATATYPE_12; - break; - case 16: - datatype = OMAP_DSS_RFBI_DATATYPE_16; - break; - case 18: - datatype = OMAP_DSS_RFBI_DATATYPE_18; - break; - case 24: - datatype = OMAP_DSS_RFBI_DATATYPE_24; - break; - default: - BUG(); - return 1; - } - rfbi.datatype = datatype; - - switch (lines) { - case 8: - parallelmode = OMAP_DSS_RFBI_PARALLELMODE_8; - break; - case 9: - parallelmode = OMAP_DSS_RFBI_PARALLELMODE_9; - break; - case 12: - parallelmode = OMAP_DSS_RFBI_PARALLELMODE_12; - break; - case 16: - parallelmode = OMAP_DSS_RFBI_PARALLELMODE_16; - break; - default: - BUG(); - return 1; - } - rfbi.parallelmode = parallelmode; - - if ((bpp % lines) == 0) { - switch (bpp / lines) { - case 1: - cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_1_1; - break; - case 2: - cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_2_1; - break; - case 3: - cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_3_1; - break; - default: - BUG(); - return 1; - } - } else if ((2 * bpp % lines) == 0) { - if ((2 * bpp / lines) == 3) - cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_3_2; - else { - BUG(); - return 1; - } - } else { - BUG(); - return 1; - } - - switch (cycleformat) { - case OMAP_DSS_RFBI_CYCLEFORMAT_1_1: - cycle1 = lines; - break; - - case OMAP_DSS_RFBI_CYCLEFORMAT_2_1: - cycle1 = lines; - cycle2 = lines; - break; - - case OMAP_DSS_RFBI_CYCLEFORMAT_3_1: - cycle1 = lines; - cycle2 = lines; - cycle3 = lines; - break; - - case OMAP_DSS_RFBI_CYCLEFORMAT_3_2: - cycle1 = lines; - cycle2 = (lines / 2) | ((lines / 2) << 16); - cycle3 = (lines << 16); - break; - } - - REG_FLD_MOD(RFBI_CONTROL, 0, 3, 2); /* clear CS */ - - l = 0; - l |= FLD_VAL(parallelmode, 1, 0); - l |= FLD_VAL(0, 3, 2); /* TRIGGERMODE: ITE */ - l |= FLD_VAL(0, 4, 4); /* TIMEGRANULARITY */ - l |= FLD_VAL(datatype, 6, 5); - /* l |= FLD_VAL(2, 8, 7); */ /* L4FORMAT, 2pix/L4 */ - l |= FLD_VAL(0, 8, 7); /* L4FORMAT, 1pix/L4 */ - l |= FLD_VAL(cycleformat, 10, 9); - l |= FLD_VAL(0, 12, 11); /* UNUSEDBITS */ - l |= FLD_VAL(0, 16, 16); /* A0POLARITY */ - l |= FLD_VAL(0, 17, 17); /* REPOLARITY */ - l |= FLD_VAL(0, 18, 18); /* WEPOLARITY */ - l |= FLD_VAL(0, 19, 19); /* CSPOLARITY */ - l |= FLD_VAL(1, 20, 20); /* TE_VSYNC_POLARITY */ - l |= FLD_VAL(1, 21, 21); /* HSYNCPOLARITY */ - rfbi_write_reg(RFBI_CONFIG(rfbi_module), l); - - rfbi_write_reg(RFBI_DATA_CYCLE1(rfbi_module), cycle1); - rfbi_write_reg(RFBI_DATA_CYCLE2(rfbi_module), cycle2); - rfbi_write_reg(RFBI_DATA_CYCLE3(rfbi_module), cycle3); - - - l = rfbi_read_reg(RFBI_CONTROL); - l = FLD_MOD(l, rfbi_module+1, 3, 2); /* Select CSx */ - l = FLD_MOD(l, 0, 1, 1); /* clear bypass */ - rfbi_write_reg(RFBI_CONTROL, l); - - - DSSDBG("RFBI config: bpp %d, lines %d, cycles: 0x%x 0x%x 0x%x\n", - bpp, lines, cycle1, cycle2, cycle3); - - return 0; -} - -static int rfbi_configure(struct omap_dss_device *dssdev) -{ - return rfbi_configure_bus(dssdev->phy.rfbi.channel, rfbi.pixel_size, - rfbi.data_lines); -} - -static int rfbi_update(struct omap_dss_device *dssdev, void (*callback)(void *), - void *data) -{ - return rfbi_transfer_area(dssdev, callback, data); -} - -static void rfbi_set_size(struct omap_dss_device *dssdev, u16 w, u16 h) -{ - rfbi.vm.hactive = w; - rfbi.vm.vactive = h; -} - -static void rfbi_set_pixel_size(struct omap_dss_device *dssdev, int pixel_size) -{ - rfbi.pixel_size = pixel_size; -} - -static void rfbi_set_data_lines(struct omap_dss_device *dssdev, int data_lines) -{ - rfbi.data_lines = data_lines; -} - -static void rfbi_set_interface_timings(struct omap_dss_device *dssdev, - struct rfbi_timings *timings) -{ - rfbi.intf_timings = *timings; -} - -static void rfbi_dump_regs(struct seq_file *s) -{ -#define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, rfbi_read_reg(r)) - - if (rfbi_runtime_get()) - return; - - DUMPREG(RFBI_REVISION); - DUMPREG(RFBI_SYSCONFIG); - DUMPREG(RFBI_SYSSTATUS); - DUMPREG(RFBI_CONTROL); - DUMPREG(RFBI_PIXEL_CNT); - DUMPREG(RFBI_LINE_NUMBER); - DUMPREG(RFBI_CMD); - DUMPREG(RFBI_PARAM); - DUMPREG(RFBI_DATA); - DUMPREG(RFBI_READ); - DUMPREG(RFBI_STATUS); - - DUMPREG(RFBI_CONFIG(0)); - DUMPREG(RFBI_ONOFF_TIME(0)); - DUMPREG(RFBI_CYCLE_TIME(0)); - DUMPREG(RFBI_DATA_CYCLE1(0)); - DUMPREG(RFBI_DATA_CYCLE2(0)); - DUMPREG(RFBI_DATA_CYCLE3(0)); - - DUMPREG(RFBI_CONFIG(1)); - DUMPREG(RFBI_ONOFF_TIME(1)); - DUMPREG(RFBI_CYCLE_TIME(1)); - DUMPREG(RFBI_DATA_CYCLE1(1)); - DUMPREG(RFBI_DATA_CYCLE2(1)); - DUMPREG(RFBI_DATA_CYCLE3(1)); - - DUMPREG(RFBI_VSYNC_WIDTH); - DUMPREG(RFBI_HSYNC_WIDTH); - - rfbi_runtime_put(); -#undef DUMPREG -} - -static void rfbi_config_lcd_manager(struct omap_dss_device *dssdev) -{ - struct omap_overlay_manager *mgr = rfbi.output.manager; - struct dss_lcd_mgr_config mgr_config; - - mgr_config.io_pad_mode = DSS_IO_PAD_MODE_RFBI; - - mgr_config.stallmode = true; - /* Do we need fifohandcheck for RFBI? */ - mgr_config.fifohandcheck = false; - - mgr_config.video_port_width = rfbi.pixel_size; - mgr_config.lcden_sig_polarity = 0; - - dss_mgr_set_lcd_config(mgr, &mgr_config); - - /* - * Set rfbi.timings with default values, the hactive and vactive fields - * are expected to be already configured by the panel driver via - * omapdss_rfbi_set_size() - */ - rfbi.vm.hsync_len = 1; - rfbi.vm.hfront_porch = 1; - rfbi.vm.hback_porch = 1; - rfbi.vm.vsync_len = 1; - rfbi.vm.vfront_porch = 0; - rfbi.vm.vback_porch = 0; - - rfbi.vm.flags &= ~DISPLAY_FLAGS_INTERLACED; - rfbi.vm.flags &= ~DISPLAY_FLAGS_HSYNC_LOW; - rfbi.vm.flags |= DISPLAY_FLAGS_HSYNC_HIGH; - rfbi.vm.flags &= ~DISPLAY_FLAGS_VSYNC_LOW; - rfbi.vm.flags |= DISPLAY_FLAGS_VSYNC_HIGH; - rfbi.vm.flags &= ~DISPLAY_FLAGS_PIXDATA_NEGEDGE; - rfbi.vm.flags |= DISPLAY_FLAGS_PIXDATA_POSEDGE; - rfbi.vm.flags &= ~DISPLAY_FLAGS_DE_LOW; - rfbi.vm.flags |= DISPLAY_FLAGS_DE_HIGH; - rfbi.vm.flags &= ~DISPLAY_FLAGS_SYNC_POSEDGE; - rfbi.vm.flags |= DISPLAY_FLAGS_SYNC_NEGEDGE; - - dss_mgr_set_timings(mgr, &rfbi.vm); -} - -static int rfbi_display_enable(struct omap_dss_device *dssdev) -{ - struct omap_dss_device *out = &rfbi.output; - int r; - - if (!out->dispc_channel_connected) { - DSSERR("failed to enable display: no output/manager\n"); - return -ENODEV; - } - - r = rfbi_runtime_get(); - if (r) - return r; - - r = dss_mgr_register_framedone_handler(out->manager, - framedone_callback, NULL); - if (r) { - DSSERR("can't get FRAMEDONE irq\n"); - goto err1; - } - - rfbi_config_lcd_manager(dssdev); - - rfbi_configure_bus(dssdev->phy.rfbi.channel, rfbi.pixel_size, - rfbi.data_lines); - - rfbi_set_timings(dssdev->phy.rfbi.channel, &rfbi.intf_timings); - - return 0; -err1: - rfbi_runtime_put(); - return r; -} - -static void rfbi_display_disable(struct omap_dss_device *dssdev) -{ - struct omap_dss_device *out = &rfbi.output; - - dss_mgr_unregister_framedone_handler(out->manager, - framedone_callback, NULL); - - rfbi_runtime_put(); -} - -static int rfbi_init_display(struct omap_dss_device *dssdev) -{ - rfbi.dssdev[dssdev->phy.rfbi.channel] = dssdev; - return 0; -} - -static void rfbi_init_output(struct platform_device *pdev) -{ - struct omap_dss_device *out = &rfbi.output; - - out->dev = &pdev->dev; - out->id = OMAP_DSS_OUTPUT_DBI; - out->output_type = OMAP_DISPLAY_TYPE_DBI; - out->name = "rfbi.0"; - out->dispc_channel = OMAP_DSS_CHANNEL_LCD; - out->owner = THIS_MODULE; - - omapdss_register_output(out); -} - -static void rfbi_uninit_output(struct platform_device *pdev) -{ - struct omap_dss_device *out = &rfbi.output; - - omapdss_unregister_output(out); -} - -/* RFBI HW IP initialisation */ -static int rfbi_bind(struct device *dev, struct device *master, void *data) -{ - struct platform_device *pdev = to_platform_device(dev); - u32 rev; - struct resource *rfbi_mem; - struct clk *clk; - int r; - - rfbi.pdev = pdev; - - sema_init(&rfbi.bus_lock, 1); - - rfbi_mem = platform_get_resource(rfbi.pdev, IORESOURCE_MEM, 0); - if (!rfbi_mem) { - DSSERR("can't get IORESOURCE_MEM RFBI\n"); - return -EINVAL; - } - - rfbi.base = devm_ioremap(&pdev->dev, rfbi_mem->start, - resource_size(rfbi_mem)); - if (!rfbi.base) { - DSSERR("can't ioremap RFBI\n"); - return -ENOMEM; - } - - clk = clk_get(&pdev->dev, "ick"); - if (IS_ERR(clk)) { - DSSERR("can't get ick\n"); - return PTR_ERR(clk); - } - - rfbi.l4_khz = clk_get_rate(clk) / 1000; - - clk_put(clk); - - pm_runtime_enable(&pdev->dev); - - r = rfbi_runtime_get(); - if (r) - goto err_runtime_get; - - msleep(10); - - rev = rfbi_read_reg(RFBI_REVISION); - dev_dbg(&pdev->dev, "OMAP RFBI rev %d.%d\n", - FLD_GET(rev, 7, 4), FLD_GET(rev, 3, 0)); - - rfbi_runtime_put(); - - dss_debugfs_create_file("rfbi", rfbi_dump_regs); - - rfbi_init_output(pdev); - - return 0; - -err_runtime_get: - pm_runtime_disable(&pdev->dev); - return r; -} - -static void rfbi_unbind(struct device *dev, struct device *master, void *data) -{ - struct platform_device *pdev = to_platform_device(dev); - - rfbi_uninit_output(pdev); - - pm_runtime_disable(&pdev->dev); - - return 0; -} - -static const struct component_ops rfbi_component_ops = { - .bind = rfbi_bind, - .unbind = rfbi_unbind, -}; - -static int rfbi_probe(struct platform_device *pdev) -{ - return component_add(&pdev->dev, &rfbi_component_ops); -} - -static int rfbi_remove(struct platform_device *pdev) -{ - component_del(&pdev->dev, &rfbi_component_ops); - return 0; -} - -static int rfbi_runtime_suspend(struct device *dev) -{ - dispc_runtime_put(); - - return 0; -} - -static int rfbi_runtime_resume(struct device *dev) -{ - int r; - - r = dispc_runtime_get(); - if (r < 0) - return r; - - return 0; -} - -static const struct dev_pm_ops rfbi_pm_ops = { - .runtime_suspend = rfbi_runtime_suspend, - .runtime_resume = rfbi_runtime_resume, -}; - -static struct platform_driver omap_rfbihw_driver = { - .probe = rfbi_probe, - .remove = rfbi_remove, - .driver = { - .name = "omapdss_rfbi", - .pm = &rfbi_pm_ops, - .suppress_bind_attrs = true, - }, -}; - -int __init rfbi_init_platform_driver(void) -{ - return platform_driver_register(&omap_rfbihw_driver); -} - -void rfbi_uninit_platform_driver(void) -{ - platform_driver_unregister(&omap_rfbihw_driver); -}
We have three rotation methods supported by the SoCs with DSS: DMA, VRFB and TILER.
DMA rotation works in theory on all DSS platforms, but in practice it's unusable due to the huge amount of memory bandwidth it uses, and has never really been used.
VRFB is available on OMAP3, but is not supported by omapdrm, even though we have some code for it in the dispc driver.
TILER is supported on OMAP4/OMAP5/DRA7/AM5 platforms, but has some driver bugs.
To clean up the driver to help fixing the TILER issues, this patch drops the DMA and VRFB rotation support, leaving only TILER rotation.
Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com --- drivers/gpu/drm/omapdrm/dss/dispc.c | 248 +---------------------------- drivers/gpu/drm/omapdrm/dss/dss_features.c | 16 -- drivers/gpu/drm/omapdrm/dss/dss_features.h | 2 - drivers/gpu/drm/omapdrm/dss/omapdss.h | 5 +- drivers/gpu/drm/omapdrm/omap_fb.c | 2 +- drivers/gpu/drm/omapdrm/omap_plane.c | 2 +- 6 files changed, 10 insertions(+), 265 deletions(-)
diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c b/drivers/gpu/drm/omapdrm/dss/dispc.c index 5990c9199f31..4d335bf5e4d3 100644 --- a/drivers/gpu/drm/omapdrm/dss/dispc.c +++ b/drivers/gpu/drm/omapdrm/dss/dispc.c @@ -1908,230 +1908,7 @@ static s32 pixinc(int pixels, u8 ps) return 0; }
-static void calc_vrfb_rotation_offset(u8 rotation, bool mirror, - u16 screen_width, - u16 width, u16 height, - enum omap_color_mode color_mode, bool fieldmode, - unsigned int field_offset, - unsigned *offset0, unsigned *offset1, - s32 *row_inc, s32 *pix_inc, int x_predecim, int y_predecim) -{ - u8 ps; - - switch (color_mode) { - case OMAP_DSS_COLOR_YUV2: - case OMAP_DSS_COLOR_UYVY: - ps = 4; - break; - default: - ps = color_mode_to_bpp(color_mode) / 8; - break; - } - - DSSDBG("calc_rot(%d): scrw %d, %dx%d\n", rotation, screen_width, - width, height); - - /* - * field 0 = even field = bottom field - * field 1 = odd field = top field - */ - switch (rotation + mirror * 4) { - case OMAP_DSS_ROT_0: - case OMAP_DSS_ROT_180: - /* - * If the pixel format is YUV or UYVY divide the width - * of the image by 2 for 0 and 180 degree rotation. - */ - if (color_mode == OMAP_DSS_COLOR_YUV2 || - color_mode == OMAP_DSS_COLOR_UYVY) - width = width >> 1; - case OMAP_DSS_ROT_90: - case OMAP_DSS_ROT_270: - *offset1 = 0; - if (field_offset) - *offset0 = field_offset * screen_width * ps; - else - *offset0 = 0; - - *row_inc = pixinc(1 + - (y_predecim * screen_width - x_predecim * width) + - (fieldmode ? screen_width : 0), ps); - *pix_inc = pixinc(x_predecim, ps); - break; - - case OMAP_DSS_ROT_0 + 4: - case OMAP_DSS_ROT_180 + 4: - /* If the pixel format is YUV or UYVY divide the width - * of the image by 2 for 0 degree and 180 degree - */ - if (color_mode == OMAP_DSS_COLOR_YUV2 || - color_mode == OMAP_DSS_COLOR_UYVY) - width = width >> 1; - case OMAP_DSS_ROT_90 + 4: - case OMAP_DSS_ROT_270 + 4: - *offset1 = 0; - if (field_offset) - *offset0 = field_offset * screen_width * ps; - else - *offset0 = 0; - *row_inc = pixinc(1 - - (y_predecim * screen_width + x_predecim * width) - - (fieldmode ? screen_width : 0), ps); - *pix_inc = pixinc(x_predecim, ps); - break; - - default: - BUG(); - return; - } -} - -static void calc_dma_rotation_offset(u8 rotation, bool mirror, - u16 screen_width, - u16 width, u16 height, - enum omap_color_mode color_mode, bool fieldmode, - unsigned int field_offset, - unsigned *offset0, unsigned *offset1, - s32 *row_inc, s32 *pix_inc, int x_predecim, int y_predecim) -{ - u8 ps; - u16 fbw, fbh; - - ps = color_mode_to_bpp(color_mode) / 8; - - DSSDBG("calc_rot(%d): scrw %d, %dx%d\n", rotation, screen_width, - width, height); - - /* width & height are overlay sizes, convert to fb sizes */ - - if (rotation == OMAP_DSS_ROT_0 || rotation == OMAP_DSS_ROT_180) { - fbw = width; - fbh = height; - } else { - fbw = height; - fbh = width; - } - - /* - * field 0 = even field = bottom field - * field 1 = odd field = top field - */ - switch (rotation + mirror * 4) { - case OMAP_DSS_ROT_0: - *offset1 = 0; - if (field_offset) - *offset0 = *offset1 + field_offset * screen_width * ps; - else - *offset0 = *offset1; - *row_inc = pixinc(1 + - (y_predecim * screen_width - fbw * x_predecim) + - (fieldmode ? screen_width : 0), ps); - if (color_mode == OMAP_DSS_COLOR_YUV2 || - color_mode == OMAP_DSS_COLOR_UYVY) - *pix_inc = pixinc(x_predecim, 2 * ps); - else - *pix_inc = pixinc(x_predecim, ps); - break; - case OMAP_DSS_ROT_90: - *offset1 = screen_width * (fbh - 1) * ps; - if (field_offset) - *offset0 = *offset1 + field_offset * ps; - else - *offset0 = *offset1; - *row_inc = pixinc(screen_width * (fbh * x_predecim - 1) + - y_predecim + (fieldmode ? 1 : 0), ps); - *pix_inc = pixinc(-x_predecim * screen_width, ps); - break; - case OMAP_DSS_ROT_180: - *offset1 = (screen_width * (fbh - 1) + fbw - 1) * ps; - if (field_offset) - *offset0 = *offset1 - field_offset * screen_width * ps; - else - *offset0 = *offset1; - *row_inc = pixinc(-1 - - (y_predecim * screen_width - fbw * x_predecim) - - (fieldmode ? screen_width : 0), ps); - if (color_mode == OMAP_DSS_COLOR_YUV2 || - color_mode == OMAP_DSS_COLOR_UYVY) - *pix_inc = pixinc(-x_predecim, 2 * ps); - else - *pix_inc = pixinc(-x_predecim, ps); - break; - case OMAP_DSS_ROT_270: - *offset1 = (fbw - 1) * ps; - if (field_offset) - *offset0 = *offset1 - field_offset * ps; - else - *offset0 = *offset1; - *row_inc = pixinc(-screen_width * (fbh * x_predecim - 1) - - y_predecim - (fieldmode ? 1 : 0), ps); - *pix_inc = pixinc(x_predecim * screen_width, ps); - break; - - /* mirroring */ - case OMAP_DSS_ROT_0 + 4: - *offset1 = (fbw - 1) * ps; - if (field_offset) - *offset0 = *offset1 + field_offset * screen_width * ps; - else - *offset0 = *offset1; - *row_inc = pixinc(y_predecim * screen_width * 2 - 1 + - (fieldmode ? screen_width : 0), - ps); - if (color_mode == OMAP_DSS_COLOR_YUV2 || - color_mode == OMAP_DSS_COLOR_UYVY) - *pix_inc = pixinc(-x_predecim, 2 * ps); - else - *pix_inc = pixinc(-x_predecim, ps); - break; - - case OMAP_DSS_ROT_90 + 4: - *offset1 = 0; - if (field_offset) - *offset0 = *offset1 + field_offset * ps; - else - *offset0 = *offset1; - *row_inc = pixinc(-screen_width * (fbh * x_predecim - 1) + - y_predecim + (fieldmode ? 1 : 0), - ps); - *pix_inc = pixinc(x_predecim * screen_width, ps); - break; - - case OMAP_DSS_ROT_180 + 4: - *offset1 = screen_width * (fbh - 1) * ps; - if (field_offset) - *offset0 = *offset1 - field_offset * screen_width * ps; - else - *offset0 = *offset1; - *row_inc = pixinc(1 - y_predecim * screen_width * 2 - - (fieldmode ? screen_width : 0), - ps); - if (color_mode == OMAP_DSS_COLOR_YUV2 || - color_mode == OMAP_DSS_COLOR_UYVY) - *pix_inc = pixinc(x_predecim, 2 * ps); - else - *pix_inc = pixinc(x_predecim, ps); - break; - - case OMAP_DSS_ROT_270 + 4: - *offset1 = (screen_width * (fbh - 1) + fbw - 1) * ps; - if (field_offset) - *offset0 = *offset1 - field_offset * ps; - else - *offset0 = *offset1; - *row_inc = pixinc(screen_width * (fbh * x_predecim - 1) - - y_predecim - (fieldmode ? 1 : 0), - ps); - *pix_inc = pixinc(-x_predecim * screen_width, ps); - break; - - default: - BUG(); - return; - } -} - -static void calc_tiler_rotation_offset(u16 screen_width, u16 width, +static void calc_offset(u16 screen_width, u16 width, enum omap_color_mode color_mode, bool fieldmode, unsigned int field_offset, unsigned *offset0, unsigned *offset1, s32 *row_inc, s32 *pix_inc, int x_predecim, int y_predecim) @@ -2711,23 +2488,10 @@ static int dispc_ovl_setup_common(enum omap_plane_id plane, frame_height = height; }
- if (rotation_type == OMAP_DSS_ROT_TILER) - calc_tiler_rotation_offset(screen_width, frame_width, - color_mode, fieldmode, field_offset, - &offset0, &offset1, &row_inc, &pix_inc, - x_predecim, y_predecim); - else if (rotation_type == OMAP_DSS_ROT_DMA) - calc_dma_rotation_offset(rotation, mirror, screen_width, - frame_width, frame_height, - color_mode, fieldmode, field_offset, - &offset0, &offset1, &row_inc, &pix_inc, - x_predecim, y_predecim); - else - calc_vrfb_rotation_offset(rotation, mirror, - screen_width, frame_width, frame_height, - color_mode, fieldmode, field_offset, - &offset0, &offset1, &row_inc, &pix_inc, - x_predecim, y_predecim); + calc_offset(screen_width, frame_width, + color_mode, fieldmode, field_offset, + &offset0, &offset1, &row_inc, &pix_inc, + x_predecim, y_predecim);
DSSDBG("offset0 %u, offset1 %u, row_inc %d, pix_inc %d\n", offset0, offset1, row_inc, pix_inc); @@ -4168,7 +3932,7 @@ static const struct dispc_errata_i734_data { .width = 1, .height = 1, .color_mode = OMAP_DSS_COLOR_RGB24U, .rotation = OMAP_DSS_ROT_0, - .rotation_type = OMAP_DSS_ROT_DMA, + .rotation_type = OMAP_DSS_ROT_NONE, .mirror = 0, .pos_x = 0, .pos_y = 0, .out_width = 0, .out_height = 0, diff --git a/drivers/gpu/drm/omapdrm/dss/dss_features.c b/drivers/gpu/drm/omapdrm/dss/dss_features.c index 135b2a511cf0..bdac1d645ef0 100644 --- a/drivers/gpu/drm/omapdrm/dss/dss_features.c +++ b/drivers/gpu/drm/omapdrm/dss/dss_features.c @@ -51,8 +51,6 @@ struct omap_dss_features { const enum omap_overlay_caps *overlay_caps; const struct dss_param_range *dss_params;
- const enum omap_dss_rotation_type supported_rotation_types; - const u32 buffer_size_unit; const u32 burst_size_unit; }; @@ -596,7 +594,6 @@ static const struct omap_dss_features omap2_dss_features = { .supported_color_modes = omap2_dss_supported_color_modes, .overlay_caps = omap2_dss_overlay_caps, .dss_params = omap2_dss_param_range, - .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB, .buffer_size_unit = 1, .burst_size_unit = 8, }; @@ -616,7 +613,6 @@ static const struct omap_dss_features omap3430_dss_features = { .supported_color_modes = omap3_dss_supported_color_modes, .overlay_caps = omap3430_dss_overlay_caps, .dss_params = omap3_dss_param_range, - .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB, .buffer_size_unit = 1, .burst_size_unit = 8, }; @@ -639,7 +635,6 @@ static const struct omap_dss_features am35xx_dss_features = { .supported_color_modes = omap3_dss_supported_color_modes, .overlay_caps = omap3430_dss_overlay_caps, .dss_params = omap3_dss_param_range, - .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB, .buffer_size_unit = 1, .burst_size_unit = 8, }; @@ -658,7 +653,6 @@ static const struct omap_dss_features am43xx_dss_features = { .supported_color_modes = omap3_dss_supported_color_modes, .overlay_caps = omap3430_dss_overlay_caps, .dss_params = am43xx_dss_param_range, - .supported_rotation_types = OMAP_DSS_ROT_DMA, .buffer_size_unit = 1, .burst_size_unit = 8, }; @@ -677,7 +671,6 @@ static const struct omap_dss_features omap3630_dss_features = { .supported_color_modes = omap3_dss_supported_color_modes, .overlay_caps = omap3630_dss_overlay_caps, .dss_params = omap3_dss_param_range, - .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB, .buffer_size_unit = 1, .burst_size_unit = 8, }; @@ -698,7 +691,6 @@ static const struct omap_dss_features omap4430_es1_0_dss_features = { .supported_color_modes = omap4_dss_supported_color_modes, .overlay_caps = omap4_dss_overlay_caps, .dss_params = omap4_dss_param_range, - .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER, .buffer_size_unit = 16, .burst_size_unit = 16, }; @@ -718,7 +710,6 @@ static const struct omap_dss_features omap4430_es2_0_1_2_dss_features = { .supported_color_modes = omap4_dss_supported_color_modes, .overlay_caps = omap4_dss_overlay_caps, .dss_params = omap4_dss_param_range, - .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER, .buffer_size_unit = 16, .burst_size_unit = 16, }; @@ -738,7 +729,6 @@ static const struct omap_dss_features omap4_dss_features = { .supported_color_modes = omap4_dss_supported_color_modes, .overlay_caps = omap4_dss_overlay_caps, .dss_params = omap4_dss_param_range, - .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER, .buffer_size_unit = 16, .burst_size_unit = 16, }; @@ -758,7 +748,6 @@ static const struct omap_dss_features omap5_dss_features = { .supported_color_modes = omap4_dss_supported_color_modes, .overlay_caps = omap4_dss_overlay_caps, .dss_params = omap5_dss_param_range, - .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER, .buffer_size_unit = 16, .burst_size_unit = 16, }; @@ -845,11 +834,6 @@ void dss_feat_get_reg_field(enum dss_feat_reg_field id, u8 *start, u8 *end) *end = omap_current_dss_features->reg_fields[id].end; }
-bool dss_feat_rotation_type_supported(enum omap_dss_rotation_type rot_type) -{ - return omap_current_dss_features->supported_rotation_types & rot_type; -} - void dss_features_init(enum omapdss_version version) { switch (version) { diff --git a/drivers/gpu/drm/omapdrm/dss/dss_features.h b/drivers/gpu/drm/omapdrm/dss/dss_features.h index 27fbe64935e8..6f262887502d 100644 --- a/drivers/gpu/drm/omapdrm/dss/dss_features.h +++ b/drivers/gpu/drm/omapdrm/dss/dss_features.h @@ -95,8 +95,6 @@ bool dss_feat_color_mode_supported(enum omap_plane_id plane, u32 dss_feat_get_buffer_size_unit(void); /* in bytes */ u32 dss_feat_get_burst_size_unit(void); /* in bytes */
-bool dss_feat_rotation_type_supported(enum omap_dss_rotation_type rot_type); - bool dss_has_feature(enum dss_feat_id id); void dss_feat_get_reg_field(enum dss_feat_reg_field id, u8 *start, u8 *end); void dss_features_init(enum omapdss_version version); diff --git a/drivers/gpu/drm/omapdrm/dss/omapdss.h b/drivers/gpu/drm/omapdrm/dss/omapdss.h index 33d83f338fa4..d16f60a774e2 100644 --- a/drivers/gpu/drm/omapdrm/dss/omapdss.h +++ b/drivers/gpu/drm/omapdrm/dss/omapdss.h @@ -160,9 +160,8 @@ enum omap_dss_display_state { };
enum omap_dss_rotation_type { - OMAP_DSS_ROT_DMA = 1 << 0, - OMAP_DSS_ROT_VRFB = 1 << 1, - OMAP_DSS_ROT_TILER = 1 << 2, + OMAP_DSS_ROT_NONE = 0, + OMAP_DSS_ROT_TILER = 1 << 0, };
/* clockwise rotation angle */ diff --git a/drivers/gpu/drm/omapdrm/omap_fb.c b/drivers/gpu/drm/omapdrm/omap_fb.c index 4e434b2097ec..0cdbf6ccb6ad 100644 --- a/drivers/gpu/drm/omapdrm/omap_fb.c +++ b/drivers/gpu/drm/omapdrm/omap_fb.c @@ -231,7 +231,7 @@ void omap_framebuffer_update_scanout(struct drm_framebuffer *fb, }
info->paddr = get_linear_addr(plane, format, 0, x, y); - info->rotation_type = OMAP_DSS_ROT_DMA; + info->rotation_type = OMAP_DSS_ROT_NONE; info->rotation = OMAP_DSS_ROT_0; info->screen_width = plane->pitch; } diff --git a/drivers/gpu/drm/omapdrm/omap_plane.c b/drivers/gpu/drm/omapdrm/omap_plane.c index 81d9822f6f4a..6cabbda5ec57 100644 --- a/drivers/gpu/drm/omapdrm/omap_plane.c +++ b/drivers/gpu/drm/omapdrm/omap_plane.c @@ -81,7 +81,7 @@ static void omap_plane_atomic_update(struct drm_plane *plane, DBG("%s, crtc=%p fb=%p", omap_plane->name, state->crtc, state->fb);
memset(&info, 0, sizeof(info)); - info.rotation_type = OMAP_DSS_ROT_DMA; + info.rotation_type = OMAP_DSS_ROT_NONE; info.rotation = OMAP_DSS_ROT_0; info.global_alpha = 0xff; info.mirror = 0;
Hi Tomi,
Thank you for the patch.
On Thursday 04 May 2017 13:23:22 Tomi Valkeinen wrote:
We have three rotation methods supported by the SoCs with DSS: DMA, VRFB and TILER.
DMA rotation works in theory on all DSS platforms, but in practice it's unusable due to the huge amount of memory bandwidth it uses, and has never really been used.
VRFB is available on OMAP3, but is not supported by omapdrm, even though we have some code for it in the dispc driver.
TILER is supported on OMAP4/OMAP5/DRA7/AM5 platforms, but has some driver bugs.
To clean up the driver to help fixing the TILER issues, this patch drops the DMA and VRFB rotation support, leaving only TILER rotation.
I'm fine dropping DMA rotation, but I have mixed feelings about VRFB. Yes, it doesn't work at the moment, but I know users of VRFB with the omap_vout driver who would really like to switch to omapdrm. Porting VRFB from omap_vout to omapdrm has been on my to-do list for a long time (with a low priority unfortunately). As an added bonus, it would allow dropping the omap_vout driver at some point.
What would you think about dropping DMA but keeping VRFB for now ?
Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com
drivers/gpu/drm/omapdrm/dss/dispc.c | 248 -------------------------- drivers/gpu/drm/omapdrm/dss/dss_features.c | 16 -- drivers/gpu/drm/omapdrm/dss/dss_features.h | 2 - drivers/gpu/drm/omapdrm/dss/omapdss.h | 5 +- drivers/gpu/drm/omapdrm/omap_fb.c | 2 +- drivers/gpu/drm/omapdrm/omap_plane.c | 2 +- 6 files changed, 10 insertions(+), 265 deletions(-)
On 24/05/17 12:31, Laurent Pinchart wrote:
Hi Tomi,
Thank you for the patch.
On Thursday 04 May 2017 13:23:22 Tomi Valkeinen wrote:
We have three rotation methods supported by the SoCs with DSS: DMA, VRFB and TILER.
DMA rotation works in theory on all DSS platforms, but in practice it's unusable due to the huge amount of memory bandwidth it uses, and has never really been used.
VRFB is available on OMAP3, but is not supported by omapdrm, even though we have some code for it in the dispc driver.
TILER is supported on OMAP4/OMAP5/DRA7/AM5 platforms, but has some driver bugs.
To clean up the driver to help fixing the TILER issues, this patch drops the DMA and VRFB rotation support, leaving only TILER rotation.
I'm fine dropping DMA rotation, but I have mixed feelings about VRFB. Yes, it doesn't work at the moment, but I know users of VRFB with the omap_vout driver who would really like to switch to omapdrm. Porting VRFB from omap_vout to omapdrm has been on my to-do list for a long time (with a low priority unfortunately). As an added bonus, it would allow dropping the omap_vout driver at some point.
What would you think about dropping DMA but keeping VRFB for now ?
This patch doesn't remove that much about vrfb, just the row/pix inc calculations. The main vrfb file is still there, for omapfb. I'm happy to add it back when someone has a working prototype for omapdrm+vrfb, but to be honest, I won't hold my breath =).
I really want to clean up the dispc driver as much as possible, as it's such a messy piece of code, supporting so many DSS IP versions. I believe we'll get a cleaner version if we add the vrfb back from scratch.
Tomi
Hi Tomi,
On Wednesday 24 May 2017 13:13:08 Tomi Valkeinen wrote:
On 24/05/17 12:31, Laurent Pinchart wrote:
On Thursday 04 May 2017 13:23:22 Tomi Valkeinen wrote:
We have three rotation methods supported by the SoCs with DSS: DMA, VRFB and TILER.
DMA rotation works in theory on all DSS platforms, but in practice it's unusable due to the huge amount of memory bandwidth it uses, and has never really been used.
VRFB is available on OMAP3, but is not supported by omapdrm, even though we have some code for it in the dispc driver.
TILER is supported on OMAP4/OMAP5/DRA7/AM5 platforms, but has some driver bugs.
To clean up the driver to help fixing the TILER issues, this patch drops the DMA and VRFB rotation support, leaving only TILER rotation.
I'm fine dropping DMA rotation, but I have mixed feelings about VRFB. Yes, it doesn't work at the moment, but I know users of VRFB with the omap_vout driver who would really like to switch to omapdrm. Porting VRFB from omap_vout to omapdrm has been on my to-do list for a long time (with a low priority unfortunately). As an added bonus, it would allow dropping the omap_vout driver at some point.
What would you think about dropping DMA but keeping VRFB for now ?
This patch doesn't remove that much about vrfb, just the row/pix inc calculations. The main vrfb file is still there, for omapfb. I'm happy to add it back when someone has a working prototype for omapdrm+vrfb, but to be honest, I won't hold my breath =).
I really want to clean up the dispc driver as much as possible, as it's such a messy piece of code, supporting so many DSS IP versions. I believe we'll get a cleaner version if we add the vrfb back from scratch.
Acked-by: Laurent Pinchart laurent.pinchart@ideasonboard.com
The code to calculate offset in dispc's calc_offset() is overly complex. Simplify it.
Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com --- drivers/gpu/drm/omapdrm/dss/dispc.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c b/drivers/gpu/drm/omapdrm/dss/dispc.c index 4d335bf5e4d3..48bb71eafa56 100644 --- a/drivers/gpu/drm/omapdrm/dss/dispc.c +++ b/drivers/gpu/drm/omapdrm/dss/dispc.c @@ -1923,11 +1923,9 @@ static void calc_offset(u16 screen_width, u16 width, * field 0 = even field = bottom field * field 1 = odd field = top field */ + *offset0 = field_offset * screen_width * ps; *offset1 = 0; - if (field_offset) - *offset0 = *offset1 + field_offset * screen_width * ps; - else - *offset0 = *offset1; + *row_inc = pixinc(1 + (y_predecim * screen_width - width * x_predecim) + (fieldmode ? screen_width : 0), ps); if (color_mode == OMAP_DSS_COLOR_YUV2 ||
Hi Tomi,
Thank you for the patch.
On Thursday 04 May 2017 13:23:23 Tomi Valkeinen wrote:
The code to calculate offset in dispc's calc_offset() is overly complex. Simplify it.
Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com
Reviewed-by: Laurent Pinchart laurent.pinchart@ideasonboard.com
drivers/gpu/drm/omapdrm/dss/dispc.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c b/drivers/gpu/drm/omapdrm/dss/dispc.c index 4d335bf5e4d3..48bb71eafa56 100644 --- a/drivers/gpu/drm/omapdrm/dss/dispc.c +++ b/drivers/gpu/drm/omapdrm/dss/dispc.c @@ -1923,11 +1923,9 @@ static void calc_offset(u16 screen_width, u16 width, * field 0 = even field = bottom field * field 1 = odd field = top field */
- *offset0 = field_offset * screen_width * ps; *offset1 = 0;
- if (field_offset)
*offset0 = *offset1 + field_offset * screen_width * ps;- else
*offset0 = *offset1;
- *row_inc = pixinc(1 + (y_predecim * screen_width - width * x_predecim)
+
(fieldmode ? screen_width : 0), ps);if (color_mode == OMAP_DSS_COLOR_YUV2 ||
In a few places the dispc driver needs to know whether the pixel format is an YUV format. Add a helper to figure that out.
Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com --- drivers/gpu/drm/omapdrm/dss/dispc.c | 56 +++++++++++++++---------------------- 1 file changed, 23 insertions(+), 33 deletions(-)
diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c b/drivers/gpu/drm/omapdrm/dss/dispc.c index 48bb71eafa56..9dfef8fdff67 100644 --- a/drivers/gpu/drm/omapdrm/dss/dispc.c +++ b/drivers/gpu/drm/omapdrm/dss/dispc.c @@ -978,6 +978,18 @@ static void dispc_ovl_set_color_mode(enum omap_plane_id plane, REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), m, 4, 1); }
+static bool format_is_yuv(enum omap_color_mode color_mode) +{ + switch (color_mode) { + case OMAP_DSS_COLOR_YUV2: + case OMAP_DSS_COLOR_UYVY: + case OMAP_DSS_COLOR_NV12: + return true; + default: + return false; + } +} + static void dispc_ovl_configure_burst_type(enum omap_plane_id plane, enum omap_dss_rotation_type rotation_type) { @@ -1703,9 +1715,8 @@ static void dispc_ovl_set_scaling_uv(enum omap_plane_id plane,
if (!dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) return; - if ((color_mode != OMAP_DSS_COLOR_YUV2 && - color_mode != OMAP_DSS_COLOR_UYVY && - color_mode != OMAP_DSS_COLOR_NV12)) { + + if (!format_is_yuv(color_mode)) { /* reset chroma resampling for RGB formats */ if (plane != OMAP_DSS_WB) REG_FLD_MOD(DISPC_OVL_ATTRIBUTES2(plane), 0, 8, 8); @@ -2384,19 +2395,9 @@ static int dispc_ovl_setup_common(enum omap_plane_id plane, if (paddr == 0 && rotation_type != OMAP_DSS_ROT_TILER) return -EINVAL;
- switch (color_mode) { - case OMAP_DSS_COLOR_YUV2: - case OMAP_DSS_COLOR_UYVY: - case OMAP_DSS_COLOR_NV12: - if (in_width & 1) { - DSSERR("input width %d is not even for YUV format\n", - in_width); - return -EINVAL; - } - break; - - default: - break; + if (format_is_yuv(color_mode) && (in_width & 1)) { + DSSERR("input width %d is not even for YUV format\n", in_width); + return -EINVAL; }
out_width = out_width == 0 ? width : out_width; @@ -2433,26 +2434,15 @@ static int dispc_ovl_setup_common(enum omap_plane_id plane, DSSDBG("predecimation %d x %x, new input size %d x %d\n", x_predecim, y_predecim, in_width, in_height);
- switch (color_mode) { - case OMAP_DSS_COLOR_YUV2: - case OMAP_DSS_COLOR_UYVY: - case OMAP_DSS_COLOR_NV12: - if (in_width & 1) { - DSSDBG("predecimated input width is not even for YUV format\n"); - DSSDBG("adjusting input width %d -> %d\n", - in_width, in_width & ~1); - - in_width &= ~1; - } - break; + if (format_is_yuv(color_mode) && (in_width & 1)) { + DSSDBG("predecimated input width is not even for YUV format\n"); + DSSDBG("adjusting input width %d -> %d\n", + in_width, in_width & ~1);
- default: - break; + in_width &= ~1; }
- if (color_mode == OMAP_DSS_COLOR_YUV2 || - color_mode == OMAP_DSS_COLOR_UYVY || - color_mode == OMAP_DSS_COLOR_NV12) + if (format_is_yuv(color_mode)) cconv = 1;
if (ilace && !fieldmode) {
Hi Tomi,
Thank you for the patch.
On Thursday 04 May 2017 13:23:24 Tomi Valkeinen wrote:
In a few places the dispc driver needs to know whether the pixel format is an YUV format. Add a helper to figure that out.
Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com
drivers/gpu/drm/omapdrm/dss/dispc.c | 56 ++++++++++++++-------------------- 1 file changed, 23 insertions(+), 33 deletions(-)
diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c b/drivers/gpu/drm/omapdrm/dss/dispc.c index 48bb71eafa56..9dfef8fdff67 100644 --- a/drivers/gpu/drm/omapdrm/dss/dispc.c +++ b/drivers/gpu/drm/omapdrm/dss/dispc.c @@ -978,6 +978,18 @@ static void dispc_ovl_set_color_mode(enum omap_plane_id plane, REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), m, 4, 1); }
+static bool format_is_yuv(enum omap_color_mode color_mode) +{
- switch (color_mode) {
- case OMAP_DSS_COLOR_YUV2:
- case OMAP_DSS_COLOR_UYVY:
- case OMAP_DSS_COLOR_NV12:
return true;- default:
return false;- }
+}
static void dispc_ovl_configure_burst_type(enum omap_plane_id plane, enum omap_dss_rotation_type rotation_type) { @@ -1703,9 +1715,8 @@ static void dispc_ovl_set_scaling_uv(enum omap_plane_id plane,
if (!dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) return;
- if ((color_mode != OMAP_DSS_COLOR_YUV2 &&
color_mode != OMAP_DSS_COLOR_UYVY &&color_mode != OMAP_DSS_COLOR_NV12)) {
- if (!format_is_yuv(color_mode)) { /* reset chroma resampling for RGB formats */ if (plane != OMAP_DSS_WB) REG_FLD_MOD(DISPC_OVL_ATTRIBUTES2(plane), 0, 8, 8);
@@ -2384,19 +2395,9 @@ static int dispc_ovl_setup_common(enum omap_plane_id plane, if (paddr == 0 && rotation_type != OMAP_DSS_ROT_TILER) return -EINVAL;
- switch (color_mode) {
- case OMAP_DSS_COLOR_YUV2:
- case OMAP_DSS_COLOR_UYVY:
- case OMAP_DSS_COLOR_NV12:
if (in_width & 1) {DSSERR("input width %d is not even for YUV format\n",in_width);return -EINVAL;}break;- default:
break;
- if (format_is_yuv(color_mode) && (in_width & 1)) {
DSSERR("input width %d is not even for YUV format\n",
in_width);
return -EINVAL;
This is a condition that should be checked by omapdrm in the atomic_check phase, to avoid returning an error in the atomic_commit phase.
out_width = out_width == 0 ? width : out_width; @@ -2433,26 +2434,15 @@ static int dispc_ovl_setup_common(enum omap_plane_id plane, DSSDBG("predecimation %d x %x, new input size %d x %d\n", x_predecim, y_predecim, in_width, in_height);
- switch (color_mode) {
- case OMAP_DSS_COLOR_YUV2:
- case OMAP_DSS_COLOR_UYVY:
- case OMAP_DSS_COLOR_NV12:
if (in_width & 1) {DSSDBG("predecimated input width is not even for YUV
format\n");
DSSDBG("adjusting input width %d -> %d\n",in_width, in_width & ~1);in_width &= ~1;}break;
- if (format_is_yuv(color_mode) && (in_width & 1)) {
DSSDBG("predecimated input width is not even for YUV
format\n");
DSSDBG("adjusting input width %d -> %d\n",in_width, in_width & ~1);
- default:
break;
in_width &= ~1;
Same here.
We can fix that as a follow-up patch, so
Reviewed-by: Laurent Pinchart laurent.pinchart@ideasonboard.com
- if (color_mode == OMAP_DSS_COLOR_YUV2 ||
color_mode == OMAP_DSS_COLOR_UYVY ||color_mode == OMAP_DSS_COLOR_NV12)
if (format_is_yuv(color_mode)) cconv = 1;
if (ilace && !fieldmode) {
omapdss.h contains prototypes for three functions, which are also defined in dss_features.h. Remove the extra prototypes from omapdss.h.
Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com --- drivers/gpu/drm/omapdrm/dss/omapdss.h | 5 ----- 1 file changed, 5 deletions(-)
diff --git a/drivers/gpu/drm/omapdrm/dss/omapdss.h b/drivers/gpu/drm/omapdrm/dss/omapdss.h index d16f60a774e2..1fb48783ea2d 100644 --- a/drivers/gpu/drm/omapdrm/dss/omapdss.h +++ b/drivers/gpu/drm/omapdrm/dss/omapdss.h @@ -746,11 +746,6 @@ struct omap_dss_device *omap_dss_find_device(void *data, int (*match)(struct omap_dss_device *dssdev, void *data)); const char *omapdss_get_default_display_name(void);
-int dss_feat_get_num_mgrs(void); -int dss_feat_get_num_ovls(void); -enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane_id plane); - -
int omap_dss_get_num_overlay_managers(void); struct omap_overlay_manager *omap_dss_get_overlay_manager(int num);
Hi Tomi,
Thank you for the patch.
On Thursday 04 May 2017 13:23:25 Tomi Valkeinen wrote:
omapdss.h contains prototypes for three functions, which are also defined in dss_features.h. Remove the extra prototypes from omapdss.h.
Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com
Reviewed-by: Laurent Pinchart laurent.pinchart@ideasonboard.com
drivers/gpu/drm/omapdrm/dss/omapdss.h | 5 ----- 1 file changed, 5 deletions(-)
diff --git a/drivers/gpu/drm/omapdrm/dss/omapdss.h b/drivers/gpu/drm/omapdrm/dss/omapdss.h index d16f60a774e2..1fb48783ea2d 100644 --- a/drivers/gpu/drm/omapdrm/dss/omapdss.h +++ b/drivers/gpu/drm/omapdrm/dss/omapdss.h @@ -746,11 +746,6 @@ struct omap_dss_device *omap_dss_find_device(void *data, int (*match)(struct omap_dss_device *dssdev, void *data)); const char *omapdss_get_default_display_name(void);
-int dss_feat_get_num_mgrs(void); -int dss_feat_get_num_ovls(void); -enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane_id plane); -
int omap_dss_get_num_overlay_managers(void); struct omap_overlay_manager *omap_dss_get_overlay_manager(int num);
struct omap_overlay has 'supported_modes' field that is not used. Remove it.
Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com --- drivers/gpu/drm/omapdrm/dss/omapdss.h | 1 - 1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/omapdrm/dss/omapdss.h b/drivers/gpu/drm/omapdrm/dss/omapdss.h index 1fb48783ea2d..cf822dbcfe29 100644 --- a/drivers/gpu/drm/omapdrm/dss/omapdss.h +++ b/drivers/gpu/drm/omapdrm/dss/omapdss.h @@ -308,7 +308,6 @@ struct omap_overlay { /* static fields */ const char *name; enum omap_plane_id id; - enum omap_color_mode supported_modes; enum omap_overlay_caps caps;
/* dynamic fields */
Hi Tomi,
On Thursday 04 May 2017 13:23:26 Tomi Valkeinen wrote:
struct omap_overlay has 'supported_modes' field that is not used. Remove it.
This seems to conflict with "drm/omap: remove omap_overlay & omap_overlay_manager" :-)
Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com
drivers/gpu/drm/omapdrm/dss/omapdss.h | 1 - 1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/omapdrm/dss/omapdss.h b/drivers/gpu/drm/omapdrm/dss/omapdss.h index 1fb48783ea2d..cf822dbcfe29 100644 --- a/drivers/gpu/drm/omapdrm/dss/omapdss.h +++ b/drivers/gpu/drm/omapdrm/dss/omapdss.h @@ -308,7 +308,6 @@ struct omap_overlay { /* static fields */ const char *name; enum omap_plane_id id;
enum omap_color_mode supported_modes; enum omap_overlay_caps caps;
/* dynamic fields */
enum omap_color_mode is a bitmask, so at the moment we present the supported color modes as mask. To be able to move to fourccs, we need to use an array to present the supported color modes.
As a first step towards fourccs, this patch changes the code to use an array to store the enums.
Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com --- drivers/gpu/drm/omapdrm/dss/dispc.c | 2 +- drivers/gpu/drm/omapdrm/dss/dss_features.c | 153 +++++++++++++++++------------ drivers/gpu/drm/omapdrm/dss/dss_features.h | 2 +- drivers/gpu/drm/omapdrm/dss/omapdss.h | 2 +- drivers/gpu/drm/omapdrm/omap_drv.h | 2 +- drivers/gpu/drm/omapdrm/omap_fb.c | 14 ++- 6 files changed, 103 insertions(+), 72 deletions(-)
diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c b/drivers/gpu/drm/omapdrm/dss/dispc.c index 9dfef8fdff67..dcd83efda3af 100644 --- a/drivers/gpu/drm/omapdrm/dss/dispc.c +++ b/drivers/gpu/drm/omapdrm/dss/dispc.c @@ -1140,7 +1140,7 @@ static u32 dispc_ovl_get_burst_size(enum omap_plane_id plane) return unit * 8; }
-static enum omap_color_mode dispc_ovl_get_color_modes(enum omap_plane_id plane) +static const enum omap_color_mode *dispc_ovl_get_color_modes(enum omap_plane_id plane) { return dss_feat_get_supported_color_modes(plane); } diff --git a/drivers/gpu/drm/omapdrm/dss/dss_features.c b/drivers/gpu/drm/omapdrm/dss/dss_features.c index bdac1d645ef0..f9b0324cc263 100644 --- a/drivers/gpu/drm/omapdrm/dss/dss_features.c +++ b/drivers/gpu/drm/omapdrm/dss/dss_features.c @@ -47,7 +47,7 @@ struct omap_dss_features { const int num_ovls; const enum omap_display_type *supported_displays; const enum omap_dss_output_id *supported_outputs; - const enum omap_color_mode *supported_color_modes; + const enum omap_color_mode **supported_color_modes; const enum omap_overlay_caps *overlay_caps; const struct dss_param_range *dss_params;
@@ -229,90 +229,104 @@ static const enum omap_dss_output_id omap5_dss_supported_outputs[] = { OMAP_DSS_OUTPUT_DSI2, };
-static const enum omap_color_mode omap2_dss_supported_color_modes[] = { +#define COLOR_ARRAY(arr...) (const enum omap_color_mode[]) { arr, 0 } + +static const enum omap_color_mode *omap2_dss_supported_color_modes[] = { + /* OMAP_DSS_GFX */ - OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 | - OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P, + COLOR_ARRAY( + OMAP_DSS_COLOR_RGB12U, OMAP_DSS_COLOR_RGB16, + OMAP_DSS_COLOR_RGB24U, OMAP_DSS_COLOR_RGB24P),
/* OMAP_DSS_VIDEO1 */ - OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U | - OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 | - OMAP_DSS_COLOR_UYVY, + COLOR_ARRAY( + OMAP_DSS_COLOR_RGB16, OMAP_DSS_COLOR_RGB24U, + OMAP_DSS_COLOR_RGB24P, OMAP_DSS_COLOR_YUV2, + OMAP_DSS_COLOR_UYVY),
/* OMAP_DSS_VIDEO2 */ - OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U | - OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 | - OMAP_DSS_COLOR_UYVY, + COLOR_ARRAY( + OMAP_DSS_COLOR_RGB16, OMAP_DSS_COLOR_RGB24U, + OMAP_DSS_COLOR_RGB24P, OMAP_DSS_COLOR_YUV2, + OMAP_DSS_COLOR_UYVY), };
-static const enum omap_color_mode omap3_dss_supported_color_modes[] = { +static const enum omap_color_mode *omap3_dss_supported_color_modes[] = { /* OMAP_DSS_GFX */ - OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 | - OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U | - OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_ARGB32 | - OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32, + COLOR_ARRAY( + OMAP_DSS_COLOR_RGB12U, OMAP_DSS_COLOR_ARGB16, + OMAP_DSS_COLOR_RGB16, OMAP_DSS_COLOR_RGB24U, + OMAP_DSS_COLOR_RGB24P, OMAP_DSS_COLOR_ARGB32, + OMAP_DSS_COLOR_RGBA32, OMAP_DSS_COLOR_RGBX32),
/* OMAP_DSS_VIDEO1 */ - OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P | - OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 | - OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_UYVY, + COLOR_ARRAY( + OMAP_DSS_COLOR_RGB24U, OMAP_DSS_COLOR_RGB24P, + OMAP_DSS_COLOR_RGB12U, OMAP_DSS_COLOR_RGB16, + OMAP_DSS_COLOR_YUV2, OMAP_DSS_COLOR_UYVY),
/* OMAP_DSS_VIDEO2 */ - OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 | - OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U | - OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 | - OMAP_DSS_COLOR_UYVY | OMAP_DSS_COLOR_ARGB32 | - OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32, + COLOR_ARRAY( + OMAP_DSS_COLOR_RGB12U, OMAP_DSS_COLOR_ARGB16, + OMAP_DSS_COLOR_RGB16, OMAP_DSS_COLOR_RGB24U, + OMAP_DSS_COLOR_RGB24P, OMAP_DSS_COLOR_YUV2, + OMAP_DSS_COLOR_UYVY, OMAP_DSS_COLOR_ARGB32, + OMAP_DSS_COLOR_RGBA32, OMAP_DSS_COLOR_RGBX32), };
-static const enum omap_color_mode omap4_dss_supported_color_modes[] = { +static const enum omap_color_mode *omap4_dss_supported_color_modes[] = { /* OMAP_DSS_GFX */ - OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 | - OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U | - OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_ARGB32 | - OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32 | - OMAP_DSS_COLOR_ARGB16_1555 | OMAP_DSS_COLOR_RGBX16 | - OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_XRGB16_1555, + COLOR_ARRAY( + OMAP_DSS_COLOR_RGB12U, OMAP_DSS_COLOR_ARGB16, + OMAP_DSS_COLOR_RGB16, OMAP_DSS_COLOR_RGB24U, + OMAP_DSS_COLOR_RGB24P, OMAP_DSS_COLOR_ARGB32, + OMAP_DSS_COLOR_RGBA32, OMAP_DSS_COLOR_RGBX32, + OMAP_DSS_COLOR_ARGB16_1555, OMAP_DSS_COLOR_RGBX16, + OMAP_DSS_COLOR_RGBA16, OMAP_DSS_COLOR_XRGB16_1555),
/* OMAP_DSS_VIDEO1 */ - OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U | - OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 | - OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 | - OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U | - OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY | - OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 | - OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 | - OMAP_DSS_COLOR_RGBX32, + COLOR_ARRAY( + OMAP_DSS_COLOR_RGB16, OMAP_DSS_COLOR_RGB12U, + OMAP_DSS_COLOR_YUV2, OMAP_DSS_COLOR_ARGB16_1555, + OMAP_DSS_COLOR_RGBA32, OMAP_DSS_COLOR_NV12, + OMAP_DSS_COLOR_RGBA16, OMAP_DSS_COLOR_RGB24U, + OMAP_DSS_COLOR_RGB24P, OMAP_DSS_COLOR_UYVY, + OMAP_DSS_COLOR_ARGB16, OMAP_DSS_COLOR_XRGB16_1555, + OMAP_DSS_COLOR_ARGB32, OMAP_DSS_COLOR_RGBX16, + OMAP_DSS_COLOR_RGBX32),
/* OMAP_DSS_VIDEO2 */ - OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U | - OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 | - OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 | - OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U | - OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY | - OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 | - OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 | - OMAP_DSS_COLOR_RGBX32, + COLOR_ARRAY( + OMAP_DSS_COLOR_RGB16, OMAP_DSS_COLOR_RGB12U, + OMAP_DSS_COLOR_YUV2, OMAP_DSS_COLOR_ARGB16_1555, + OMAP_DSS_COLOR_RGBA32, OMAP_DSS_COLOR_NV12, + OMAP_DSS_COLOR_RGBA16, OMAP_DSS_COLOR_RGB24U, + OMAP_DSS_COLOR_RGB24P, OMAP_DSS_COLOR_UYVY, + OMAP_DSS_COLOR_ARGB16, OMAP_DSS_COLOR_XRGB16_1555, + OMAP_DSS_COLOR_ARGB32, OMAP_DSS_COLOR_RGBX16, + OMAP_DSS_COLOR_RGBX32),
/* OMAP_DSS_VIDEO3 */ - OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U | - OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 | - OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 | - OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U | - OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY | - OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 | - OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 | - OMAP_DSS_COLOR_RGBX32, + COLOR_ARRAY( + OMAP_DSS_COLOR_RGB16, OMAP_DSS_COLOR_RGB12U, + OMAP_DSS_COLOR_YUV2, OMAP_DSS_COLOR_ARGB16_1555, + OMAP_DSS_COLOR_RGBA32, OMAP_DSS_COLOR_NV12, + OMAP_DSS_COLOR_RGBA16, OMAP_DSS_COLOR_RGB24U, + OMAP_DSS_COLOR_RGB24P, OMAP_DSS_COLOR_UYVY, + OMAP_DSS_COLOR_ARGB16, OMAP_DSS_COLOR_XRGB16_1555, + OMAP_DSS_COLOR_ARGB32, OMAP_DSS_COLOR_RGBX16, + OMAP_DSS_COLOR_RGBX32),
/* OMAP_DSS_WB */ - OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U | - OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 | - OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 | - OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U | - OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY | - OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 | - OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 | - OMAP_DSS_COLOR_RGBX32, + COLOR_ARRAY( + OMAP_DSS_COLOR_RGB16, OMAP_DSS_COLOR_RGB12U, + OMAP_DSS_COLOR_YUV2, OMAP_DSS_COLOR_ARGB16_1555, + OMAP_DSS_COLOR_RGBA32, OMAP_DSS_COLOR_NV12, + OMAP_DSS_COLOR_RGBA16, OMAP_DSS_COLOR_RGB24U, + OMAP_DSS_COLOR_RGB24P, OMAP_DSS_COLOR_UYVY, + OMAP_DSS_COLOR_ARGB16, OMAP_DSS_COLOR_XRGB16_1555, + OMAP_DSS_COLOR_ARGB32, OMAP_DSS_COLOR_RGBX16, + OMAP_DSS_COLOR_RGBX32), };
static const enum omap_overlay_caps omap2_dss_overlay_caps[] = { @@ -783,7 +797,7 @@ enum omap_dss_output_id dss_feat_get_supported_outputs(enum omap_channel channel return omap_current_dss_features->supported_outputs[channel]; }
-enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane_id plane) +const enum omap_color_mode *dss_feat_get_supported_color_modes(enum omap_plane_id plane) { return omap_current_dss_features->supported_color_modes[plane]; } @@ -796,8 +810,17 @@ enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane_id plane) bool dss_feat_color_mode_supported(enum omap_plane_id plane, enum omap_color_mode color_mode) { - return omap_current_dss_features->supported_color_modes[plane] & - color_mode; + const enum omap_color_mode *modes; + unsigned int i; + + modes = omap_current_dss_features->supported_color_modes[plane]; + + for (i = 0; modes[i]; ++i) { + if (modes[i] == color_mode) + return true; + } + + return false; }
u32 dss_feat_get_buffer_size_unit(void) diff --git a/drivers/gpu/drm/omapdrm/dss/dss_features.h b/drivers/gpu/drm/omapdrm/dss/dss_features.h index 6f262887502d..190cf62537b0 100644 --- a/drivers/gpu/drm/omapdrm/dss/dss_features.h +++ b/drivers/gpu/drm/omapdrm/dss/dss_features.h @@ -104,6 +104,6 @@ enum omap_dss_output_id dss_feat_get_supported_outputs(enum omap_channel channel
int dss_feat_get_num_mgrs(void); int dss_feat_get_num_ovls(void); -enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane_id plane); +const enum omap_color_mode *dss_feat_get_supported_color_modes(enum omap_plane_id plane);
#endif diff --git a/drivers/gpu/drm/omapdrm/dss/omapdss.h b/drivers/gpu/drm/omapdrm/dss/omapdss.h index cf822dbcfe29..334680673074 100644 --- a/drivers/gpu/drm/omapdrm/dss/omapdss.h +++ b/drivers/gpu/drm/omapdrm/dss/omapdss.h @@ -876,7 +876,7 @@ struct dispc_ops { const struct videomode *vm, bool mem_to_mem, enum omap_channel channel);
- enum omap_color_mode (*ovl_get_color_modes)(enum omap_plane_id plane); + const enum omap_color_mode *(*ovl_get_color_modes)(enum omap_plane_id plane); };
void dispc_set_ops(const struct dispc_ops *o); diff --git a/drivers/gpu/drm/omapdrm/omap_drv.h b/drivers/gpu/drm/omapdrm/omap_drv.h index 7a4c57eb6536..962180790f42 100644 --- a/drivers/gpu/drm/omapdrm/omap_drv.h +++ b/drivers/gpu/drm/omapdrm/omap_drv.h @@ -159,7 +159,7 @@ struct drm_encoder *omap_connector_attached_encoder( bool omap_connector_get_hdmi_mode(struct drm_connector *connector);
uint32_t omap_framebuffer_get_formats(uint32_t *pixel_formats, - uint32_t max_formats, enum omap_color_mode supported_modes); + uint32_t max_formats, const enum omap_color_mode *supported_modes); struct drm_framebuffer *omap_framebuffer_create(struct drm_device *dev, struct drm_file *file, const struct drm_mode_fb_cmd2 *mode_cmd); struct drm_framebuffer *omap_framebuffer_init(struct drm_device *dev, diff --git a/drivers/gpu/drm/omapdrm/omap_fb.c b/drivers/gpu/drm/omapdrm/omap_fb.c index 0cdbf6ccb6ad..a53022cbb14f 100644 --- a/drivers/gpu/drm/omapdrm/omap_fb.c +++ b/drivers/gpu/drm/omapdrm/omap_fb.c @@ -57,14 +57,22 @@ static const struct {
/* convert from overlay's pixel formats bitmask to an array of fourcc's */ uint32_t omap_framebuffer_get_formats(uint32_t *pixel_formats, - uint32_t max_formats, enum omap_color_mode supported_modes) + uint32_t max_formats, const enum omap_color_mode *supported_modes) { uint32_t nformats = 0; int i = 0;
- for (i = 0; i < ARRAY_SIZE(formats) && nformats < max_formats; i++) - if (formats[i].dss_format & supported_modes) + for (i = 0; i < ARRAY_SIZE(formats) && nformats < max_formats; i++) { + unsigned int t; + + for (t = 0; supported_modes[t]; ++t) { + if (supported_modes[t] != formats[i].dss_format) + continue; + pixel_formats[nformats++] = formats[i].pixel_format; + break; + } + }
return nformats; }
Hi Tomi,
Thank you for the patch.
On Thursday 04 May 2017 13:23:27 Tomi Valkeinen wrote:
enum omap_color_mode is a bitmask, so at the moment we present the supported color modes as mask. To be able to move to fourccs, we need to use an array to present the supported color modes.
As a first step towards fourccs, this patch changes the code to use an array to store the enums.
Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com
drivers/gpu/drm/omapdrm/dss/dispc.c | 2 +- drivers/gpu/drm/omapdrm/dss/dss_features.c | 153 +++++++++++++++---------- drivers/gpu/drm/omapdrm/dss/dss_features.h | 2 +- drivers/gpu/drm/omapdrm/dss/omapdss.h | 2 +- drivers/gpu/drm/omapdrm/omap_drv.h | 2 +- drivers/gpu/drm/omapdrm/omap_fb.c | 14 ++- 6 files changed, 103 insertions(+), 72 deletions(-)
diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c b/drivers/gpu/drm/omapdrm/dss/dispc.c index 9dfef8fdff67..dcd83efda3af 100644 --- a/drivers/gpu/drm/omapdrm/dss/dispc.c +++ b/drivers/gpu/drm/omapdrm/dss/dispc.c @@ -1140,7 +1140,7 @@ static u32 dispc_ovl_get_burst_size(enum omap_plane_id plane) return unit * 8; }
-static enum omap_color_mode dispc_ovl_get_color_modes(enum omap_plane_id plane) +static const enum omap_color_mode *dispc_ovl_get_color_modes(enum omap_plane_id plane) { return dss_feat_get_supported_color_modes(plane); } diff --git a/drivers/gpu/drm/omapdrm/dss/dss_features.c b/drivers/gpu/drm/omapdrm/dss/dss_features.c index bdac1d645ef0..f9b0324cc263 100644 --- a/drivers/gpu/drm/omapdrm/dss/dss_features.c +++ b/drivers/gpu/drm/omapdrm/dss/dss_features.c
[snip]
@@ -229,90 +229,104 @@ static const enum omap_dss_output_id omap5_dss_supported_outputs[] = { OMAP_DSS_OUTPUT_DSI2, };
-static const enum omap_color_mode omap2_dss_supported_color_modes[] = { +#define COLOR_ARRAY(arr...) (const enum omap_color_mode[]) { arr, 0 }
I don't like this macro much, but I don't think I have a much better proposal beside just typing the cast out :-/, so
Acked-by: Laurent Pinchart laurent.pinchart@ideasonboard.com
+static const enum omap_color_mode *omap2_dss_supported_color_modes[] = {
- /* OMAP_DSS_GFX */
- OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 |
- OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P,
COLOR_ARRAY(
OMAP_DSS_COLOR_RGB12U, OMAP_DSS_COLOR_RGB16,
OMAP_DSS_COLOR_RGB24U, OMAP_DSS_COLOR_RGB24P),
/* OMAP_DSS_VIDEO1 */
- OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
- OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
- OMAP_DSS_COLOR_UYVY,
COLOR_ARRAY(
OMAP_DSS_COLOR_RGB16, OMAP_DSS_COLOR_RGB24U,
OMAP_DSS_COLOR_RGB24P, OMAP_DSS_COLOR_YUV2,
OMAP_DSS_COLOR_UYVY),
/* OMAP_DSS_VIDEO2 */
- OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
- OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
- OMAP_DSS_COLOR_UYVY,
- COLOR_ARRAY(
- OMAP_DSS_COLOR_RGB16, OMAP_DSS_COLOR_RGB24U,
- OMAP_DSS_COLOR_RGB24P, OMAP_DSS_COLOR_YUV2,
- OMAP_DSS_COLOR_UYVY),
};
[snip]
This patch changes omapdrm to use DRM_FORMAT_* values instead of OMAP_DSS_COLOR_* enum. This patch only changes the uses of OMAP_DSS_COLOR_*, so we still keep the enum omap_color_mode. I.e. we now temporarily pass DRM_FORMAT_* values with enum omap_color_mode.
This causes a few compile warnings with switch()es, so those need a typecast to (u32) to silence the warnings.
Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com --- drivers/gpu/drm/omapdrm/dss/dispc.c | 157 +++++++++++++++-------------- drivers/gpu/drm/omapdrm/dss/dss_features.c | 117 ++++++++++----------- drivers/gpu/drm/omapdrm/dss/omapdss.h | 16 +-- drivers/gpu/drm/omapdrm/omap_fb.c | 32 +++--- 4 files changed, 155 insertions(+), 167 deletions(-)
diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c b/drivers/gpu/drm/omapdrm/dss/dispc.c index dcd83efda3af..c0f8109042c6 100644 --- a/drivers/gpu/drm/omapdrm/dss/dispc.c +++ b/drivers/gpu/drm/omapdrm/dss/dispc.c @@ -40,6 +40,7 @@ #include <linux/regmap.h> #include <linux/of.h> #include <linux/component.h> +#include <drm/drm_fourcc.h>
#include "omapdss.h" #include "dss.h" @@ -158,7 +159,7 @@ enum omap_color_component { */ DISPC_COLOR_COMPONENT_RGB_Y = 1 << 0, /* used for UV component for - * OMAP_DSS_COLOR_YUV2, OMAP_DSS_COLOR_UYVY, OMAP_DSS_COLOR_NV12 + * DRM_FORMAT_YUYV, DRM_FORMAT_UYVY, DRM_FORMAT_NV12 * color formats on OMAP4 */ DISPC_COLOR_COMPONENT_UV = 1 << 1, @@ -910,65 +911,65 @@ static void dispc_ovl_set_color_mode(enum omap_plane_id plane, { u32 m = 0; if (plane != OMAP_DSS_GFX) { - switch (color_mode) { - case OMAP_DSS_COLOR_NV12: + switch ((u32)color_mode) { + case DRM_FORMAT_NV12: m = 0x0; break; - case OMAP_DSS_COLOR_RGBX16: + case DRM_FORMAT_XRGB4444: m = 0x1; break; - case OMAP_DSS_COLOR_RGBA16: + case DRM_FORMAT_RGBA4444: m = 0x2; break; - case OMAP_DSS_COLOR_RGB12U: + case DRM_FORMAT_RGBX4444: m = 0x4; break; - case OMAP_DSS_COLOR_ARGB16: + case DRM_FORMAT_ARGB4444: m = 0x5; break; - case OMAP_DSS_COLOR_RGB16: + case DRM_FORMAT_RGB565: m = 0x6; break; - case OMAP_DSS_COLOR_ARGB16_1555: + case DRM_FORMAT_ARGB1555: m = 0x7; break; - case OMAP_DSS_COLOR_RGB24U: + case DRM_FORMAT_XRGB8888: m = 0x8; break; - case OMAP_DSS_COLOR_RGB24P: + case DRM_FORMAT_RGB888: m = 0x9; break; - case OMAP_DSS_COLOR_YUV2: + case DRM_FORMAT_YUYV: m = 0xa; break; - case OMAP_DSS_COLOR_UYVY: + case DRM_FORMAT_UYVY: m = 0xb; break; - case OMAP_DSS_COLOR_ARGB32: + case DRM_FORMAT_ARGB8888: m = 0xc; break; - case OMAP_DSS_COLOR_RGBA32: + case DRM_FORMAT_RGBA8888: m = 0xd; break; - case OMAP_DSS_COLOR_RGBX32: + case DRM_FORMAT_RGBX8888: m = 0xe; break; - case OMAP_DSS_COLOR_XRGB16_1555: + case DRM_FORMAT_XRGB1555: m = 0xf; break; default: BUG(); return; } } else { - switch (color_mode) { - case OMAP_DSS_COLOR_RGB12U: + switch ((u32)color_mode) { + case DRM_FORMAT_RGBX4444: m = 0x4; break; - case OMAP_DSS_COLOR_ARGB16: + case DRM_FORMAT_ARGB4444: m = 0x5; break; - case OMAP_DSS_COLOR_RGB16: + case DRM_FORMAT_RGB565: m = 0x6; break; - case OMAP_DSS_COLOR_ARGB16_1555: + case DRM_FORMAT_ARGB1555: m = 0x7; break; - case OMAP_DSS_COLOR_RGB24U: + case DRM_FORMAT_XRGB8888: m = 0x8; break; - case OMAP_DSS_COLOR_RGB24P: + case DRM_FORMAT_RGB888: m = 0x9; break; - case OMAP_DSS_COLOR_RGBX16: + case DRM_FORMAT_XRGB4444: m = 0xa; break; - case OMAP_DSS_COLOR_RGBA16: + case DRM_FORMAT_RGBA4444: m = 0xb; break; - case OMAP_DSS_COLOR_ARGB32: + case DRM_FORMAT_ARGB8888: m = 0xc; break; - case OMAP_DSS_COLOR_RGBA32: + case DRM_FORMAT_RGBA8888: m = 0xd; break; - case OMAP_DSS_COLOR_RGBX32: + case DRM_FORMAT_RGBX8888: m = 0xe; break; - case OMAP_DSS_COLOR_XRGB16_1555: + case DRM_FORMAT_XRGB1555: m = 0xf; break; default: BUG(); return; @@ -980,10 +981,10 @@ static void dispc_ovl_set_color_mode(enum omap_plane_id plane,
static bool format_is_yuv(enum omap_color_mode color_mode) { - switch (color_mode) { - case OMAP_DSS_COLOR_YUV2: - case OMAP_DSS_COLOR_UYVY: - case OMAP_DSS_COLOR_NV12: + switch ((u32)color_mode) { + case DRM_FORMAT_YUYV: + case DRM_FORMAT_UYVY: + case DRM_FORMAT_NV12: return true; default: return false; @@ -1618,15 +1619,15 @@ static void dispc_ovl_set_accu_uv(enum omap_plane_id plane, return; }
- switch (color_mode) { - case OMAP_DSS_COLOR_NV12: + switch ((u32)color_mode) { + case DRM_FORMAT_NV12: if (ilace) accu_table = accu_nv12_ilace; else accu_table = accu_nv12; break; - case OMAP_DSS_COLOR_YUV2: - case OMAP_DSS_COLOR_UYVY: + case DRM_FORMAT_YUYV: + case DRM_FORMAT_UYVY: accu_table = accu_yuv; break; default: @@ -1726,8 +1727,8 @@ static void dispc_ovl_set_scaling_uv(enum omap_plane_id plane, dispc_ovl_set_accu_uv(plane, orig_width, orig_height, out_width, out_height, ilace, color_mode, rotation);
- switch (color_mode) { - case OMAP_DSS_COLOR_NV12: + switch ((u32)color_mode) { + case DRM_FORMAT_NV12: if (chroma_upscale) { /* UV is subsampled by 2 horizontally and vertically */ orig_height >>= 1; @@ -1739,8 +1740,8 @@ static void dispc_ovl_set_scaling_uv(enum omap_plane_id plane, }
break; - case OMAP_DSS_COLOR_YUV2: - case OMAP_DSS_COLOR_UYVY: + case DRM_FORMAT_YUYV: + case DRM_FORMAT_UYVY: /* For YUV422 with 90/270 rotation, we don't upsample chroma */ if (rotation == OMAP_DSS_ROT_0 || rotation == OMAP_DSS_ROT_180) { @@ -1812,8 +1813,8 @@ static void dispc_ovl_set_rotation_attrs(enum omap_plane_id plane, u8 rotation, bool row_repeat = false; int vidrot = 0;
- if (color_mode == OMAP_DSS_COLOR_YUV2 || - color_mode == OMAP_DSS_COLOR_UYVY) { + if (color_mode == DRM_FORMAT_YUYV || + color_mode == DRM_FORMAT_UYVY) {
if (mirroring) { switch (rotation) { @@ -1858,7 +1859,7 @@ static void dispc_ovl_set_rotation_attrs(enum omap_plane_id plane, u8 rotation, * NV12 in 1D mode must use ROTATION=1. Otherwise DSS will fetch extra * rows beyond the framebuffer, which may cause OCP error. */ - if (color_mode == OMAP_DSS_COLOR_NV12 && + if (color_mode == DRM_FORMAT_NV12 && rotation_type != OMAP_DSS_ROT_TILER) vidrot = 1;
@@ -1867,9 +1868,9 @@ static void dispc_ovl_set_rotation_attrs(enum omap_plane_id plane, u8 rotation, REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), row_repeat ? 1 : 0, 18, 18);
- if (dss_feat_color_mode_supported(plane, OMAP_DSS_COLOR_NV12)) { + if (dss_feat_color_mode_supported(plane, DRM_FORMAT_NV12)) { bool doublestride = - color_mode == OMAP_DSS_COLOR_NV12 && + color_mode == DRM_FORMAT_NV12 && rotation_type == OMAP_DSS_ROT_TILER && (rotation == OMAP_DSS_ROT_0 || rotation == OMAP_DSS_ROT_180);
@@ -1880,25 +1881,25 @@ static void dispc_ovl_set_rotation_attrs(enum omap_plane_id plane, u8 rotation,
static int color_mode_to_bpp(enum omap_color_mode color_mode) { - switch (color_mode) { - case OMAP_DSS_COLOR_NV12: + switch ((u32)color_mode) { + case DRM_FORMAT_NV12: return 8; - case OMAP_DSS_COLOR_RGB12U: - case OMAP_DSS_COLOR_RGB16: - case OMAP_DSS_COLOR_ARGB16: - case OMAP_DSS_COLOR_YUV2: - case OMAP_DSS_COLOR_UYVY: - case OMAP_DSS_COLOR_RGBA16: - case OMAP_DSS_COLOR_RGBX16: - case OMAP_DSS_COLOR_ARGB16_1555: - case OMAP_DSS_COLOR_XRGB16_1555: + case DRM_FORMAT_RGBX4444: + case DRM_FORMAT_RGB565: + case DRM_FORMAT_ARGB4444: + case DRM_FORMAT_YUYV: + case DRM_FORMAT_UYVY: + case DRM_FORMAT_RGBA4444: + case DRM_FORMAT_XRGB4444: + case DRM_FORMAT_ARGB1555: + case DRM_FORMAT_XRGB1555: return 16; - case OMAP_DSS_COLOR_RGB24P: + case DRM_FORMAT_RGB888: return 24; - case OMAP_DSS_COLOR_RGB24U: - case OMAP_DSS_COLOR_ARGB32: - case OMAP_DSS_COLOR_RGBA32: - case OMAP_DSS_COLOR_RGBX32: + case DRM_FORMAT_XRGB8888: + case DRM_FORMAT_ARGB8888: + case DRM_FORMAT_RGBA8888: + case DRM_FORMAT_RGBX8888: return 32; default: BUG(); @@ -1939,8 +1940,8 @@ static void calc_offset(u16 screen_width, u16 width,
*row_inc = pixinc(1 + (y_predecim * screen_width - width * x_predecim) + (fieldmode ? screen_width : 0), ps); - if (color_mode == OMAP_DSS_COLOR_YUV2 || - color_mode == OMAP_DSS_COLOR_UYVY) + if (color_mode == DRM_FORMAT_YUYV || + color_mode == DRM_FORMAT_UYVY) *pix_inc = pixinc(x_predecim, 2 * ps); else *pix_inc = pixinc(x_predecim, ps); @@ -2037,7 +2038,7 @@ static unsigned long calc_core_clk_five_taps(unsigned long pclk, do_div(tmp, out_width); core_clk = max_t(u32, core_clk, tmp);
- if (color_mode == OMAP_DSS_COLOR_RGB24U) + if (color_mode == DRM_FORMAT_XRGB8888) core_clk <<= 1; }
@@ -2265,7 +2266,7 @@ static int dispc_ovl_calc_scaling_44xx(unsigned long pclk, unsigned long lclk, return -EINVAL; }
- if (*decim_x > 4 && color_mode != OMAP_DSS_COLOR_NV12) { + if (*decim_x > 4 && color_mode != DRM_FORMAT_NV12) { /* * Let's disable all scaling that requires horizontal * decimation with higher factor than 4, until we have @@ -2494,7 +2495,7 @@ static int dispc_ovl_setup_common(enum omap_plane_id plane, dispc_ovl_set_ba0(plane, paddr + offset0); dispc_ovl_set_ba1(plane, paddr + offset1);
- if (OMAP_DSS_COLOR_NV12 == color_mode) { + if (color_mode == DRM_FORMAT_NV12) { dispc_ovl_set_ba0_uv(plane, p_uv_addr + offset0); dispc_ovl_set_ba1_uv(plane, p_uv_addr + offset1); } @@ -2584,15 +2585,15 @@ int dispc_wb_setup(const struct omap_dss_writeback_info *wi, wi->pre_mult_alpha, global_alpha, wi->rotation_type, replication, vm, mem_to_mem);
- switch (wi->color_mode) { - case OMAP_DSS_COLOR_RGB16: - case OMAP_DSS_COLOR_RGB24P: - case OMAP_DSS_COLOR_ARGB16: - case OMAP_DSS_COLOR_RGBA16: - case OMAP_DSS_COLOR_RGB12U: - case OMAP_DSS_COLOR_ARGB16_1555: - case OMAP_DSS_COLOR_XRGB16_1555: - case OMAP_DSS_COLOR_RGBX16: + switch ((u32)wi->color_mode) { + case DRM_FORMAT_RGB565: + case DRM_FORMAT_RGB888: + case DRM_FORMAT_ARGB4444: + case DRM_FORMAT_RGBA4444: + case DRM_FORMAT_RGBX4444: + case DRM_FORMAT_ARGB1555: + case DRM_FORMAT_XRGB1555: + case DRM_FORMAT_XRGB4444: truncation = true; break; default: @@ -3918,7 +3919,7 @@ static const struct dispc_errata_i734_data { .ovli = { .screen_width = 1, .width = 1, .height = 1, - .color_mode = OMAP_DSS_COLOR_RGB24U, + .color_mode = DRM_FORMAT_XRGB8888, .rotation = OMAP_DSS_ROT_0, .rotation_type = OMAP_DSS_ROT_NONE, .mirror = 0, diff --git a/drivers/gpu/drm/omapdrm/dss/dss_features.c b/drivers/gpu/drm/omapdrm/dss/dss_features.c index f9b0324cc263..fe58a6cf4263 100644 --- a/drivers/gpu/drm/omapdrm/dss/dss_features.c +++ b/drivers/gpu/drm/omapdrm/dss/dss_features.c @@ -22,6 +22,7 @@ #include <linux/types.h> #include <linux/err.h> #include <linux/slab.h> +#include <drm/drm_fourcc.h>
#include "omapdss.h" #include "dss.h" @@ -235,98 +236,98 @@ static const enum omap_color_mode *omap2_dss_supported_color_modes[] = {
/* OMAP_DSS_GFX */ COLOR_ARRAY( - OMAP_DSS_COLOR_RGB12U, OMAP_DSS_COLOR_RGB16, - OMAP_DSS_COLOR_RGB24U, OMAP_DSS_COLOR_RGB24P), + DRM_FORMAT_RGBX4444, DRM_FORMAT_RGB565, + DRM_FORMAT_XRGB8888, DRM_FORMAT_RGB888),
/* OMAP_DSS_VIDEO1 */ COLOR_ARRAY( - OMAP_DSS_COLOR_RGB16, OMAP_DSS_COLOR_RGB24U, - OMAP_DSS_COLOR_RGB24P, OMAP_DSS_COLOR_YUV2, - OMAP_DSS_COLOR_UYVY), + DRM_FORMAT_RGB565, DRM_FORMAT_XRGB8888, + DRM_FORMAT_RGB888, DRM_FORMAT_YUYV, + DRM_FORMAT_UYVY),
/* OMAP_DSS_VIDEO2 */ COLOR_ARRAY( - OMAP_DSS_COLOR_RGB16, OMAP_DSS_COLOR_RGB24U, - OMAP_DSS_COLOR_RGB24P, OMAP_DSS_COLOR_YUV2, - OMAP_DSS_COLOR_UYVY), + DRM_FORMAT_RGB565, DRM_FORMAT_XRGB8888, + DRM_FORMAT_RGB888, DRM_FORMAT_YUYV, + DRM_FORMAT_UYVY), };
static const enum omap_color_mode *omap3_dss_supported_color_modes[] = { /* OMAP_DSS_GFX */ COLOR_ARRAY( - OMAP_DSS_COLOR_RGB12U, OMAP_DSS_COLOR_ARGB16, - OMAP_DSS_COLOR_RGB16, OMAP_DSS_COLOR_RGB24U, - OMAP_DSS_COLOR_RGB24P, OMAP_DSS_COLOR_ARGB32, - OMAP_DSS_COLOR_RGBA32, OMAP_DSS_COLOR_RGBX32), + DRM_FORMAT_RGBX4444, DRM_FORMAT_ARGB4444, + DRM_FORMAT_RGB565, DRM_FORMAT_XRGB8888, + DRM_FORMAT_RGB888, DRM_FORMAT_ARGB8888, + DRM_FORMAT_RGBA8888, DRM_FORMAT_RGBX8888),
/* OMAP_DSS_VIDEO1 */ COLOR_ARRAY( - OMAP_DSS_COLOR_RGB24U, OMAP_DSS_COLOR_RGB24P, - OMAP_DSS_COLOR_RGB12U, OMAP_DSS_COLOR_RGB16, - OMAP_DSS_COLOR_YUV2, OMAP_DSS_COLOR_UYVY), + DRM_FORMAT_XRGB8888, DRM_FORMAT_RGB888, + DRM_FORMAT_RGBX4444, DRM_FORMAT_RGB565, + DRM_FORMAT_YUYV, DRM_FORMAT_UYVY),
/* OMAP_DSS_VIDEO2 */ COLOR_ARRAY( - OMAP_DSS_COLOR_RGB12U, OMAP_DSS_COLOR_ARGB16, - OMAP_DSS_COLOR_RGB16, OMAP_DSS_COLOR_RGB24U, - OMAP_DSS_COLOR_RGB24P, OMAP_DSS_COLOR_YUV2, - OMAP_DSS_COLOR_UYVY, OMAP_DSS_COLOR_ARGB32, - OMAP_DSS_COLOR_RGBA32, OMAP_DSS_COLOR_RGBX32), + DRM_FORMAT_RGBX4444, DRM_FORMAT_ARGB4444, + DRM_FORMAT_RGB565, DRM_FORMAT_XRGB8888, + DRM_FORMAT_RGB888, DRM_FORMAT_YUYV, + DRM_FORMAT_UYVY, DRM_FORMAT_ARGB8888, + DRM_FORMAT_RGBA8888, DRM_FORMAT_RGBX8888), };
static const enum omap_color_mode *omap4_dss_supported_color_modes[] = { /* OMAP_DSS_GFX */ COLOR_ARRAY( - OMAP_DSS_COLOR_RGB12U, OMAP_DSS_COLOR_ARGB16, - OMAP_DSS_COLOR_RGB16, OMAP_DSS_COLOR_RGB24U, - OMAP_DSS_COLOR_RGB24P, OMAP_DSS_COLOR_ARGB32, - OMAP_DSS_COLOR_RGBA32, OMAP_DSS_COLOR_RGBX32, - OMAP_DSS_COLOR_ARGB16_1555, OMAP_DSS_COLOR_RGBX16, - OMAP_DSS_COLOR_RGBA16, OMAP_DSS_COLOR_XRGB16_1555), + DRM_FORMAT_RGBX4444, DRM_FORMAT_ARGB4444, + DRM_FORMAT_RGB565, DRM_FORMAT_XRGB8888, + DRM_FORMAT_RGB888, DRM_FORMAT_ARGB8888, + DRM_FORMAT_RGBA8888, DRM_FORMAT_RGBX8888, + DRM_FORMAT_ARGB1555, DRM_FORMAT_XRGB4444, + DRM_FORMAT_RGBA4444, DRM_FORMAT_XRGB1555),
/* OMAP_DSS_VIDEO1 */ COLOR_ARRAY( - OMAP_DSS_COLOR_RGB16, OMAP_DSS_COLOR_RGB12U, - OMAP_DSS_COLOR_YUV2, OMAP_DSS_COLOR_ARGB16_1555, - OMAP_DSS_COLOR_RGBA32, OMAP_DSS_COLOR_NV12, - OMAP_DSS_COLOR_RGBA16, OMAP_DSS_COLOR_RGB24U, - OMAP_DSS_COLOR_RGB24P, OMAP_DSS_COLOR_UYVY, - OMAP_DSS_COLOR_ARGB16, OMAP_DSS_COLOR_XRGB16_1555, - OMAP_DSS_COLOR_ARGB32, OMAP_DSS_COLOR_RGBX16, - OMAP_DSS_COLOR_RGBX32), + DRM_FORMAT_RGB565, DRM_FORMAT_RGBX4444, + DRM_FORMAT_YUYV, DRM_FORMAT_ARGB1555, + DRM_FORMAT_RGBA8888, DRM_FORMAT_NV12, + DRM_FORMAT_RGBA4444, DRM_FORMAT_XRGB8888, + DRM_FORMAT_RGB888, DRM_FORMAT_UYVY, + DRM_FORMAT_ARGB4444, DRM_FORMAT_XRGB1555, + DRM_FORMAT_ARGB8888, DRM_FORMAT_XRGB4444, + DRM_FORMAT_RGBX8888),
/* OMAP_DSS_VIDEO2 */ COLOR_ARRAY( - OMAP_DSS_COLOR_RGB16, OMAP_DSS_COLOR_RGB12U, - OMAP_DSS_COLOR_YUV2, OMAP_DSS_COLOR_ARGB16_1555, - OMAP_DSS_COLOR_RGBA32, OMAP_DSS_COLOR_NV12, - OMAP_DSS_COLOR_RGBA16, OMAP_DSS_COLOR_RGB24U, - OMAP_DSS_COLOR_RGB24P, OMAP_DSS_COLOR_UYVY, - OMAP_DSS_COLOR_ARGB16, OMAP_DSS_COLOR_XRGB16_1555, - OMAP_DSS_COLOR_ARGB32, OMAP_DSS_COLOR_RGBX16, - OMAP_DSS_COLOR_RGBX32), + DRM_FORMAT_RGB565, DRM_FORMAT_RGBX4444, + DRM_FORMAT_YUYV, DRM_FORMAT_ARGB1555, + DRM_FORMAT_RGBA8888, DRM_FORMAT_NV12, + DRM_FORMAT_RGBA4444, DRM_FORMAT_XRGB8888, + DRM_FORMAT_RGB888, DRM_FORMAT_UYVY, + DRM_FORMAT_ARGB4444, DRM_FORMAT_XRGB1555, + DRM_FORMAT_ARGB8888, DRM_FORMAT_XRGB4444, + DRM_FORMAT_RGBX8888),
/* OMAP_DSS_VIDEO3 */ COLOR_ARRAY( - OMAP_DSS_COLOR_RGB16, OMAP_DSS_COLOR_RGB12U, - OMAP_DSS_COLOR_YUV2, OMAP_DSS_COLOR_ARGB16_1555, - OMAP_DSS_COLOR_RGBA32, OMAP_DSS_COLOR_NV12, - OMAP_DSS_COLOR_RGBA16, OMAP_DSS_COLOR_RGB24U, - OMAP_DSS_COLOR_RGB24P, OMAP_DSS_COLOR_UYVY, - OMAP_DSS_COLOR_ARGB16, OMAP_DSS_COLOR_XRGB16_1555, - OMAP_DSS_COLOR_ARGB32, OMAP_DSS_COLOR_RGBX16, - OMAP_DSS_COLOR_RGBX32), + DRM_FORMAT_RGB565, DRM_FORMAT_RGBX4444, + DRM_FORMAT_YUYV, DRM_FORMAT_ARGB1555, + DRM_FORMAT_RGBA8888, DRM_FORMAT_NV12, + DRM_FORMAT_RGBA4444, DRM_FORMAT_XRGB8888, + DRM_FORMAT_RGB888, DRM_FORMAT_UYVY, + DRM_FORMAT_ARGB4444, DRM_FORMAT_XRGB1555, + DRM_FORMAT_ARGB8888, DRM_FORMAT_XRGB4444, + DRM_FORMAT_RGBX8888),
/* OMAP_DSS_WB */ COLOR_ARRAY( - OMAP_DSS_COLOR_RGB16, OMAP_DSS_COLOR_RGB12U, - OMAP_DSS_COLOR_YUV2, OMAP_DSS_COLOR_ARGB16_1555, - OMAP_DSS_COLOR_RGBA32, OMAP_DSS_COLOR_NV12, - OMAP_DSS_COLOR_RGBA16, OMAP_DSS_COLOR_RGB24U, - OMAP_DSS_COLOR_RGB24P, OMAP_DSS_COLOR_UYVY, - OMAP_DSS_COLOR_ARGB16, OMAP_DSS_COLOR_XRGB16_1555, - OMAP_DSS_COLOR_ARGB32, OMAP_DSS_COLOR_RGBX16, - OMAP_DSS_COLOR_RGBX32), + DRM_FORMAT_RGB565, DRM_FORMAT_RGBX4444, + DRM_FORMAT_YUYV, DRM_FORMAT_ARGB1555, + DRM_FORMAT_RGBA8888, DRM_FORMAT_NV12, + DRM_FORMAT_RGBA4444, DRM_FORMAT_XRGB8888, + DRM_FORMAT_RGB888, DRM_FORMAT_UYVY, + DRM_FORMAT_ARGB4444, DRM_FORMAT_XRGB1555, + DRM_FORMAT_ARGB8888, DRM_FORMAT_XRGB4444, + DRM_FORMAT_RGBX8888), };
static const enum omap_overlay_caps omap2_dss_overlay_caps[] = { diff --git a/drivers/gpu/drm/omapdrm/dss/omapdss.h b/drivers/gpu/drm/omapdrm/dss/omapdss.h index 334680673074..cb19c388a135 100644 --- a/drivers/gpu/drm/omapdrm/dss/omapdss.h +++ b/drivers/gpu/drm/omapdrm/dss/omapdss.h @@ -93,21 +93,7 @@ enum omap_channel { };
enum omap_color_mode { - OMAP_DSS_COLOR_RGB12U = 1 << 4, /* RGB12, 16-bit container */ - OMAP_DSS_COLOR_ARGB16 = 1 << 5, /* ARGB16 */ - OMAP_DSS_COLOR_RGB16 = 1 << 6, /* RGB16 */ - OMAP_DSS_COLOR_RGB24U = 1 << 7, /* RGB24, 32-bit container */ - OMAP_DSS_COLOR_RGB24P = 1 << 8, /* RGB24, 24-bit container */ - OMAP_DSS_COLOR_YUV2 = 1 << 9, /* YUV2 4:2:2 co-sited */ - OMAP_DSS_COLOR_UYVY = 1 << 10, /* UYVY 4:2:2 co-sited */ - OMAP_DSS_COLOR_ARGB32 = 1 << 11, /* ARGB32 */ - OMAP_DSS_COLOR_RGBA32 = 1 << 12, /* RGBA32 */ - OMAP_DSS_COLOR_RGBX32 = 1 << 13, /* RGBx32 */ - OMAP_DSS_COLOR_NV12 = 1 << 14, /* NV12 format: YUV 4:2:0 */ - OMAP_DSS_COLOR_RGBA16 = 1 << 15, /* RGBA16 - 4444 */ - OMAP_DSS_COLOR_RGBX16 = 1 << 16, /* RGBx16 - 4444 */ - OMAP_DSS_COLOR_ARGB16_1555 = 1 << 17, /* ARGB16 - 1555 */ - OMAP_DSS_COLOR_XRGB16_1555 = 1 << 18, /* xRGB16 - 1555 */ + _UNUSED_, };
enum omap_dss_load_mode { diff --git a/drivers/gpu/drm/omapdrm/omap_fb.c b/drivers/gpu/drm/omapdrm/omap_fb.c index a53022cbb14f..cc8c9ffb68db 100644 --- a/drivers/gpu/drm/omapdrm/omap_fb.c +++ b/drivers/gpu/drm/omapdrm/omap_fb.c @@ -35,24 +35,24 @@ static const struct { uint32_t pixel_format; } formats[] = { /* 16bpp [A]RGB: */ - { OMAP_DSS_COLOR_RGB16, DRM_FORMAT_RGB565 }, /* RGB16-565 */ - { OMAP_DSS_COLOR_RGB12U, DRM_FORMAT_RGBX4444 }, /* RGB12x-4444 */ - { OMAP_DSS_COLOR_RGBX16, DRM_FORMAT_XRGB4444 }, /* xRGB12-4444 */ - { OMAP_DSS_COLOR_RGBA16, DRM_FORMAT_RGBA4444 }, /* RGBA12-4444 */ - { OMAP_DSS_COLOR_ARGB16, DRM_FORMAT_ARGB4444 }, /* ARGB16-4444 */ - { OMAP_DSS_COLOR_XRGB16_1555, DRM_FORMAT_XRGB1555 }, /* xRGB15-1555 */ - { OMAP_DSS_COLOR_ARGB16_1555, DRM_FORMAT_ARGB1555 }, /* ARGB16-1555 */ + { DRM_FORMAT_RGB565, DRM_FORMAT_RGB565 }, /* RGB16-565 */ + { DRM_FORMAT_RGBX4444, DRM_FORMAT_RGBX4444 }, /* RGB12x-4444 */ + { DRM_FORMAT_XRGB4444, DRM_FORMAT_XRGB4444 }, /* xRGB12-4444 */ + { DRM_FORMAT_RGBA4444, DRM_FORMAT_RGBA4444 }, /* RGBA12-4444 */ + { DRM_FORMAT_ARGB4444, DRM_FORMAT_ARGB4444 }, /* ARGB16-4444 */ + { DRM_FORMAT_XRGB1555, DRM_FORMAT_XRGB1555 }, /* xRGB15-1555 */ + { DRM_FORMAT_ARGB1555, DRM_FORMAT_ARGB1555 }, /* ARGB16-1555 */ /* 24bpp RGB: */ - { OMAP_DSS_COLOR_RGB24P, DRM_FORMAT_RGB888 }, /* RGB24-888 */ + { DRM_FORMAT_RGB888, DRM_FORMAT_RGB888 }, /* RGB24-888 */ /* 32bpp [A]RGB: */ - { OMAP_DSS_COLOR_RGBX32, DRM_FORMAT_RGBX8888 }, /* RGBx24-8888 */ - { OMAP_DSS_COLOR_RGB24U, DRM_FORMAT_XRGB8888 }, /* xRGB24-8888 */ - { OMAP_DSS_COLOR_RGBA32, DRM_FORMAT_RGBA8888 }, /* RGBA32-8888 */ - { OMAP_DSS_COLOR_ARGB32, DRM_FORMAT_ARGB8888 }, /* ARGB32-8888 */ + { DRM_FORMAT_RGBX8888, DRM_FORMAT_RGBX8888 }, /* RGBx24-8888 */ + { DRM_FORMAT_XRGB8888, DRM_FORMAT_XRGB8888 }, /* xRGB24-8888 */ + { DRM_FORMAT_RGBA8888, DRM_FORMAT_RGBA8888 }, /* RGBA32-8888 */ + { DRM_FORMAT_ARGB8888, DRM_FORMAT_ARGB8888 }, /* ARGB32-8888 */ /* YUV: */ - { OMAP_DSS_COLOR_NV12, DRM_FORMAT_NV12 }, - { OMAP_DSS_COLOR_YUV2, DRM_FORMAT_YUYV }, - { OMAP_DSS_COLOR_UYVY, DRM_FORMAT_UYVY }, + { DRM_FORMAT_NV12, DRM_FORMAT_NV12 }, + { DRM_FORMAT_YUYV, DRM_FORMAT_YUYV }, + { DRM_FORMAT_UYVY, DRM_FORMAT_UYVY }, };
/* convert from overlay's pixel formats bitmask to an array of fourcc's */ @@ -247,7 +247,7 @@ void omap_framebuffer_update_scanout(struct drm_framebuffer *fb, /* convert to pixels: */ info->screen_width /= format->cpp[0];
- if (omap_fb->dss_format == OMAP_DSS_COLOR_NV12) { + if (omap_fb->dss_format == DRM_FORMAT_NV12) { plane = &omap_fb->planes[1];
if (info->rotation_type == OMAP_DSS_ROT_TILER) {
Hi Tomi,
Thank you for the patch.
On Thursday 04 May 2017 13:23:28 Tomi Valkeinen wrote:
This patch changes omapdrm to use DRM_FORMAT_* values instead of OMAP_DSS_COLOR_* enum. This patch only changes the uses of OMAP_DSS_COLOR_*, so we still keep the enum omap_color_mode. I.e. we now temporarily pass DRM_FORMAT_* values with enum omap_color_mode.
This causes a few compile warnings with switch()es, so those need a typecast to (u32) to silence the warnings.
As commented in patch 13/16, the warning is there for a reason, I think you should move patch 13/16 before this one.
Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com
I'll trust your search & replace skills and won't verify the formats. For the rest,
Acked-by: Laurent Pinchart laurent.pinchart@ideasonboard.com
drivers/gpu/drm/omapdrm/dss/dispc.c | 157 +++++++++++++------------ drivers/gpu/drm/omapdrm/dss/dss_features.c | 117 ++++++++++----------- drivers/gpu/drm/omapdrm/dss/omapdss.h | 16 +-- drivers/gpu/drm/omapdrm/omap_fb.c | 32 +++--- 4 files changed, 155 insertions(+), 167 deletions(-)
diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c b/drivers/gpu/drm/omapdrm/dss/dispc.c index dcd83efda3af..c0f8109042c6 100644 --- a/drivers/gpu/drm/omapdrm/dss/dispc.c +++ b/drivers/gpu/drm/omapdrm/dss/dispc.c @@ -40,6 +40,7 @@ #include <linux/regmap.h> #include <linux/of.h> #include <linux/component.h> +#include <drm/drm_fourcc.h>
#include "omapdss.h" #include "dss.h" @@ -158,7 +159,7 @@ enum omap_color_component { */ DISPC_COLOR_COMPONENT_RGB_Y = 1 << 0, /* used for UV component for
* OMAP_DSS_COLOR_YUV2, OMAP_DSS_COLOR_UYVY, OMAP_DSS_COLOR_NV12
* DRM_FORMAT_YUYV, DRM_FORMAT_UYVY, DRM_FORMAT_NV12*/ DISPC_COLOR_COMPONENT_UV = 1 << 1,
- color formats on OMAP4
@@ -910,65 +911,65 @@ static void dispc_ovl_set_color_mode(enum omap_plane_id plane, { u32 m = 0; if (plane != OMAP_DSS_GFX) {
switch (color_mode) {case OMAP_DSS_COLOR_NV12:
switch ((u32)color_mode) {case DRM_FORMAT_NV12: m = 0x0; break;
case OMAP_DSS_COLOR_RGBX16:
case DRM_FORMAT_XRGB4444: m = 0x1; break;
case OMAP_DSS_COLOR_RGBA16:
case DRM_FORMAT_RGBA4444: m = 0x2; break;
case OMAP_DSS_COLOR_RGB12U:
case DRM_FORMAT_RGBX4444: m = 0x4; break;
case OMAP_DSS_COLOR_ARGB16:
case DRM_FORMAT_ARGB4444: m = 0x5; break;
case OMAP_DSS_COLOR_RGB16:
case DRM_FORMAT_RGB565: m = 0x6; break;
case OMAP_DSS_COLOR_ARGB16_1555:
case DRM_FORMAT_ARGB1555: m = 0x7; break;
case OMAP_DSS_COLOR_RGB24U:
case DRM_FORMAT_XRGB8888: m = 0x8; break;
case OMAP_DSS_COLOR_RGB24P:
case DRM_FORMAT_RGB888: m = 0x9; break;
case OMAP_DSS_COLOR_YUV2:
case DRM_FORMAT_YUYV: m = 0xa; break;
case OMAP_DSS_COLOR_UYVY:
case DRM_FORMAT_UYVY: m = 0xb; break;
case OMAP_DSS_COLOR_ARGB32:
case DRM_FORMAT_ARGB8888: m = 0xc; break;
case OMAP_DSS_COLOR_RGBA32:
case DRM_FORMAT_RGBA8888: m = 0xd; break;
case OMAP_DSS_COLOR_RGBX32:
case DRM_FORMAT_RGBX8888: m = 0xe; break;
case OMAP_DSS_COLOR_XRGB16_1555:
case DRM_FORMAT_XRGB1555: m = 0xf; break;
switch (color_mode) {case OMAP_DSS_COLOR_RGB12U:
switch ((u32)color_mode) {case DRM_FORMAT_RGBX4444: m = 0x4; break;
case OMAP_DSS_COLOR_ARGB16:
case DRM_FORMAT_ARGB4444: m = 0x5; break;
case OMAP_DSS_COLOR_RGB16:
case DRM_FORMAT_RGB565: m = 0x6; break;
case OMAP_DSS_COLOR_ARGB16_1555:
case DRM_FORMAT_ARGB1555: m = 0x7; break;
case OMAP_DSS_COLOR_RGB24U:
case DRM_FORMAT_XRGB8888: m = 0x8; break;
case OMAP_DSS_COLOR_RGB24P:
case DRM_FORMAT_RGB888: m = 0x9; break;
case OMAP_DSS_COLOR_RGBX16:
case DRM_FORMAT_XRGB4444: m = 0xa; break;
case OMAP_DSS_COLOR_RGBA16:
case DRM_FORMAT_RGBA4444: m = 0xb; break;
case OMAP_DSS_COLOR_ARGB32:
case DRM_FORMAT_ARGB8888: m = 0xc; break;
case OMAP_DSS_COLOR_RGBA32:
case DRM_FORMAT_RGBA8888: m = 0xd; break;
case OMAP_DSS_COLOR_RGBX32:
case DRM_FORMAT_RGBX8888: m = 0xe; break;
case OMAP_DSS_COLOR_XRGB16_1555:
case DRM_FORMAT_XRGB1555: m = 0xf; break;@@ -980,10 +981,10 @@ static void dispc_ovl_set_color_mode(enum omap_plane_id plane,
static bool format_is_yuv(enum omap_color_mode color_mode) {
- switch (color_mode) {
- case OMAP_DSS_COLOR_YUV2:
- case OMAP_DSS_COLOR_UYVY:
- case OMAP_DSS_COLOR_NV12:
- switch ((u32)color_mode) {
- case DRM_FORMAT_YUYV:
- case DRM_FORMAT_UYVY:
- case DRM_FORMAT_NV12: return true; default: return false;
@@ -1618,15 +1619,15 @@ static void dispc_ovl_set_accu_uv(enum omap_plane_id plane, return; }
- switch (color_mode) {
- case OMAP_DSS_COLOR_NV12:
- switch ((u32)color_mode) {
- case DRM_FORMAT_NV12: if (ilace) accu_table = accu_nv12_ilace; else accu_table = accu_nv12; break;
- case OMAP_DSS_COLOR_YUV2:
- case OMAP_DSS_COLOR_UYVY:
- case DRM_FORMAT_YUYV:
- case DRM_FORMAT_UYVY: accu_table = accu_yuv; break; default:
@@ -1726,8 +1727,8 @@ static void dispc_ovl_set_scaling_uv(enum omap_plane_id plane, dispc_ovl_set_accu_uv(plane, orig_width, orig_height, out_width, out_height, ilace, color_mode, rotation);
- switch (color_mode) {
- case OMAP_DSS_COLOR_NV12:
- switch ((u32)color_mode) {
- case DRM_FORMAT_NV12: if (chroma_upscale) { /* UV is subsampled by 2 horizontally and vertically
*/
orig_height >>= 1;@@ -1739,8 +1740,8 @@ static void dispc_ovl_set_scaling_uv(enum omap_plane_id plane, }
break;
- case OMAP_DSS_COLOR_YUV2:
- case OMAP_DSS_COLOR_UYVY:
- case DRM_FORMAT_YUYV:
- case DRM_FORMAT_UYVY: /* For YUV422 with 90/270 rotation, we don't upsample chroma
*/
if (rotation == OMAP_DSS_ROT_0 || rotation == OMAP_DSS_ROT_180) {@@ -1812,8 +1813,8 @@ static void dispc_ovl_set_rotation_attrs(enum omap_plane_id plane, u8 rotation, bool row_repeat = false; int vidrot = 0;
- if (color_mode == OMAP_DSS_COLOR_YUV2 ||
color_mode == OMAP_DSS_COLOR_UYVY) {
if (color_mode == DRM_FORMAT_YUYV ||
color_mode == DRM_FORMAT_UYVY) {if (mirroring) { switch (rotation) {
@@ -1858,7 +1859,7 @@ static void dispc_ovl_set_rotation_attrs(enum omap_plane_id plane, u8 rotation, * NV12 in 1D mode must use ROTATION=1. Otherwise DSS will fetch extra * rows beyond the framebuffer, which may cause OCP error. */
- if (color_mode == OMAP_DSS_COLOR_NV12 &&
- if (color_mode == DRM_FORMAT_NV12 && rotation_type != OMAP_DSS_ROT_TILER) vidrot = 1;
@@ -1867,9 +1868,9 @@ static void dispc_ovl_set_rotation_attrs(enum omap_plane_id plane, u8 rotation, REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), row_repeat ? 1 : 0, 18, 18);
- if (dss_feat_color_mode_supported(plane, OMAP_DSS_COLOR_NV12)) {
- if (dss_feat_color_mode_supported(plane, DRM_FORMAT_NV12)) { bool doublestride =
color_mode == OMAP_DSS_COLOR_NV12 &&
color_mode == DRM_FORMAT_NV12 && rotation_type == OMAP_DSS_ROT_TILER && (rotation == OMAP_DSS_ROT_0 || rotation ==
OMAP_DSS_ROT_180);
@@ -1880,25 +1881,25 @@ static void dispc_ovl_set_rotation_attrs(enum omap_plane_id plane, u8 rotation,
static int color_mode_to_bpp(enum omap_color_mode color_mode) {
- switch (color_mode) {
- case OMAP_DSS_COLOR_NV12:
- switch ((u32)color_mode) {
- case DRM_FORMAT_NV12: return 8;
- case OMAP_DSS_COLOR_RGB12U:
- case OMAP_DSS_COLOR_RGB16:
- case OMAP_DSS_COLOR_ARGB16:
- case OMAP_DSS_COLOR_YUV2:
- case OMAP_DSS_COLOR_UYVY:
- case OMAP_DSS_COLOR_RGBA16:
- case OMAP_DSS_COLOR_RGBX16:
- case OMAP_DSS_COLOR_ARGB16_1555:
- case OMAP_DSS_COLOR_XRGB16_1555:
- case DRM_FORMAT_RGBX4444:
- case DRM_FORMAT_RGB565:
- case DRM_FORMAT_ARGB4444:
- case DRM_FORMAT_YUYV:
- case DRM_FORMAT_UYVY:
- case DRM_FORMAT_RGBA4444:
- case DRM_FORMAT_XRGB4444:
- case DRM_FORMAT_ARGB1555:
- case DRM_FORMAT_XRGB1555: return 16;
- case OMAP_DSS_COLOR_RGB24P:
- case DRM_FORMAT_RGB888: return 24;
- case OMAP_DSS_COLOR_RGB24U:
- case OMAP_DSS_COLOR_ARGB32:
- case OMAP_DSS_COLOR_RGBA32:
- case OMAP_DSS_COLOR_RGBX32:
- case DRM_FORMAT_XRGB8888:
- case DRM_FORMAT_ARGB8888:
- case DRM_FORMAT_RGBA8888:
- case DRM_FORMAT_RGBX8888: return 32; default: BUG();
@@ -1939,8 +1940,8 @@ static void calc_offset(u16 screen_width, u16 width,
*row_inc = pixinc(1 + (y_predecim * screen_width - width * x_predecim)
+
(fieldmode ? screen_width : 0), ps);
- if (color_mode == OMAP_DSS_COLOR_YUV2 ||
color_mode == OMAP_DSS_COLOR_UYVY)
- if (color_mode == DRM_FORMAT_YUYV ||
color_mode == DRM_FORMAT_UYVY)@@ -2037,7 +2038,7 @@ static unsigned long calc_core_clk_five_taps(unsigned long pclk, do_div(tmp, out_width); core_clk = max_t(u32, core_clk, tmp);
if (color_mode == OMAP_DSS_COLOR_RGB24U)
if (color_mode == DRM_FORMAT_XRGB8888) core_clk <<= 1;@@ -2265,7 +2266,7 @@ static int dispc_ovl_calc_scaling_44xx(unsigned long pclk, unsigned long lclk, return -EINVAL; }
- if (*decim_x > 4 && color_mode != OMAP_DSS_COLOR_NV12) {
- if (*decim_x > 4 && color_mode != DRM_FORMAT_NV12) { /*
- Let's disable all scaling that requires horizontal
- decimation with higher factor than 4, until we have
@@ -2494,7 +2495,7 @@ static int dispc_ovl_setup_common(enum omap_plane_id plane, dispc_ovl_set_ba0(plane, paddr + offset0); dispc_ovl_set_ba1(plane, paddr + offset1);
- if (OMAP_DSS_COLOR_NV12 == color_mode) {
- if (color_mode == DRM_FORMAT_NV12) { dispc_ovl_set_ba0_uv(plane, p_uv_addr + offset0); dispc_ovl_set_ba1_uv(plane, p_uv_addr + offset1); }
@@ -2584,15 +2585,15 @@ int dispc_wb_setup(const struct omap_dss_writeback_info *wi, wi->pre_mult_alpha, global_alpha, wi->rotation_type, replication, vm, mem_to_mem);
- switch (wi->color_mode) {
- case OMAP_DSS_COLOR_RGB16:
- case OMAP_DSS_COLOR_RGB24P:
- case OMAP_DSS_COLOR_ARGB16:
- case OMAP_DSS_COLOR_RGBA16:
- case OMAP_DSS_COLOR_RGB12U:
- case OMAP_DSS_COLOR_ARGB16_1555:
- case OMAP_DSS_COLOR_XRGB16_1555:
- case OMAP_DSS_COLOR_RGBX16:
- switch ((u32)wi->color_mode) {
- case DRM_FORMAT_RGB565:
- case DRM_FORMAT_RGB888:
- case DRM_FORMAT_ARGB4444:
- case DRM_FORMAT_RGBA4444:
- case DRM_FORMAT_RGBX4444:
- case DRM_FORMAT_ARGB1555:
- case DRM_FORMAT_XRGB1555:
- case DRM_FORMAT_XRGB4444: truncation = true; break; default:
@@ -3918,7 +3919,7 @@ static const struct dispc_errata_i734_data { .ovli = { .screen_width = 1, .width = 1, .height = 1,
.color_mode = OMAP_DSS_COLOR_RGB24U,
.color_mode = DRM_FORMAT_XRGB8888,diff --git a/drivers/gpu/drm/omapdrm/dss/dss_features.c b/drivers/gpu/drm/omapdrm/dss/dss_features.c index f9b0324cc263..fe58a6cf4263 100644 --- a/drivers/gpu/drm/omapdrm/dss/dss_features.c +++ b/drivers/gpu/drm/omapdrm/dss/dss_features.c @@ -22,6 +22,7 @@ #include <linux/types.h> #include <linux/err.h> #include <linux/slab.h> +#include <drm/drm_fourcc.h>
#include "omapdss.h" #include "dss.h" @@ -235,98 +236,98 @@ static const enum omap_color_mode *omap2_dss_supported_color_modes[] = {
/* OMAP_DSS_GFX */ COLOR_ARRAY(
- OMAP_DSS_COLOR_RGB12U, OMAP_DSS_COLOR_RGB16,
- OMAP_DSS_COLOR_RGB24U, OMAP_DSS_COLOR_RGB24P),
DRM_FORMAT_RGBX4444, DRM_FORMAT_RGB565,
DRM_FORMAT_XRGB8888, DRM_FORMAT_RGB888),
/* OMAP_DSS_VIDEO1 */ COLOR_ARRAY(
- OMAP_DSS_COLOR_RGB16, OMAP_DSS_COLOR_RGB24U,
- OMAP_DSS_COLOR_RGB24P, OMAP_DSS_COLOR_YUV2,
- OMAP_DSS_COLOR_UYVY),
DRM_FORMAT_RGB565, DRM_FORMAT_XRGB8888,
DRM_FORMAT_RGB888, DRM_FORMAT_YUYV,
DRM_FORMAT_UYVY),
/* OMAP_DSS_VIDEO2 */ COLOR_ARRAY(
- OMAP_DSS_COLOR_RGB16, OMAP_DSS_COLOR_RGB24U,
- OMAP_DSS_COLOR_RGB24P, OMAP_DSS_COLOR_YUV2,
- OMAP_DSS_COLOR_UYVY),
- DRM_FORMAT_RGB565, DRM_FORMAT_XRGB8888,
- DRM_FORMAT_RGB888, DRM_FORMAT_YUYV,
- DRM_FORMAT_UYVY),
};
static const enum omap_color_mode *omap3_dss_supported_color_modes[] = { /* OMAP_DSS_GFX */ COLOR_ARRAY(
- OMAP_DSS_COLOR_RGB12U, OMAP_DSS_COLOR_ARGB16,
- OMAP_DSS_COLOR_RGB16, OMAP_DSS_COLOR_RGB24U,
- OMAP_DSS_COLOR_RGB24P, OMAP_DSS_COLOR_ARGB32,
- OMAP_DSS_COLOR_RGBA32, OMAP_DSS_COLOR_RGBX32),
DRM_FORMAT_RGBX4444, DRM_FORMAT_ARGB4444,
DRM_FORMAT_RGB565, DRM_FORMAT_XRGB8888,
DRM_FORMAT_RGB888, DRM_FORMAT_ARGB8888,
DRM_FORMAT_RGBA8888, DRM_FORMAT_RGBX8888),
/* OMAP_DSS_VIDEO1 */ COLOR_ARRAY(
- OMAP_DSS_COLOR_RGB24U, OMAP_DSS_COLOR_RGB24P,
- OMAP_DSS_COLOR_RGB12U, OMAP_DSS_COLOR_RGB16,
- OMAP_DSS_COLOR_YUV2, OMAP_DSS_COLOR_UYVY),
DRM_FORMAT_XRGB8888, DRM_FORMAT_RGB888,
DRM_FORMAT_RGBX4444, DRM_FORMAT_RGB565,
DRM_FORMAT_YUYV, DRM_FORMAT_UYVY),
/* OMAP_DSS_VIDEO2 */ COLOR_ARRAY(
- OMAP_DSS_COLOR_RGB12U, OMAP_DSS_COLOR_ARGB16,
- OMAP_DSS_COLOR_RGB16, OMAP_DSS_COLOR_RGB24U,
- OMAP_DSS_COLOR_RGB24P, OMAP_DSS_COLOR_YUV2,
- OMAP_DSS_COLOR_UYVY, OMAP_DSS_COLOR_ARGB32,
- OMAP_DSS_COLOR_RGBA32, OMAP_DSS_COLOR_RGBX32),
- DRM_FORMAT_RGBX4444, DRM_FORMAT_ARGB4444,
- DRM_FORMAT_RGB565, DRM_FORMAT_XRGB8888,
- DRM_FORMAT_RGB888, DRM_FORMAT_YUYV,
- DRM_FORMAT_UYVY, DRM_FORMAT_ARGB8888,
- DRM_FORMAT_RGBA8888, DRM_FORMAT_RGBX8888),
};
static const enum omap_color_mode *omap4_dss_supported_color_modes[] = { /* OMAP_DSS_GFX */ COLOR_ARRAY(
- OMAP_DSS_COLOR_RGB12U, OMAP_DSS_COLOR_ARGB16,
- OMAP_DSS_COLOR_RGB16, OMAP_DSS_COLOR_RGB24U,
- OMAP_DSS_COLOR_RGB24P, OMAP_DSS_COLOR_ARGB32,
- OMAP_DSS_COLOR_RGBA32, OMAP_DSS_COLOR_RGBX32,
- OMAP_DSS_COLOR_ARGB16_1555, OMAP_DSS_COLOR_RGBX16,
- OMAP_DSS_COLOR_RGBA16, OMAP_DSS_COLOR_XRGB16_1555),
DRM_FORMAT_RGBX4444, DRM_FORMAT_ARGB4444,
DRM_FORMAT_RGB565, DRM_FORMAT_XRGB8888,
DRM_FORMAT_RGB888, DRM_FORMAT_ARGB8888,
DRM_FORMAT_RGBA8888, DRM_FORMAT_RGBX8888,
DRM_FORMAT_ARGB1555, DRM_FORMAT_XRGB4444,
DRM_FORMAT_RGBA4444, DRM_FORMAT_XRGB1555),
/* OMAP_DSS_VIDEO1 */ COLOR_ARRAY(
- OMAP_DSS_COLOR_RGB16, OMAP_DSS_COLOR_RGB12U,
- OMAP_DSS_COLOR_YUV2, OMAP_DSS_COLOR_ARGB16_1555,
- OMAP_DSS_COLOR_RGBA32, OMAP_DSS_COLOR_NV12,
- OMAP_DSS_COLOR_RGBA16, OMAP_DSS_COLOR_RGB24U,
- OMAP_DSS_COLOR_RGB24P, OMAP_DSS_COLOR_UYVY,
- OMAP_DSS_COLOR_ARGB16, OMAP_DSS_COLOR_XRGB16_1555,
- OMAP_DSS_COLOR_ARGB32, OMAP_DSS_COLOR_RGBX16,
- OMAP_DSS_COLOR_RGBX32),
DRM_FORMAT_RGB565, DRM_FORMAT_RGBX4444,
DRM_FORMAT_YUYV, DRM_FORMAT_ARGB1555,
DRM_FORMAT_RGBA8888, DRM_FORMAT_NV12,
DRM_FORMAT_RGBA4444, DRM_FORMAT_XRGB8888,
DRM_FORMAT_RGB888, DRM_FORMAT_UYVY,
DRM_FORMAT_ARGB4444, DRM_FORMAT_XRGB1555,
DRM_FORMAT_ARGB8888, DRM_FORMAT_XRGB4444,
DRM_FORMAT_RGBX8888),
/* OMAP_DSS_VIDEO2 */ COLOR_ARRAY(
- OMAP_DSS_COLOR_RGB16, OMAP_DSS_COLOR_RGB12U,
- OMAP_DSS_COLOR_YUV2, OMAP_DSS_COLOR_ARGB16_1555,
- OMAP_DSS_COLOR_RGBA32, OMAP_DSS_COLOR_NV12,
- OMAP_DSS_COLOR_RGBA16, OMAP_DSS_COLOR_RGB24U,
- OMAP_DSS_COLOR_RGB24P, OMAP_DSS_COLOR_UYVY,
- OMAP_DSS_COLOR_ARGB16, OMAP_DSS_COLOR_XRGB16_1555,
- OMAP_DSS_COLOR_ARGB32, OMAP_DSS_COLOR_RGBX16,
- OMAP_DSS_COLOR_RGBX32),
DRM_FORMAT_RGB565, DRM_FORMAT_RGBX4444,
DRM_FORMAT_YUYV, DRM_FORMAT_ARGB1555,
DRM_FORMAT_RGBA8888, DRM_FORMAT_NV12,
DRM_FORMAT_RGBA4444, DRM_FORMAT_XRGB8888,
DRM_FORMAT_RGB888, DRM_FORMAT_UYVY,
DRM_FORMAT_ARGB4444, DRM_FORMAT_XRGB1555,
DRM_FORMAT_ARGB8888, DRM_FORMAT_XRGB4444,
DRM_FORMAT_RGBX8888),
/* OMAP_DSS_VIDEO3 */ COLOR_ARRAY(
- OMAP_DSS_COLOR_RGB16, OMAP_DSS_COLOR_RGB12U,
- OMAP_DSS_COLOR_YUV2, OMAP_DSS_COLOR_ARGB16_1555,
- OMAP_DSS_COLOR_RGBA32, OMAP_DSS_COLOR_NV12,
- OMAP_DSS_COLOR_RGBA16, OMAP_DSS_COLOR_RGB24U,
- OMAP_DSS_COLOR_RGB24P, OMAP_DSS_COLOR_UYVY,
- OMAP_DSS_COLOR_ARGB16, OMAP_DSS_COLOR_XRGB16_1555,
- OMAP_DSS_COLOR_ARGB32, OMAP_DSS_COLOR_RGBX16,
- OMAP_DSS_COLOR_RGBX32),
DRM_FORMAT_RGB565, DRM_FORMAT_RGBX4444,
DRM_FORMAT_YUYV, DRM_FORMAT_ARGB1555,
DRM_FORMAT_RGBA8888, DRM_FORMAT_NV12,
DRM_FORMAT_RGBA4444, DRM_FORMAT_XRGB8888,
DRM_FORMAT_RGB888, DRM_FORMAT_UYVY,
DRM_FORMAT_ARGB4444, DRM_FORMAT_XRGB1555,
DRM_FORMAT_ARGB8888, DRM_FORMAT_XRGB4444,
DRM_FORMAT_RGBX8888),
/* OMAP_DSS_WB */ COLOR_ARRAY(
- OMAP_DSS_COLOR_RGB16, OMAP_DSS_COLOR_RGB12U,
- OMAP_DSS_COLOR_YUV2, OMAP_DSS_COLOR_ARGB16_1555,
- OMAP_DSS_COLOR_RGBA32, OMAP_DSS_COLOR_NV12,
- OMAP_DSS_COLOR_RGBA16, OMAP_DSS_COLOR_RGB24U,
- OMAP_DSS_COLOR_RGB24P, OMAP_DSS_COLOR_UYVY,
- OMAP_DSS_COLOR_ARGB16, OMAP_DSS_COLOR_XRGB16_1555,
- OMAP_DSS_COLOR_ARGB32, OMAP_DSS_COLOR_RGBX16,
- OMAP_DSS_COLOR_RGBX32),
- DRM_FORMAT_RGB565, DRM_FORMAT_RGBX4444,
- DRM_FORMAT_YUYV, DRM_FORMAT_ARGB1555,
- DRM_FORMAT_RGBA8888, DRM_FORMAT_NV12,
- DRM_FORMAT_RGBA4444, DRM_FORMAT_XRGB8888,
- DRM_FORMAT_RGB888, DRM_FORMAT_UYVY,
- DRM_FORMAT_ARGB4444, DRM_FORMAT_XRGB1555,
- DRM_FORMAT_ARGB8888, DRM_FORMAT_XRGB4444,
- DRM_FORMAT_RGBX8888),
};
static const enum omap_overlay_caps omap2_dss_overlay_caps[] = { diff --git a/drivers/gpu/drm/omapdrm/dss/omapdss.h b/drivers/gpu/drm/omapdrm/dss/omapdss.h index 334680673074..cb19c388a135 100644 --- a/drivers/gpu/drm/omapdrm/dss/omapdss.h +++ b/drivers/gpu/drm/omapdrm/dss/omapdss.h @@ -93,21 +93,7 @@ enum omap_channel { };
enum omap_color_mode {
- OMAP_DSS_COLOR_RGB12U = 1 << 4, /* RGB12, 16-bit container */
- OMAP_DSS_COLOR_ARGB16 = 1 << 5, /* ARGB16 */
- OMAP_DSS_COLOR_RGB16 = 1 << 6, /* RGB16 */
- OMAP_DSS_COLOR_RGB24U = 1 << 7, /* RGB24, 32-bit container */
- OMAP_DSS_COLOR_RGB24P = 1 << 8, /* RGB24, 24-bit container */
- OMAP_DSS_COLOR_YUV2 = 1 << 9, /* YUV2 4:2:2 co-sited */
- OMAP_DSS_COLOR_UYVY = 1 << 10, /* UYVY 4:2:2 co-sited */
- OMAP_DSS_COLOR_ARGB32 = 1 << 11, /* ARGB32 */
- OMAP_DSS_COLOR_RGBA32 = 1 << 12, /* RGBA32 */
- OMAP_DSS_COLOR_RGBX32 = 1 << 13, /* RGBx32 */
- OMAP_DSS_COLOR_NV12 = 1 << 14, /* NV12 format: YUV 4:2:0
*/
- OMAP_DSS_COLOR_RGBA16 = 1 << 15, /* RGBA16 - 4444 */
- OMAP_DSS_COLOR_RGBX16 = 1 << 16, /* RGBx16 - 4444 */
- OMAP_DSS_COLOR_ARGB16_1555 = 1 << 17, /* ARGB16 - 1555 */
- OMAP_DSS_COLOR_XRGB16_1555 = 1 << 18, /* xRGB16 - 1555 */
- _UNUSED_,
};
enum omap_dss_load_mode { diff --git a/drivers/gpu/drm/omapdrm/omap_fb.c b/drivers/gpu/drm/omapdrm/omap_fb.c index a53022cbb14f..cc8c9ffb68db 100644 --- a/drivers/gpu/drm/omapdrm/omap_fb.c +++ b/drivers/gpu/drm/omapdrm/omap_fb.c @@ -35,24 +35,24 @@ static const struct { uint32_t pixel_format; } formats[] = { /* 16bpp [A]RGB: */
- { OMAP_DSS_COLOR_RGB16, DRM_FORMAT_RGB565 }, /* RGB16-565 */
- { OMAP_DSS_COLOR_RGB12U, DRM_FORMAT_RGBX4444 }, /* RGB12x-4444 */
- { OMAP_DSS_COLOR_RGBX16, DRM_FORMAT_XRGB4444 }, /* xRGB12-4444 */
- { OMAP_DSS_COLOR_RGBA16, DRM_FORMAT_RGBA4444 }, /* RGBA12-4444 */
- { OMAP_DSS_COLOR_ARGB16, DRM_FORMAT_ARGB4444 }, /* ARGB16-4444 */
- { OMAP_DSS_COLOR_XRGB16_1555, DRM_FORMAT_XRGB1555 }, /* xRGB15-1555 */
- { OMAP_DSS_COLOR_ARGB16_1555, DRM_FORMAT_ARGB1555 }, /* ARGB16-1555 */
- { DRM_FORMAT_RGB565, DRM_FORMAT_RGB565 }, /* RGB16-565 */
- { DRM_FORMAT_RGBX4444, DRM_FORMAT_RGBX4444 }, /* RGB12x-4444 */
- { DRM_FORMAT_XRGB4444, DRM_FORMAT_XRGB4444 }, /* xRGB12-4444 */
- { DRM_FORMAT_RGBA4444, DRM_FORMAT_RGBA4444 }, /* RGBA12-4444 */
- { DRM_FORMAT_ARGB4444, DRM_FORMAT_ARGB4444 }, /* ARGB16-4444 */
- { DRM_FORMAT_XRGB1555, DRM_FORMAT_XRGB1555 }, /* xRGB15-1555 */
- { DRM_FORMAT_ARGB1555, DRM_FORMAT_ARGB1555 }, /* ARGB16-1555 */ /* 24bpp RGB: */
- { OMAP_DSS_COLOR_RGB24P, DRM_FORMAT_RGB888 }, /* RGB24-888 */
- { DRM_FORMAT_RGB888, DRM_FORMAT_RGB888 }, /* RGB24-888 */ /* 32bpp [A]RGB: */
- { OMAP_DSS_COLOR_RGBX32, DRM_FORMAT_RGBX8888 }, /* RGBx24-8888 */
- { OMAP_DSS_COLOR_RGB24U, DRM_FORMAT_XRGB8888 }, /* xRGB24-8888 */
- { OMAP_DSS_COLOR_RGBA32, DRM_FORMAT_RGBA8888 }, /* RGBA32-8888 */
- { OMAP_DSS_COLOR_ARGB32, DRM_FORMAT_ARGB8888 }, /* ARGB32-8888 */
- { DRM_FORMAT_RGBX8888, DRM_FORMAT_RGBX8888 }, /* RGBx24-8888 */
- { DRM_FORMAT_XRGB8888, DRM_FORMAT_XRGB8888 }, /* xRGB24-8888 */
- { DRM_FORMAT_RGBA8888, DRM_FORMAT_RGBA8888 }, /* RGBA32-8888 */
- { DRM_FORMAT_ARGB8888, DRM_FORMAT_ARGB8888 }, /* ARGB32-8888 */ /* YUV: */
- { OMAP_DSS_COLOR_NV12, DRM_FORMAT_NV12 },
- { OMAP_DSS_COLOR_YUV2, DRM_FORMAT_YUYV },
- { OMAP_DSS_COLOR_UYVY, DRM_FORMAT_UYVY },
- { DRM_FORMAT_NV12, DRM_FORMAT_NV12 },
- { DRM_FORMAT_YUYV, DRM_FORMAT_YUYV },
- { DRM_FORMAT_UYVY, DRM_FORMAT_UYVY },
};
/* convert from overlay's pixel formats bitmask to an array of fourcc's */ @@ -247,7 +247,7 @@ void omap_framebuffer_update_scanout(struct drm_framebuffer *fb, /* convert to pixels: */ info->screen_width /= format->cpp[0];
- if (omap_fb->dss_format == OMAP_DSS_COLOR_NV12) {
if (omap_fb->dss_format == DRM_FORMAT_NV12) { plane = &omap_fb->planes[1];
if (info->rotation_type == OMAP_DSS_ROT_TILER) {
In this step we drop 'enum omap_color_mode', and use u32 instead.
Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com --- drivers/gpu/drm/omapdrm/dss/dispc.c | 48 +++++++++++++++--------------- drivers/gpu/drm/omapdrm/dss/dss_features.c | 16 +++++----- drivers/gpu/drm/omapdrm/dss/dss_features.h | 4 +-- drivers/gpu/drm/omapdrm/dss/omapdss.h | 10 ++----- drivers/gpu/drm/omapdrm/omap_drv.h | 2 +- drivers/gpu/drm/omapdrm/omap_fb.c | 8 ++--- 6 files changed, 42 insertions(+), 46 deletions(-)
diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c b/drivers/gpu/drm/omapdrm/dss/dispc.c index c0f8109042c6..9fa320990af1 100644 --- a/drivers/gpu/drm/omapdrm/dss/dispc.c +++ b/drivers/gpu/drm/omapdrm/dss/dispc.c @@ -78,7 +78,7 @@ struct dispc_features { int (*calc_scaling) (unsigned long pclk, unsigned long lclk, const struct videomode *vm, u16 width, u16 height, u16 out_width, u16 out_height, - enum omap_color_mode color_mode, bool *five_taps, + u32 color_mode, bool *five_taps, int *x_predecim, int *y_predecim, int *decim_x, int *decim_y, u16 pos_x, unsigned long *core_clk, bool mem_to_mem); unsigned long (*calc_core_clk) (unsigned long pclk, @@ -907,11 +907,11 @@ static void dispc_ovl_set_row_inc(enum omap_plane_id plane, s32 inc) }
static void dispc_ovl_set_color_mode(enum omap_plane_id plane, - enum omap_color_mode color_mode) + u32 color_mode) { u32 m = 0; if (plane != OMAP_DSS_GFX) { - switch ((u32)color_mode) { + switch (color_mode) { case DRM_FORMAT_NV12: m = 0x0; break; case DRM_FORMAT_XRGB4444: @@ -946,7 +946,7 @@ static void dispc_ovl_set_color_mode(enum omap_plane_id plane, BUG(); return; } } else { - switch ((u32)color_mode) { + switch (color_mode) { case DRM_FORMAT_RGBX4444: m = 0x4; break; case DRM_FORMAT_ARGB4444: @@ -979,9 +979,9 @@ static void dispc_ovl_set_color_mode(enum omap_plane_id plane, REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), m, 4, 1); }
-static bool format_is_yuv(enum omap_color_mode color_mode) +static bool format_is_yuv(u32 color_mode) { - switch ((u32)color_mode) { + switch (color_mode) { case DRM_FORMAT_YUYV: case DRM_FORMAT_UYVY: case DRM_FORMAT_NV12: @@ -1141,7 +1141,7 @@ static u32 dispc_ovl_get_burst_size(enum omap_plane_id plane) return unit * 8; }
-static const enum omap_color_mode *dispc_ovl_get_color_modes(enum omap_plane_id plane) +static const u32 *dispc_ovl_get_color_modes(enum omap_plane_id plane) { return dss_feat_get_supported_color_modes(plane); } @@ -1563,7 +1563,7 @@ static void dispc_ovl_set_scale_param(enum omap_plane_id plane,
static void dispc_ovl_set_accu_uv(enum omap_plane_id plane, u16 orig_width, u16 orig_height, u16 out_width, u16 out_height, - bool ilace, enum omap_color_mode color_mode, u8 rotation) + bool ilace, u32 color_mode, u8 rotation) { int h_accu2_0, h_accu2_1; int v_accu2_0, v_accu2_1; @@ -1619,7 +1619,7 @@ static void dispc_ovl_set_accu_uv(enum omap_plane_id plane, return; }
- switch ((u32)color_mode) { + switch (color_mode) { case DRM_FORMAT_NV12: if (ilace) accu_table = accu_nv12_ilace; @@ -1653,7 +1653,7 @@ static void dispc_ovl_set_scaling_common(enum omap_plane_id plane, u16 orig_width, u16 orig_height, u16 out_width, u16 out_height, bool ilace, bool five_taps, - bool fieldmode, enum omap_color_mode color_mode, + bool fieldmode, u32 color_mode, u8 rotation) { int accu0 = 0; @@ -1707,7 +1707,7 @@ static void dispc_ovl_set_scaling_uv(enum omap_plane_id plane, u16 orig_width, u16 orig_height, u16 out_width, u16 out_height, bool ilace, bool five_taps, - bool fieldmode, enum omap_color_mode color_mode, + bool fieldmode, u32 color_mode, u8 rotation) { int scale_x = out_width != orig_width; @@ -1727,7 +1727,7 @@ static void dispc_ovl_set_scaling_uv(enum omap_plane_id plane, dispc_ovl_set_accu_uv(plane, orig_width, orig_height, out_width, out_height, ilace, color_mode, rotation);
- switch ((u32)color_mode) { + switch (color_mode) { case DRM_FORMAT_NV12: if (chroma_upscale) { /* UV is subsampled by 2 horizontally and vertically */ @@ -1786,7 +1786,7 @@ static void dispc_ovl_set_scaling(enum omap_plane_id plane, u16 orig_width, u16 orig_height, u16 out_width, u16 out_height, bool ilace, bool five_taps, - bool fieldmode, enum omap_color_mode color_mode, + bool fieldmode, u32 color_mode, u8 rotation) { BUG_ON(plane == OMAP_DSS_GFX); @@ -1808,7 +1808,7 @@ static void dispc_ovl_set_scaling(enum omap_plane_id plane,
static void dispc_ovl_set_rotation_attrs(enum omap_plane_id plane, u8 rotation, enum omap_dss_rotation_type rotation_type, - bool mirroring, enum omap_color_mode color_mode) + bool mirroring, u32 color_mode) { bool row_repeat = false; int vidrot = 0; @@ -1879,9 +1879,9 @@ static void dispc_ovl_set_rotation_attrs(enum omap_plane_id plane, u8 rotation, } }
-static int color_mode_to_bpp(enum omap_color_mode color_mode) +static int color_mode_to_bpp(u32 color_mode) { - switch ((u32)color_mode) { + switch (color_mode) { case DRM_FORMAT_NV12: return 8; case DRM_FORMAT_RGBX4444: @@ -1921,7 +1921,7 @@ static s32 pixinc(int pixels, u8 ps) }
static void calc_offset(u16 screen_width, u16 width, - enum omap_color_mode color_mode, bool fieldmode, + u32 color_mode, bool fieldmode, unsigned int field_offset, unsigned *offset0, unsigned *offset1, s32 *row_inc, s32 *pix_inc, int x_predecim, int y_predecim) { @@ -2008,7 +2008,7 @@ static int check_horiz_timing_omap3(unsigned long pclk, unsigned long lclk, static unsigned long calc_core_clk_five_taps(unsigned long pclk, const struct videomode *vm, u16 width, u16 height, u16 out_width, u16 out_height, - enum omap_color_mode color_mode) + u32 color_mode) { u32 core_clk = 0; u64 tmp; @@ -2101,7 +2101,7 @@ static unsigned long calc_core_clk_44xx(unsigned long pclk, u16 width, static int dispc_ovl_calc_scaling_24xx(unsigned long pclk, unsigned long lclk, const struct videomode *vm, u16 width, u16 height, u16 out_width, u16 out_height, - enum omap_color_mode color_mode, bool *five_taps, + u32 color_mode, bool *five_taps, int *x_predecim, int *y_predecim, int *decim_x, int *decim_y, u16 pos_x, unsigned long *core_clk, bool mem_to_mem) { @@ -2147,7 +2147,7 @@ static int dispc_ovl_calc_scaling_24xx(unsigned long pclk, unsigned long lclk, static int dispc_ovl_calc_scaling_34xx(unsigned long pclk, unsigned long lclk, const struct videomode *vm, u16 width, u16 height, u16 out_width, u16 out_height, - enum omap_color_mode color_mode, bool *five_taps, + u32 color_mode, bool *five_taps, int *x_predecim, int *y_predecim, int *decim_x, int *decim_y, u16 pos_x, unsigned long *core_clk, bool mem_to_mem) { @@ -2232,7 +2232,7 @@ static int dispc_ovl_calc_scaling_34xx(unsigned long pclk, unsigned long lclk, static int dispc_ovl_calc_scaling_44xx(unsigned long pclk, unsigned long lclk, const struct videomode *vm, u16 width, u16 height, u16 out_width, u16 out_height, - enum omap_color_mode color_mode, bool *five_taps, + u32 color_mode, bool *five_taps, int *x_predecim, int *y_predecim, int *decim_x, int *decim_y, u16 pos_x, unsigned long *core_clk, bool mem_to_mem) { @@ -2297,7 +2297,7 @@ static int dispc_ovl_calc_scaling(unsigned long pclk, unsigned long lclk, enum omap_overlay_caps caps, const struct videomode *vm, u16 width, u16 height, u16 out_width, u16 out_height, - enum omap_color_mode color_mode, bool *five_taps, + u32 color_mode, bool *five_taps, int *x_predecim, int *y_predecim, u16 pos_x, enum omap_dss_rotation_type rotation_type, bool mem_to_mem) { @@ -2372,7 +2372,7 @@ static int dispc_ovl_calc_scaling(unsigned long pclk, unsigned long lclk, static int dispc_ovl_setup_common(enum omap_plane_id plane, enum omap_overlay_caps caps, u32 paddr, u32 p_uv_addr, u16 screen_width, int pos_x, int pos_y, u16 width, u16 height, - u16 out_width, u16 out_height, enum omap_color_mode color_mode, + u16 out_width, u16 out_height, u32 color_mode, u8 rotation, bool mirror, u8 zorder, u8 pre_mult_alpha, u8 global_alpha, enum omap_dss_rotation_type rotation_type, bool replication, const struct videomode *vm, @@ -2585,7 +2585,7 @@ int dispc_wb_setup(const struct omap_dss_writeback_info *wi, wi->pre_mult_alpha, global_alpha, wi->rotation_type, replication, vm, mem_to_mem);
- switch ((u32)wi->color_mode) { + switch (wi->color_mode) { case DRM_FORMAT_RGB565: case DRM_FORMAT_RGB888: case DRM_FORMAT_ARGB4444: diff --git a/drivers/gpu/drm/omapdrm/dss/dss_features.c b/drivers/gpu/drm/omapdrm/dss/dss_features.c index fe58a6cf4263..32e21ed45f47 100644 --- a/drivers/gpu/drm/omapdrm/dss/dss_features.c +++ b/drivers/gpu/drm/omapdrm/dss/dss_features.c @@ -48,7 +48,7 @@ struct omap_dss_features { const int num_ovls; const enum omap_display_type *supported_displays; const enum omap_dss_output_id *supported_outputs; - const enum omap_color_mode **supported_color_modes; + const u32 **supported_color_modes; const enum omap_overlay_caps *overlay_caps; const struct dss_param_range *dss_params;
@@ -230,9 +230,9 @@ static const enum omap_dss_output_id omap5_dss_supported_outputs[] = { OMAP_DSS_OUTPUT_DSI2, };
-#define COLOR_ARRAY(arr...) (const enum omap_color_mode[]) { arr, 0 } +#define COLOR_ARRAY(arr...) (const u32[]) { arr, 0 }
-static const enum omap_color_mode *omap2_dss_supported_color_modes[] = { +static const u32 *omap2_dss_supported_color_modes[] = {
/* OMAP_DSS_GFX */ COLOR_ARRAY( @@ -252,7 +252,7 @@ static const enum omap_color_mode *omap2_dss_supported_color_modes[] = { DRM_FORMAT_UYVY), };
-static const enum omap_color_mode *omap3_dss_supported_color_modes[] = { +static const u32 *omap3_dss_supported_color_modes[] = { /* OMAP_DSS_GFX */ COLOR_ARRAY( DRM_FORMAT_RGBX4444, DRM_FORMAT_ARGB4444, @@ -275,7 +275,7 @@ static const enum omap_color_mode *omap3_dss_supported_color_modes[] = { DRM_FORMAT_RGBA8888, DRM_FORMAT_RGBX8888), };
-static const enum omap_color_mode *omap4_dss_supported_color_modes[] = { +static const u32 *omap4_dss_supported_color_modes[] = { /* OMAP_DSS_GFX */ COLOR_ARRAY( DRM_FORMAT_RGBX4444, DRM_FORMAT_ARGB4444, @@ -798,7 +798,7 @@ enum omap_dss_output_id dss_feat_get_supported_outputs(enum omap_channel channel return omap_current_dss_features->supported_outputs[channel]; }
-const enum omap_color_mode *dss_feat_get_supported_color_modes(enum omap_plane_id plane) +const u32 *dss_feat_get_supported_color_modes(enum omap_plane_id plane) { return omap_current_dss_features->supported_color_modes[plane]; } @@ -809,9 +809,9 @@ enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane_id plane) }
bool dss_feat_color_mode_supported(enum omap_plane_id plane, - enum omap_color_mode color_mode) + u32 color_mode) { - const enum omap_color_mode *modes; + const u32 *modes; unsigned int i;
modes = omap_current_dss_features->supported_color_modes[plane]; diff --git a/drivers/gpu/drm/omapdrm/dss/dss_features.h b/drivers/gpu/drm/omapdrm/dss/dss_features.h index 190cf62537b0..8f48dc097717 100644 --- a/drivers/gpu/drm/omapdrm/dss/dss_features.h +++ b/drivers/gpu/drm/omapdrm/dss/dss_features.h @@ -90,7 +90,7 @@ unsigned long dss_feat_get_param_min(enum dss_range_param param); unsigned long dss_feat_get_param_max(enum dss_range_param param); enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane_id plane); bool dss_feat_color_mode_supported(enum omap_plane_id plane, - enum omap_color_mode color_mode); + u32 color_mode);
u32 dss_feat_get_buffer_size_unit(void); /* in bytes */ u32 dss_feat_get_burst_size_unit(void); /* in bytes */ @@ -104,6 +104,6 @@ enum omap_dss_output_id dss_feat_get_supported_outputs(enum omap_channel channel
int dss_feat_get_num_mgrs(void); int dss_feat_get_num_ovls(void); -const enum omap_color_mode *dss_feat_get_supported_color_modes(enum omap_plane_id plane); +const u32 *dss_feat_get_supported_color_modes(enum omap_plane_id plane);
#endif diff --git a/drivers/gpu/drm/omapdrm/dss/omapdss.h b/drivers/gpu/drm/omapdrm/dss/omapdss.h index cb19c388a135..5848baf15d53 100644 --- a/drivers/gpu/drm/omapdrm/dss/omapdss.h +++ b/drivers/gpu/drm/omapdrm/dss/omapdss.h @@ -92,10 +92,6 @@ enum omap_channel { OMAP_DSS_CHANNEL_WB = 4, };
-enum omap_color_mode { - _UNUSED_, -}; - enum omap_dss_load_mode { OMAP_DSS_LOAD_CLUT_AND_FRAME = 0, OMAP_DSS_LOAD_CLUT_ONLY = 1, @@ -273,7 +269,7 @@ struct omap_overlay_info { u16 screen_width; u16 width; u16 height; - enum omap_color_mode color_mode; + u32 color_mode; u8 rotation; enum omap_dss_rotation_type rotation_type; bool mirror; @@ -403,7 +399,7 @@ struct omap_dss_writeback_info { u16 buf_width; u16 width; u16 height; - enum omap_color_mode color_mode; + u32 color_mode; u8 rotation; enum omap_dss_rotation_type rotation_type; bool mirror; @@ -862,7 +858,7 @@ struct dispc_ops { const struct videomode *vm, bool mem_to_mem, enum omap_channel channel);
- const enum omap_color_mode *(*ovl_get_color_modes)(enum omap_plane_id plane); + const u32 *(*ovl_get_color_modes)(enum omap_plane_id plane); };
void dispc_set_ops(const struct dispc_ops *o); diff --git a/drivers/gpu/drm/omapdrm/omap_drv.h b/drivers/gpu/drm/omapdrm/omap_drv.h index 962180790f42..67bb3be6b412 100644 --- a/drivers/gpu/drm/omapdrm/omap_drv.h +++ b/drivers/gpu/drm/omapdrm/omap_drv.h @@ -159,7 +159,7 @@ struct drm_encoder *omap_connector_attached_encoder( bool omap_connector_get_hdmi_mode(struct drm_connector *connector);
uint32_t omap_framebuffer_get_formats(uint32_t *pixel_formats, - uint32_t max_formats, const enum omap_color_mode *supported_modes); + uint32_t max_formats, const u32 *supported_modes); struct drm_framebuffer *omap_framebuffer_create(struct drm_device *dev, struct drm_file *file, const struct drm_mode_fb_cmd2 *mode_cmd); struct drm_framebuffer *omap_framebuffer_init(struct drm_device *dev, diff --git a/drivers/gpu/drm/omapdrm/omap_fb.c b/drivers/gpu/drm/omapdrm/omap_fb.c index cc8c9ffb68db..7820b61d7c1a 100644 --- a/drivers/gpu/drm/omapdrm/omap_fb.c +++ b/drivers/gpu/drm/omapdrm/omap_fb.c @@ -31,7 +31,7 @@
/* DSS to DRM formats mapping */ static const struct { - enum omap_color_mode dss_format; + u32 dss_format; uint32_t pixel_format; } formats[] = { /* 16bpp [A]RGB: */ @@ -57,7 +57,7 @@ static const struct {
/* convert from overlay's pixel formats bitmask to an array of fourcc's */ uint32_t omap_framebuffer_get_formats(uint32_t *pixel_formats, - uint32_t max_formats, const enum omap_color_mode *supported_modes) + uint32_t max_formats, const u32 *supported_modes) { uint32_t nformats = 0; int i = 0; @@ -91,7 +91,7 @@ struct omap_framebuffer { struct drm_framebuffer base; int pin_count; const struct drm_format_info *format; - enum omap_color_mode dss_format; + u32 dss_format; struct plane planes[2]; /* lock for pinning (pin_count and planes.paddr) */ struct mutex lock; @@ -406,7 +406,7 @@ struct drm_framebuffer *omap_framebuffer_init(struct drm_device *dev, const struct drm_format_info *format = NULL; struct omap_framebuffer *omap_fb = NULL; struct drm_framebuffer *fb = NULL; - enum omap_color_mode dss_format = 0; + u32 dss_format = 0; unsigned int pitch = mode_cmd->pitches[0]; int ret, i;
Hi Tomi,
Thank you for the patch.
On Thursday 04 May 2017 13:23:29 Tomi Valkeinen wrote:
In this step we drop 'enum omap_color_mode', and use u32 instead.
Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com
I believe this should go before 12/16, otherwise you end up temporarily storing DRM_FORMAT_* values in enum omap_color_mode variables.
Apart from that,
Reviewed-by: Laurent Pinchart laurent.pinchart@ideasonboard.com
drivers/gpu/drm/omapdrm/dss/dispc.c | 48 +++++++++++++------------- drivers/gpu/drm/omapdrm/dss/dss_features.c | 16 +++++----- drivers/gpu/drm/omapdrm/dss/dss_features.h | 4 +-- drivers/gpu/drm/omapdrm/dss/omapdss.h | 10 ++----- drivers/gpu/drm/omapdrm/omap_drv.h | 2 +- drivers/gpu/drm/omapdrm/omap_fb.c | 8 ++--- 6 files changed, 42 insertions(+), 46 deletions(-)
On 24/05/17 13:28, Laurent Pinchart wrote:
Hi Tomi,
Thank you for the patch.
On Thursday 04 May 2017 13:23:29 Tomi Valkeinen wrote:
In this step we drop 'enum omap_color_mode', and use u32 instead.
Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com
I believe this should go before 12/16, otherwise you end up temporarily storing DRM_FORMAT_* values in enum omap_color_mode variables.
That's on purpose, I mention it in the previous patch. Do you see a problem with it?
If I change the order, then I'd be going back and forth with u32 and enum omap_color_mode.
But I could squash this and 12 together. That's perhaps the technically most correct option, but I wanted to split the changes into a bit smaller pieces.
Tomi
Hi Tomi,
On Wednesday 24 May 2017 13:37:48 Tomi Valkeinen wrote:
On 24/05/17 13:28, Laurent Pinchart wrote:
On Thursday 04 May 2017 13:23:29 Tomi Valkeinen wrote:
In this step we drop 'enum omap_color_mode', and use u32 instead.
Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com
I believe this should go before 12/16, otherwise you end up temporarily storing DRM_FORMAT_* values in enum omap_color_mode variables.
That's on purpose, I mention it in the previous patch. Do you see a problem with it?
It's dirty :-) You had to silence a few warnings with explicit casts because of that.
If I change the order, then I'd be going back and forth with u32 and enum omap_color_mode.
If you first switch to u32, there's nothing wrong storing the enum omap_color_mode value in a u32, and it will then be easy to transition to DRM_FORMAT_*.
But I could squash this and 12 together. That's perhaps the technically most correct option, but I wanted to split the changes into a bit smaller pieces.
On 24/05/17 13:46, Laurent Pinchart wrote:
Hi Tomi,
On Wednesday 24 May 2017 13:37:48 Tomi Valkeinen wrote:
On 24/05/17 13:28, Laurent Pinchart wrote:
On Thursday 04 May 2017 13:23:29 Tomi Valkeinen wrote:
In this step we drop 'enum omap_color_mode', and use u32 instead.
Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com
I believe this should go before 12/16, otherwise you end up temporarily storing DRM_FORMAT_* values in enum omap_color_mode variables.
That's on purpose, I mention it in the previous patch. Do you see a problem with it?
It's dirty :-) You had to silence a few warnings with explicit casts because of that.
If I change the order, then I'd be going back and forth with u32 and enum omap_color_mode.
If you first switch to u32, there's nothing wrong storing the enum omap_color_mode value in a u32, and it will then be easy to transition to DRM_FORMAT_*.
True, I did that and the end result looks a bit cleaner. Thanks!
Tomi
We now get a fourcc array from dispc when asking for a plane's supported pixel formats, so we can drop omap_framebuffer_get_formats() which was used to convert between DSS and DRM pixel formats.
Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com --- drivers/gpu/drm/omapdrm/omap_drv.h | 2 -- drivers/gpu/drm/omapdrm/omap_fb.c | 22 ---------------------- drivers/gpu/drm/omapdrm/omap_plane.c | 15 +++++++-------- 3 files changed, 7 insertions(+), 32 deletions(-)
diff --git a/drivers/gpu/drm/omapdrm/omap_drv.h b/drivers/gpu/drm/omapdrm/omap_drv.h index 67bb3be6b412..bdd346fb38f4 100644 --- a/drivers/gpu/drm/omapdrm/omap_drv.h +++ b/drivers/gpu/drm/omapdrm/omap_drv.h @@ -158,8 +158,6 @@ struct drm_encoder *omap_connector_attached_encoder( struct drm_connector *connector); bool omap_connector_get_hdmi_mode(struct drm_connector *connector);
-uint32_t omap_framebuffer_get_formats(uint32_t *pixel_formats, - uint32_t max_formats, const u32 *supported_modes); struct drm_framebuffer *omap_framebuffer_create(struct drm_device *dev, struct drm_file *file, const struct drm_mode_fb_cmd2 *mode_cmd); struct drm_framebuffer *omap_framebuffer_init(struct drm_device *dev, diff --git a/drivers/gpu/drm/omapdrm/omap_fb.c b/drivers/gpu/drm/omapdrm/omap_fb.c index 7820b61d7c1a..ec60620fe2d1 100644 --- a/drivers/gpu/drm/omapdrm/omap_fb.c +++ b/drivers/gpu/drm/omapdrm/omap_fb.c @@ -55,28 +55,6 @@ static const struct { { DRM_FORMAT_UYVY, DRM_FORMAT_UYVY }, };
-/* convert from overlay's pixel formats bitmask to an array of fourcc's */ -uint32_t omap_framebuffer_get_formats(uint32_t *pixel_formats, - uint32_t max_formats, const u32 *supported_modes) -{ - uint32_t nformats = 0; - int i = 0; - - for (i = 0; i < ARRAY_SIZE(formats) && nformats < max_formats; i++) { - unsigned int t; - - for (t = 0; supported_modes[t]; ++t) { - if (supported_modes[t] != formats[i].dss_format) - continue; - - pixel_formats[nformats++] = formats[i].pixel_format; - break; - } - } - - return nformats; -} - /* per-plane info for the fb: */ struct plane { struct drm_gem_object *bo; diff --git a/drivers/gpu/drm/omapdrm/omap_plane.c b/drivers/gpu/drm/omapdrm/omap_plane.c index 6cabbda5ec57..6e2ea83b560c 100644 --- a/drivers/gpu/drm/omapdrm/omap_plane.c +++ b/drivers/gpu/drm/omapdrm/omap_plane.c @@ -34,9 +34,6 @@ struct omap_plane { struct drm_plane base; enum omap_plane_id id; const char *name; - - uint32_t nformats; - uint32_t formats[32]; };
struct omap_plane_state { @@ -346,6 +343,8 @@ struct drm_plane *omap_plane_init(struct drm_device *dev, struct omap_plane *omap_plane; enum omap_plane_id id; int ret; + u32 nformats; + const u32 *formats;
if (WARN_ON(idx >= ARRAY_SIZE(plane_idx_to_id))) return ERR_PTR(-EINVAL); @@ -358,17 +357,17 @@ struct drm_plane *omap_plane_init(struct drm_device *dev, if (!omap_plane) return ERR_PTR(-ENOMEM);
- omap_plane->nformats = omap_framebuffer_get_formats( - omap_plane->formats, ARRAY_SIZE(omap_plane->formats), - priv->dispc_ops->ovl_get_color_modes(id)); + formats = priv->dispc_ops->ovl_get_color_modes(id); + for (nformats = 0; formats[nformats]; ++nformats) + ; omap_plane->id = id; omap_plane->name = plane_id_to_name[id];
plane = &omap_plane->base;
ret = drm_universal_plane_init(dev, plane, possible_crtcs, - &omap_plane_funcs, omap_plane->formats, - omap_plane->nformats, type, NULL); + &omap_plane_funcs, formats, + nformats, type, NULL); if (ret < 0) goto error;
Hi Tomi,
Thank you for the patch.
On Thursday 04 May 2017 13:23:30 Tomi Valkeinen wrote:
We now get a fourcc array from dispc when asking for a plane's supported pixel formats, so we can drop omap_framebuffer_get_formats() which was used to convert between DSS and DRM pixel formats.
Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com
drivers/gpu/drm/omapdrm/omap_drv.h | 2 -- drivers/gpu/drm/omapdrm/omap_fb.c | 22 ---------------------- drivers/gpu/drm/omapdrm/omap_plane.c | 15 +++++++-------- 3 files changed, 7 insertions(+), 32 deletions(-)
[snip]
diff --git a/drivers/gpu/drm/omapdrm/omap_plane.c b/drivers/gpu/drm/omapdrm/omap_plane.c index 6cabbda5ec57..6e2ea83b560c 100644 --- a/drivers/gpu/drm/omapdrm/omap_plane.c +++ b/drivers/gpu/drm/omapdrm/omap_plane.c
[snip]
@@ -346,6 +343,8 @@ struct drm_plane *omap_plane_init(struct drm_device *dev, struct omap_plane *omap_plane; enum omap_plane_id id; int ret;
u32 nformats;
const u32 *formats;
if (WARN_ON(idx >= ARRAY_SIZE(plane_idx_to_id))) return ERR_PTR(-EINVAL);
@@ -358,17 +357,17 @@ struct drm_plane *omap_plane_init(struct drm_device *dev, if (!omap_plane) return ERR_PTR(-ENOMEM);
- omap_plane->nformats = omap_framebuffer_get_formats(
omap_plane->formats, ARRAY_SIZE(omap_plane->formats),priv->dispc_ops->ovl_get_color_modes(id));
- formats = priv->dispc_ops->ovl_get_color_modes(id);
- for (nformats = 0; formats[nformats]; ++nformats)
;
Wouldn't it make sense to modify the way supported formats are stored internally to store both the array and its size ? We could then return both from ovl_get_color_modes(), which would save us from computing the size at runtime. This can be done in a subsequent patch, so
Reviewed-by: Laurent Pinchart laurent.pinchart@ideasonboard.com
omap_plane->id = id; omap_plane->name = plane_id_to_name[id];
plane = &omap_plane->base;
ret = drm_universal_plane_init(dev, plane, possible_crtcs,
&omap_plane_funcs, omap_plane->formats,omap_plane->nformats, type, NULL);
&omap_plane_funcs, formats,nformats, type, NULL);
omap_fb.c has a table with DSS and DRM formats, used to convert between them. This is no longer needed, so we can change the array to a plain array of DRM_FORMAT_* values which contain all possible pixel formats supported by any DSS IP version.
Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com --- drivers/gpu/drm/omapdrm/omap_fb.c | 49 ++++++++++++++++----------------------- 1 file changed, 20 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/omapdrm/omap_fb.c b/drivers/gpu/drm/omapdrm/omap_fb.c index ec60620fe2d1..11fb8cf55e57 100644 --- a/drivers/gpu/drm/omapdrm/omap_fb.c +++ b/drivers/gpu/drm/omapdrm/omap_fb.c @@ -29,30 +29,26 @@ * framebuffer funcs */
-/* DSS to DRM formats mapping */ -static const struct { - u32 dss_format; - uint32_t pixel_format; -} formats[] = { +static const u32 formats[] = { /* 16bpp [A]RGB: */ - { DRM_FORMAT_RGB565, DRM_FORMAT_RGB565 }, /* RGB16-565 */ - { DRM_FORMAT_RGBX4444, DRM_FORMAT_RGBX4444 }, /* RGB12x-4444 */ - { DRM_FORMAT_XRGB4444, DRM_FORMAT_XRGB4444 }, /* xRGB12-4444 */ - { DRM_FORMAT_RGBA4444, DRM_FORMAT_RGBA4444 }, /* RGBA12-4444 */ - { DRM_FORMAT_ARGB4444, DRM_FORMAT_ARGB4444 }, /* ARGB16-4444 */ - { DRM_FORMAT_XRGB1555, DRM_FORMAT_XRGB1555 }, /* xRGB15-1555 */ - { DRM_FORMAT_ARGB1555, DRM_FORMAT_ARGB1555 }, /* ARGB16-1555 */ + DRM_FORMAT_RGB565, /* RGB16-565 */ + DRM_FORMAT_RGBX4444, /* RGB12x-4444 */ + DRM_FORMAT_XRGB4444, /* xRGB12-4444 */ + DRM_FORMAT_RGBA4444, /* RGBA12-4444 */ + DRM_FORMAT_ARGB4444, /* ARGB16-4444 */ + DRM_FORMAT_XRGB1555, /* xRGB15-1555 */ + DRM_FORMAT_ARGB1555, /* ARGB16-1555 */ /* 24bpp RGB: */ - { DRM_FORMAT_RGB888, DRM_FORMAT_RGB888 }, /* RGB24-888 */ + DRM_FORMAT_RGB888, /* RGB24-888 */ /* 32bpp [A]RGB: */ - { DRM_FORMAT_RGBX8888, DRM_FORMAT_RGBX8888 }, /* RGBx24-8888 */ - { DRM_FORMAT_XRGB8888, DRM_FORMAT_XRGB8888 }, /* xRGB24-8888 */ - { DRM_FORMAT_RGBA8888, DRM_FORMAT_RGBA8888 }, /* RGBA32-8888 */ - { DRM_FORMAT_ARGB8888, DRM_FORMAT_ARGB8888 }, /* ARGB32-8888 */ + DRM_FORMAT_RGBX8888, /* RGBx24-8888 */ + DRM_FORMAT_XRGB8888, /* xRGB24-8888 */ + DRM_FORMAT_RGBA8888, /* RGBA32-8888 */ + DRM_FORMAT_ARGB8888, /* ARGB32-8888 */ /* YUV: */ - { DRM_FORMAT_NV12, DRM_FORMAT_NV12 }, - { DRM_FORMAT_YUYV, DRM_FORMAT_YUYV }, - { DRM_FORMAT_UYVY, DRM_FORMAT_UYVY }, + DRM_FORMAT_NV12, + DRM_FORMAT_YUYV, + DRM_FORMAT_UYVY, };
/* per-plane info for the fb: */ @@ -69,7 +65,6 @@ struct omap_framebuffer { struct drm_framebuffer base; int pin_count; const struct drm_format_info *format; - u32 dss_format; struct plane planes[2]; /* lock for pinning (pin_count and planes.paddr) */ struct mutex lock; @@ -137,7 +132,7 @@ void omap_framebuffer_update_scanout(struct drm_framebuffer *fb, struct plane *plane = &omap_fb->planes[0]; uint32_t x, y, orient = 0;
- info->color_mode = omap_fb->dss_format; + info->color_mode = fb->format->format;
info->pos_x = win->crtc_x; info->pos_y = win->crtc_y; @@ -225,7 +220,7 @@ void omap_framebuffer_update_scanout(struct drm_framebuffer *fb, /* convert to pixels: */ info->screen_width /= format->cpp[0];
- if (omap_fb->dss_format == DRM_FORMAT_NV12) { + if (fb->format->format == DRM_FORMAT_NV12) { plane = &omap_fb->planes[1];
if (info->rotation_type == OMAP_DSS_ROT_TILER) { @@ -384,7 +379,6 @@ struct drm_framebuffer *omap_framebuffer_init(struct drm_device *dev, const struct drm_format_info *format = NULL; struct omap_framebuffer *omap_fb = NULL; struct drm_framebuffer *fb = NULL; - u32 dss_format = 0; unsigned int pitch = mode_cmd->pitches[0]; int ret, i;
@@ -395,13 +389,11 @@ struct drm_framebuffer *omap_framebuffer_init(struct drm_device *dev, format = drm_format_info(mode_cmd->pixel_format);
for (i = 0; i < ARRAY_SIZE(formats); i++) { - if (formats[i].pixel_format == mode_cmd->pixel_format) { - dss_format = formats[i].dss_format; + if (formats[i] == mode_cmd->pixel_format) break; - } }
- if (!format || !dss_format) { + if (!format || i == ARRAY_SIZE(formats)) { dev_dbg(dev->dev, "unsupported pixel format: %4.4s\n", (char *)&mode_cmd->pixel_format); ret = -EINVAL; @@ -416,7 +408,6 @@ struct drm_framebuffer *omap_framebuffer_init(struct drm_device *dev,
fb = &omap_fb->base; omap_fb->format = format; - omap_fb->dss_format = dss_format; mutex_init(&omap_fb->lock);
/*
Hi Tomi,
Thank you for the patch.
Reviewed-by: Laurent Pinchart laurent.pinchart@ideasonboard.com
On Thursday 04 May 2017 13:23:31 Tomi Valkeinen wrote:
omap_fb.c has a table with DSS and DRM formats, used to convert between them. This is no longer needed, so we can change the array to a plain array of DRM_FORMAT_* values which contain all possible pixel formats supported by any DSS IP version.
Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com
drivers/gpu/drm/omapdrm/omap_fb.c | 49 ++++++++++++++--------------------- 1 file changed, 20 insertions(+), 29 deletions(-)
Now that we use fourccs, we can also rename the 'color_mode' variables to 'fourcc'.
Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com --- drivers/gpu/drm/omapdrm/dss/dispc.c | 109 ++++++++++++++--------------- drivers/gpu/drm/omapdrm/dss/dss_features.c | 5 +- drivers/gpu/drm/omapdrm/dss/dss_features.h | 2 +- drivers/gpu/drm/omapdrm/dss/omapdss.h | 4 +- drivers/gpu/drm/omapdrm/omap_fb.c | 2 +- 5 files changed, 60 insertions(+), 62 deletions(-)
diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c b/drivers/gpu/drm/omapdrm/dss/dispc.c index 9fa320990af1..378acd659523 100644 --- a/drivers/gpu/drm/omapdrm/dss/dispc.c +++ b/drivers/gpu/drm/omapdrm/dss/dispc.c @@ -78,7 +78,7 @@ struct dispc_features { int (*calc_scaling) (unsigned long pclk, unsigned long lclk, const struct videomode *vm, u16 width, u16 height, u16 out_width, u16 out_height, - u32 color_mode, bool *five_taps, + u32 fourcc, bool *five_taps, int *x_predecim, int *y_predecim, int *decim_x, int *decim_y, u16 pos_x, unsigned long *core_clk, bool mem_to_mem); unsigned long (*calc_core_clk) (unsigned long pclk, @@ -906,12 +906,11 @@ static void dispc_ovl_set_row_inc(enum omap_plane_id plane, s32 inc) dispc_write_reg(DISPC_OVL_ROW_INC(plane), inc); }
-static void dispc_ovl_set_color_mode(enum omap_plane_id plane, - u32 color_mode) +static void dispc_ovl_set_color_mode(enum omap_plane_id plane, u32 fourcc) { u32 m = 0; if (plane != OMAP_DSS_GFX) { - switch (color_mode) { + switch (fourcc) { case DRM_FORMAT_NV12: m = 0x0; break; case DRM_FORMAT_XRGB4444: @@ -946,7 +945,7 @@ static void dispc_ovl_set_color_mode(enum omap_plane_id plane, BUG(); return; } } else { - switch (color_mode) { + switch (fourcc) { case DRM_FORMAT_RGBX4444: m = 0x4; break; case DRM_FORMAT_ARGB4444: @@ -979,9 +978,9 @@ static void dispc_ovl_set_color_mode(enum omap_plane_id plane, REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), m, 4, 1); }
-static bool format_is_yuv(u32 color_mode) +static bool format_is_yuv(u32 fourcc) { - switch (color_mode) { + switch (fourcc) { case DRM_FORMAT_YUYV: case DRM_FORMAT_UYVY: case DRM_FORMAT_NV12: @@ -1563,7 +1562,7 @@ static void dispc_ovl_set_scale_param(enum omap_plane_id plane,
static void dispc_ovl_set_accu_uv(enum omap_plane_id plane, u16 orig_width, u16 orig_height, u16 out_width, u16 out_height, - bool ilace, u32 color_mode, u8 rotation) + bool ilace, u32 fourcc, u8 rotation) { int h_accu2_0, h_accu2_1; int v_accu2_0, v_accu2_1; @@ -1619,7 +1618,7 @@ static void dispc_ovl_set_accu_uv(enum omap_plane_id plane, return; }
- switch (color_mode) { + switch (fourcc) { case DRM_FORMAT_NV12: if (ilace) accu_table = accu_nv12_ilace; @@ -1653,7 +1652,7 @@ static void dispc_ovl_set_scaling_common(enum omap_plane_id plane, u16 orig_width, u16 orig_height, u16 out_width, u16 out_height, bool ilace, bool five_taps, - bool fieldmode, u32 color_mode, + bool fieldmode, u32 fourcc, u8 rotation) { int accu0 = 0; @@ -1707,7 +1706,7 @@ static void dispc_ovl_set_scaling_uv(enum omap_plane_id plane, u16 orig_width, u16 orig_height, u16 out_width, u16 out_height, bool ilace, bool five_taps, - bool fieldmode, u32 color_mode, + bool fieldmode, u32 fourcc, u8 rotation) { int scale_x = out_width != orig_width; @@ -1717,7 +1716,7 @@ static void dispc_ovl_set_scaling_uv(enum omap_plane_id plane, if (!dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) return;
- if (!format_is_yuv(color_mode)) { + if (!format_is_yuv(fourcc)) { /* reset chroma resampling for RGB formats */ if (plane != OMAP_DSS_WB) REG_FLD_MOD(DISPC_OVL_ATTRIBUTES2(plane), 0, 8, 8); @@ -1725,9 +1724,9 @@ static void dispc_ovl_set_scaling_uv(enum omap_plane_id plane, }
dispc_ovl_set_accu_uv(plane, orig_width, orig_height, out_width, - out_height, ilace, color_mode, rotation); + out_height, ilace, fourcc, rotation);
- switch (color_mode) { + switch (fourcc) { case DRM_FORMAT_NV12: if (chroma_upscale) { /* UV is subsampled by 2 horizontally and vertically */ @@ -1786,7 +1785,7 @@ static void dispc_ovl_set_scaling(enum omap_plane_id plane, u16 orig_width, u16 orig_height, u16 out_width, u16 out_height, bool ilace, bool five_taps, - bool fieldmode, u32 color_mode, + bool fieldmode, u32 fourcc, u8 rotation) { BUG_ON(plane == OMAP_DSS_GFX); @@ -1795,26 +1794,26 @@ static void dispc_ovl_set_scaling(enum omap_plane_id plane, orig_width, orig_height, out_width, out_height, ilace, five_taps, - fieldmode, color_mode, + fieldmode, fourcc, rotation);
dispc_ovl_set_scaling_uv(plane, orig_width, orig_height, out_width, out_height, ilace, five_taps, - fieldmode, color_mode, + fieldmode, fourcc, rotation); }
static void dispc_ovl_set_rotation_attrs(enum omap_plane_id plane, u8 rotation, enum omap_dss_rotation_type rotation_type, - bool mirroring, u32 color_mode) + bool mirroring, u32 fourcc) { bool row_repeat = false; int vidrot = 0;
- if (color_mode == DRM_FORMAT_YUYV || - color_mode == DRM_FORMAT_UYVY) { + if (fourcc == DRM_FORMAT_YUYV || + fourcc == DRM_FORMAT_UYVY) {
if (mirroring) { switch (rotation) { @@ -1859,7 +1858,7 @@ static void dispc_ovl_set_rotation_attrs(enum omap_plane_id plane, u8 rotation, * NV12 in 1D mode must use ROTATION=1. Otherwise DSS will fetch extra * rows beyond the framebuffer, which may cause OCP error. */ - if (color_mode == DRM_FORMAT_NV12 && + if (fourcc == DRM_FORMAT_NV12 && rotation_type != OMAP_DSS_ROT_TILER) vidrot = 1;
@@ -1870,7 +1869,7 @@ static void dispc_ovl_set_rotation_attrs(enum omap_plane_id plane, u8 rotation,
if (dss_feat_color_mode_supported(plane, DRM_FORMAT_NV12)) { bool doublestride = - color_mode == DRM_FORMAT_NV12 && + fourcc == DRM_FORMAT_NV12 && rotation_type == OMAP_DSS_ROT_TILER && (rotation == OMAP_DSS_ROT_0 || rotation == OMAP_DSS_ROT_180);
@@ -1879,9 +1878,9 @@ static void dispc_ovl_set_rotation_attrs(enum omap_plane_id plane, u8 rotation, } }
-static int color_mode_to_bpp(u32 color_mode) +static int color_mode_to_bpp(u32 fourcc) { - switch (color_mode) { + switch (fourcc) { case DRM_FORMAT_NV12: return 8; case DRM_FORMAT_RGBX4444: @@ -1921,13 +1920,13 @@ static s32 pixinc(int pixels, u8 ps) }
static void calc_offset(u16 screen_width, u16 width, - u32 color_mode, bool fieldmode, + u32 fourcc, bool fieldmode, unsigned int field_offset, unsigned *offset0, unsigned *offset1, s32 *row_inc, s32 *pix_inc, int x_predecim, int y_predecim) { u8 ps;
- ps = color_mode_to_bpp(color_mode) / 8; + ps = color_mode_to_bpp(fourcc) / 8;
DSSDBG("scrw %d, width %d\n", screen_width, width);
@@ -1940,8 +1939,8 @@ static void calc_offset(u16 screen_width, u16 width,
*row_inc = pixinc(1 + (y_predecim * screen_width - width * x_predecim) + (fieldmode ? screen_width : 0), ps); - if (color_mode == DRM_FORMAT_YUYV || - color_mode == DRM_FORMAT_UYVY) + if (fourcc == DRM_FORMAT_YUYV || + fourcc == DRM_FORMAT_UYVY) *pix_inc = pixinc(x_predecim, 2 * ps); else *pix_inc = pixinc(x_predecim, ps); @@ -2008,7 +2007,7 @@ static int check_horiz_timing_omap3(unsigned long pclk, unsigned long lclk, static unsigned long calc_core_clk_five_taps(unsigned long pclk, const struct videomode *vm, u16 width, u16 height, u16 out_width, u16 out_height, - u32 color_mode) + u32 fourcc) { u32 core_clk = 0; u64 tmp; @@ -2038,7 +2037,7 @@ static unsigned long calc_core_clk_five_taps(unsigned long pclk, do_div(tmp, out_width); core_clk = max_t(u32, core_clk, tmp);
- if (color_mode == DRM_FORMAT_XRGB8888) + if (fourcc == DRM_FORMAT_XRGB8888) core_clk <<= 1; }
@@ -2101,7 +2100,7 @@ static unsigned long calc_core_clk_44xx(unsigned long pclk, u16 width, static int dispc_ovl_calc_scaling_24xx(unsigned long pclk, unsigned long lclk, const struct videomode *vm, u16 width, u16 height, u16 out_width, u16 out_height, - u32 color_mode, bool *five_taps, + u32 fourcc, bool *five_taps, int *x_predecim, int *y_predecim, int *decim_x, int *decim_y, u16 pos_x, unsigned long *core_clk, bool mem_to_mem) { @@ -2147,7 +2146,7 @@ static int dispc_ovl_calc_scaling_24xx(unsigned long pclk, unsigned long lclk, static int dispc_ovl_calc_scaling_34xx(unsigned long pclk, unsigned long lclk, const struct videomode *vm, u16 width, u16 height, u16 out_width, u16 out_height, - u32 color_mode, bool *five_taps, + u32 fourcc, bool *five_taps, int *x_predecim, int *y_predecim, int *decim_x, int *decim_y, u16 pos_x, unsigned long *core_clk, bool mem_to_mem) { @@ -2169,7 +2168,7 @@ static int dispc_ovl_calc_scaling_34xx(unsigned long pclk, unsigned long lclk, if (*five_taps) *core_clk = calc_core_clk_five_taps(pclk, vm, in_width, in_height, out_width, - out_height, color_mode); + out_height, fourcc); else *core_clk = dispc.feat->calc_core_clk(pclk, in_width, in_height, out_width, out_height, @@ -2232,7 +2231,7 @@ static int dispc_ovl_calc_scaling_34xx(unsigned long pclk, unsigned long lclk, static int dispc_ovl_calc_scaling_44xx(unsigned long pclk, unsigned long lclk, const struct videomode *vm, u16 width, u16 height, u16 out_width, u16 out_height, - u32 color_mode, bool *five_taps, + u32 fourcc, bool *five_taps, int *x_predecim, int *y_predecim, int *decim_x, int *decim_y, u16 pos_x, unsigned long *core_clk, bool mem_to_mem) { @@ -2266,7 +2265,7 @@ static int dispc_ovl_calc_scaling_44xx(unsigned long pclk, unsigned long lclk, return -EINVAL; }
- if (*decim_x > 4 && color_mode != DRM_FORMAT_NV12) { + if (*decim_x > 4 && fourcc != DRM_FORMAT_NV12) { /* * Let's disable all scaling that requires horizontal * decimation with higher factor than 4, until we have @@ -2297,7 +2296,7 @@ static int dispc_ovl_calc_scaling(unsigned long pclk, unsigned long lclk, enum omap_overlay_caps caps, const struct videomode *vm, u16 width, u16 height, u16 out_width, u16 out_height, - u32 color_mode, bool *five_taps, + u32 fourcc, bool *five_taps, int *x_predecim, int *y_predecim, u16 pos_x, enum omap_dss_rotation_type rotation_type, bool mem_to_mem) { @@ -2336,7 +2335,7 @@ static int dispc_ovl_calc_scaling(unsigned long pclk, unsigned long lclk, return -EINVAL;
ret = dispc.feat->calc_scaling(pclk, lclk, vm, width, height, - out_width, out_height, color_mode, five_taps, + out_width, out_height, fourcc, five_taps, x_predecim, y_predecim, &decim_x, &decim_y, pos_x, &core_clk, mem_to_mem); if (ret) @@ -2372,7 +2371,7 @@ static int dispc_ovl_calc_scaling(unsigned long pclk, unsigned long lclk, static int dispc_ovl_setup_common(enum omap_plane_id plane, enum omap_overlay_caps caps, u32 paddr, u32 p_uv_addr, u16 screen_width, int pos_x, int pos_y, u16 width, u16 height, - u16 out_width, u16 out_height, u32 color_mode, + u16 out_width, u16 out_height, u32 fourcc, u8 rotation, bool mirror, u8 zorder, u8 pre_mult_alpha, u8 global_alpha, enum omap_dss_rotation_type rotation_type, bool replication, const struct videomode *vm, @@ -2396,7 +2395,7 @@ static int dispc_ovl_setup_common(enum omap_plane_id plane, if (paddr == 0 && rotation_type != OMAP_DSS_ROT_TILER) return -EINVAL;
- if (format_is_yuv(color_mode) && (in_width & 1)) { + if (format_is_yuv(fourcc) && (in_width & 1)) { DSSERR("input width %d is not even for YUV format\n", in_width); return -EINVAL; } @@ -2418,11 +2417,11 @@ static int dispc_ovl_setup_common(enum omap_plane_id plane, out_height); }
- if (!dss_feat_color_mode_supported(plane, color_mode)) + if (!dss_feat_color_mode_supported(plane, fourcc)) return -EINVAL;
r = dispc_ovl_calc_scaling(pclk, lclk, caps, vm, in_width, - in_height, out_width, out_height, color_mode, + in_height, out_width, out_height, fourcc, &five_taps, &x_predecim, &y_predecim, pos_x, rotation_type, mem_to_mem); if (r) @@ -2435,7 +2434,7 @@ static int dispc_ovl_setup_common(enum omap_plane_id plane, DSSDBG("predecimation %d x %x, new input size %d x %d\n", x_predecim, y_predecim, in_width, in_height);
- if (format_is_yuv(color_mode) && (in_width & 1)) { + if (format_is_yuv(fourcc) && (in_width & 1)) { DSSDBG("predecimated input width is not even for YUV format\n"); DSSDBG("adjusting input width %d -> %d\n", in_width, in_width & ~1); @@ -2443,7 +2442,7 @@ static int dispc_ovl_setup_common(enum omap_plane_id plane, in_width &= ~1; }
- if (format_is_yuv(color_mode)) + if (format_is_yuv(fourcc)) cconv = 1;
if (ilace && !fieldmode) { @@ -2478,14 +2477,14 @@ static int dispc_ovl_setup_common(enum omap_plane_id plane, }
calc_offset(screen_width, frame_width, - color_mode, fieldmode, field_offset, + fourcc, fieldmode, field_offset, &offset0, &offset1, &row_inc, &pix_inc, x_predecim, y_predecim);
DSSDBG("offset0 %u, offset1 %u, row_inc %d, pix_inc %d\n", offset0, offset1, row_inc, pix_inc);
- dispc_ovl_set_color_mode(plane, color_mode); + dispc_ovl_set_color_mode(plane, fourcc);
dispc_ovl_configure_burst_type(plane, rotation_type);
@@ -2495,7 +2494,7 @@ static int dispc_ovl_setup_common(enum omap_plane_id plane, dispc_ovl_set_ba0(plane, paddr + offset0); dispc_ovl_set_ba1(plane, paddr + offset1);
- if (color_mode == DRM_FORMAT_NV12) { + if (fourcc == DRM_FORMAT_NV12) { dispc_ovl_set_ba0_uv(plane, p_uv_addr + offset0); dispc_ovl_set_ba1_uv(plane, p_uv_addr + offset1); } @@ -2516,13 +2515,13 @@ static int dispc_ovl_setup_common(enum omap_plane_id plane, if (caps & OMAP_DSS_OVL_CAP_SCALE) { dispc_ovl_set_scaling(plane, in_width, in_height, out_width, out_height, ilace, five_taps, fieldmode, - color_mode, rotation); + fourcc, rotation); dispc_ovl_set_output_size(plane, out_width, out_height); dispc_ovl_set_vid_color_conv(plane, cconv); }
dispc_ovl_set_rotation_attrs(plane, rotation, rotation_type, mirror, - color_mode); + fourcc);
dispc_ovl_set_zorder(plane, caps, zorder); dispc_ovl_set_pre_mult_alpha(plane, caps, pre_mult_alpha); @@ -2546,13 +2545,13 @@ static int dispc_ovl_setup(enum omap_plane_id plane, " %dx%d, cmode %x, rot %d, mir %d, chan %d repl %d\n", plane, &oi->paddr, &oi->p_uv_addr, oi->screen_width, oi->pos_x, oi->pos_y, oi->width, oi->height, oi->out_width, oi->out_height, - oi->color_mode, oi->rotation, oi->mirror, channel, replication); + oi->fourcc, oi->rotation, oi->mirror, channel, replication);
dispc_ovl_set_channel_out(plane, channel);
r = dispc_ovl_setup_common(plane, caps, oi->paddr, oi->p_uv_addr, oi->screen_width, oi->pos_x, oi->pos_y, oi->width, oi->height, - oi->out_width, oi->out_height, oi->color_mode, oi->rotation, + oi->out_width, oi->out_height, oi->fourcc, oi->rotation, oi->mirror, oi->zorder, oi->pre_mult_alpha, oi->global_alpha, oi->rotation_type, replication, vm, mem_to_mem);
@@ -2576,16 +2575,16 @@ int dispc_wb_setup(const struct omap_dss_writeback_info *wi,
DSSDBG("dispc_wb_setup, pa %x, pa_uv %x, %d,%d -> %dx%d, cmode %x, " "rot %d, mir %d\n", wi->paddr, wi->p_uv_addr, in_width, - in_height, wi->width, wi->height, wi->color_mode, wi->rotation, + in_height, wi->width, wi->height, wi->fourcc, wi->rotation, wi->mirror);
r = dispc_ovl_setup_common(plane, caps, wi->paddr, wi->p_uv_addr, wi->buf_width, pos_x, pos_y, in_width, in_height, wi->width, - wi->height, wi->color_mode, wi->rotation, wi->mirror, zorder, + wi->height, wi->fourcc, wi->rotation, wi->mirror, zorder, wi->pre_mult_alpha, global_alpha, wi->rotation_type, replication, vm, mem_to_mem);
- switch (wi->color_mode) { + switch (wi->fourcc) { case DRM_FORMAT_RGB565: case DRM_FORMAT_RGB888: case DRM_FORMAT_ARGB4444: @@ -3919,7 +3918,7 @@ static const struct dispc_errata_i734_data { .ovli = { .screen_width = 1, .width = 1, .height = 1, - .color_mode = DRM_FORMAT_XRGB8888, + .fourcc = DRM_FORMAT_XRGB8888, .rotation = OMAP_DSS_ROT_0, .rotation_type = OMAP_DSS_ROT_NONE, .mirror = 0, @@ -3960,7 +3959,7 @@ static int dispc_errata_i734_wa_init(void) return 0;
i734_buf.size = i734.ovli.width * i734.ovli.height * - color_mode_to_bpp(i734.ovli.color_mode) / 8; + color_mode_to_bpp(i734.ovli.fourcc) / 8;
i734_buf.vaddr = dma_alloc_writecombine(&dispc.pdev->dev, i734_buf.size, &i734_buf.paddr, GFP_KERNEL); diff --git a/drivers/gpu/drm/omapdrm/dss/dss_features.c b/drivers/gpu/drm/omapdrm/dss/dss_features.c index 32e21ed45f47..0e599710dd95 100644 --- a/drivers/gpu/drm/omapdrm/dss/dss_features.c +++ b/drivers/gpu/drm/omapdrm/dss/dss_features.c @@ -808,8 +808,7 @@ enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane_id plane) return omap_current_dss_features->overlay_caps[plane]; }
-bool dss_feat_color_mode_supported(enum omap_plane_id plane, - u32 color_mode) +bool dss_feat_color_mode_supported(enum omap_plane_id plane, u32 fourcc) { const u32 *modes; unsigned int i; @@ -817,7 +816,7 @@ bool dss_feat_color_mode_supported(enum omap_plane_id plane, modes = omap_current_dss_features->supported_color_modes[plane];
for (i = 0; modes[i]; ++i) { - if (modes[i] == color_mode) + if (modes[i] == fourcc) return true; }
diff --git a/drivers/gpu/drm/omapdrm/dss/dss_features.h b/drivers/gpu/drm/omapdrm/dss/dss_features.h index 8f48dc097717..c36436d27ff5 100644 --- a/drivers/gpu/drm/omapdrm/dss/dss_features.h +++ b/drivers/gpu/drm/omapdrm/dss/dss_features.h @@ -90,7 +90,7 @@ unsigned long dss_feat_get_param_min(enum dss_range_param param); unsigned long dss_feat_get_param_max(enum dss_range_param param); enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane_id plane); bool dss_feat_color_mode_supported(enum omap_plane_id plane, - u32 color_mode); + u32 fourcc);
u32 dss_feat_get_buffer_size_unit(void); /* in bytes */ u32 dss_feat_get_burst_size_unit(void); /* in bytes */ diff --git a/drivers/gpu/drm/omapdrm/dss/omapdss.h b/drivers/gpu/drm/omapdrm/dss/omapdss.h index 5848baf15d53..a951b8b44148 100644 --- a/drivers/gpu/drm/omapdrm/dss/omapdss.h +++ b/drivers/gpu/drm/omapdrm/dss/omapdss.h @@ -269,7 +269,7 @@ struct omap_overlay_info { u16 screen_width; u16 width; u16 height; - u32 color_mode; + u32 fourcc; u8 rotation; enum omap_dss_rotation_type rotation_type; bool mirror; @@ -399,7 +399,7 @@ struct omap_dss_writeback_info { u16 buf_width; u16 width; u16 height; - u32 color_mode; + u32 fourcc; u8 rotation; enum omap_dss_rotation_type rotation_type; bool mirror; diff --git a/drivers/gpu/drm/omapdrm/omap_fb.c b/drivers/gpu/drm/omapdrm/omap_fb.c index 11fb8cf55e57..ed9038743e4d 100644 --- a/drivers/gpu/drm/omapdrm/omap_fb.c +++ b/drivers/gpu/drm/omapdrm/omap_fb.c @@ -132,7 +132,7 @@ void omap_framebuffer_update_scanout(struct drm_framebuffer *fb, struct plane *plane = &omap_fb->planes[0]; uint32_t x, y, orient = 0;
- info->color_mode = fb->format->format; + info->fourcc = fb->format->format;
info->pos_x = win->crtc_x; info->pos_y = win->crtc_y;
Hi Tomi,
Thank you for the patch.
On Thursday 04 May 2017 13:23:32 Tomi Valkeinen wrote:
Now that we use fourccs, we can also rename the 'color_mode' variables to 'fourcc'.
Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com
Reviewed-by: Laurent Pinchart laurent.pinchart@ideasonboard.com
drivers/gpu/drm/omapdrm/dss/dispc.c | 109 ++++++++++++------------- drivers/gpu/drm/omapdrm/dss/dss_features.c | 5 +- drivers/gpu/drm/omapdrm/dss/dss_features.h | 2 +- drivers/gpu/drm/omapdrm/dss/omapdss.h | 4 +- drivers/gpu/drm/omapdrm/omap_fb.c | 2 +- 5 files changed, 60 insertions(+), 62 deletions(-)
On 04/05/17 13:23, Tomi Valkeinen wrote:
Hi,
This series has a bunch of cleanups. We drop DMA and VRFB rotation, and RFBI output. None of those are supported.
The latter half is about getting rid of enum omap_color_mode and moving to use fourcc pixel formats.
There should be no functional changes caused by this series.
This series is based on my earlier "drm/omap: misc changes" series.
Tomi
Tomi Valkeinen (16): drm/omap: fix passing rotation parameter to dispc drm/omap: fix setting & clearing DOUBLESTRIDE drm/omap: remove CLUT drm/omap: ratelimit OCP error drm/omap: remove rfbi drm/omap: remove dma & vrfb rotation drm/omap: cleanup offset calculation drm/omap: add format_is_yuv() helper drm/omap: remove unneeded prototypes drm/omap: remove unused 'supported_modes' field drm/omap: change supported_modes to an array drm/omap: use DRM_FORMAT_* instead of OMAP_DSS_COLOR_* drm/omap: use u32 instead of enum omap_color_mode drm/omap: remove omap_framebuffer_get_formats() drm/omap: cleanup formats array drm/omap: rename color_mode to fourcc
Patches 1 and 5 are not valid anymore. 5 has been already merged via another series, and I've since reworked 1, which I'll be handling in a separate tiler rotation series. The rest are still valid.
Tomi
dri-devel@lists.freedesktop.org
-
Laurent Pinchart -
Tomi Valkeinen