When DP downstream has HDMI branch, it checks below functionality and shows supports. It follows DP 1.4a spec; Table 2-161: Address Mapping within DPCD Receiver Capability Field (DPCD Addresses 00000h through 000FFh).
Added flags for DP downstream: YCBCR422_PASS_THROUGH_SUPPORT, YCBCR420_PASS_THROUGH_SUPPORT, CONVERSION_FROM_YCBCR444_TO_YCBCR422_SUPPORT and CONVERSION_FROM_YCBCR444_TO_YCBCR420_SUPPORT.
Signed-off-by: Gwan-gyeong Mun gwan-gyeong.mun@intel.com --- drivers/gpu/drm/drm_dp_helper.c | 19 +++++++++++++++++++ include/drm/drm_dp_helper.h | 5 +++++ 2 files changed, 24 insertions(+)
diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c index 5a103e9b3c86..cb6dcfb13127 100644 --- a/drivers/gpu/drm/drm_dp_helper.c +++ b/drivers/gpu/drm/drm_dp_helper.c @@ -531,6 +531,25 @@ void drm_dp_downstream_debug(struct seq_file *m,
if (bpc > 0) seq_printf(m, "\t\tMax bpc: %d\n", bpc); + + if (type == DP_DS_PORT_TYPE_HDMI) { + bool ycbcr422_passthru = port_cap[3] & + DP_DS_YCBCR422_PASSTHRU_SUPPORT; + bool ycbcr420_passthru = port_cap[3] & + DP_DS_YCBCR420_PASSTHRU_SUPPORT; + bool ycbcr422_convert = port_cap[3] & + DP_DS_CONV_YCBCR444_TO_YCBCR422_SUPPORT; + bool ycbcr420_convert = port_cap[3] & + DP_DS_CONV_YCBCR444_TO_YCBCR420_SUPPORT; + seq_printf(m, "\t\tHDMI YCbCr 4:2:2 pass-through support: %s\n", + ycbcr422_passthru ? "yes" : "no"); + seq_printf(m, "\t\tHDMI YCbCr 4:2:0 pass-through support: %s\n", + ycbcr420_passthru ? "yes" : "no"); + seq_printf(m, "\t\tHDMI YCbCr 4:4:4 to YCbCr 4:2:2 Convert support: %s\n", + ycbcr422_convert ? "yes" : "no"); + seq_printf(m, "\t\tHDMI YCbCr 4:4:4 to YCbCr 4:2:0 Convert support: %s\n", + ycbcr420_convert ? "yes" : "no"); + } } } EXPORT_SYMBOL(drm_dp_downstream_debug); diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index 262faf9e5e94..d61eadaba769 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h @@ -391,6 +391,11 @@ # define DP_DS_10BPC 1 # define DP_DS_12BPC 2 # define DP_DS_16BPC 3 +/* offset 3 for HDMI */ +# define DP_DS_YCBCR422_PASSTHRU_SUPPORT (1 << 1) /* 1.4 */ +# define DP_DS_YCBCR420_PASSTHRU_SUPPORT (1 << 2) +# define DP_DS_CONV_YCBCR444_TO_YCBCR422_SUPPORT (1 << 3) +# define DP_DS_CONV_YCBCR444_TO_YCBCR420_SUPPORT (1 << 4)
#define DP_MAX_DOWNSTREAM_PORTS 0x10
When a DP downstream uses a DP to HDMI active converter, the active converter needs to support YCbCr420 Pass-through to enable DP YCbCr 4:2:0 outputs.
Signed-off-by: Gwan-gyeong Mun gwan-gyeong.mun@intel.com --- drivers/gpu/drm/i915/display/intel_dp.c | 26 +++++++++++++++++++++++++ 1 file changed, 26 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index f4dede6253f8..824ed8096426 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2298,6 +2298,22 @@ intel_dp_compute_link_config(struct intel_encoder *encoder, return 0; }
+static bool +intel_dp_downstream_is_hdmi_detailed_cap_info(struct intel_dp *intel_dp) +{ + int type = intel_dp->downstream_ports[0] & DP_DS_PORT_TYPE_MASK; + bool detailed_cap_info = intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT] & + DP_DETAILED_CAP_INFO_AVAILABLE; + + return type == DP_DS_PORT_TYPE_HDMI && detailed_cap_info; +} + +static bool +intel_dp_downstream_supports_ycbcr_420_passthru(struct intel_dp *intel_dp) +{ + return intel_dp->downstream_ports[3] & DP_DS_YCBCR420_PASSTHRU_SUPPORT; +} + static int intel_dp_ycbcr420_config(struct intel_dp *intel_dp, struct drm_connector *connector, @@ -2314,6 +2330,16 @@ intel_dp_ycbcr420_config(struct intel_dp *intel_dp, !connector->ycbcr_420_allowed) return 0;
+ /* + * When a DP downstream uses a DP to HDMI active converter, + * the active converter needs to support YCbCr420 Pass-through. + */ + if (drm_dp_is_branch(intel_dp->dpcd)) { + if (intel_dp_downstream_is_hdmi_detailed_cap_info(intel_dp) && + !intel_dp_downstream_supports_ycbcr_420_passthru(intel_dp)) + return 0; + } + crtc_state->output_format = INTEL_OUTPUT_FORMAT_YCBCR420;
/* YCBCR 420 output conversion needs a scaler */
On Mon, Feb 03, 2020 at 02:04:21PM +0200, Gwan-gyeong Mun wrote:
When a DP downstream uses a DP to HDMI active converter, the active converter needs to support YCbCr420 Pass-through to enable DP YCbCr 4:2:0 outputs.
Signed-off-by: Gwan-gyeong Mun gwan-gyeong.mun@intel.com
drivers/gpu/drm/i915/display/intel_dp.c | 26 +++++++++++++++++++++++++ 1 file changed, 26 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index f4dede6253f8..824ed8096426 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2298,6 +2298,22 @@ intel_dp_compute_link_config(struct intel_encoder *encoder, return 0; }
+static bool +intel_dp_downstream_is_hdmi_detailed_cap_info(struct intel_dp *intel_dp) +{
- int type = intel_dp->downstream_ports[0] & DP_DS_PORT_TYPE_MASK;
- bool detailed_cap_info = intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT] &
DP_DETAILED_CAP_INFO_AVAILABLE;
- return type == DP_DS_PORT_TYPE_HDMI && detailed_cap_info;
This looks a bit incomplete, and should really be in the core. I have a bunch of stuff for DFPs sitting in a branch. I'll just post the whole thing...
+}
+static bool +intel_dp_downstream_supports_ycbcr_420_passthru(struct intel_dp *intel_dp) +{
- return intel_dp->downstream_ports[3] & DP_DS_YCBCR420_PASSTHRU_SUPPORT;
+}
static int intel_dp_ycbcr420_config(struct intel_dp *intel_dp, struct drm_connector *connector, @@ -2314,6 +2330,16 @@ intel_dp_ycbcr420_config(struct intel_dp *intel_dp, !connector->ycbcr_420_allowed) return 0;
/*
* When a DP downstream uses a DP to HDMI active converter,
* the active converter needs to support YCbCr420 Pass-through.
*/
if (drm_dp_is_branch(intel_dp->dpcd)) {
if (intel_dp_downstream_is_hdmi_detailed_cap_info(intel_dp) &&
!intel_dp_downstream_supports_ycbcr_420_passthru(intel_dp))
return 0;
}
crtc_state->output_format = INTEL_OUTPUT_FORMAT_YCBCR420;
/* YCBCR 420 output conversion needs a scaler */
-- 2.24.1
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