We need to extend drm_crtc_state to be able to handle omap specific crtc properties. This patch adds the necessary code to do the subclassing, without adding any properties.

Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com --- drivers/gpu/drm/omapdrm/omap_crtc.c | 54 ++++++++++++++++++++++++++++++++++--- 1 file changed, 51 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/omap_crtc.c b/drivers/gpu/drm/omapdrm/omap_crtc.c index 8dea89030e66..ff1570c096f8 100644 --- a/drivers/gpu/drm/omapdrm/omap_crtc.c +++ b/drivers/gpu/drm/omapdrm/omap_crtc.c @@ -27,6 +27,7 @@ #include "omap_drv.h"

#define to_omap_crtc(x) container_of(x, struct omap_crtc, base) +#define to_omap_crtc_state(x) container_of(x, struct omap_crtc_state, base)

struct omap_crtc { struct drm_crtc base; @@ -45,6 +46,10 @@ struct omap_crtc { wait_queue_head_t pending_wait; };

+struct omap_crtc_state { + struct drm_crtc_state base; +}; + /* ----------------------------------------------------------------------------- * Helper Functions */ @@ -318,6 +323,49 @@ static void omap_crtc_vblank_irq(struct omap_drm_irq *irq, uint32_t irqstatus) * CRTC Functions */

+static struct drm_crtc_state * +omap_crtc_atomic_duplicate_state(struct drm_crtc *crtc) +{ + struct omap_crtc_state *state; + struct omap_crtc_state *copy; + + if (WARN_ON(!crtc->state)) + return NULL; + + state = to_omap_crtc_state(crtc->state); + copy = kmemdup(state, sizeof(*state), GFP_KERNEL); + if (copy == NULL) + return NULL; + + __drm_atomic_helper_crtc_duplicate_state(crtc, &copy->base); + + return &copy->base; +} + +static void omap_crtc_atomic_destroy_state(struct drm_crtc *crtc, + struct drm_crtc_state *state) +{ + __drm_atomic_helper_crtc_destroy_state(state); + kfree(to_omap_crtc_state(state)); +} + +static void omap_crtc_reset(struct drm_crtc *crtc) +{ + struct omap_crtc_state *omap_state; + + if (crtc->state) { + omap_crtc_atomic_destroy_state(crtc, crtc->state); + crtc->state = NULL; + } + + omap_state = kzalloc(sizeof(*omap_state), GFP_KERNEL); + if (omap_state == NULL) + return; + + crtc->state = &omap_state->base; + crtc->state->crtc = crtc; +} + static void omap_crtc_destroy(struct drm_crtc *crtc) { struct omap_crtc *omap_crtc = to_omap_crtc(crtc); @@ -483,14 +531,14 @@ static int omap_crtc_atomic_get_property(struct drm_crtc *crtc, }

static const struct drm_crtc_funcs omap_crtc_funcs = { - .reset = drm_atomic_helper_crtc_reset, + .reset = omap_crtc_reset, .set_config = drm_atomic_helper_set_config, .destroy = omap_crtc_destroy, .page_flip = drm_atomic_helper_page_flip, .gamma_set = drm_atomic_helper_legacy_gamma_set, .set_property = drm_atomic_helper_crtc_set_property, - .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state, - .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state, + .atomic_duplicate_state = omap_crtc_atomic_duplicate_state, + .atomic_destroy_state = omap_crtc_atomic_destroy_state, .atomic_set_property = omap_crtc_atomic_set_property, .atomic_get_property = omap_crtc_atomic_get_property, };

mode_config's min_width and min_height are both set to 32, which is overly restrictive.

The real limits depend on whether we're configuring a crtc or a plane, but a limit of 8x2 is safe for both cases.

Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com --- drivers/gpu/drm/omapdrm/omap_drv.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/omap_drv.c b/drivers/gpu/drm/omapdrm/omap_drv.c index 8c58ca7db382..828cd1c9ecbc 100644 --- a/drivers/gpu/drm/omapdrm/omap_drv.c +++ b/drivers/gpu/drm/omapdrm/omap_drv.c @@ -478,8 +478,8 @@ static int omap_modeset_init(struct drm_device *dev) priv->num_planes, priv->num_crtcs, priv->num_encoders, priv->num_connectors);

- dev->mode_config.min_width = 32; - dev->mode_config.min_height = 32; + dev->mode_config.min_width = 8; + dev->mode_config.min_height = 2;

/* note: eventually will need some cpu_is_omapXYZ() type stuff here * to fill in these limits properly on different OMAP generations..

From: Peter Ujfalusi peter.ujfalusi@ti.com

Do not try to init the fbdev if either num_crtcs or num_connectors is 0. In this case we do not have display so the fbdev init would fail anyways.

Signed-off-by: Peter Ujfalusi peter.ujfalusi@ti.com Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com --- drivers/gpu/drm/omapdrm/omap_fbdev.c | 3 +++ 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/omapdrm/omap_fbdev.c b/drivers/gpu/drm/omapdrm/omap_fbdev.c index 8d8ac173f55d..2b045262f8ad 100644 --- a/drivers/gpu/drm/omapdrm/omap_fbdev.c +++ b/drivers/gpu/drm/omapdrm/omap_fbdev.c @@ -255,6 +255,9 @@ struct drm_fb_helper *omap_fbdev_init(struct drm_device *dev) struct drm_fb_helper *helper; int ret = 0;

+ if (!priv->num_crtcs || !priv->num_connectors) + return NULL; + fbdev = kzalloc(sizeof(*fbdev), GFP_KERNEL); if (!fbdev) goto fail;

From: Hemant Hariyani hemanthariyani@ti.com

Add support for render nodes in omap driver and allow required ioctls to be accessible via render nodes.

This enables unprivileged clients to allocate resources like GEM buffers for rendering their content into. Mode setting (KMS ioctls) is not allowed using render nodes. These buffers are then shared with a previleged process (e.g compositor) that has mode setting access.

An example of this use case is Android where the hardware composer is the only master and has mode setting access. Every other client then uses render node(e.g /dev/dri/renderD128 to allocate and use its buffers.

Signed-off-by: Hemant Hariyani hemanthariyani@ti.com Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com --- drivers/gpu/drm/omapdrm/omap_drv.c | 20 +++++++++++++------- 1 file changed, 13 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/omap_drv.c b/drivers/gpu/drm/omapdrm/omap_drv.c index 828cd1c9ecbc..f7af377561d8 100644 --- a/drivers/gpu/drm/omapdrm/omap_drv.c +++ b/drivers/gpu/drm/omapdrm/omap_drv.c @@ -622,12 +622,18 @@ static int ioctl_gem_info(struct drm_device *dev, void *data, }

static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = { - DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param, DRM_AUTH), - DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, ioctl_set_param, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), - DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new, DRM_AUTH), - DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, ioctl_gem_cpu_prep, DRM_AUTH), - DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, ioctl_gem_cpu_fini, DRM_AUTH), - DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info, DRM_AUTH), + DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param, + DRM_AUTH | DRM_RENDER_ALLOW), + DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, ioctl_set_param, + DRM_AUTH | DRM_MASTER | DRM_ROOT_ONLY), + DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new, + DRM_AUTH | DRM_RENDER_ALLOW), + DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, ioctl_gem_cpu_prep, + DRM_AUTH | DRM_RENDER_ALLOW), + DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, ioctl_gem_cpu_fini, + DRM_AUTH | DRM_RENDER_ALLOW), + DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info, + DRM_AUTH | DRM_RENDER_ALLOW), };

/* @@ -806,7 +812,7 @@ static const struct file_operations omapdriver_fops = {

static struct drm_driver omap_drm_driver = { .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME | - DRIVER_ATOMIC, + DRIVER_ATOMIC | DRIVER_RENDER, .load = dev_load, .unload = dev_unload, .open = dev_open,

Add omapdss_of_get_endpoint() helper function to get the endpoint node for the given port index and endpoint index.

Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com --- drivers/gpu/drm/omapdrm/dss/dss-of.c | 61 +++++++++++++++++++++++++++++++++++ drivers/gpu/drm/omapdrm/dss/omapdss.h | 3 ++ 2 files changed, 64 insertions(+)

diff --git a/drivers/gpu/drm/omapdrm/dss/dss-of.c b/drivers/gpu/drm/omapdrm/dss/dss-of.c index dfd4e9621e3b..aa9415d3c60b 100644 --- a/drivers/gpu/drm/omapdrm/dss/dss-of.c +++ b/drivers/gpu/drm/omapdrm/dss/dss-of.c @@ -180,3 +180,64 @@ omapdss_of_find_source_for_first_ep(struct device_node *node) return src ? src : ERR_PTR(-EPROBE_DEFER); } EXPORT_SYMBOL_GPL(omapdss_of_find_source_for_first_ep); + +static struct device_node *omapdss_of_get_port_by_index(struct device_node *parent, + int index) +{ + struct device_node *port; + + for (port = omapdss_of_get_next_port(parent, NULL); + port != NULL; + port = omapdss_of_get_next_port(parent, port)) { + u32 reg; + int r; + + r = of_property_read_u32(port, "reg", &reg); + if (r) + reg = 0; + + if (reg == index) + return port; + } + + return NULL; +} + +static struct device_node *omapdss_of_get_endpoint_by_index(struct device_node *port, + int index) +{ + struct device_node *ep; + + for (ep = omapdss_of_get_next_endpoint(port, NULL); + ep != NULL; + ep = omapdss_of_get_next_endpoint(port, ep)) { + u32 reg; + int r; + + r = of_property_read_u32(ep, "reg", &reg); + if (r) + reg = 0; + + if (reg == index) + return ep; + } + + return NULL; +} + +struct device_node *omapdss_of_get_endpoint(struct device_node *parent, + int port_index, int ep_index) +{ + struct device_node *port, *ep; + + port = omapdss_of_get_port_by_index(parent, port_index); + if (port == NULL) + return NULL; + + ep = omapdss_of_get_endpoint_by_index(port, ep_index); + + of_node_put(port); + + return ep; +} +EXPORT_SYMBOL_GPL(omapdss_of_get_endpoint); diff --git a/drivers/gpu/drm/omapdrm/dss/omapdss.h b/drivers/gpu/drm/omapdrm/dss/omapdss.h index b420dde8c0fb..403bab718738 100644 --- a/drivers/gpu/drm/omapdrm/dss/omapdss.h +++ b/drivers/gpu/drm/omapdrm/dss/omapdss.h @@ -844,6 +844,9 @@ omapdss_of_get_first_endpoint(const struct device_node *parent); struct omap_dss_device * omapdss_of_find_source_for_first_ep(struct device_node *node);

+struct device_node *omapdss_of_get_endpoint(struct device_node *parent, + int port_index, int ep_index); + u32 dispc_read_irqstatus(void); void dispc_clear_irqstatus(u32 mask); u32 dispc_read_irqenable(void);

omapdss_is_initialized() is used to find out if omapdss has been probed successfully. This patch moves the related code to the common omapdss-base module, so that the same support will be there for both omapdss and omapdss6.

Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com --- drivers/gpu/drm/omapdrm/dss/base.c | 14 ++++++++++++++ drivers/gpu/drm/omapdrm/dss/dss.c | 12 ++---------- drivers/gpu/drm/omapdrm/dss/omapdss.h | 2 ++ 3 files changed, 18 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/base.c b/drivers/gpu/drm/omapdrm/dss/base.c index 943030a7523c..03942097b9f1 100644 --- a/drivers/gpu/drm/omapdrm/dss/base.c +++ b/drivers/gpu/drm/omapdrm/dss/base.c @@ -1,6 +1,20 @@ #include <linux/kernel.h> #include <linux/module.h>

+static bool dss_initialized; + +void omapdss_set_is_initialized(bool set) +{ + dss_initialized = set; +} +EXPORT_SYMBOL(omapdss_set_is_initialized); + +bool omapdss_is_initialized(void) +{ + return dss_initialized; +} +EXPORT_SYMBOL(omapdss_is_initialized); + MODULE_AUTHOR("Tomi Valkeinen tomi.valkeinen@ti.com"); MODULE_DESCRIPTION("OMAP Display Subsystem Base"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/gpu/drm/omapdrm/dss/dss.c b/drivers/gpu/drm/omapdrm/dss/dss.c index 14887d5b02e5..e647cebe7d9d 100644 --- a/drivers/gpu/drm/omapdrm/dss/dss.c +++ b/drivers/gpu/drm/omapdrm/dss/dss.c @@ -117,14 +117,6 @@ static const char * const dss_generic_clk_source_names[] = { [DSS_CLK_SRC_HDMI_PLL] = "HDMI PLL", };

-static bool dss_initialized; - -bool omapdss_is_initialized(void) -{ - return dss_initialized; -} -EXPORT_SYMBOL(omapdss_is_initialized); - static inline void dss_write_reg(const struct dss_reg idx, u32 val) { __raw_writel(val, dss.base + idx.idx); @@ -1267,7 +1259,7 @@ static int dss_bind(struct device *dev)

pm_set_vt_switch(0);

- dss_initialized = true; + omapdss_set_is_initialized(true);

return 0;

@@ -1291,7 +1283,7 @@ static void dss_unbind(struct device *dev) { struct platform_device *pdev = to_platform_device(dev);

- dss_initialized = false; + omapdss_set_is_initialized(false);

component_unbind_all(&pdev->dev, NULL);

diff --git a/drivers/gpu/drm/omapdrm/dss/omapdss.h b/drivers/gpu/drm/omapdrm/dss/omapdss.h index 403bab718738..877484adbbdc 100644 --- a/drivers/gpu/drm/omapdrm/dss/omapdss.h +++ b/drivers/gpu/drm/omapdrm/dss/omapdss.h @@ -847,6 +847,8 @@ omapdss_of_find_source_for_first_ep(struct device_node *node); struct device_node *omapdss_of_get_endpoint(struct device_node *parent, int port_index, int ep_index);

+void omapdss_set_is_initialized(bool set); + u32 dispc_read_irqstatus(void); void dispc_clear_irqstatus(u32 mask); u32 dispc_read_irqenable(void);

display.c uses dsi_get_pixel_size() which is implemented in the DSI driver, and we won't have that in the omapdss-base module, to which we want to move display.c

This patch changes display.c not to use dsi_get_pixel_size(). The call can be replaced with a simple check for OMAP_DSS_DSI_FMT_RGB565.

We can also make dsi_get_pixel_size() static as it's no longer used outside dsi.c.

Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com --- drivers/gpu/drm/omapdrm/dss/display.c | 6 +++--- drivers/gpu/drm/omapdrm/dss/dsi.c | 2 +- drivers/gpu/drm/omapdrm/dss/dss.h | 8 -------- 3 files changed, 4 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/display.c b/drivers/gpu/drm/omapdrm/dss/display.c index 425a5a8dff8b..333ba284ef6d 100644 --- a/drivers/gpu/drm/omapdrm/dss/display.c +++ b/drivers/gpu/drm/omapdrm/dss/display.c @@ -55,10 +55,10 @@ int omapdss_default_get_recommended_bpp(struct omap_dss_device *dssdev) else return 16; case OMAP_DISPLAY_TYPE_DSI: - if (dsi_get_pixel_size(dssdev->panel.dsi_pix_fmt) > 16) - return 24; - else + if (dssdev->panel.dsi_pix_fmt == OMAP_DSS_DSI_FMT_RGB565) return 16; + else + return 24; case OMAP_DISPLAY_TYPE_VENC: case OMAP_DISPLAY_TYPE_SDI: case OMAP_DISPLAY_TYPE_HDMI: diff --git a/drivers/gpu/drm/omapdrm/dss/dsi.c b/drivers/gpu/drm/omapdrm/dss/dsi.c index f060bda31235..404579883a5a 100644 --- a/drivers/gpu/drm/omapdrm/dss/dsi.c +++ b/drivers/gpu/drm/omapdrm/dss/dsi.c @@ -527,7 +527,7 @@ static inline int wait_for_bit_change(struct platform_device *dsidev, return !value; }

-u8 dsi_get_pixel_size(enum omap_dss_dsi_pixel_format fmt) +static u8 dsi_get_pixel_size(enum omap_dss_dsi_pixel_format fmt) { switch (fmt) { case OMAP_DSS_DSI_FMT_RGB888: diff --git a/drivers/gpu/drm/omapdrm/dss/dss.h b/drivers/gpu/drm/omapdrm/dss/dss.h index 56493b290731..5ed1713b1ca5 100644 --- a/drivers/gpu/drm/omapdrm/dss/dss.h +++ b/drivers/gpu/drm/omapdrm/dss/dss.h @@ -318,15 +318,7 @@ void dsi_uninit_platform_driver(void); void dsi_dump_clocks(struct seq_file *s);

void dsi_irq_handler(void); -u8 dsi_get_pixel_size(enum omap_dss_dsi_pixel_format fmt);

-#else -static inline u8 dsi_get_pixel_size(enum omap_dss_dsi_pixel_format fmt) -{ - WARN(1, "%s: DSI not compiled in, returning pixel_size as 0\n", - __func__); - return 0; -} #endif

/* DPI */

omapdrm still uses a few non-dispc functions: dss_feat_get_num_mgrs(), dss_feat_get_num_ovls() and dss_feat_get_supported_color_modes(). We want to provide omapdrm a single dispc_ops function pointer struct so that omapdrm will use either the current omapdss or the new omapdss6 driver depending on the platform.

Those three functions are really dispc functions, but are located in the dss_features.c for legacy reasons.

This patch adds similar functionss to the dispc, and changes omapdrm to use those new functions. Underneath the functions still call the functions from dss_feature.c.

Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com --- drivers/gpu/drm/omapdrm/dss/dispc.c | 18 ++++++++++++++++++ drivers/gpu/drm/omapdrm/dss/dss_features.c | 3 --- drivers/gpu/drm/omapdrm/dss/dss_features.h | 4 ++++ drivers/gpu/drm/omapdrm/dss/omapdss.h | 5 +++++ drivers/gpu/drm/omapdrm/omap_drv.c | 4 ++-- drivers/gpu/drm/omapdrm/omap_plane.c | 2 +- 6 files changed, 30 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c b/drivers/gpu/drm/omapdrm/dss/dispc.c index c839f6456db2..c5d9dd51aec4 100644 --- a/drivers/gpu/drm/omapdrm/dss/dispc.c +++ b/drivers/gpu/drm/omapdrm/dss/dispc.c @@ -1122,6 +1122,18 @@ static u32 dispc_ovl_get_burst_size(enum omap_plane plane) return unit * 8; }

+enum omap_color_mode dispc_ovl_get_color_modes(enum omap_plane plane) +{ + return dss_feat_get_supported_color_modes(plane); +} +EXPORT_SYMBOL(dispc_ovl_get_color_modes); + +int dispc_get_num_ovls(void) +{ + return dss_feat_get_num_ovls(); +} +EXPORT_SYMBOL(dispc_get_num_ovls); + static void dispc_mgr_enable_cpr(enum omap_channel channel, bool enable) { if (channel == OMAP_DSS_CHANNEL_DIGIT) @@ -2949,6 +2961,12 @@ void dispc_pck_free_enable(bool enable) REG_FLD_MOD(DISPC_CONTROL, enable ? 1 : 0, 27, 27); }

+int dispc_get_num_mgrs(void) +{ + return dss_feat_get_num_mgrs(); +} +EXPORT_SYMBOL(dispc_get_num_mgrs); + static void dispc_mgr_enable_fifohandcheck(enum omap_channel channel, bool enable) { mgr_fld_write(channel, DISPC_MGR_FLD_FIFOHANDCHECK, enable); diff --git a/drivers/gpu/drm/omapdrm/dss/dss_features.c b/drivers/gpu/drm/omapdrm/dss/dss_features.c index ee5b93ce2763..26c29332b8e3 100644 --- a/drivers/gpu/drm/omapdrm/dss/dss_features.c +++ b/drivers/gpu/drm/omapdrm/dss/dss_features.c @@ -774,13 +774,11 @@ int dss_feat_get_num_mgrs(void) { return omap_current_dss_features->num_mgrs; } -EXPORT_SYMBOL(dss_feat_get_num_mgrs);

int dss_feat_get_num_ovls(void) { return omap_current_dss_features->num_ovls; } -EXPORT_SYMBOL(dss_feat_get_num_ovls);

unsigned long dss_feat_get_param_min(enum dss_range_param param) { @@ -806,7 +804,6 @@ enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane) { return omap_current_dss_features->supported_color_modes[plane]; } -EXPORT_SYMBOL(dss_feat_get_supported_color_modes);

enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane plane) { diff --git a/drivers/gpu/drm/omapdrm/dss/dss_features.h b/drivers/gpu/drm/omapdrm/dss/dss_features.h index bb4b7f0e642b..bcec68ba8db9 100644 --- a/drivers/gpu/drm/omapdrm/dss/dss_features.h +++ b/drivers/gpu/drm/omapdrm/dss/dss_features.h @@ -104,4 +104,8 @@ void dss_features_init(enum omapdss_version version); enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel); enum omap_dss_output_id dss_feat_get_supported_outputs(enum omap_channel channel);

+int dss_feat_get_num_mgrs(void); +int dss_feat_get_num_ovls(void); +enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane); + #endif diff --git a/drivers/gpu/drm/omapdrm/dss/omapdss.h b/drivers/gpu/drm/omapdrm/dss/omapdss.h index c365652699e5..aed76d6f41f6 100644 --- a/drivers/gpu/drm/omapdrm/dss/omapdss.h +++ b/drivers/gpu/drm/omapdrm/dss/omapdss.h @@ -863,6 +863,9 @@ void dispc_free_irq(void *dev_id); int dispc_runtime_get(void); void dispc_runtime_put(void);

+int dispc_get_num_ovls(void); +int dispc_get_num_mgrs(void); + void dispc_mgr_enable(enum omap_channel channel, bool enable); bool dispc_mgr_is_enabled(enum omap_channel channel); u32 dispc_mgr_get_vsync_irq(enum omap_channel channel); @@ -876,6 +879,7 @@ void dispc_mgr_set_timings(enum omap_channel channel, const struct videomode *vm); void dispc_mgr_setup(enum omap_channel channel, const struct omap_overlay_manager_info *info); +enum omap_dss_output_id dispc_mgr_get_supported_outputs(enum omap_channel channel); u32 dispc_mgr_gamma_size(enum omap_channel channel); void dispc_mgr_set_gamma(enum omap_channel channel, const struct drm_color_lut *lut, @@ -887,6 +891,7 @@ void dispc_ovl_set_channel_out(enum omap_plane plane, enum omap_channel channel); int dispc_ovl_setup(enum omap_plane plane, const struct omap_overlay_info *oi, bool replication, const struct videomode *vm, bool mem_to_mem); +enum omap_color_mode dispc_ovl_get_color_modes(enum omap_plane plane);

enum omap_dss_output_id dispc_mgr_get_supported_outputs(enum omap_channel channel);

diff --git a/drivers/gpu/drm/omapdrm/omap_drv.c b/drivers/gpu/drm/omapdrm/omap_drv.c index f7af377561d8..e655b8a16f48 100644 --- a/drivers/gpu/drm/omapdrm/omap_drv.c +++ b/drivers/gpu/drm/omapdrm/omap_drv.c @@ -313,8 +313,8 @@ static int omap_modeset_init(struct drm_device *dev) { struct omap_drm_private *priv = dev->dev_private; struct omap_dss_device *dssdev = NULL; - int num_ovls = dss_feat_get_num_ovls(); - int num_mgrs = dss_feat_get_num_mgrs(); + int num_ovls = dispc_get_num_ovls(); + int num_mgrs = dispc_get_num_mgrs(); int num_crtcs; int i, id = 0; int ret; diff --git a/drivers/gpu/drm/omapdrm/omap_plane.c b/drivers/gpu/drm/omapdrm/omap_plane.c index 9c43cb481e62..0e861a44fd5e 100644 --- a/drivers/gpu/drm/omapdrm/omap_plane.c +++ b/drivers/gpu/drm/omapdrm/omap_plane.c @@ -371,7 +371,7 @@ struct drm_plane *omap_plane_init(struct drm_device *dev,

omap_plane->nformats = omap_framebuffer_get_formats( omap_plane->formats, ARRAY_SIZE(omap_plane->formats), - dss_feat_get_supported_color_modes(id)); + dispc_ovl_get_color_modes(id)); omap_plane->id = id; omap_plane->name = plane_names[id];

This patch changes the current omapdss driver to fill a dispc_ops struct and set it to omapdss-base.

Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com --- drivers/gpu/drm/omapdrm/dss/dispc.c | 40 +++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+)

diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c b/drivers/gpu/drm/omapdrm/dss/dispc.c index c5d9dd51aec4..00cddb119dab 100644 --- a/drivers/gpu/drm/omapdrm/dss/dispc.c +++ b/drivers/gpu/drm/omapdrm/dss/dispc.c @@ -4341,6 +4341,42 @@ static void dispc_errata_i734_wa(void) REG_FLD_MOD(DISPC_CONFIG, gatestate, 8, 4); }

+static const struct dispc_ops dispc_ops = { + .read_irqstatus = dispc_read_irqstatus, + .clear_irqstatus = dispc_clear_irqstatus, + .read_irqenable = dispc_read_irqenable, + .write_irqenable = dispc_write_irqenable, + + .request_irq = dispc_request_irq, + .free_irq = dispc_free_irq, + + .runtime_get = dispc_runtime_get, + .runtime_put = dispc_runtime_put, + + .get_num_ovls = dispc_get_num_ovls, + .get_num_mgrs = dispc_get_num_mgrs, + + .mgr_enable = dispc_mgr_enable, + .mgr_is_enabled = dispc_mgr_is_enabled, + .mgr_get_vsync_irq = dispc_mgr_get_vsync_irq, + .mgr_get_framedone_irq = dispc_mgr_get_framedone_irq, + .mgr_get_sync_lost_irq = dispc_mgr_get_sync_lost_irq, + .mgr_go_busy = dispc_mgr_go_busy, + .mgr_go = dispc_mgr_go, + .mgr_set_lcd_config = dispc_mgr_set_lcd_config, + .mgr_set_timings = dispc_mgr_set_timings, + .mgr_setup = dispc_mgr_setup, + .mgr_get_supported_outputs = dispc_mgr_get_supported_outputs, + .mgr_gamma_size = dispc_mgr_gamma_size, + .mgr_set_gamma = dispc_mgr_set_gamma, + + .ovl_enable = dispc_ovl_enable, + .ovl_enabled = dispc_ovl_enabled, + .ovl_set_channel_out = dispc_ovl_set_channel_out, + .ovl_setup = dispc_ovl_setup, + .ovl_get_color_modes = dispc_ovl_get_color_modes, +}; + /* DISPC HW IP initialisation */ static int dispc_bind(struct device *dev, struct device *master, void *data) { @@ -4413,6 +4449,8 @@ static int dispc_bind(struct device *dev, struct device *master, void *data)

dispc_runtime_put();

+ dispc_set_ops(&dispc_ops); + dss_debugfs_create_file("dispc", dispc_dump_regs);

return 0; @@ -4425,6 +4463,8 @@ static int dispc_bind(struct device *dev, struct device *master, void *data) static void dispc_unbind(struct device *dev, struct device *master, void *data) { + dispc_set_ops(NULL); + pm_runtime_disable(dev);

dispc_errata_i734_wa_fini();

omapdrm now uses dispc_ops instead of direct function calls so we can remove all EXPORT_SYMBOLs from dispc. Most of the functions can also be made static, but a few are used outside dispc.c.

Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com --- drivers/gpu/drm/omapdrm/dss/dispc.c | 87 +++++++++++++---------------------- drivers/gpu/drm/omapdrm/dss/dss.h | 3 ++ drivers/gpu/drm/omapdrm/dss/omapdss.h | 43 ----------------- 3 files changed, 34 insertions(+), 99 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c b/drivers/gpu/drm/omapdrm/dss/dispc.c index 00cddb119dab..cfc6daf2cedf 100644 --- a/drivers/gpu/drm/omapdrm/dss/dispc.c +++ b/drivers/gpu/drm/omapdrm/dss/dispc.c @@ -306,6 +306,10 @@ static unsigned long dispc_mgr_pclk_rate(enum omap_channel channel); static unsigned long dispc_plane_pclk_rate(enum omap_plane plane); static unsigned long dispc_plane_lclk_rate(enum omap_plane plane);

+static void dispc_clear_irqstatus(u32 mask); +static bool dispc_mgr_is_enabled(enum omap_channel channel); +static void dispc_clear_irqstatus(u32 mask); + static inline void dispc_write_reg(const u16 idx, u32 val) { __raw_writel(val, dispc.base + idx); @@ -581,7 +585,6 @@ int dispc_runtime_get(void) WARN_ON(r < 0); return r < 0 ? r : 0; } -EXPORT_SYMBOL(dispc_runtime_get);

void dispc_runtime_put(void) { @@ -592,41 +595,36 @@ void dispc_runtime_put(void) r = pm_runtime_put_sync(&dispc.pdev->dev); WARN_ON(r < 0 && r != -ENOSYS); } -EXPORT_SYMBOL(dispc_runtime_put);

-u32 dispc_mgr_get_vsync_irq(enum omap_channel channel) +static u32 dispc_mgr_get_vsync_irq(enum omap_channel channel) { return mgr_desc[channel].vsync_irq; } -EXPORT_SYMBOL(dispc_mgr_get_vsync_irq);

-u32 dispc_mgr_get_framedone_irq(enum omap_channel channel) +static u32 dispc_mgr_get_framedone_irq(enum omap_channel channel) { if (channel == OMAP_DSS_CHANNEL_DIGIT && dispc.feat->no_framedone_tv) return 0;

return mgr_desc[channel].framedone_irq; } -EXPORT_SYMBOL(dispc_mgr_get_framedone_irq);

-u32 dispc_mgr_get_sync_lost_irq(enum omap_channel channel) +static u32 dispc_mgr_get_sync_lost_irq(enum omap_channel channel) { return mgr_desc[channel].sync_lost_irq; } -EXPORT_SYMBOL(dispc_mgr_get_sync_lost_irq);

u32 dispc_wb_get_framedone_irq(void) { return DISPC_IRQ_FRAMEDONEWB; }

-bool dispc_mgr_go_busy(enum omap_channel channel) +static bool dispc_mgr_go_busy(enum omap_channel channel) { return mgr_fld_read(channel, DISPC_MGR_FLD_GO) == 1; } -EXPORT_SYMBOL(dispc_mgr_go_busy);

-void dispc_mgr_go(enum omap_channel channel) +static void dispc_mgr_go(enum omap_channel channel) { WARN_ON(!dispc_mgr_is_enabled(channel)); WARN_ON(dispc_mgr_go_busy(channel)); @@ -635,7 +633,6 @@ void dispc_mgr_go(enum omap_channel channel)

mgr_fld_write(channel, DISPC_MGR_FLD_GO, 1); } -EXPORT_SYMBOL(dispc_mgr_go);

bool dispc_wb_go_busy(void) { @@ -984,7 +981,7 @@ static void dispc_ovl_configure_burst_type(enum omap_plane plane, REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), 0, 29, 29); }

-void dispc_ovl_set_channel_out(enum omap_plane plane, enum omap_channel channel) +static void dispc_ovl_set_channel_out(enum omap_plane plane, enum omap_channel channel) { int shift; u32 val; @@ -1044,7 +1041,6 @@ void dispc_ovl_set_channel_out(enum omap_plane plane, enum omap_channel channel) } dispc_write_reg(DISPC_OVL_ATTRIBUTES(plane), val); } -EXPORT_SYMBOL(dispc_ovl_set_channel_out);

static enum omap_channel dispc_ovl_get_channel_out(enum omap_plane plane) { @@ -1122,17 +1118,15 @@ static u32 dispc_ovl_get_burst_size(enum omap_plane plane) return unit * 8; }

-enum omap_color_mode dispc_ovl_get_color_modes(enum omap_plane plane) +static enum omap_color_mode dispc_ovl_get_color_modes(enum omap_plane plane) { return dss_feat_get_supported_color_modes(plane); } -EXPORT_SYMBOL(dispc_ovl_get_color_modes);

-int dispc_get_num_ovls(void) +static int dispc_get_num_ovls(void) { return dss_feat_get_num_ovls(); } -EXPORT_SYMBOL(dispc_get_num_ovls);

static void dispc_mgr_enable_cpr(enum omap_channel channel, bool enable) { @@ -2797,9 +2791,8 @@ static int dispc_ovl_setup_common(enum omap_plane plane, return 0; }

-int dispc_ovl_setup(enum omap_plane plane, const struct omap_overlay_info *oi, - bool replication, const struct videomode *vm, - bool mem_to_mem) +static int dispc_ovl_setup(enum omap_plane plane, const struct omap_overlay_info *oi, + bool replication, const struct videomode *vm, bool mem_to_mem) { int r; enum omap_overlay_caps caps = dss_feat_get_overlay_caps(plane); @@ -2821,7 +2814,6 @@ int dispc_ovl_setup(enum omap_plane plane, const struct omap_overlay_info *oi,

return r; } -EXPORT_SYMBOL(dispc_ovl_setup);

int dispc_wb_setup(const struct omap_dss_writeback_info *wi, bool mem_to_mem, const struct videomode *vm) @@ -2891,7 +2883,7 @@ int dispc_wb_setup(const struct omap_dss_writeback_info *wi, return r; }

-int dispc_ovl_enable(enum omap_plane plane, bool enable) +static int dispc_ovl_enable(enum omap_plane plane, bool enable) { DSSDBG("dispc_enable_plane %d, %d\n", plane, enable);

@@ -2899,33 +2891,28 @@ int dispc_ovl_enable(enum omap_plane plane, bool enable)

return 0; } -EXPORT_SYMBOL(dispc_ovl_enable);

-bool dispc_ovl_enabled(enum omap_plane plane) +static bool dispc_ovl_enabled(enum omap_plane plane) { return REG_GET(DISPC_OVL_ATTRIBUTES(plane), 0, 0); } -EXPORT_SYMBOL(dispc_ovl_enabled);

-enum omap_dss_output_id dispc_mgr_get_supported_outputs(enum omap_channel channel) +static enum omap_dss_output_id dispc_mgr_get_supported_outputs(enum omap_channel channel) { return dss_feat_get_supported_outputs(channel); } -EXPORT_SYMBOL(dispc_mgr_get_supported_outputs);

-void dispc_mgr_enable(enum omap_channel channel, bool enable) +static void dispc_mgr_enable(enum omap_channel channel, bool enable) { mgr_fld_write(channel, DISPC_MGR_FLD_ENABLE, enable); /* flush posted write */ mgr_fld_read(channel, DISPC_MGR_FLD_ENABLE); } -EXPORT_SYMBOL(dispc_mgr_enable);

-bool dispc_mgr_is_enabled(enum omap_channel channel) +static bool dispc_mgr_is_enabled(enum omap_channel channel) { return !!mgr_fld_read(channel, DISPC_MGR_FLD_ENABLE); } -EXPORT_SYMBOL(dispc_mgr_is_enabled);

void dispc_wb_enable(bool enable) { @@ -2961,11 +2948,10 @@ void dispc_pck_free_enable(bool enable) REG_FLD_MOD(DISPC_CONTROL, enable ? 1 : 0, 27, 27); }

-int dispc_get_num_mgrs(void) +static int dispc_get_num_mgrs(void) { return dss_feat_get_num_mgrs(); } -EXPORT_SYMBOL(dispc_get_num_mgrs);

static void dispc_mgr_enable_fifohandcheck(enum omap_channel channel, bool enable) { @@ -3015,7 +3001,7 @@ static void dispc_mgr_enable_alpha_fixed_zorder(enum omap_channel ch, REG_FLD_MOD(DISPC_CONFIG, enable, 19, 19); }

-void dispc_mgr_setup(enum omap_channel channel, +static void dispc_mgr_setup(enum omap_channel channel, const struct omap_overlay_manager_info *info) { dispc_mgr_set_default_color(channel, info->default_color); @@ -3028,7 +3014,6 @@ void dispc_mgr_setup(enum omap_channel channel, dispc_mgr_set_cpr_coef(channel, &info->cpr_coefs); } } -EXPORT_SYMBOL(dispc_mgr_setup);

static void dispc_mgr_set_tft_data_lines(enum omap_channel channel, u8 data_lines) { @@ -3089,7 +3074,7 @@ static void dispc_mgr_enable_stallmode(enum omap_channel channel, bool enable) mgr_fld_write(channel, DISPC_MGR_FLD_STALLMODE, enable); }

-void dispc_mgr_set_lcd_config(enum omap_channel channel, +static void dispc_mgr_set_lcd_config(enum omap_channel channel, const struct dss_lcd_mgr_config *config) { dispc_mgr_set_io_pad_mode(config->io_pad_mode); @@ -3105,7 +3090,6 @@ void dispc_mgr_set_lcd_config(enum omap_channel channel,

dispc_mgr_set_lcd_type_tft(channel); } -EXPORT_SYMBOL(dispc_mgr_set_lcd_config);

static bool _dispc_mgr_size_ok(u16 width, u16 height) { @@ -3236,7 +3220,7 @@ static void _dispc_mgr_set_lcd_timings(enum omap_channel channel, }

/* change name to mode? */ -void dispc_mgr_set_timings(enum omap_channel channel, +static void dispc_mgr_set_timings(enum omap_channel channel, const struct videomode *vm) { unsigned xtot, ytot; @@ -3283,7 +3267,6 @@ void dispc_mgr_set_timings(enum omap_channel channel,

dispc_mgr_set_size(channel, t.hactive, t.vactive); } -EXPORT_SYMBOL(dispc_mgr_set_timings);

static void dispc_mgr_set_lcd_divisor(enum omap_channel channel, u16 lck_div, u16 pck_div) @@ -3763,25 +3746,22 @@ int dispc_mgr_get_clock_div(enum omap_channel channel, return 0; }

-u32 dispc_read_irqstatus(void) +static u32 dispc_read_irqstatus(void) { return dispc_read_reg(DISPC_IRQSTATUS); } -EXPORT_SYMBOL(dispc_read_irqstatus);

-void dispc_clear_irqstatus(u32 mask) +static void dispc_clear_irqstatus(u32 mask) { dispc_write_reg(DISPC_IRQSTATUS, mask); } -EXPORT_SYMBOL(dispc_clear_irqstatus);

-u32 dispc_read_irqenable(void) +static u32 dispc_read_irqenable(void) { return dispc_read_reg(DISPC_IRQENABLE); } -EXPORT_SYMBOL(dispc_read_irqenable);

-void dispc_write_irqenable(u32 mask) +static void dispc_write_irqenable(u32 mask) { u32 old_mask = dispc_read_reg(DISPC_IRQENABLE);

@@ -3790,7 +3770,6 @@ void dispc_write_irqenable(u32 mask)

dispc_write_reg(DISPC_IRQENABLE, mask); } -EXPORT_SYMBOL(dispc_write_irqenable);

void dispc_enable_sidle(void) { @@ -3802,7 +3781,7 @@ void dispc_disable_sidle(void) REG_FLD_MOD(DISPC_SYSCONFIG, 1, 4, 3); /* SIDLEMODE: no idle */ }

-u32 dispc_mgr_gamma_size(enum omap_channel channel) +static u32 dispc_mgr_gamma_size(enum omap_channel channel) { const struct dispc_gamma_desc *gdesc = &mgr_desc[channel].gamma;

@@ -3811,7 +3790,6 @@ u32 dispc_mgr_gamma_size(enum omap_channel channel)

return gdesc->len; } -EXPORT_SYMBOL(dispc_mgr_gamma_size);

static void dispc_mgr_write_gamma_table(enum omap_channel channel) { @@ -3856,7 +3834,7 @@ static const struct drm_color_lut dispc_mgr_gamma_default_lut[] = { { .red = U16_MAX, .green = U16_MAX, .blue = U16_MAX, }, };

-void dispc_mgr_set_gamma(enum omap_channel channel, +static void dispc_mgr_set_gamma(enum omap_channel channel, const struct drm_color_lut *lut, unsigned int length) { @@ -3902,7 +3880,6 @@ void dispc_mgr_set_gamma(enum omap_channel channel, if (dispc.is_enabled) dispc_mgr_write_gamma_table(channel); } -EXPORT_SYMBOL(dispc_mgr_set_gamma);

static int dispc_init_gamma_tables(void) { @@ -4149,7 +4126,7 @@ static irqreturn_t dispc_irq_handler(int irq, void *arg) return dispc.user_handler(irq, dispc.user_data); }

-int dispc_request_irq(irq_handler_t handler, void *dev_id) +static int dispc_request_irq(irq_handler_t handler, void *dev_id) { int r;

@@ -4171,16 +4148,14 @@ int dispc_request_irq(irq_handler_t handler, void *dev_id)

return r; } -EXPORT_SYMBOL(dispc_request_irq);

-void dispc_free_irq(void *dev_id) +static void dispc_free_irq(void *dev_id) { devm_free_irq(&dispc.pdev->dev, dispc.irq, &dispc);

dispc.user_handler = NULL; dispc.user_data = NULL; } -EXPORT_SYMBOL(dispc_free_irq);

/* * Workaround for errata i734 in DSS dispc diff --git a/drivers/gpu/drm/omapdrm/dss/dss.h b/drivers/gpu/drm/omapdrm/dss/dss.h index 63bdf38f4b92..54c10c3e5b8b 100644 --- a/drivers/gpu/drm/omapdrm/dss/dss.h +++ b/drivers/gpu/drm/omapdrm/dss/dss.h @@ -340,6 +340,9 @@ int dispc_init_platform_driver(void) __init; void dispc_uninit_platform_driver(void); void dispc_dump_clocks(struct seq_file *s);

+int dispc_runtime_get(void); +void dispc_runtime_put(void); + void dispc_enable_sidle(void); void dispc_disable_sidle(void);

diff --git a/drivers/gpu/drm/omapdrm/dss/omapdss.h b/drivers/gpu/drm/omapdrm/dss/omapdss.h index 134f153669ea..af06fe46e34f 100644 --- a/drivers/gpu/drm/omapdrm/dss/omapdss.h +++ b/drivers/gpu/drm/omapdrm/dss/omapdss.h @@ -852,49 +852,6 @@ void omapdss_set_is_initialized(bool set); struct device_node *dss_of_port_get_parent_device(struct device_node *port); u32 dss_of_port_get_port_number(struct device_node *port);

-u32 dispc_read_irqstatus(void); -void dispc_clear_irqstatus(u32 mask); -u32 dispc_read_irqenable(void); -void dispc_write_irqenable(u32 mask); - -int dispc_request_irq(irq_handler_t handler, void *dev_id); -void dispc_free_irq(void *dev_id); - -int dispc_runtime_get(void); -void dispc_runtime_put(void); - -int dispc_get_num_ovls(void); -int dispc_get_num_mgrs(void); - -void dispc_mgr_enable(enum omap_channel channel, bool enable); -bool dispc_mgr_is_enabled(enum omap_channel channel); -u32 dispc_mgr_get_vsync_irq(enum omap_channel channel); -u32 dispc_mgr_get_framedone_irq(enum omap_channel channel); -u32 dispc_mgr_get_sync_lost_irq(enum omap_channel channel); -bool dispc_mgr_go_busy(enum omap_channel channel); -void dispc_mgr_go(enum omap_channel channel); -void dispc_mgr_set_lcd_config(enum omap_channel channel, - const struct dss_lcd_mgr_config *config); -void dispc_mgr_set_timings(enum omap_channel channel, - const struct videomode *vm); -void dispc_mgr_setup(enum omap_channel channel, - const struct omap_overlay_manager_info *info); -enum omap_dss_output_id dispc_mgr_get_supported_outputs(enum omap_channel channel); -u32 dispc_mgr_gamma_size(enum omap_channel channel); -void dispc_mgr_set_gamma(enum omap_channel channel, - const struct drm_color_lut *lut, - unsigned int length); - -int dispc_ovl_enable(enum omap_plane plane, bool enable); -bool dispc_ovl_enabled(enum omap_plane plane); -void dispc_ovl_set_channel_out(enum omap_plane plane, - enum omap_channel channel); -int dispc_ovl_setup(enum omap_plane plane, const struct omap_overlay_info *oi, - bool replication, const struct videomode *vm, bool mem_to_mem); -enum omap_color_mode dispc_ovl_get_color_modes(enum omap_plane plane); - -enum omap_dss_output_id dispc_mgr_get_supported_outputs(enum omap_channel channel); - struct dss_mgr_ops { int (*connect)(enum omap_channel channel, struct omap_dss_device *dst);

DSS uses "replication logic" to convert color components from smaller bit widths to bigger bit widths. Without replication logic, the color component would be shifted and the least significant bits would be left at 0, whereas with replication logic, the least significat bits will be filled with the most significant bit.

For some reason omapdrm leaves replication logic always to off, which, in the most common case, means that showing 16-bit RGB colors on 24-bit display gives a bit darker colors than expected.

The reset value of the replication logic bit is enabled, and it should always be set, as there's no practical reason to disable it. This patch removes the option to disable it from omapdrm, and always sets it to enabled in dispc.

Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com --- drivers/gpu/drm/omapdrm/dss/dispc.c | 7 ++++--- drivers/gpu/drm/omapdrm/dss/omapdss.h | 3 +-- drivers/gpu/drm/omapdrm/omap_plane.c | 2 +- 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c b/drivers/gpu/drm/omapdrm/dss/dispc.c index 462d82e74de1..9034b97240db 100644 --- a/drivers/gpu/drm/omapdrm/dss/dispc.c +++ b/drivers/gpu/drm/omapdrm/dss/dispc.c @@ -2792,11 +2792,12 @@ static int dispc_ovl_setup_common(enum omap_plane plane, }

static int dispc_ovl_setup(enum omap_plane plane, const struct omap_overlay_info *oi, - bool replication, const struct videomode *vm, bool mem_to_mem) + const struct videomode *vm, bool mem_to_mem) { int r; enum omap_overlay_caps caps = dss_feat_get_overlay_caps(plane); enum omap_channel channel; + const bool replication = true;

channel = dispc_ovl_get_channel_out(plane);

@@ -2823,7 +2824,7 @@ int dispc_wb_setup(const struct omap_dss_writeback_info *wi, enum omap_plane plane = OMAP_DSS_WB; const int pos_x = 0, pos_y = 0; const u8 zorder = 0, global_alpha = 0; - const bool replication = false; + const bool replication = true; bool truncation; int in_width = vm->hactive; int in_height = vm->vactive; @@ -4269,7 +4270,7 @@ static void dispc_errata_i734_wa(void)

/* Setup and enable GFX plane */ dispc_ovl_set_channel_out(OMAP_DSS_GFX, OMAP_DSS_CHANNEL_LCD); - dispc_ovl_setup(OMAP_DSS_GFX, &ovli, false, &i734.vm, false); + dispc_ovl_setup(OMAP_DSS_GFX, &ovli, &i734.vm, false); dispc_ovl_enable(OMAP_DSS_GFX, true);

/* Set up and enable display manager for LCD1 */ diff --git a/drivers/gpu/drm/omapdrm/dss/omapdss.h b/drivers/gpu/drm/omapdrm/dss/omapdss.h index af06fe46e34f..00ebf1f71f6b 100644 --- a/drivers/gpu/drm/omapdrm/dss/omapdss.h +++ b/drivers/gpu/drm/omapdrm/dss/omapdss.h @@ -931,8 +931,7 @@ struct dispc_ops { void (*ovl_set_channel_out)(enum omap_plane plane, enum omap_channel channel); int (*ovl_setup)(enum omap_plane plane, const struct omap_overlay_info *oi, - bool replication, const struct videomode *vm, - bool mem_to_mem); + const struct videomode *vm, bool mem_to_mem);

enum omap_color_mode (*ovl_get_color_modes)(enum omap_plane plane); }; diff --git a/drivers/gpu/drm/omapdrm/omap_plane.c b/drivers/gpu/drm/omapdrm/omap_plane.c index b674c5cc77e8..278d079b77da 100644 --- a/drivers/gpu/drm/omapdrm/omap_plane.c +++ b/drivers/gpu/drm/omapdrm/omap_plane.c @@ -130,7 +130,7 @@ static void omap_plane_atomic_update(struct drm_plane *plane, omap_crtc_channel(state->crtc));

/* and finally, update omapdss: */ - ret = priv->dispc_ops->ovl_setup(omap_plane->id, &info, false, + ret = priv->dispc_ops->ovl_setup(omap_plane->id, &info, omap_crtc_timings(state->crtc), false); if (ret) { dev_err(plane->dev->dev, "Failed to setup plane %s\n",

From: Peter Ujfalusi peter.ujfalusi@ti.com

When omapdss is loaded (all core components are in place) create a list of devices used in the display graph. This list later can be used by omapdrm via the omapdss_stack_is_ready() function to check that these components are loaded. Based on this information, omapdrm can defer probe in case when the omapdss stack is not ready yet.

Signed-off-by: Peter Ujfalusi peter.ujfalusi@ti.com Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com --- drivers/gpu/drm/omapdrm/dss/base.c | 107 ++++++++++++++++++++++++++++++++++ drivers/gpu/drm/omapdrm/dss/dss.c | 1 + drivers/gpu/drm/omapdrm/dss/omapdss.h | 3 + 3 files changed, 111 insertions(+)

diff --git a/drivers/gpu/drm/omapdrm/dss/base.c b/drivers/gpu/drm/omapdrm/dss/base.c index 7dd447e6c4d7..13e91faaf7a6 100644 --- a/drivers/gpu/drm/omapdrm/dss/base.c +++ b/drivers/gpu/drm/omapdrm/dss/base.c @@ -1,9 +1,21 @@ #include <linux/kernel.h> #include <linux/module.h> +#include <linux/of.h> +#include <linux/of_graph.h> +#include <linux/list.h> +#include "omapdss.h"

static bool dss_initialized; static const struct dispc_ops *ops;

+static struct list_head omapdss_comp_list; + +struct omapdss_comp_node { + struct list_head list; + struct device_node *node; + bool dss_core_component; +}; + void omapdss_set_is_initialized(bool set) { dss_initialized = set; @@ -28,6 +40,101 @@ const struct dispc_ops *dispc_get_ops(void) } EXPORT_SYMBOL(dispc_get_ops);

+static bool omapdss_list_contains(const struct device_node *node) +{ + struct omapdss_comp_node *comp; + + list_for_each_entry(comp, &omapdss_comp_list, list) { + if (comp->node == node) + return true; + } + + return false; +} + +static void omapdss_walk_device(struct device *dev, struct device_node *node, + bool dss_core) +{ + struct device_node *n; + struct omapdss_comp_node *comp = devm_kzalloc(dev, sizeof(*comp), + GFP_KERNEL); + + if (comp) { + comp->node = node; + comp->dss_core_component = dss_core; + list_add(&comp->list, &omapdss_comp_list); + } + + /* + * of_graph_get_remote_port_parent() prints an error if there is no + * port/ports node. To avoid that, check first that there's the node. + */ + n = of_get_child_by_name(node, "ports"); + if (!n) + n = of_get_child_by_name(node, "port"); + if (!n) + return; + + of_node_put(n); + + n = NULL; + while ((n = of_graph_get_next_endpoint(node, n)) != NULL) { + struct device_node *pn = of_graph_get_remote_port_parent(n); + + if (!pn) + continue; + + if (!of_device_is_available(pn) || omapdss_list_contains(pn)) { + of_node_put(pn); + continue; + } + + omapdss_walk_device(dev, pn, false); + } +} + +void omapdss_gather_components(struct device *dev) +{ + struct device_node *child; + + INIT_LIST_HEAD(&omapdss_comp_list); + + omapdss_walk_device(dev, dev->of_node, true); + + for_each_available_child_of_node(dev->of_node, child) { + if (!of_find_property(child, "compatible", NULL)) + continue; + + omapdss_walk_device(dev, child, true); + } +} +EXPORT_SYMBOL(omapdss_gather_components); + +static bool omapdss_component_is_loaded(struct omapdss_comp_node *comp) +{ + if (comp->dss_core_component) + return true; + if (omapdss_component_is_display(comp->node)) + return true; + if (omapdss_component_is_output(comp->node)) + return true; + + return false; +} + +bool omapdss_stack_is_ready(void) +{ + struct omapdss_comp_node *comp; + + list_for_each_entry(comp, &omapdss_comp_list, list) { + if (!omapdss_component_is_loaded(comp)) + return false; + } + + return true; +} +EXPORT_SYMBOL(omapdss_stack_is_ready); + MODULE_AUTHOR("Tomi Valkeinen tomi.valkeinen@ti.com"); MODULE_DESCRIPTION("OMAP Display Subsystem Base"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/gpu/drm/omapdrm/dss/dss.c b/drivers/gpu/drm/omapdrm/dss/dss.c index e647cebe7d9d..de81166e0fe4 100644 --- a/drivers/gpu/drm/omapdrm/dss/dss.c +++ b/drivers/gpu/drm/omapdrm/dss/dss.c @@ -1259,6 +1259,7 @@ static int dss_bind(struct device *dev)

pm_set_vt_switch(0);

+ omapdss_gather_components(dev); omapdss_set_is_initialized(true);

return 0; diff --git a/drivers/gpu/drm/omapdrm/dss/omapdss.h b/drivers/gpu/drm/omapdrm/dss/omapdss.h index fa34b68a676b..74cba1ef7ee9 100644 --- a/drivers/gpu/drm/omapdrm/dss/omapdss.h +++ b/drivers/gpu/drm/omapdrm/dss/omapdss.h @@ -942,4 +942,7 @@ const struct dispc_ops *dispc_get_ops(void); bool omapdss_component_is_display(struct device_node *node); bool omapdss_component_is_output(struct device_node *node);

+bool omapdss_stack_is_ready(void); +void omapdss_gather_components(struct device *dev); + #endif /* __OMAP_DRM_DSS_H */

If omap_plane_atomic_update() is called when the crtc is disabled, and the timings are zero, we'll see the following warning:

omapdss DISPC error: cannot calculate scaling settings: pclk is zero omapdrm omapdrm.0: Failed to setup plane vid2

It shouldn't cause any issues, as the crtc is disabled so the plane is not used by the HW.

To remove the warning, check whether the crtc is enabled at the beginning of omap_plane_atomic_update(), and bail out if not.

Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com --- drivers/gpu/drm/omapdrm/omap_plane.c | 5 +++++ 1 file changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/omapdrm/omap_plane.c b/drivers/gpu/drm/omapdrm/omap_plane.c index 278d079b77da..b3e55496d180 100644 --- a/drivers/gpu/drm/omapdrm/omap_plane.c +++ b/drivers/gpu/drm/omapdrm/omap_plane.c @@ -88,6 +88,11 @@ static void omap_plane_atomic_update(struct drm_plane *plane,

DBG("%s, crtc=%p fb=%p", omap_plane->name, state->crtc, state->fb);

+ if (!state->crtc->state->enable) { + priv->dispc_ops->ovl_enable(omap_plane->id, false); + return; + } + memset(&info, 0, sizeof(info)); info.rotation_type = OMAP_DSS_ROT_DMA; info.rotation = OMAP_DSS_ROT_0;

From: Peter Ujfalusi peter.ujfalusi@ti.com

Add fbdev emulation only for the first DRM connector. When the fbdev emulation was created for all connectors with different resolution, the lower res display would only be able to show part of the framebuffer. By creating the fbdev emulation only for the first connector we can avoid this.

Signed-off-by: Peter Ujfalusi peter.ujfalusi@ti.com Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com --- drivers/gpu/drm/omapdrm/omap_fbdev.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/omapdrm/omap_fbdev.c b/drivers/gpu/drm/omapdrm/omap_fbdev.c index 2b045262f8ad..53c547676cfb 100644 --- a/drivers/gpu/drm/omapdrm/omap_fbdev.c +++ b/drivers/gpu/drm/omapdrm/omap_fbdev.c @@ -275,7 +275,9 @@ struct drm_fb_helper *omap_fbdev_init(struct drm_device *dev) goto fail; }

- ret = drm_fb_helper_single_add_all_connectors(helper); + drm_modeset_lock_all(dev); + ret = drm_fb_helper_add_one_connector(helper, priv->connectors[0]); + drm_modeset_unlock_all(dev); if (ret) goto fini;

From: Peter Ujfalusi peter.ujfalusi@ti.com

When the connector associated detect callback is not provided, we can not detect if the display is connected or disconnected. These displays does not support hot plug, they are always connected. Let DRM know that connectors w/o detect callback should not be polled.

Signed-off-by: Peter Ujfalusi peter.ujfalusi@ti.com Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com --- drivers/gpu/drm/omapdrm/omap_connector.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/omap_connector.c b/drivers/gpu/drm/omapdrm/omap_connector.c index 2580e8673908..da53df4811ac 100644 --- a/drivers/gpu/drm/omapdrm/omap_connector.c +++ b/drivers/gpu/drm/omapdrm/omap_connector.c @@ -229,13 +229,11 @@ struct drm_connector *omap_connector_init(struct drm_device *dev, connector_type); drm_connector_helper_add(connector, &omap_connector_helper_funcs);

-#if 0 /* enable when dss2 supports hotplug */ - if (dssdev->caps & OMAP_DSS_DISPLAY_CAP_HPD) - connector->polled = 0; - else -#endif + if (dssdev->driver->detect) connector->polled = DRM_CONNECTOR_POLL_CONNECT | - DRM_CONNECTOR_POLL_DISCONNECT; + DRM_CONNECTOR_POLL_DISCONNECT; + else + connector->polled = 0;

connector->interlace_allowed = 1; connector->doublescan_allowed = 0;

From: Peter Ujfalusi peter.ujfalusi@ti.com

If the hpd_gpio is valid, use interrupt handler to react to HPD changes. In case the hpd_gpio is not valid, try to enable hpd detection on the encoder if it supports it.

Signed-off-by: Peter Ujfalusi peter.ujfalusi@ti.com Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com --- drivers/gpu/drm/omapdrm/displays/connector-hdmi.c | 63 +++++++++++++++++++++++ 1 file changed, 63 insertions(+)

diff --git a/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c b/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c index 1ef130641bae..4d743e011335 100644 --- a/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c +++ b/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c @@ -15,6 +15,7 @@ #include <linux/platform_device.h> #include <linux/of.h> #include <linux/of_gpio.h> +#include <linux/spinlock.h>

#include <drm/drm_edid.h> #include <video/omap-panel-data.h> @@ -38,6 +39,9 @@ static const struct videomode hdmic_default_vm = { struct panel_drv_data { struct omap_dss_device dssdev; struct omap_dss_device *in; + void (*hpd_cb)(void *cb_data, enum drm_connector_status status); + void *hpd_cb_data; + struct mutex hpd_lock;

struct device *dev;

@@ -168,6 +172,32 @@ static bool hdmic_detect(struct omap_dss_device *dssdev) return in->ops.hdmi->detect(in); }

+static int hdmic_enable_hpd(struct omap_dss_device *dssdev, + void (*cb)(void *cb_data, + enum drm_connector_status status), + void *cb_data) +{ + struct panel_drv_data *ddata = to_panel_data(dssdev); + struct omap_dss_device *in = ddata->in; + + if (gpio_is_valid(ddata->hpd_gpio)) { + mutex_lock(&ddata->hpd_lock); + ddata->hpd_cb = cb; + ddata->hpd_cb_data = cb_data; + mutex_unlock(&ddata->hpd_lock); + return 0; + } else if (in->ops.hdmi->enable_hpd) { + return in->ops.hdmi->enable_hpd(in, cb, cb_data); + } + + return -ENOTSUPP; +} + +static void hdmic_disable_hpd(struct omap_dss_device *dssdev) +{ + hdmic_enable_hpd(dssdev, NULL, NULL); +} + static int hdmic_set_hdmi_mode(struct omap_dss_device *dssdev, bool hdmi_mode) { struct panel_drv_data *ddata = to_panel_data(dssdev); @@ -200,10 +230,32 @@ static struct omap_dss_driver hdmic_driver = {

.read_edid = hdmic_read_edid, .detect = hdmic_detect, + .enable_hpd = hdmic_enable_hpd, + .disable_hpd = hdmic_disable_hpd, .set_hdmi_mode = hdmic_set_hdmi_mode, .set_hdmi_infoframe = hdmic_set_infoframe, };

+static irqreturn_t hdmic_hpd_isr(int irq, void *data) +{ + struct panel_drv_data *ddata = data; + + mutex_lock(&ddata->hpd_lock); + if (ddata->hpd_cb) { + enum drm_connector_status status; + + if (hdmic_detect(&ddata->dssdev)) + status = connector_status_connected; + else + status = connector_status_disconnected; + + ddata->hpd_cb(ddata->hpd_cb_data, status); + } + mutex_unlock(&ddata->hpd_lock); + + return IRQ_HANDLED; +} + static int hdmic_probe_of(struct platform_device *pdev) { struct panel_drv_data *ddata = platform_get_drvdata(pdev); @@ -249,11 +301,22 @@ static int hdmic_probe(struct platform_device *pdev) if (r) return r;

+ mutex_init(&ddata->hpd_lock); + if (gpio_is_valid(ddata->hpd_gpio)) { r = devm_gpio_request_one(&pdev->dev, ddata->hpd_gpio, GPIOF_DIR_IN, "hdmi_hpd"); if (r) goto err_reg; + + r = devm_request_threaded_irq(&pdev->dev, + gpio_to_irq(ddata->hpd_gpio), + NULL, hdmic_hpd_isr, + IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING | + IRQF_ONESHOT, + "hdmic hpd", ddata); + if (r) + goto err_reg; }

ddata->vm = hdmic_default_vm;

From: Peter Ujfalusi peter.ujfalusi@ti.com

The associated backlight device can be configured via DT by providing the phandle to the device.

If the backlight device is configured, the driver can manage the backligt along with the panel's power state, iow it can turn on the backlight when the panel is enabled and turn it off when the panel is disabled.

Signed-off-by: Peter Ujfalusi peter.ujfalusi@ti.com Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com --- drivers/gpu/drm/omapdrm/displays/panel-dpi.c | 37 ++++++++++++++++++++++++++-- 1 file changed, 35 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/displays/panel-dpi.c b/drivers/gpu/drm/omapdrm/displays/panel-dpi.c index 38003208d9ca..51fc78eb212c 100644 --- a/drivers/gpu/drm/omapdrm/displays/panel-dpi.c +++ b/drivers/gpu/drm/omapdrm/displays/panel-dpi.c @@ -16,6 +16,7 @@ #include <linux/of.h> #include <linux/of_gpio.h> #include <linux/regulator/consumer.h> +#include <linux/backlight.h>

#include <video/omap-panel-data.h> #include <video/of_display_timing.h> @@ -30,6 +31,8 @@ struct panel_drv_data {

struct videomode vm;

+ struct backlight_device *backlight; + /* used for non-DT boot, to be removed */ int backlight_gpio;

@@ -97,6 +100,11 @@ static int panel_dpi_enable(struct omap_dss_device *dssdev) if (gpio_is_valid(ddata->backlight_gpio)) gpio_set_value_cansleep(ddata->backlight_gpio, 1);

+ if (ddata->backlight) { + ddata->backlight->props.power = FB_BLANK_UNBLANK; + backlight_update_status(ddata->backlight); + } + dssdev->state = OMAP_DSS_DISPLAY_ACTIVE;

return 0; @@ -113,6 +121,11 @@ static void panel_dpi_disable(struct omap_dss_device *dssdev) if (gpio_is_valid(ddata->backlight_gpio)) gpio_set_value_cansleep(ddata->backlight_gpio, 0);

+ if (ddata->backlight) { + ddata->backlight->props.power = FB_BLANK_POWERDOWN; + backlight_update_status(ddata->backlight); + } + gpiod_set_value_cansleep(ddata->enable_gpio, 0); regulator_disable(ddata->vcc_supply);

@@ -209,6 +222,7 @@ static int panel_dpi_probe_of(struct platform_device *pdev) { struct panel_drv_data *ddata = platform_get_drvdata(pdev); struct device_node *node = pdev->dev.of_node; + struct device_node *bl_node; struct omap_dss_device *in; int r; struct display_timing timing; @@ -236,10 +250,19 @@ static int panel_dpi_probe_of(struct platform_device *pdev)

ddata->backlight_gpio = -ENOENT;

+ bl_node = of_parse_phandle(node, "backlight", 0); + if (bl_node) { + ddata->backlight = of_find_backlight_by_node(bl_node); + of_node_put(bl_node); + + if (!ddata->backlight) + return -EPROBE_DEFER; + } + r = of_get_display_timing(node, "panel-timing", &timing); if (r) { dev_err(&pdev->dev, "failed to get video timing\n"); - return r; + goto free_backlight; }

videomode_from_timing(&timing, &ddata->vm); @@ -247,12 +270,19 @@ static int panel_dpi_probe_of(struct platform_device *pdev) in = omapdss_of_find_source_for_first_ep(node); if (IS_ERR(in)) { dev_err(&pdev->dev, "failed to find video source\n"); - return PTR_ERR(in); + r = PTR_ERR(in); + goto free_backlight; }

ddata->in = in;

return 0; + +free_backlight: + if (ddata->backlight) + put_device(&ddata->backlight->dev); + + return r; }

static int panel_dpi_probe(struct platform_device *pdev) @@ -321,6 +351,9 @@ static int __exit panel_dpi_remove(struct platform_device *pdev)

omap_dss_put_device(in);

+ if (ddata->backlight) + put_device(&ddata->backlight->dev); + return 0; }

At the moment VSYNC/HSYNC/DE high/low flags set by the panel/encoder drivers get lost when the videotimings are translated to DRM's videomode, as DRM's mode does not have corresponding flags.

DRM has bus-flags for this purpose, and while it lacks a few flags at the moment, it should be used here. However, until we rewrite omapdrm's device model, using bus-flags is rather difficult.

As a short term fix, this patch makes sure that every time the videomode is set in omap_crtc_mode_set_nofb(), the driver asks for the SYNC/DE flags from the panel/encoder drivers, and thus we get the correct flags into use.

Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com --- drivers/gpu/drm/omapdrm/omap_connector.c | 2 -- drivers/gpu/drm/omapdrm/omap_crtc.c | 28 +++++++++++++++++++++++++--- 2 files changed, 25 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/omap_connector.c b/drivers/gpu/drm/omapdrm/omap_connector.c index 60b438431355..c562409f2568 100644 --- a/drivers/gpu/drm/omapdrm/omap_connector.c +++ b/drivers/gpu/drm/omapdrm/omap_connector.c @@ -160,8 +160,6 @@ static int omap_connector_mode_valid(struct drm_connector *connector, int r, ret = MODE_BAD;

drm_display_mode_to_videomode(mode, &vm); - vm.flags |= DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_PIXDATA_POSEDGE | - DISPLAY_FLAGS_SYNC_NEGEDGE; mode->vrefresh = drm_mode_vrefresh(mode);

/* diff --git a/drivers/gpu/drm/omapdrm/omap_crtc.c b/drivers/gpu/drm/omapdrm/omap_crtc.c index f3fd786de598..ac5f1b6eb583 100644 --- a/drivers/gpu/drm/omapdrm/omap_crtc.c +++ b/drivers/gpu/drm/omapdrm/omap_crtc.c @@ -427,6 +427,11 @@ static void omap_crtc_mode_set_nofb(struct drm_crtc *crtc) { struct omap_crtc *omap_crtc = to_omap_crtc(crtc); struct drm_display_mode *mode = &crtc->state->adjusted_mode; + struct omap_drm_private *priv = crtc->dev->dev_private; + const u32 flags_mask = DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_DE_LOW | + DISPLAY_FLAGS_PIXDATA_POSEDGE | DISPLAY_FLAGS_PIXDATA_NEGEDGE | + DISPLAY_FLAGS_SYNC_POSEDGE | DISPLAY_FLAGS_SYNC_NEGEDGE; + int i;

DBG("%s: set mode: %d:"%s" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x", omap_crtc->name, mode->base.id, mode->name, @@ -436,9 +441,26 @@ static void omap_crtc_mode_set_nofb(struct drm_crtc *crtc) mode->type, mode->flags);

drm_display_mode_to_videomode(mode, &omap_crtc->vm); - omap_crtc->vm.flags |= DISPLAY_FLAGS_DE_HIGH | - DISPLAY_FLAGS_PIXDATA_POSEDGE | - DISPLAY_FLAGS_SYNC_NEGEDGE; + + for (i = 0; i < priv->num_encoders; ++i) { + struct drm_encoder *encoder = priv->encoders[i]; + + if (encoder->crtc == crtc) { + struct omap_dss_device *dssdev; + + dssdev = omap_encoder_get_dssdev(encoder); + + if (dssdev) { + struct videomode vm = {0}; + + dssdev->driver->get_timings(dssdev, &vm); + + omap_crtc->vm.flags |= vm.flags & flags_mask; + } + + break; + } + } }

static int omap_crtc_atomic_check(struct drm_crtc *crtc,