Hi all This series is to correct some mistakes in clk_get_rate and the register address. And in order to better develop, adding more prints.
Chris Zhong (3): drm/rockchip: cdn-dp: return error code when clk_get_rate failed drm/rockchip: cdn-dp: Correct PHY register address drm/rockchip: cdn-dp: add more log for video config
drivers/gpu/drm/rockchip/cdn-dp-core.c | 5 +++-- drivers/gpu/drm/rockchip/cdn-dp-reg.c | 6 +++++- drivers/gpu/drm/rockchip/cdn-dp-reg.h | 13 ++++++------- 3 files changed, 14 insertions(+), 10 deletions(-)
The clk_get_rate return 0 if something goes wrong, so it can never be less then zero, the ret should be set a error code, otherwise the cdn_dp_clk_enable will return 0 when it failed at clk_get_rate. In addition, clk_get_rate() returns an "unsigned long", so use "unsigned long" instead of "u32" is better.
Signed-off-by: Chris Zhong zyw@rock-chips.com ---
drivers/gpu/drm/rockchip/cdn-dp-core.c | 5 +++-- drivers/gpu/drm/rockchip/cdn-dp-reg.c | 2 +- drivers/gpu/drm/rockchip/cdn-dp-reg.h | 2 +- 3 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.c b/drivers/gpu/drm/rockchip/cdn-dp-core.c index fd79a70..9edb8dc 100644 --- a/drivers/gpu/drm/rockchip/cdn-dp-core.c +++ b/drivers/gpu/drm/rockchip/cdn-dp-core.c @@ -94,7 +94,7 @@ static int cdn_dp_grf_write(struct cdn_dp_device *dp, static int cdn_dp_clk_enable(struct cdn_dp_device *dp) { int ret; - u32 rate; + unsigned long rate;
ret = clk_prepare_enable(dp->pclk); if (ret < 0) { @@ -123,7 +123,8 @@ static int cdn_dp_clk_enable(struct cdn_dp_device *dp)
rate = clk_get_rate(dp->core_clk); if (!rate) { - DRM_DEV_ERROR(dp->dev, "get clk rate failed: %d\n", rate); + DRM_DEV_ERROR(dp->dev, "get clk rate failed\n"); + ret = -EINVAL; goto err_set_rate; }
diff --git a/drivers/gpu/drm/rockchip/cdn-dp-reg.c b/drivers/gpu/drm/rockchip/cdn-dp-reg.c index 319dbba..963d8ab 100644 --- a/drivers/gpu/drm/rockchip/cdn-dp-reg.c +++ b/drivers/gpu/drm/rockchip/cdn-dp-reg.c @@ -29,7 +29,7 @@ #define LINK_TRAINING_RETRY_MS 20 #define LINK_TRAINING_TIMEOUT_MS 500
-void cdn_dp_set_fw_clk(struct cdn_dp_device *dp, u32 clk) +void cdn_dp_set_fw_clk(struct cdn_dp_device *dp, unsigned long clk) { writel(clk / 1000000, dp->regs + SW_CLK_H); } diff --git a/drivers/gpu/drm/rockchip/cdn-dp-reg.h b/drivers/gpu/drm/rockchip/cdn-dp-reg.h index b5f2153..3507be3 100644 --- a/drivers/gpu/drm/rockchip/cdn-dp-reg.h +++ b/drivers/gpu/drm/rockchip/cdn-dp-reg.h @@ -462,7 +462,7 @@ enum vic_bt_type {
void cdn_dp_clock_reset(struct cdn_dp_device *dp);
-void cdn_dp_set_fw_clk(struct cdn_dp_device *dp, u32 clk); +void cdn_dp_set_fw_clk(struct cdn_dp_device *dp, unsigned long clk); int cdn_dp_load_firmware(struct cdn_dp_device *dp, const u32 *i_mem, u32 i_size, const u32 *d_mem, u32 d_size); int cdn_dp_set_firmware_active(struct cdn_dp_device *dp, bool enable);
Correct some DP register address for PHY Configuration according to latest datasheet.
Signed-off-by: Chris Zhong zyw@rock-chips.com ---
drivers/gpu/drm/rockchip/cdn-dp-reg.h | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/cdn-dp-reg.h b/drivers/gpu/drm/rockchip/cdn-dp-reg.h index 3507be3..c4bbb4a83 100644 --- a/drivers/gpu/drm/rockchip/cdn-dp-reg.h +++ b/drivers/gpu/drm/rockchip/cdn-dp-reg.h @@ -121,12 +121,11 @@
/* dptx phy addr */ #define DP_TX_PHY_CONFIG_REG 0x2000 -#define DP_TX_PHY_STATUS_REG 0x2004 -#define DP_TX_PHY_SW_RESET 0x2008 -#define DP_TX_PHY_SCRAMBLER_SEED 0x200c -#define DP_TX_PHY_TRAINING_01_04 0x2010 -#define DP_TX_PHY_TRAINING_05_08 0x2014 -#define DP_TX_PHY_TRAINING_09_10 0x2018 +#define DP_TX_PHY_SW_RESET 0x2004 +#define DP_TX_PHY_SCRAMBLER_SEED 0x2008 +#define DP_TX_PHY_TRAINING_01_04 0x200c +#define DP_TX_PHY_TRAINING_05_08 0x2010 +#define DP_TX_PHY_TRAINING_09_10 0x2014 #define TEST_COR 0x23fc
/* dptx hpd addr */
In order to analyze some video config failed, add some useful printouts.
Signed-off-by: Chris Zhong zyw@rock-chips.com ---
drivers/gpu/drm/rockchip/cdn-dp-reg.c | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/rockchip/cdn-dp-reg.c b/drivers/gpu/drm/rockchip/cdn-dp-reg.c index 963d8ab..b14d211 100644 --- a/drivers/gpu/drm/rockchip/cdn-dp-reg.c +++ b/drivers/gpu/drm/rockchip/cdn-dp-reg.c @@ -671,6 +671,10 @@ int cdn_dp_config_video(struct cdn_dp_device *dp) rem = do_div(symbol, 1000); if (tu_size_reg > 64) { ret = -EINVAL; + DRM_DEV_ERROR(dp->dev, + "tu error, clk:%d, lanes:%d, rate:%d\n", + mode->clock, dp->link.num_lanes, + link_rate); goto err_config_video; } } while ((symbol <= 1) || (tu_size_reg - symbol < 4) ||
Oh, a slip of the finger :(, the headline should be "RK3399 cdn-dp patches"
On 03/08/2017 10:27 AM, Chris Zhong wrote:
Hi all This series is to correct some mistakes in clk_get_rate and the register address. And in order to better develop, adding more prints.
Chris Zhong (3): drm/rockchip: cdn-dp: return error code when clk_get_rate failed drm/rockchip: cdn-dp: Correct PHY register address drm/rockchip: cdn-dp: add more log for video config
drivers/gpu/drm/rockchip/cdn-dp-core.c | 5 +++-- drivers/gpu/drm/rockchip/cdn-dp-reg.c | 6 +++++- drivers/gpu/drm/rockchip/cdn-dp-reg.h | 13 ++++++------- 3 files changed, 14 insertions(+), 10 deletions(-)
On Wed, Mar 08, 2017 at 10:27:54AM +0800, Chris Zhong wrote:
Hi all This series is to correct some mistakes in clk_get_rate and the register address. And in order to better develop, adding more prints.
Chris Zhong (3): drm/rockchip: cdn-dp: return error code when clk_get_rate failed drm/rockchip: cdn-dp: Correct PHY register address drm/rockchip: cdn-dp: add more log for video config
Hi Chris, Thanks for sending these up, I've applied the entire series to drm-misc
Sean
drivers/gpu/drm/rockchip/cdn-dp-core.c | 5 +++-- drivers/gpu/drm/rockchip/cdn-dp-reg.c | 6 +++++- drivers/gpu/drm/rockchip/cdn-dp-reg.h | 13 ++++++------- 3 files changed, 14 insertions(+), 10 deletions(-)
-- 2.6.3
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