Changes since v3: - refine drive-strength-microamp as from 3000 to 6000.
Changes since v2: - fix the title of commit message. - rename mipitx-current-drive to drive-strength-microamp
Changes since v1: - fix coding style. - change mtk_mipi_tx_config_calibration_data() to void
Jitao Shi (4): dt-bindings: display: mediatek: add property to control mipi tx drive current dt-bindings: display: mediatek: get mipitx calibration data from nvmem drm/mediatek: add the mipitx driving control drm/mediatek: config mipitx impedance with calibration data
.../display/mediatek/mediatek,dsi.txt | 10 +++ drivers/gpu/drm/mediatek/mtk_mipi_tx.c | 14 ++++ drivers/gpu/drm/mediatek/mtk_mipi_tx.h | 1 + drivers/gpu/drm/mediatek/mtk_mt8183_mipi_tx.c | 64 +++++++++++++++++++ 4 files changed, 89 insertions(+)
Add a property to control mipi tx drive current: "drive-strength-microamp"
Signed-off-by: Jitao Shi jitao.shi@mediatek.com --- .../devicetree/bindings/display/mediatek/mediatek,dsi.txt | 5 +++++ 1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt index a19a6cc375ed..d78b6d6d8fab 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt @@ -33,6 +33,10 @@ Required properties: - #clock-cells: must be <0>; - #phy-cells: must be <0>.
+Optional properties: +- drive-strength-microamp: adjust driving current, should be 3000 ~ 6000. And + the step is 200. + Example:
mipi_tx0: mipi-dphy@10215000 { @@ -42,6 +46,7 @@ mipi_tx0: mipi-dphy@10215000 { clock-output-names = "mipi_tx0_pll"; #clock-cells = <0>; #phy-cells = <0>; + drive-strength-microamp = <4600>; };
dsi0: dsi@1401b000 {
Hi, Jitao:
Jitao Shi jitao.shi@mediatek.com 於 2020年3月31日 週二 下午4:28寫道：
Add a property to control mipi tx drive current: "drive-strength-microamp"
Reviewed-by: Chun-Kuang Hu chunkuang.hu@kernel.org
Signed-off-by: Jitao Shi jitao.shi@mediatek.com
.../devicetree/bindings/display/mediatek/mediatek,dsi.txt | 5 +++++ 1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt index a19a6cc375ed..d78b6d6d8fab 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt @@ -33,6 +33,10 @@ Required properties:
- #clock-cells: must be <0>;
- #phy-cells: must be <0>.
+Optional properties: +- drive-strength-microamp: adjust driving current, should be 3000 ~ 6000. And
the step is 200.Example:
mipi_tx0: mipi-dphy@10215000 { @@ -42,6 +46,7 @@ mipi_tx0: mipi-dphy@10215000 { clock-output-names = "mipi_tx0_pll"; #clock-cells = <0>; #phy-cells = <0>;
drive-strength-microamp = <4600>;};
dsi0: dsi@1401b000 {
2.21.0 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Add properties to get get mipitx calibration data.
Reviewed-by: Rob Herring robh@kernel.org Signed-off-by: Jitao Shi jitao.shi@mediatek.com --- .../devicetree/bindings/display/mediatek/mediatek,dsi.txt | 5 +++++ 1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt index d78b6d6d8fab..8e4729de8c85 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt @@ -36,6 +36,9 @@ Required properties: Optional properties: - drive-strength-microamp: adjust driving current, should be 3000 ~ 6000. And the step is 200. +- nvmem-cells: A phandle to the calibration data provided by a nvmem device. If + unspecified default values shall be used. +- nvmem-cell-names: Should be "calibration-data"
Example:
@@ -47,6 +50,8 @@ mipi_tx0: mipi-dphy@10215000 { #clock-cells = <0>; #phy-cells = <0>; drive-strength-microamp = <4600>; + nvmem-cells= <&mipi_tx_calibration>; + nvmem-cell-names = "calibration-data"; };
dsi0: dsi@1401b000 {
Hi, Jitao:
Jitao Shi jitao.shi@mediatek.com 於 2020年3月31日 週二 下午4:28寫道：
Add properties to get get mipitx calibration data.
Reviewed-by: Chun-Kuang Hu chunkuang.hu@kernel.org
Reviewed-by: Rob Herring robh@kernel.org Signed-off-by: Jitao Shi jitao.shi@mediatek.com
.../devicetree/bindings/display/mediatek/mediatek,dsi.txt | 5 +++++ 1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt index d78b6d6d8fab..8e4729de8c85 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt @@ -36,6 +36,9 @@ Required properties: Optional properties:
- drive-strength-microamp: adjust driving current, should be 3000 ~ 6000. And the step is 200.
+- nvmem-cells: A phandle to the calibration data provided by a nvmem device. If
unspecified default values shall be used.+- nvmem-cell-names: Should be "calibration-data"
Example:
@@ -47,6 +50,8 @@ mipi_tx0: mipi-dphy@10215000 { #clock-cells = <0>; #phy-cells = <0>; drive-strength-microamp = <4600>;
nvmem-cells= <&mipi_tx_calibration>;nvmem-cell-names = "calibration-data";};
dsi0: dsi@1401b000 {
2.21.0 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Add a property in device tree to control the driving by different board.
Reviewed-by: Matthias Brugger matthias.bgg@gmail.com Signed-off-by: Jitao Shi jitao.shi@mediatek.com --- drivers/gpu/drm/mediatek/mtk_mipi_tx.c | 14 ++++++++++++++ drivers/gpu/drm/mediatek/mtk_mipi_tx.h | 1 + drivers/gpu/drm/mediatek/mtk_mt8183_mipi_tx.c | 7 +++++++ 3 files changed, 22 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_mipi_tx.c b/drivers/gpu/drm/mediatek/mtk_mipi_tx.c index e4d34484ecc8..e301af64809e 100644 --- a/drivers/gpu/drm/mediatek/mtk_mipi_tx.c +++ b/drivers/gpu/drm/mediatek/mtk_mipi_tx.c @@ -125,6 +125,20 @@ static int mtk_mipi_tx_probe(struct platform_device *pdev) return ret; }
+ ret = of_property_read_u32(dev->of_node, "drive-strength-microamp", + &mipi_tx->mipitx_drive); + /* If can't get the "mipi_tx->mipitx_drive", set it default 0x8 */ + if (ret < 0) + mipi_tx->mipitx_drive = 4600; + + /* check the mipitx_drive valid */ + if (mipi_tx->mipitx_drive > 6000 || mipi_tx->mipitx_drive < 3000) { + dev_warn(dev, "drive-strength-microamp is invalid %d, not in 3000 ~ 6000\n", + mipi_tx->mipitx_drive); + mipi_tx->mipitx_drive = clamp_val(mipi_tx->mipitx_drive, 3000, + 6000); + } + ref_clk_name = __clk_get_name(ref_clk);
ret = of_property_read_string(dev->of_node, "clock-output-names", diff --git a/drivers/gpu/drm/mediatek/mtk_mipi_tx.h b/drivers/gpu/drm/mediatek/mtk_mipi_tx.h index 413f35d86219..eea44327fe9f 100644 --- a/drivers/gpu/drm/mediatek/mtk_mipi_tx.h +++ b/drivers/gpu/drm/mediatek/mtk_mipi_tx.h @@ -27,6 +27,7 @@ struct mtk_mipi_tx { struct device *dev; void __iomem *regs; u32 data_rate; + u32 mipitx_drive; const struct mtk_mipitx_data *driver_data; struct clk_hw pll_hw; struct clk *pll; diff --git a/drivers/gpu/drm/mediatek/mtk_mt8183_mipi_tx.c b/drivers/gpu/drm/mediatek/mtk_mt8183_mipi_tx.c index 91f08a351fd0..e4cc967750cb 100644 --- a/drivers/gpu/drm/mediatek/mtk_mt8183_mipi_tx.c +++ b/drivers/gpu/drm/mediatek/mtk_mt8183_mipi_tx.c @@ -17,6 +17,9 @@ #define RG_DSI_BG_CORE_EN BIT(7) #define RG_DSI_PAD_TIEL_SEL BIT(8)
+#define MIPITX_VOLTAGE_SEL 0x0010 +#define RG_DSI_HSTX_LDO_REF_SEL (0xf << 6) + #define MIPITX_PLL_PWR 0x0028 #define MIPITX_PLL_CON0 0x002c #define MIPITX_PLL_CON1 0x0030 @@ -123,6 +126,10 @@ static void mtk_mipi_tx_power_on_signal(struct phy *phy) mtk_mipi_tx_clear_bits(mipi_tx, MIPITX_D3_SW_CTL_EN, DSI_SW_CTL_EN); mtk_mipi_tx_clear_bits(mipi_tx, MIPITX_CK_SW_CTL_EN, DSI_SW_CTL_EN);
+ mtk_mipi_tx_update_bits(mipi_tx, MIPITX_VOLTAGE_SEL, + RG_DSI_HSTX_LDO_REF_SEL, + (mipi_tx->mipitx_drive - 3000) / 200 << 6); + mtk_mipi_tx_set_bits(mipi_tx, MIPITX_CK_CKMODE_EN, DSI_CK_CKMODE_EN); }
Hi, Jitao:
Jitao Shi jitao.shi@mediatek.com 於 2020年3月31日 週二 下午4:28寫道：
Add a property in device tree to control the driving by different board.
Reviewed-by: Chun-Kuang Hu chunkuang.hu@kernel.org
Reviewed-by: Matthias Brugger matthias.bgg@gmail.com Signed-off-by: Jitao Shi jitao.shi@mediatek.com
drivers/gpu/drm/mediatek/mtk_mipi_tx.c | 14 ++++++++++++++ drivers/gpu/drm/mediatek/mtk_mipi_tx.h | 1 + drivers/gpu/drm/mediatek/mtk_mt8183_mipi_tx.c | 7 +++++++ 3 files changed, 22 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_mipi_tx.c b/drivers/gpu/drm/mediatek/mtk_mipi_tx.c index e4d34484ecc8..e301af64809e 100644 --- a/drivers/gpu/drm/mediatek/mtk_mipi_tx.c +++ b/drivers/gpu/drm/mediatek/mtk_mipi_tx.c @@ -125,6 +125,20 @@ static int mtk_mipi_tx_probe(struct platform_device *pdev) return ret; }
ret = of_property_read_u32(dev->of_node, "drive-strength-microamp",&mipi_tx->mipitx_drive);/* If can't get the "mipi_tx->mipitx_drive", set it default 0x8 */if (ret < 0)mipi_tx->mipitx_drive = 4600;/* check the mipitx_drive valid */if (mipi_tx->mipitx_drive > 6000 || mipi_tx->mipitx_drive < 3000) {dev_warn(dev, "drive-strength-microamp is invalid %d, not in 3000 ~ 6000\n",mipi_tx->mipitx_drive);mipi_tx->mipitx_drive = clamp_val(mipi_tx->mipitx_drive, 3000,6000);}ref_clk_name = __clk_get_name(ref_clk); ret = of_property_read_string(dev->of_node, "clock-output-names",diff --git a/drivers/gpu/drm/mediatek/mtk_mipi_tx.h b/drivers/gpu/drm/mediatek/mtk_mipi_tx.h index 413f35d86219..eea44327fe9f 100644 --- a/drivers/gpu/drm/mediatek/mtk_mipi_tx.h +++ b/drivers/gpu/drm/mediatek/mtk_mipi_tx.h @@ -27,6 +27,7 @@ struct mtk_mipi_tx { struct device *dev; void __iomem *regs; u32 data_rate;
u32 mipitx_drive; const struct mtk_mipitx_data *driver_data; struct clk_hw pll_hw; struct clk *pll;diff --git a/drivers/gpu/drm/mediatek/mtk_mt8183_mipi_tx.c b/drivers/gpu/drm/mediatek/mtk_mt8183_mipi_tx.c index 91f08a351fd0..e4cc967750cb 100644 --- a/drivers/gpu/drm/mediatek/mtk_mt8183_mipi_tx.c +++ b/drivers/gpu/drm/mediatek/mtk_mt8183_mipi_tx.c @@ -17,6 +17,9 @@ #define RG_DSI_BG_CORE_EN BIT(7) #define RG_DSI_PAD_TIEL_SEL BIT(8)
+#define MIPITX_VOLTAGE_SEL 0x0010 +#define RG_DSI_HSTX_LDO_REF_SEL (0xf << 6)
#define MIPITX_PLL_PWR 0x0028 #define MIPITX_PLL_CON0 0x002c #define MIPITX_PLL_CON1 0x0030 @@ -123,6 +126,10 @@ static void mtk_mipi_tx_power_on_signal(struct phy *phy) mtk_mipi_tx_clear_bits(mipi_tx, MIPITX_D3_SW_CTL_EN, DSI_SW_CTL_EN); mtk_mipi_tx_clear_bits(mipi_tx, MIPITX_CK_SW_CTL_EN, DSI_SW_CTL_EN);
mtk_mipi_tx_update_bits(mipi_tx, MIPITX_VOLTAGE_SEL,RG_DSI_HSTX_LDO_REF_SEL,(mipi_tx->mipitx_drive - 3000) / 200 << 6);mtk_mipi_tx_set_bits(mipi_tx, MIPITX_CK_CKMODE_EN, DSI_CK_CKMODE_EN);}
-- 2.21.0 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Read calibration data from nvmem, and config mipitx impedance with calibration data to make sure their impedance are 100ohm.
Signed-off-by: Jitao Shi jitao.shi@mediatek.com --- drivers/gpu/drm/mediatek/mtk_mt8183_mipi_tx.c | 57 +++++++++++++++++++ 1 file changed, 57 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_mt8183_mipi_tx.c b/drivers/gpu/drm/mediatek/mtk_mt8183_mipi_tx.c index e4cc967750cb..0f87cd3d1d7d 100644 --- a/drivers/gpu/drm/mediatek/mtk_mt8183_mipi_tx.c +++ b/drivers/gpu/drm/mediatek/mtk_mt8183_mipi_tx.c @@ -5,6 +5,8 @@ */
#include "mtk_mipi_tx.h" +#include <linux/nvmem-consumer.h> +#include <linux/slab.h>
#define MIPITX_LANE_CON 0x000c #define RG_DSI_CPHY_T1DRV_EN BIT(0) @@ -28,6 +30,7 @@ #define MIPITX_PLL_CON4 0x003c #define RG_DSI_PLL_IBIAS (3 << 10)
+#define MIPITX_D2P_RTCODE 0x0100 #define MIPITX_D2_SW_CTL_EN 0x0144 #define MIPITX_D0_SW_CTL_EN 0x0244 #define MIPITX_CK_CKMODE_EN 0x0328 @@ -108,6 +111,58 @@ static const struct clk_ops mtk_mipi_tx_pll_ops = { .recalc_rate = mtk_mipi_tx_pll_recalc_rate, };
+static void mtk_mipi_tx_config_calibration_data(struct mtk_mipi_tx *mipi_tx) +{ + u32 *buf; + u32 rt_code[5]; + int i, j; + struct nvmem_cell *cell; + struct device *dev = mipi_tx->dev; + size_t len; + + cell = nvmem_cell_get(dev, "calibration-data"); + if (IS_ERR(cell)) { + dev_info(dev, "nvmem_cell_get fail\n"); + return; + } + + buf = (u32 *)nvmem_cell_read(cell, &len); + + nvmem_cell_put(cell); + + if (IS_ERR(buf)) { + dev_info(dev, "can't get data\n"); + return; + } + + if (len < 3 * sizeof(u32)) { + dev_info(dev, "invalid calibration data\n"); + kfree(buf); + return; + } + + rt_code[0] = ((buf[0] >> 6 & 0x1f) << 5) | (buf[0] >> 11 & 0x1f); + rt_code[1] = ((buf[1] >> 27 & 0x1f) << 5) | (buf[0] >> 1 & 0x1f); + rt_code[2] = ((buf[1] >> 17 & 0x1f) << 5) | (buf[1] >> 22 & 0x1f); + rt_code[3] = ((buf[1] >> 7 & 0x1f) << 5) | (buf[1] >> 12 & 0x1f); + rt_code[4] = ((buf[2] >> 27 & 0x1f) << 5) | (buf[1] >> 2 & 0x1f); + + for (i = 0; i < 5; i++) { + if ((rt_code[i] & 0x1f) == 0) + rt_code[i] |= 0x10; + + if ((rt_code[i] >> 5 & 0x1f) == 0) + rt_code[i] |= 0x10 << 5; + + for (j = 0; j < 10; j++) + mtk_mipi_tx_update_bits(mipi_tx, + MIPITX_D2P_RTCODE * (i + 1) + j * 4, + 1, rt_code[i] >> j & 1); + } + + kfree(buf); +} + static void mtk_mipi_tx_power_on_signal(struct phy *phy) { struct mtk_mipi_tx *mipi_tx = phy_get_drvdata(phy); @@ -130,6 +185,8 @@ static void mtk_mipi_tx_power_on_signal(struct phy *phy) RG_DSI_HSTX_LDO_REF_SEL, (mipi_tx->mipitx_drive - 3000) / 200 << 6);
+ mtk_mipi_tx_config_calibration_data(mipi_tx); + mtk_mipi_tx_set_bits(mipi_tx, MIPITX_CK_CKMODE_EN, DSI_CK_CKMODE_EN); }
Hi, Jitao:
Jitao Shi jitao.shi@mediatek.com 於 2020年3月31日 週二 下午4:28寫道：
Read calibration data from nvmem, and config mipitx impedance with calibration data to make sure their impedance are 100ohm.
Signed-off-by: Jitao Shi jitao.shi@mediatek.com
drivers/gpu/drm/mediatek/mtk_mt8183_mipi_tx.c | 57 +++++++++++++++++++ 1 file changed, 57 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_mt8183_mipi_tx.c b/drivers/gpu/drm/mediatek/mtk_mt8183_mipi_tx.c index e4cc967750cb..0f87cd3d1d7d 100644 --- a/drivers/gpu/drm/mediatek/mtk_mt8183_mipi_tx.c +++ b/drivers/gpu/drm/mediatek/mtk_mt8183_mipi_tx.c @@ -5,6 +5,8 @@ */
#include "mtk_mipi_tx.h" +#include <linux/nvmem-consumer.h> +#include <linux/slab.h>
#define MIPITX_LANE_CON 0x000c #define RG_DSI_CPHY_T1DRV_EN BIT(0) @@ -28,6 +30,7 @@ #define MIPITX_PLL_CON4 0x003c #define RG_DSI_PLL_IBIAS (3 << 10)
+#define MIPITX_D2P_RTCODE 0x0100 #define MIPITX_D2_SW_CTL_EN 0x0144 #define MIPITX_D0_SW_CTL_EN 0x0244 #define MIPITX_CK_CKMODE_EN 0x0328 @@ -108,6 +111,58 @@ static const struct clk_ops mtk_mipi_tx_pll_ops = { .recalc_rate = mtk_mipi_tx_pll_recalc_rate, };
+static void mtk_mipi_tx_config_calibration_data(struct mtk_mipi_tx *mipi_tx) +{
u32 *buf;u32 rt_code[5];int i, j;struct nvmem_cell *cell;struct device *dev = mipi_tx->dev;size_t len;cell = nvmem_cell_get(dev, "calibration-data");if (IS_ERR(cell)) {dev_info(dev, "nvmem_cell_get fail\n");return;}buf = (u32 *)nvmem_cell_read(cell, &len);nvmem_cell_put(cell);if (IS_ERR(buf)) {dev_info(dev, "can't get data\n");return;}if (len < 3 * sizeof(u32)) {dev_info(dev, "invalid calibration data\n");kfree(buf);return;}rt_code[0] = ((buf[0] >> 6 & 0x1f) << 5) | (buf[0] >> 11 & 0x1f);rt_code[1] = ((buf[1] >> 27 & 0x1f) << 5) | (buf[0] >> 1 & 0x1f);rt_code[2] = ((buf[1] >> 17 & 0x1f) << 5) | (buf[1] >> 22 & 0x1f);rt_code[3] = ((buf[1] >> 7 & 0x1f) << 5) | (buf[1] >> 12 & 0x1f);rt_code[4] = ((buf[2] >> 27 & 0x1f) << 5) | (buf[1] >> 2 & 0x1f);
Why not just save rt_code in nvmem and you don't need to translate here? If you need to do so, please add description for this.
Regards, Chun-Kuang.
for (i = 0; i < 5; i++) {if ((rt_code[i] & 0x1f) == 0)rt_code[i] |= 0x10;if ((rt_code[i] >> 5 & 0x1f) == 0)rt_code[i] |= 0x10 << 5;for (j = 0; j < 10; j++)mtk_mipi_tx_update_bits(mipi_tx,MIPITX_D2P_RTCODE * (i + 1) + j * 4,1, rt_code[i] >> j & 1);}kfree(buf);+}
static void mtk_mipi_tx_power_on_signal(struct phy *phy) { struct mtk_mipi_tx *mipi_tx = phy_get_drvdata(phy); @@ -130,6 +185,8 @@ static void mtk_mipi_tx_power_on_signal(struct phy *phy) RG_DSI_HSTX_LDO_REF_SEL, (mipi_tx->mipitx_drive - 3000) / 200 << 6);
mtk_mipi_tx_config_calibration_data(mipi_tx);mtk_mipi_tx_set_bits(mipi_tx, MIPITX_CK_CKMODE_EN, DSI_CK_CKMODE_EN);}
-- 2.21.0 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
On Sat, 2020-04-04 at 22:26 +0800, Chun-Kuang Hu wrote:
Hi, Jitao:
Jitao Shi jitao.shi@mediatek.com 於 2020年3月31日 週二 下午4:28寫道：
Read calibration data from nvmem, and config mipitx impedance with calibration data to make sure their impedance are 100ohm.
Signed-off-by: Jitao Shi jitao.shi@mediatek.com
drivers/gpu/drm/mediatek/mtk_mt8183_mipi_tx.c | 57 +++++++++++++++++++ 1 file changed, 57 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_mt8183_mipi_tx.c b/drivers/gpu/drm/mediatek/mtk_mt8183_mipi_tx.c index e4cc967750cb..0f87cd3d1d7d 100644 --- a/drivers/gpu/drm/mediatek/mtk_mt8183_mipi_tx.c +++ b/drivers/gpu/drm/mediatek/mtk_mt8183_mipi_tx.c @@ -5,6 +5,8 @@ */
#include "mtk_mipi_tx.h" +#include <linux/nvmem-consumer.h> +#include <linux/slab.h>
#define MIPITX_LANE_CON 0x000c #define RG_DSI_CPHY_T1DRV_EN BIT(0) @@ -28,6 +30,7 @@ #define MIPITX_PLL_CON4 0x003c #define RG_DSI_PLL_IBIAS (3 << 10)
+#define MIPITX_D2P_RTCODE 0x0100 #define MIPITX_D2_SW_CTL_EN 0x0144 #define MIPITX_D0_SW_CTL_EN 0x0244 #define MIPITX_CK_CKMODE_EN 0x0328 @@ -108,6 +111,58 @@ static const struct clk_ops mtk_mipi_tx_pll_ops = { .recalc_rate = mtk_mipi_tx_pll_recalc_rate, };
+static void mtk_mipi_tx_config_calibration_data(struct mtk_mipi_tx *mipi_tx) +{
u32 *buf;u32 rt_code[5];int i, j;struct nvmem_cell *cell;struct device *dev = mipi_tx->dev;size_t len;cell = nvmem_cell_get(dev, "calibration-data");if (IS_ERR(cell)) {dev_info(dev, "nvmem_cell_get fail\n");return;}buf = (u32 *)nvmem_cell_read(cell, &len);nvmem_cell_put(cell);if (IS_ERR(buf)) {dev_info(dev, "can't get data\n");return;}if (len < 3 * sizeof(u32)) {dev_info(dev, "invalid calibration data\n");kfree(buf);return;}rt_code[0] = ((buf[0] >> 6 & 0x1f) << 5) | (buf[0] >> 11 & 0x1f);rt_code[1] = ((buf[1] >> 27 & 0x1f) << 5) | (buf[0] >> 1 & 0x1f);rt_code[2] = ((buf[1] >> 17 & 0x1f) << 5) | (buf[1] >> 22 & 0x1f);rt_code[3] = ((buf[1] >> 7 & 0x1f) << 5) | (buf[1] >> 12 & 0x1f);rt_code[4] = ((buf[2] >> 27 & 0x1f) << 5) | (buf[1] >> 2 & 0x1f);Why not just save rt_code in nvmem and you don't need to translate here? If you need to do so, please add description for this.
Regards, Chun-Kuang.
Hi Chun-Kuang,
The calibration data is flashed in rom when the IC FT test And the data struct can't be stored again
Best Regards JItao
for (i = 0; i < 5; i++) {if ((rt_code[i] & 0x1f) == 0)rt_code[i] |= 0x10;if ((rt_code[i] >> 5 & 0x1f) == 0)rt_code[i] |= 0x10 << 5;for (j = 0; j < 10; j++)mtk_mipi_tx_update_bits(mipi_tx,MIPITX_D2P_RTCODE * (i + 1) + j * 4,1, rt_code[i] >> j & 1);}kfree(buf);+}
static void mtk_mipi_tx_power_on_signal(struct phy *phy) { struct mtk_mipi_tx *mipi_tx = phy_get_drvdata(phy); @@ -130,6 +185,8 @@ static void mtk_mipi_tx_power_on_signal(struct phy *phy) RG_DSI_HSTX_LDO_REF_SEL, (mipi_tx->mipitx_drive - 3000) / 200 << 6);
mtk_mipi_tx_config_calibration_data(mipi_tx);mtk_mipi_tx_set_bits(mipi_tx, MIPITX_CK_CKMODE_EN, DSI_CK_CKMODE_EN);}
-- 2.21.0 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Hi, Jitao:
Jitao Shi jitao.shi@mediatek.com 於 2020年4月5日 週日 下午9:39寫道：
On Sat, 2020-04-04 at 22:26 +0800, Chun-Kuang Hu wrote:
Hi, Jitao:
Jitao Shi jitao.shi@mediatek.com 於 2020年3月31日 週二 下午4:28寫道：
Read calibration data from nvmem, and config mipitx impedance with calibration data to make sure their impedance are 100ohm.
Signed-off-by: Jitao Shi jitao.shi@mediatek.com
drivers/gpu/drm/mediatek/mtk_mt8183_mipi_tx.c | 57 +++++++++++++++++++ 1 file changed, 57 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_mt8183_mipi_tx.c b/drivers/gpu/drm/mediatek/mtk_mt8183_mipi_tx.c index e4cc967750cb..0f87cd3d1d7d 100644 --- a/drivers/gpu/drm/mediatek/mtk_mt8183_mipi_tx.c +++ b/drivers/gpu/drm/mediatek/mtk_mt8183_mipi_tx.c @@ -5,6 +5,8 @@ */
#include "mtk_mipi_tx.h" +#include <linux/nvmem-consumer.h> +#include <linux/slab.h>
#define MIPITX_LANE_CON 0x000c #define RG_DSI_CPHY_T1DRV_EN BIT(0) @@ -28,6 +30,7 @@ #define MIPITX_PLL_CON4 0x003c #define RG_DSI_PLL_IBIAS (3 << 10)
+#define MIPITX_D2P_RTCODE 0x0100 #define MIPITX_D2_SW_CTL_EN 0x0144 #define MIPITX_D0_SW_CTL_EN 0x0244 #define MIPITX_CK_CKMODE_EN 0x0328 @@ -108,6 +111,58 @@ static const struct clk_ops mtk_mipi_tx_pll_ops = { .recalc_rate = mtk_mipi_tx_pll_recalc_rate, };
+static void mtk_mipi_tx_config_calibration_data(struct mtk_mipi_tx *mipi_tx) +{
u32 *buf;u32 rt_code[5];int i, j;struct nvmem_cell *cell;struct device *dev = mipi_tx->dev;size_t len;cell = nvmem_cell_get(dev, "calibration-data");if (IS_ERR(cell)) {dev_info(dev, "nvmem_cell_get fail\n");return;}buf = (u32 *)nvmem_cell_read(cell, &len);nvmem_cell_put(cell);if (IS_ERR(buf)) {dev_info(dev, "can't get data\n");return;}if (len < 3 * sizeof(u32)) {dev_info(dev, "invalid calibration data\n");kfree(buf);return;}rt_code[0] = ((buf[0] >> 6 & 0x1f) << 5) | (buf[0] >> 11 & 0x1f);rt_code[1] = ((buf[1] >> 27 & 0x1f) << 5) | (buf[0] >> 1 & 0x1f);rt_code[2] = ((buf[1] >> 17 & 0x1f) << 5) | (buf[1] >> 22 & 0x1f);rt_code[3] = ((buf[1] >> 7 & 0x1f) << 5) | (buf[1] >> 12 & 0x1f);rt_code[4] = ((buf[2] >> 27 & 0x1f) << 5) | (buf[1] >> 2 & 0x1f);Why not just save rt_code in nvmem and you don't need to translate here? If you need to do so, please add description for this.
Regards, Chun-Kuang.
Hi Chun-Kuang,
The calibration data is flashed in rom when the IC FT test And the data struct can't be stored again
OK, it looks like this transtation is necessary. If it's fixed, I would like to get the rt_code when probe or somewhere initialization.
Regards, Chun-Kuang.
Best Regards JItao
for (i = 0; i < 5; i++) {if ((rt_code[i] & 0x1f) == 0)rt_code[i] |= 0x10;if ((rt_code[i] >> 5 & 0x1f) == 0)rt_code[i] |= 0x10 << 5;for (j = 0; j < 10; j++)mtk_mipi_tx_update_bits(mipi_tx,MIPITX_D2P_RTCODE * (i + 1) + j * 4,1, rt_code[i] >> j & 1);}kfree(buf);+}
static void mtk_mipi_tx_power_on_signal(struct phy *phy) { struct mtk_mipi_tx *mipi_tx = phy_get_drvdata(phy); @@ -130,6 +185,8 @@ static void mtk_mipi_tx_power_on_signal(struct phy *phy) RG_DSI_HSTX_LDO_REF_SEL, (mipi_tx->mipitx_drive - 3000) / 200 << 6);
mtk_mipi_tx_config_calibration_data(mipi_tx);mtk_mipi_tx_set_bits(mipi_tx, MIPITX_CK_CKMODE_EN, DSI_CK_CKMODE_EN);}
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