Hello Eugeni Dodonov,
The patch a416edefbbaf: "drm/i915: add support for SBI ops" from May 9, 2012, leads to the following warning: drivers/gpu/drm/i915/intel_display.c:1347 intel_sbi_write() warn: bitwise AND condition is false here
SBI_READY is defined like this:
#define SBI_READY (0x0<<0)
1346 spin_lock_irqsave(&dev_priv->dpio_lock, flags); 1347 if (wait_for((I915_READ(SBI_CTL_STAT) & SBI_READY) == 0,
if ((x & 0) == 0) { ...
This is always true, so this condition will never timeout.
1348 100)) { 1349 DRM_ERROR("timeout waiting for SBI to become ready\n"); 1350 goto out_unlock; 1351 }
All the places that use SBI_READY are like this:
drivers/gpu/drm/i915/intel_display.c:1347 intel_sbi_write() warn: bitwise AND condition is false here drivers/gpu/drm/i915/intel_display.c:1361 intel_sbi_write() warn: bitwise AND condition is false here drivers/gpu/drm/i915/intel_display.c:1378 intel_sbi_read() warn: bitwise AND condition is false here drivers/gpu/drm/i915/intel_display.c:1390 intel_sbi_read() warn: bitwise AND condition is false here
regards, dan carpenter
Somehow this went unnoticed in the past reviews, but the condition would never timeout properly.
This was initially introduced in the v2 of original SBI enabling patch. Highly embarrassing.
Reported-by: Dan Carpenter dan.carpenter@oracle.com Signed-off-by: Eugeni Dodonov eugeni.dodonov@intel.com --- drivers/gpu/drm/i915/intel_display.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index ebea71d..c59af67 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1344,7 +1344,7 @@ intel_sbi_write(struct drm_i915_private *dev_priv, u16 reg, u32 value) unsigned long flags;
spin_lock_irqsave(&dev_priv->dpio_lock, flags); - if (wait_for((I915_READ(SBI_CTL_STAT) & SBI_READY) == 0, + if (wait_for((I915_READ(SBI_CTL_STAT) & SBI_BUSY) == 0, 100)) { DRM_ERROR("timeout waiting for SBI to become ready\n"); goto out_unlock; @@ -1358,7 +1358,7 @@ intel_sbi_write(struct drm_i915_private *dev_priv, u16 reg, u32 value) SBI_BUSY | SBI_CTL_OP_CRWR);
- if (wait_for((I915_READ(SBI_CTL_STAT) & (SBI_READY | SBI_RESPONSE_SUCCESS)) == 0, + if (wait_for((I915_READ(SBI_CTL_STAT) & (SBI_BUSY | SBI_RESPONSE_FAIL)) == 0, 100)) { DRM_ERROR("timeout waiting for SBI to complete write transaction\n"); goto out_unlock; @@ -1375,7 +1375,7 @@ intel_sbi_read(struct drm_i915_private *dev_priv, u16 reg) u32 value;
spin_lock_irqsave(&dev_priv->dpio_lock, flags); - if (wait_for((I915_READ(SBI_CTL_STAT) & SBI_READY) == 0, + if (wait_for((I915_READ(SBI_CTL_STAT) & SBI_BUSY) == 0, 100)) { DRM_ERROR("timeout waiting for SBI to become ready\n"); goto out_unlock; @@ -1387,7 +1387,7 @@ intel_sbi_read(struct drm_i915_private *dev_priv, u16 reg) SBI_BUSY | SBI_CTL_OP_CRRD);
- if (wait_for((I915_READ(SBI_CTL_STAT) & (SBI_READY | SBI_RESPONSE_SUCCESS)) == 0, + if (wait_for((I915_READ(SBI_CTL_STAT) & (SBI_BUSY | SBI_RESPONSE_FAIL)) == 0, 100)) { DRM_ERROR("timeout waiting for SBI to complete read transaction\n"); goto out_unlock;
dri-devel@lists.freedesktop.org
-
Dan Carpenter -
Daniel Vetter -
Eugeni Dodonov