usermode helper of ipvr drm driver. test tools: 1. test_ioctl: test kernel driver by directly ioctl 2. test_decode: test decode functionality by calling libdrm_ipvr

Signed-off-by: Yao Cheng yao.cheng@intel.com --- Makefile.am | 6 +- Makefile.sources | 1 + configure.ac | 26 +- include/drm/ipvr_drm.h | 268 ++ ipvr/Makefile.am | 58 + ipvr/Makefile.sources | 5 + ipvr/ipvr_bufmgr.h | 156 ++ ipvr/ipvr_bufmgr_gem.c | 1857 +++++++++++++ ipvr/libdrm_ipvr.pc.in | 11 + ipvr/test_decode.c | 6807 ++++++++++++++++++++++++++++++++++++++++++++++++ ipvr/test_ioctl.c | 323 +++ 11 files changed, 9516 insertions(+), 2 deletions(-) create mode 100644 include/drm/ipvr_drm.h create mode 100644 ipvr/Makefile.am create mode 100644 ipvr/Makefile.sources create mode 100644 ipvr/ipvr_bufmgr.h create mode 100644 ipvr/ipvr_bufmgr_gem.c create mode 100644 ipvr/libdrm_ipvr.pc.in create mode 100644 ipvr/test_decode.c create mode 100644 ipvr/test_ioctl.c

diff --git a/Makefile.am b/Makefile.am index 3952a88..2227add 100644 --- a/Makefile.am +++ b/Makefile.am @@ -33,6 +33,10 @@ if HAVE_INTEL INTEL_SUBDIR = intel endif

+if HAVE_IPVR +IPVR_SUBDIR = ipvr +endif + if HAVE_NOUVEAU NOUVEAU_SUBDIR = nouveau endif @@ -53,7 +57,7 @@ if HAVE_FREEDRENO FREEDRENO_SUBDIR = freedreno endif

-SUBDIRS = . $(LIBKMS_SUBDIR) $(INTEL_SUBDIR) $(NOUVEAU_SUBDIR) $(RADEON_SUBDIR) $(OMAP_SUBDIR) $(EXYNOS_SUBDIR) $(FREEDRENO_SUBDIR) tests man +SUBDIRS = . $(LIBKMS_SUBDIR) $(INTEL_SUBDIR) $(IPVR_SUBDIR) $(NOUVEAU_SUBDIR) $(RADEON_SUBDIR) $(OMAP_SUBDIR) $(EXYNOS_SUBDIR) $(FREEDRENO_SUBDIR) tests man

libdrm_la_LTLIBRARIES = libdrm.la libdrm_ladir = $(libdir) diff --git a/Makefile.sources b/Makefile.sources index d86fb2a..96f8c60 100644 --- a/Makefile.sources +++ b/Makefile.sources @@ -18,6 +18,7 @@ LIBDRM_INCLUDE_H_FILES := \ include/drm/drm_mode.h \ include/drm/drm_sarea.h \ include/drm/i915_drm.h \ + include/drm/ipvr_drm.h \ include/drm/mach64_drm.h \ include/drm/mga_drm.h \ include/drm/nouveau_drm.h \ diff --git a/configure.ac b/configure.ac index ee59b03..6dcf1b2 100644 --- a/configure.ac +++ b/configure.ac @@ -68,6 +68,11 @@ AC_ARG_ENABLE(intel, [Enable support for intel's KMS API (default: auto)]), [INTEL=$enableval], [INTEL=auto])

+AC_ARG_ENABLE(ipvr, + AS_HELP_STRING([--disable-ipvr], + [Enable support for baytrail's hardware VP8 decode (default: auto)]), + [IPVR=$enableval], [IPVR=auto]) + AC_ARG_ENABLE(radeon, AS_HELP_STRING([--disable-radeon], [Enable support for radeon's KMS API (default: auto)]), @@ -204,7 +209,7 @@ if test "x$drm_cv_atomic_primitives" = "xlibatomic-ops"; then AC_DEFINE(HAVE_LIB_ATOMIC_OPS, 1, [Enable if you have libatomic-ops-dev installed]) fi

-if test "x$INTEL" != "xno" -o "x$RADEON" != "xno" -o "x$NOUVEAU" != "xno"; then +if test "x$INTEL" != "xno" -o "x$IPVR" != "xno" -o "x$RADEON" != "xno" -o "x$NOUVEAU" != "xno"; then if test "x$drm_cv_atomic_primitives" = "xnone"; then if test "x$INTEL" != "xauto"; then if test "x$INTEL" != "xno"; then @@ -214,6 +219,14 @@ if test "x$INTEL" != "xno" -o "x$RADEON" != "xno" -o "x$NOUVEAU" != "xno"; then AC_MSG_WARN([Disabling libdrm_intel. It depends on atomic operations, which were not found for your compiler/cpu. Try compiling with -march=native, or install the libatomics-op-dev package.]) INTEL=no fi + if test "x$IPVR" != "xauto"; then + if test "x$IPVR" != "xno"; then + AC_MSG_ERROR([libdrm_ipvr depends upon atomic operations, which were not found for your compiler/cpu. Try compiling with -march=native, or install the libatomics-op-dev package, or, failing both of those, disable support for Baytrail VP8 by passing --disable-ipvr to ./configure]) + fi + else + AC_MSG_WARN([Disabling libdrm_ipvr. It depends on atomic operations, which were not found for your compiler/cpu. Try compiling with -march=native, or install the libatomics-op-dev package.]) + INTEL=no + fi if test "x$RADEON" != "xauto"; then if test "x$RADEON" != "xno"; then AC_MSG_ERROR([libdrm_radeon depends upon atomic operations, which were not found for your compiler/cpu. Try compiling with -march=native, or install the libatomics-op-dev package, or, failing both of those, disable support for Radeon GPUs by passing --disable-radeon to ./configure]) @@ -237,6 +250,9 @@ if test "x$INTEL" != "xno" -o "x$RADEON" != "xno" -o "x$NOUVEAU" != "xno"; then *) INTEL=no ;; esac fi + if test "x$IPVR" != "xno"; then + IPVR=yes + fi if test "x$RADEON" != "xno"; then RADEON=yes fi @@ -274,6 +290,11 @@ if test "x$INTEL" = xyes; then AC_DEFINE(HAVE_INTEL, 1, [Have intel support]) fi

+AM_CONDITIONAL(HAVE_IPVR, [test "x$IPVR" = xyes]) +if test "x$IPVR" = xyes; then + AC_DEFINE(HAVE_PVR, 1, [Have ipvr support]) +fi + AM_CONDITIONAL(HAVE_VMWGFX, [test "x$VMWGFX" = xyes]) if test "x$VMWGFX" = xyes; then AC_DEFINE(HAVE_VMWGFX, 1, [Have vmwgfx kernel headers]) @@ -393,6 +414,8 @@ AC_CONFIG_FILES([ libkms/libkms.pc intel/Makefile intel/libdrm_intel.pc + ipvr/Makefile + ipvr/libdrm_ipvr.pc radeon/Makefile radeon/libdrm_radeon.pc nouveau/Makefile @@ -419,6 +442,7 @@ echo "$PACKAGE_STRING will be compiled with:" echo "" echo " libkms $LIBKMS" echo " Intel API $INTEL" +echo " Ipvr API $IPVR" echo " vmwgfx API $VMWGFX" echo " Radeon API $RADEON" echo " Nouveau API $NOUVEAU" diff --git a/include/drm/ipvr_drm.h b/include/drm/ipvr_drm.h new file mode 100644 index 0000000..849ab2c --- /dev/null +++ b/include/drm/ipvr_drm.h @@ -0,0 +1,268 @@ +/************************************************************************** + * ipvr_drm.h: IPVR header file exported to user space + * + * Copyright (c) 2014 Intel Corporation, Hillsboro, OR, USA + * All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. + * + * Authors: + * Fei Jiang fei.jiang@intel.com + * Yao Cheng yao.cheng@intel.com + * + **************************************************************************/ + + +/* this file only define structs and macro which need export to user space */ +#ifndef _IPVR_DRM_H_ +#define _IPVR_DRM_H_ + +#include <drm/drm.h> +struct drm_ipvr_context_create { + /* passed ctx_info, including codec, profile info */ + uint32_t ctx_type; + /* returned back ctx_id */ + uint32_t ctx_id; + /* + * following tiling strides for VED are supported: + * stride 0: 512 for scheme 0, 1024 for scheme 1 + * stride 1: 1024 for scheme 0, 2048 for scheme 1 + * stride 2: 2048 for scheme 0, 4096 for scheme 1 + * stride 3: 4096 for scheme 0 + */ + uint32_t tiling_stride; + /* + * scheme 0: tile is 256x16, while minimal tile stride is 512 + * scheme 1: tile is 512x8, while minimal tile stride is 1024 + */ + uint32_t tiling_scheme; +}; + +struct drm_ipvr_context_destroy { + uint32_t ctx_id; + uint32_t pad64; +}; + +enum drm_ipvr_misc_key { + IPVR_DEVICE_INFO, + IPVR_UPDATE_TILING, + IPVR_SET_DISPLAYING_FRAME, + IPVR_GET_DISPLAYING_FRAME, + IPVR_QUERY_ENTRY +}; + +/* + * different context maybe has different tiling stride, + * then tiling info need be bound with ctx + */ +struct drm_ipvr_update_tiling { + uint32_t ctx_id; + uint32_t tiling_stride; + uint32_t tiling_scheme; + uint32_t pad64; +}; + +/* Ioctl to set/get misc params: + */ +struct drm_ipvr_misc { + uint64_t key; + uint64_t arg; /* argument pointer */ + uint64_t value; /* feed back pointer */ +}; + +struct ipvr_validate_arg { + /* point to next ipvr_validate_arg */ + uint64_t next; + uint64_t presumed_gpu_offset; + /* User's handle for a buffer */ + uint32_t handle; + uint32_t pad64; + /* fencing */ + uint32_t skip_fence; + int32_t fence_fd; +}; + +#define MAX_SLICES_PER_PICTURE 72 +struct drm_ipvr_mb_region { + uint32_t start; + uint32_t end; +}; + +struct drm_ipvr_decode_status { + uint32_t num_region; + struct drm_ipvr_mb_region mb_regions[MAX_SLICES_PER_PICTURE]; +}; + +struct drm_ipvr_gem_execbuffer { + /* + * List of ipvr_validate_arg structs + */ + uint64_t buffer_list; + uint32_t buffer_count; + + /* from user space point, this is msg buffer actually */ + uint32_t cmdbuf_handle; + uint32_t cmdbuf_size; + + uint32_t ctx_id; +}; + +enum ipvr_cache_level { + IPVR_CACHE_NONE = 0, /* uncacheable */ + IPVR_CACHE_WB, /* write back cacheable */ + IPVR_CACHE_WC, /* write combine, uncacheable */ + IPVR_CACHE_MAX, +}; + +struct drm_ipvr_gem_create { + /* + * Requested size for the object. + * The (page-aligned) allocated size for the object will be returned. + */ + uint64_t size; + uint64_t rounded_size; + uint64_t gpu_offset; + /* + * Returned handle for the object. + * Object handles are nonzero. + */ + uint32_t handle; + uint32_t tiling; + uint32_t cache_level; + uint32_t pad64; +}; + +struct drm_ipvr_gem_busy { + /* Handle of the buffer to check for busy */ + uint32_t handle; + + /* + * Return busy status (1 if busy, 0 if idle). + * The high word is used to indicate on which rings the object + * currently resides: + * 16:31 - busy (r or r/w) rings (16 render, 17 bsd, 18 blt, etc) + */ + uint32_t busy; +}; + +struct drm_ipvr_gem_mmap { + /* Handle for the object being mapped. */ + uint32_t handle; + uint32_t pad64; + /** Offset in the object to map. */ + uint64_t offset; + /* + * Length of data to map. + * The value will be page-aligned. + */ + uint64_t size; + /* + * Returned pointer the data was mapped at. + * This is a fixed-size type for 32/64 compatibility. + */ + uint64_t addr_ptr; +}; + +/* + * ACCESS mode flags for SYNCCPU. + * + * IPVR_SYNCCPU_MODE_READ will guarantee that the GPU is not + * writing to the buffer. + * + * IPVR_SYNCCPU_MODE_WRITE will guarantee that the GPU is not + * accessing the buffer. + * + * IPVR_SYNCCPU_MODE_NO_BLOCK makes sure the call does not wait + * for GPU accesses to finish but return -EBUSY. + * + * IPVR_SYNCCPU_MODE_TRYCACHED Try to place the buffer in cacheable + * memory while synchronized for CPU. + * + * fei todo: sync cpu mode is not used + */ + +#define IPVR_SYNCCPU_MODE_READ (1 << 0) +#define IPVR_SYNCCPU_MODE_WRITE (1 << 1) +#define IPVR_SYNCCPU_MODE_NO_BLOCK (1 << 2) +#define IPVR_SYNCCPU_MODE_TRYCACHED (1 << 3) + +struct drm_ipvr_sync_cpu { + /* Handle for the object */ + uint32_t handle; + uint32_t access_mode; + enum { + IPVR_SYNCCPU_OP_GRAB, + IPVR_SYNCCPU_OP_RELEASE + } op; + uint32_t pad64; +}; + +struct drm_ipvr_gem_wait { + /* Handle of BO we shall wait on */ + uint32_t handle; + uint32_t flags; + /* fei todo: seems we don't need send timeout or return it back */ + //__s64 timeout_ns; +}; + +struct drm_ipvr_gem_userptr { + uint64_t user_ptr; + uint64_t user_size; + uint64_t gpu_offset; + uint32_t cache_level; + uint32_t tiling; + /* + * Returned handle for the object. + * Object handles are nonzero. + */ + uint32_t handle; +}; + +/* + * IPVR GEM specific ioctls + * The device specific ioctl range is 0x50 to 0x5f. + */ +#define DRM_IPVR_CONTEXT_CREATE 0x00 +#define DRM_IPVR_CONTEXT_DESTROY 0x01 +#define DRM_IPVR_MISC 0x02 +#define DRM_IPVR_GEM_EXECBUFFER 0x03 +#define DRM_IPVR_GEM_BUSY 0x04 +#define DRM_IPVR_GEM_CREATE 0x05 +#define DRM_IPVR_GEM_MMAP 0x06 +#define DRM_IPVR_SYNC_CPU 0x07 +#define DRM_IPVR_GEM_WAIT 0x08 +#define DRM_IPVR_GEM_USERPTR 0x09 + +#define DRM_IOCTL_IPVR_CONTEXT_CREATE \ + DRM_IOWR(DRM_COMMAND_BASE + DRM_IPVR_CONTEXT_CREATE, struct drm_ipvr_context_create) +#define DRM_IOCTL_IPVR_CONTEXT_DESTROY \ + DRM_IOW(DRM_COMMAND_BASE + DRM_IPVR_CONTEXT_DESTROY, struct drm_ipvr_context_destroy) +#define DRM_IOCTL_IPVR_MISC \ + DRM_IOWR(DRM_COMMAND_BASE + DRM_IPVR_MISC, struct drm_ipvr_misc) +#define DRM_IOCTL_IPVR_GEM_EXECBUFFER \ + DRM_IOWR(DRM_COMMAND_BASE + DRM_IPVR_GEM_EXECBUFFER, struct drm_ipvr_gem_execbuffer) +#define DRM_IOCTL_IPVR_GEM_BUSY \ + DRM_IOWR(DRM_COMMAND_BASE + DRM_IPVR_GEM_BUSY, struct drm_ipvr_gem_busy) +#define DRM_IOCTL_IPVR_GEM_CREATE \ + DRM_IOWR(DRM_COMMAND_BASE + DRM_IPVR_GEM_CREATE, struct drm_ipvr_gem_create) +#define DRM_IOCTL_IPVR_GEM_MMAP \ + DRM_IOWR(DRM_COMMAND_BASE + DRM_IPVR_GEM_MMAP, struct drm_ipvr_gem_mmap) +#define DRM_IOCTL_IPVR_SYNC_CPU \ + DRM_IOW(DRM_COMMAND_BASE + DRM_IPVR_SYNC_CPU, struct drm_ipvr_sync_cpu) +#define DRM_IOCTL_IPVR_GEM_WAIT \ + DRM_IOWR(DRM_COMMAND_BASE + DRM_IPVR_GEM_WAIT, struct drm_ipvr_gem_wait) +#define DRM_IOCTL_IPVR_GEM_USERPTR \ + DRM_IOWR(DRM_COMMAND_BASE + DRM_IPVR_GEM_USERPTR, struct drm_ipvr_gem_userptr) + +#endif diff --git a/ipvr/Makefile.am b/ipvr/Makefile.am new file mode 100644 index 0000000..12219a8 --- /dev/null +++ b/ipvr/Makefile.am @@ -0,0 +1,58 @@ +# Copyright © 2014 Intel Corporation +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice (including the next +# paragraph) shall be included in all copies or substantial portions of the +# Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +# IN THE SOFTWARE. +# +# Authors: +# Yao Cheng yao.cheng@intel.com + +include Makefile.sources + +AM_CFLAGS = \ + $(WARN_CFLAGS) \ + $(VISIBILITY_CFLAGS) \ + -I$(top_srcdir) \ + -I$(top_srcdir)/ipvr \ + $(PTHREADSTUBS_CFLAGS) \ + $(PCIACCESS_CFLAGS) \ + $(VALGRIND_CFLAGS) \ + -I$(top_srcdir)/include/drm + +libdrm_ipvr_la_LTLIBRARIES = libdrm_ipvr.la +libdrm_ipvr_ladir = $(libdir) +libdrm_ipvr_la_LDFLAGS = -version-number 0:1:0 -no-undefined +libdrm_ipvr_la_LIBADD = ../libdrm.la \ + @PTHREADSTUBS_LIBS@ \ + @PCIACCESS_LIBS@ \ + @CLOCK_LIB@ + +libdrm_ipvr_la_SOURCES = $(LIBDRM_IPVR_FILES) + +ipvr_bufmgr_gem_o_CFLAGS = $(AM_CFLAGS) -c99 + +libdrm_ipvrincludedir = ${includedir}/libdrm +libdrm_ipvrinclude_HEADERS = $(LIBDRM_IPVR_H_FILES) + +# This may be interesting even outside of "make check", due to the -dump option. +noinst_PROGRAMS = test_decode test_ioctl + +test_decode_LDADD = libdrm_ipvr.la ../libdrm.la +test_ioctl_LDADD = libdrm_ipvr.la ../libdrm.la + +pkgconfig_DATA = libdrm_ipvr.pc diff --git a/ipvr/Makefile.sources b/ipvr/Makefile.sources new file mode 100644 index 0000000..5103a02 --- /dev/null +++ b/ipvr/Makefile.sources @@ -0,0 +1,5 @@ +LIBDRM_IPVR_FILES := \ + ipvr_bufmgr_gem.c + +LIBDRM_IPVR_H_FILES := \ + ipvr_bufmgr.h diff --git a/ipvr/ipvr_bufmgr.h b/ipvr/ipvr_bufmgr.h new file mode 100644 index 0000000..d3ece47 --- /dev/null +++ b/ipvr/ipvr_bufmgr.h @@ -0,0 +1,156 @@ +/* + * Copyright 2014 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Yao Cheng yao.cheng@intel.com + * + */ +#ifndef IPVR_BUFMGR_H +#define IPVR_BUFMGR_H +#include <stdio.h> +#include <stdint.h> +#include <stdio.h> + +typedef struct _drm_ipvr_bo drm_ipvr_bo; +typedef struct _drm_ipvr_bufmgr drm_ipvr_bufmgr; +typedef struct _drm_ipvr_context drm_ipvr_context; + +enum { + DRM_IPVR_UNCACHED = 0, + DRM_IPVR_WRITEBACK = 1, + DRM_IPVR_WRITECOMBINE = 2, +}; + +struct _drm_ipvr_bo { + /** + * Size in bytes of the buffer object. + * + * The size may be larger than the size originally requested for the + * allocation, such as being aligned to page size. + */ + unsigned long size; + + /** rounded up size of actual allocation */ + unsigned long alloc_size; + + /** GEM handle of the BO */ + unsigned int handle; + + /** + * several buffers may share one BO (camera/RAR), and use offset to distinguish it + */ + unsigned long buffer_ofs; + + /** + * Last seen card virtual address (offset from the beginning of the + * aperture) for the object. This should be used to fill relocation + * entries when calling drm_ipvr_gem_bo_emit_reloc() + */ + unsigned long offset; + + /** + * Virtual address for accessing the buffer data. Only valid while + * mapped. + */ + void *virt; + + /** + * Generic external buffer info e.g. gfx handle on Android + */ + unsigned long ext_handle; + + /** Indicates the BO can be re-used or not after being recycled */ + int reusable; + + /** Buffer manager context associated with this buffer object */ + drm_ipvr_bufmgr *bufmgr; +}; + +struct _drm_ipvr_bufmgr { + int debug; +}; + +struct _drm_ipvr_context +{ + uint32_t ctx_id; + uint32_t ctx_type; + drm_ipvr_bufmgr *bufmgr; +}; + +drm_ipvr_bufmgr * +drm_ipvr_gem_bufmgr_init(int fd, int batch_size); + +void drm_ipvr_gem_bufmgr_destroy(drm_ipvr_bufmgr *bufmgr); + +int drm_ipvr_gem_bufmgr_get_device_info(drm_ipvr_bufmgr *bufmgr, uint16_t *dev_id, uint16_t *caps); + +void drm_ipvr_gem_bufmgr_trace_all_bos(drm_ipvr_bufmgr *bufmgr); + + +drm_ipvr_bo * +drm_ipvr_gem_bo_alloc(drm_ipvr_bufmgr *bufmgr, drm_ipvr_context *ctx, + const char *name, size_t size, + uint8_t tiling, uint8_t cache_level, uint8_t reusable); + +drm_ipvr_bo * +drm_ipvr_gem_bo_alloc_vmap(drm_ipvr_bufmgr *bufmgr, drm_ipvr_context *ctx, + const char *name, void *addr, + uint8_t tiling, uint8_t cache_level, + uint32_t stride, size_t size); + +void drm_ipvr_gem_bo_reference(drm_ipvr_bo *bo); + +void drm_ipvr_gem_bo_unreference(drm_ipvr_bo *bo); + +int drm_ipvr_gem_bo_map(drm_ipvr_bo *bo, unsigned long offset, size_t size, int write_enable); + +int drm_ipvr_gem_bo_unmap(drm_ipvr_bo *bo); + +void drm_ipvr_gem_bo_wait(drm_ipvr_bo *bo); + +int drm_ipvr_gem_bo_emit_reloc(drm_ipvr_bo *bo, unsigned long offset, + drm_ipvr_bo *target_bo, unsigned long target_offset, uint32_t skip_fence); + +int drm_ipvr_gem_bo_exec(drm_ipvr_bo *bo, unsigned long offset, size_t len, + int fence_in, int *fence_out); + +drm_ipvr_bo * +drm_ipvr_gem_bo_create_from_name(drm_ipvr_bufmgr *bufmgr, drm_ipvr_context *ctx, + const char *name, uint32_t handle); + +int drm_ipvr_gem_bo_flink(drm_ipvr_bo *bo, uint32_t * name); + +int drm_ipvr_gem_bo_busy(drm_ipvr_bo *bo); + +int drm_ipvr_gem_bo_references(drm_ipvr_bo *bo, drm_ipvr_bo *target_bo); + +void drm_ipvr_gem_bo_remove_relocs(drm_ipvr_bo *bo, uint8_t recursive); + +int drm_ipvr_gem_bo_get_MB_error(drm_ipvr_bo *bo); + +drm_ipvr_context * +drm_ipvr_gem_context_create(drm_ipvr_bufmgr *bufmgr, uint32_t ctx_type, uint32_t tiling_stride, uint32_t tiling_mode); + +void +drm_ipvr_gem_context_destroy(drm_ipvr_context *ctx); + +#endif diff --git a/ipvr/ipvr_bufmgr_gem.c b/ipvr/ipvr_bufmgr_gem.c new file mode 100644 index 0000000..213f6de --- /dev/null +++ b/ipvr/ipvr_bufmgr_gem.c @@ -0,0 +1,1857 @@ +/************************************************************************** + * + * Copyright 2014 Intel Corporation + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * + **************************************************************************/ +/* + * Authors: Yao Cheng yao.cheng@intel.com + * + */ + +#include <assert.h> +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif +#include <xf86drm.h> +#include <xf86atomic.h> +#include <fcntl.h> +#include <inttypes.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <unistd.h> +#include <assert.h> +#include <pthread.h> +#include <sys/ioctl.h> +#include <sys/mman.h> +#include <sys/stat.h> +#include <sys/types.h> +#include <stdbool.h> +#include <sys/time.h> +#include "errno.h" +#include "libdrm.h" +#include "libdrm_lists.h" +#include "ipvr_bufmgr.h" +#include "string.h" +#include "ipvr_drm.h" +#ifdef ANDROID +#include <utils/Timers.h> +#endif + +static int debug_level = 3; + +typedef uint64_t nsecs_t; +#define VERB(fmt, ...) _DBGPRINT(0, fmt, ##__VA_ARGS__) +#define DBG(fmt, ...) _DBGPRINT(1, fmt, ##__VA_ARGS__) +#define INFO(fmt, ...) _DBGPRINT(2, fmt, ##__VA_ARGS__) +#define WARN(fmt, ...) _DBGPRINT(3, fmt, ##__VA_ARGS__) +#define ERR(fmt, ...) _DBGPRINT(4, fmt, ##__VA_ARGS__) +#define _DBGPRINT(level, fmt, ...) \ + do { \ + if (debug_level <= level) { \ + fprintf(stderr, fmt, ##__VA_ARGS__); \ + } \ + } while (false); + +#define MAX_SELECT_TIMEOUT (10 * 1000) // 10 msec for 1MB BO +#define COUNT_BEFORE_SELECT (5) + +#define IPVR_TIMEOUT_USEC 990000LL + +typedef struct _drm_ipvr_bo_gem drm_ipvr_bo_gem; + +typedef struct _drm_ipvr_reloc_target { + drm_ipvr_bo *bo; + int skip_fence; +} drm_ipvr_reloc_target; + +typedef struct _drm_ipvr_reloc_entry { + /** + * Handle of the buffer being pointed to by this relocation entry. + * + * It's appealing to make this be an index into the mm_validate_entry + * list to refer to the buffer, but this allows the driver to create + * a relocation list for state buffers and not re-write it per + * exec using the buffer. + */ + uint32_t target_handle; + + /** + * Value to be added to the offset of the target buffer to make up + * the relocation entry. + */ + uint32_t delta; + + /** Offset in the buffer the relocation entry will be written into */ + uint64_t offset; + + /** + * Offset value of the target buffer that the relocation entry was last + * written as. + * + * If the buffer has the same offset as last time, we can skip syncing + * and writing the relocation. This value is written back out by + * the execbuffer ioctl when the relocation is written. + */ + uint64_t presumed_mmu_offset; +}drm_ipvr_reloc_entry; + +struct drm_ipvr_exec_object { + /** + * User's handle for a buffer to be bound into the GTT for this + * operation. + */ + uint32_t handle; + + /** Number of relocations to be performed on this buffer */ + uint32_t relocation_count; + /** + * Pointer to array of struct drm_i915_gem_relocation_entry containing + * the relocations to be performed in this buffer. + */ + uint64_t relocs_ptr; + + /** Required alignment in graphics aperture */ + uint64_t alignment; + + /** + * Returned value of the updated offset of the object, for future + * presumed_offset writes. + */ + uint64_t offset; +}; + +typedef struct _drm_ipvr_bo_trace +{ + drm_ipvr_bo *bo; + struct _drm_ipvr_bo_trace *next; +} drm_ipvr_bo_trace; + +struct drm_ipvr_cache_bucket { + unsigned long size; + drmMMListHead free_head; + size_t free_count; + size_t limit; + + /* usr fence structures */ + drmMMListHead busy_head; + size_t busy_count; + fd_set fdset; + int maxfd; + + /* statistics for BO alloc/cache */ + int stat_allocs; + int stat_hits_direct; + int stat_hits_after_select; + int stat_hits_after_wait; + int stat_misses_empty; + int stat_misses_seqno; + int stat_misses_cache; +}; + +struct drm_ipvr_usrfence { + drmMMListHead head; + int fd; +}; + +typedef struct _drm_ipvr_bufmgr_gem +{ + drm_ipvr_bufmgr base; + int fd; + pthread_mutex_t lock; + pthread_mutex_t list_lock; + + struct ipvr_validate_arg *val_args; + drm_ipvr_bo **exec_bos; + int exec_size; + int exec_count; + time_t time; + int max_relocs; + + /* debug usage: track all alive bo */ + drm_ipvr_bo_trace *bo_trace_head; + drm_ipvr_bo_trace *bo_trace_tail; + + /* cache bucket of power-of-two */ + int cache_bucket_size; + + /* only cache linear BOs */ + struct drm_ipvr_cache_bucket *cache_buckets; + + /* seqno used to check BO's last operation oldness */ + int exec_seq; + + /* functionality config */ + int usr_fence_enabled; +} drm_ipvr_bufmgr_gem; + +typedef struct _drm_ipvr_bo_gem +{ + drm_ipvr_bo base; + const char *name; + /** + * Kenel-assigned global name for this object + */ + unsigned int global_name; + atomic_t refcount; + uint32_t tiling; + uint32_t caching; + unsigned long stride; + atomic_t mapcount; + drm_ipvr_reloc_entry *relocs; + /** + * Array of info structs corresponding to relocs[i].target_handle etc + */ + drm_ipvr_reloc_target *reloc_target_info; + /** Number of entries in relocs */ + int reloc_count; + /** + * Index of the buffer within the validation list while preparing a + * batchbuffer execution. + */ + int validate_index; + /** + * Boolean of whether this buffer has been used as a relocation + * target and had its size accounted for, and thus can't have any + * further relocations added to it. + */ + bool used_as_reloc_target; + bool is_vmap; + void *user_virt; + + /** BO cache list */ + drmMMListHead cache_head; + + drm_ipvr_context *ctx; + int exec_seq; + + /** usr fence */ + drmMMListHead fence_head; + struct drm_ipvr_usrfence *usrfence; + struct drm_ipvr_cache_bucket *bucket; +} drm_ipvr_bo_gem; + +static nsecs_t get_time_ns(void) +{ +#ifdef ANDROID + return systemTime(SYSTEM_TIME_MONOTONIC); +#else + struct timeval tv; + gettimeofday(&tv, NULL); + return tv.tv_sec * 1000000000LL + tv.tv_usec * 1000LL; +#endif +} + +static void +drm__ipvr_bucket_add_fence_fd(struct drm_ipvr_cache_bucket *bucket, + struct drm_ipvr_usrfence *fence) +{ + FD_SET(fence->fd, &bucket->fdset); + if (bucket->maxfd < fence->fd) + bucket->maxfd = fence->fd; + DBG("set bucket [%lu] fd_set for fence FD %d\n", bucket->size, fence->fd); +} + +static void +drm__ipvr_bucket_remove_fence_fd(struct drm_ipvr_cache_bucket *bucket, + struct drm_ipvr_usrfence *fence) +{ + FD_CLR(fence->fd, &bucket->fdset); + DBG("clear bucket [%lu B] fd_set for fence FD %d]\n", bucket->size, fence->fd); +} + +static struct drm_ipvr_usrfence * +drm__ipvr_usrfence_create(int fd) +{ + struct drm_ipvr_usrfence *fence = calloc(1, sizeof(struct drm_ipvr_usrfence)); + assert(fd >= 0); + if (!fence) + return NULL; + DRMINITLISTHEAD(&fence->head); + fence->fd = fd; + return fence; +} + +static void +drm__ipvr_usrfence_add_bo(struct drm_ipvr_usrfence *fence, drm_ipvr_bo *bo) +{ + drm_ipvr_bo_gem *bo_gem = (drm_ipvr_bo_gem*)bo; + if (bo_gem->usrfence) { + struct drm_ipvr_usrfence *old_fence = bo_gem->usrfence; + assert(fence != old_fence); + WARN("YAO fencing %d a BO that is already fenced by %d\n", fence->fd, old_fence->fd); + DRMLISTDELINIT(&bo_gem->fence_head); + if (DRMLISTEMPTY(&old_fence->head)) { + if (old_fence->fd >= 0) { + DBG("%s closing FD %d\n", __FUNCTION__, old_fence->fd); + close(old_fence->fd); + } + old_fence->fd = -1; + free(old_fence); + } + bo_gem->usrfence = NULL; + } + DRMLISTADDTAIL(&bo_gem->fence_head, &fence->head); + bo_gem->usrfence = fence; + if (bo_gem->bucket) { + drm__ipvr_bucket_add_fence_fd(bo_gem->bucket, fence); + } +} + +static void +drm__ipvr_usrfence_destroy(struct drm_ipvr_usrfence *fence, bool update_buckets) +{ + drm_ipvr_bo_gem *bo_gem; + struct _drmMMListHead *entry; + struct _drmMMListHead *temp; + int bo_count = 0; + struct drm_ipvr_cache_bucket *bucket; + DRMLISTFOREACHSAFE(entry, temp, &fence->head) { + bo_gem = DRMLISTENTRY(drm_ipvr_bo_gem, + entry, fence_head); + bucket = bo_gem->bucket; + DRMLISTDELINIT(&bo_gem->fence_head); + bo_count ++; + if (bucket) { + drm__ipvr_bucket_remove_fence_fd(bucket, fence); + if (update_buckets) { + DRMLISTDELINIT(&bo_gem->cache_head); + bucket->busy_count--; + DRMLISTADDTAIL(&bo_gem->cache_head, &bucket->free_head); + bucket->free_count++; + } + } + bo_gem->usrfence = NULL; + } + if (fence->fd >= 0) { + DBG("%s closing FD %d\n", __FUNCTION__, fence->fd); + close(fence->fd); + } + + DBG("destroyed fence FD %d, removed %d BOs from it\n", fence->fd, bo_count); + fence->fd = -1; + free(fence); +} + +static struct drm_ipvr_cache_bucket * +drm__ipvr_cache_bucket_for_size(drm_ipvr_bufmgr *bufmgr, + size_t size, uint8_t tiling) +{ + int i; + drm_ipvr_bufmgr_gem *bufmgr_gem = (drm_ipvr_bufmgr_gem*)bufmgr; + + assert(tiling == 0); + for (i = 0; i < bufmgr_gem->cache_bucket_size; i++) { + struct drm_ipvr_cache_bucket *bucket = + &bufmgr_gem->cache_buckets[i]; + if (bucket->size >= size) { + return bucket; + } + } + return NULL; +} + +drm_public void +drm_ipvr_gem_bufmgr_trace_all_bos(drm_ipvr_bufmgr *bufmgr) +{ + static char tmp[512]; + drm_ipvr_bufmgr_gem *bufmgr_gem = (drm_ipvr_bufmgr_gem*)bufmgr; + drm_ipvr_bo_trace *track = bufmgr_gem->bo_trace_head; + int counter = 0; + drm_ipvr_bo_gem *bo_gem; + VERB("dumping IPVR GEM bo track for bufmgr %p\n", bufmgr); + while (track) { + memset(tmp, 0, 512); + bo_gem = (drm_ipvr_bo_gem*)track->bo; + snprintf(tmp, 512, " [%d]: "%s" hnd %x off 0x%lx, ref %d, map %d, " + "size %lu (%lu), tiling %u, caching %u, stride %lu, reloc %u, vmap %d\n", + counter++, bo_gem->name, bo_gem->base.handle, bo_gem->base.offset, + atomic_read(&bo_gem->refcount), atomic_read(&bo_gem->mapcount), + bo_gem->base.size, bo_gem->base.alloc_size, bo_gem->tiling, + bo_gem->caching, bo_gem->stride, bo_gem->reloc_count, + bo_gem->is_vmap); + VERB("%s\n", tmp); + track = track->next; + } +} + +static int +drm__ipvr_bo_synccpu_grab(drm_ipvr_bo *bo) +{ + drm_ipvr_bufmgr_gem *bufmgr_gem = (drm_ipvr_bufmgr_gem *)bo->bufmgr; + struct drm_ipvr_sync_cpu arg; + + /* Cause a flush to happen if the buffer's pinned for + * scanout, so the results show up in a timely manner. + * Unlike GTT set domains, this only does work if the + * buffer should be scanout-related. + */ + arg.handle = bo->handle; + arg.op = IPVR_SYNCCPU_OP_GRAB; + + return drmCommandWrite(bufmgr_gem->fd, + DRM_IPVR_SYNC_CPU, + &arg, sizeof(arg)); +} + +static int +drm__ipvr_bo_synccpu_release(drm_ipvr_bo *bo) +{ + drm_ipvr_bufmgr_gem *bufmgr_gem = (drm_ipvr_bufmgr_gem *)bo->bufmgr; + struct drm_ipvr_sync_cpu arg; + + /* Cause a flush to happen if the buffer's pinned for + * scanout, so the results show up in a timely manner. + * Unlike GTT set domains, this only does work if the + * buffer should be scanout-related. + */ + arg.handle = bo->handle; + arg.op = IPVR_SYNCCPU_OP_RELEASE; + + return drmCommandWrite(bufmgr_gem->fd, + DRM_IPVR_SYNC_CPU, + &arg, sizeof(arg)); +} + +static int +drm__ipvr_gem_bo_free(drm_ipvr_bo *bo) +{ + drm_ipvr_bufmgr_gem *bufmgr_gem = (drm_ipvr_bufmgr_gem*) bo->bufmgr; + drm_ipvr_bo_gem *bo_gem = (drm_ipvr_bo_gem *) bo; + struct drm_gem_close arg; + drm_ipvr_bo_trace *tmp; + drm_ipvr_bo_trace *track; + int ret; + bool fence_destroyed = false; + + /* Close this object */ + arg.handle = bo->handle; + + ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_GEM_CLOSE, &arg); + if (ret != 0) { + ERR("%s: DRM_IOCTL_GEM_CLOSE "%s" handle 0x%x offset 0x%lx failed: %s\n", + __FUNCTION__, bo_gem->name, + bo->handle, bo->offset, strerror(errno)); + } + + assert(bufmgr_gem->bo_trace_head && bufmgr_gem->bo_trace_tail); + track = bufmgr_gem->bo_trace_head; + if (track->bo == bo) { + /* advance head */ + bufmgr_gem->bo_trace_head = track->next; + free(track); + } + else { + while (track) { + if (track->next && track->next->bo == bo) { + break; + } + track = track->next; + } + assert(track->next->bo == bo); + if (track->next == bufmgr_gem->bo_trace_tail) { + bufmgr_gem->bo_trace_tail = track; + } + tmp = track->next; + track->next = tmp->next; + free(tmp); + } + + if (bo_gem->relocs) + free(bo_gem->relocs); + if (bo_gem->reloc_target_info) + free(bo_gem->reloc_target_info); + + if (bufmgr_gem->usr_fence_enabled && bo_gem->usrfence) { + DRMLISTDELINIT(&bo_gem->fence_head); + if (DRMLISTEMPTY(&bo_gem->usrfence->head)) { + /* no need to worry about other BOs since this is the last one holding the fence */ + /* now no one cares about the fence any more*/ + DBG("%s closing FD %d\n", __FUNCTION__, bo_gem->usrfence->fd); + close(bo_gem->usrfence->fd); + bo_gem->usrfence->fd = -1; + free(bo_gem->usrfence); + fence_destroyed = true; + } + bo_gem->usrfence = NULL; + } + + DBG("%s: freed buf khandle "%s" hnd %x, offset 0x%lx, %s\n", + __FUNCTION__, bo_gem->name, bo->handle, bo->offset, + (fence_destroyed? "fence is destroyed": "no fence to destroy")); + + memset(bo_gem, 0, sizeof(*bo_gem)); + free(bo_gem); + return 0; +} + +drm_public int +drm_ipvr_gem_bo_map(drm_ipvr_bo *bo, unsigned long offset, size_t size, int write_enable); +drm_public int +drm_ipvr_gem_bo_unmap(drm_ipvr_bo *bo); + +drm_public drm_ipvr_bo * +drm_ipvr_gem_bo_alloc(drm_ipvr_bufmgr *bufmgr, drm_ipvr_context *ctx, + const char *name, size_t size, + uint8_t tiling, uint8_t cache_level, uint8_t reusable) +{ + drm_ipvr_bufmgr_gem *bufmgr_gem = (drm_ipvr_bufmgr_gem*) bufmgr; + drm_ipvr_bo_gem *allocated_bo_gem = NULL; + int ret; + drm_ipvr_bo_gem *bo_gem; + struct drm_ipvr_gem_create arg; + bool alloc_from_cache = false; + size_t alloc_size = size; + struct timeval timeout; + struct drm_ipvr_cache_bucket *bucket = NULL; + int awaken_fds = -1; + int fences_destroyed = 0; + int bo_movings = 0; + int fast_path_try = 0; + int slow_path_try = 0; + int max_retry = 2; + int bucket_free_before, bucket_busy_before, bucket_free_after, bucket_busy_after; + nsecs_t begin_ns, end_ns; + nsecs_t time_select, time_wait, time_bo_moving, time_fence_destroy, time_kernel_alloc; + struct _drmMMListHead *entry; + struct _drmMMListHead *temp; + bool force_wait_or_alloc = false; + bool has_destroyed_fence = false; + drm_ipvr_bo_gem *first_busy; + fd_set tmpset; + nsecs_t now; + time_select = time_wait = time_bo_moving = time_fence_destroy = time_kernel_alloc = 0; + bucket_free_before = bucket_busy_before = bucket_free_after = bucket_busy_after = 0; + + begin_ns = get_time_ns(); + if (reusable) + bucket = drm__ipvr_cache_bucket_for_size(&bufmgr_gem->base, size, tiling); + + if (reusable && !bucket) { + reusable = false; + WARN("%s size %zu cannot fit into any cache bucket, set as non-reusable\n", + __FUNCTION__, size); + } + if (reusable && bucket) { + /** + * only expand size when it's reusable + */ + alloc_size = bucket->size; + bucket->stat_allocs ++; + } + + if (!bufmgr_gem->usr_fence_enabled) { + if (reusable && bucket && !DRMLISTEMPTY(&bucket->free_head)) { + VERB("%s searching cached BOs in fast mode: free_list\n", __FUNCTION__); + now = get_time_ns(); + pthread_mutex_lock(&bufmgr_gem->list_lock); + allocated_bo_gem = DRMLISTENTRY(drm_ipvr_bo_gem, + bucket->free_head.next, cache_head); + drm_ipvr_gem_bo_wait(&allocated_bo_gem->base); + DRMLISTDELINIT(&allocated_bo_gem->cache_head); + bucket->free_count--; + pthread_mutex_unlock(&bufmgr_gem->list_lock); + alloc_from_cache = true; + time_wait += get_time_ns() - now; + VERB("%s got free BO from cache\n", __FUNCTION__); + } + else { + VERB("%s empty free_list, alloc_from kernel\n", __FUNCTION__); + alloc_from_cache = false; + } + } + + + if (bufmgr_gem->usr_fence_enabled) { + if (bucket) { + bucket_free_before = bucket->free_count; + bucket_busy_before = bucket->busy_count; + } + if (reusable && bucket && (bucket->free_count + bucket->busy_count == 0)) { + bucket->stat_misses_empty++; + alloc_from_cache = false; + goto alloc; + } +retry: + if (reusable && bucket && !DRMLISTEMPTY(&bucket->free_head)) { + fast_path_try++; + VERB("%s searching cached BOs in fast mode: free_list\n", __FUNCTION__); + DRMLISTFOREACHSAFE(entry, temp, &bucket->free_head) + { + drm_ipvr_bo_gem *b = DRMLISTENTRY(drm_ipvr_bo_gem, + entry, cache_head); + if (b->caching != cache_level) + continue; + allocated_bo_gem = b; + pthread_mutex_lock(&bufmgr_gem->list_lock); + DRMLISTDELINIT(&allocated_bo_gem->cache_head); + bucket->free_count--; + alloc_from_cache = true; + allocated_bo_gem->bucket = NULL; + VERB("%s got ready BO from free_list\n", __FUNCTION__); + pthread_mutex_unlock(&bufmgr_gem->list_lock); + if (max_retry == 2) + bucket->stat_hits_direct++; + goto alloc; + } + if (max_retry == 1) { + bucket->stat_misses_cache ++; + } + } + assert(!allocated_bo_gem); + if (--max_retry == 0) { + VERB("%s no more remaining retry. go alloc from kernel\n", __FUNCTION__); + alloc_from_cache = false; + goto alloc; + } + + /* enter slow searching path */ + if (reusable && bucket && !DRMLISTEMPTY(&bucket->busy_head)) { + slow_path_try++; + /* check the last BO in the list seq */ + VERB("%s searching cached BOs in slow mode: busy_list\n", __FUNCTION__); + FD_ZERO(&tmpset); + force_wait_or_alloc = false; + has_destroyed_fence = false; + /* check the first busy BO, if it's too old or not */ + first_busy = DRMLISTENTRY(drm_ipvr_bo_gem, + bucket->busy_head.next, cache_head); + /* todo: replace seq check with time check */ + /** + * check first busy is old enough or not. + * if either of following condition met, goto force_wait/force_alloc logic + * 1. first busy is not old enough + * 2. first busy is old enough, but select() returned 0 free BOs. + * if neither of them met, destroy the fences and move busy BOs to free list, + * then retry getting from free_list. + */ + if (first_busy->exec_seq + COUNT_BEFORE_SELECT >= bufmgr_gem->exec_seq) { + if (bucket->busy_count + bucket->free_count < bucket->limit) { + bucket->stat_misses_seqno ++; + } else { + bucket->stat_hits_after_wait ++; + } + force_wait_or_alloc = true; + } + else { + VERB("%s first_busy is old enough, try wait busy_list for READY ones\n", + __FUNCTION__); + now = get_time_ns(); + tmpset = bucket->fdset; + timeout.tv_sec = 0; + timeout.tv_usec = MAX_SELECT_TIMEOUT * (bucket->busy_count + bucket->free_count) / bucket->limit * alloc_size / 1024 / 1024; + awaken_fds = select(bucket->maxfd + 1, &tmpset, NULL, NULL, &timeout); + time_select += get_time_ns() - now; + /* retry with infinite wait if cache count reaches limit */ + VERB("%s select returns %d FDs ready\n", __FUNCTION__, awaken_fds); + + if (awaken_fds <= 0) { + force_wait_or_alloc = true; + bucket->stat_hits_after_wait ++; + } + else { + bucket->stat_hits_after_select ++; + } + } + if (force_wait_or_alloc) { + if (bucket->busy_count + bucket->free_count >= bucket->limit) { + /* force wait */ + now = get_time_ns(); + drm_ipvr_gem_bo_wait(&first_busy->base); + first_busy->usrfence = NULL; + fences_destroyed ++; + time_wait += get_time_ns() - now; + goto buckets_walk; + } + else { + alloc_from_cache = false; + goto alloc; + } + } + /** + * if we comes here, it means we got free BOs via select() or wait(). + * that means either fence destroyed or we need manually destroy it + */ +buckets_walk: + has_destroyed_fence = false; + DRMLISTFOREACHSAFE(entry, temp, &bucket->busy_head) + { + bo_gem = DRMLISTENTRY(drm_ipvr_bo_gem, + entry, cache_head); + if (!bo_gem->usrfence) { // move READY BOs to free_list + now = get_time_ns(); + pthread_mutex_lock(&bufmgr_gem->list_lock); + DRMLISTDELINIT(&bo_gem->cache_head); + bucket->busy_count--; + DRMLISTADDTAIL(&bo_gem->cache_head, &bucket->free_head); + bucket->free_count++; + pthread_mutex_unlock(&bufmgr_gem->list_lock); + time_bo_moving += get_time_ns() - now; + } + else if (FD_ISSET(bo_gem->usrfence->fd, &tmpset)) { + now = get_time_ns(); + drm__ipvr_usrfence_destroy(bo_gem->usrfence, false); + has_destroyed_fence = true; + fences_destroyed ++; + time_fence_destroy += get_time_ns() - now; + bo_gem->usrfence = NULL; + } + } + if (has_destroyed_fence) { + VERB("%s: has destroyed fence during cache walk, retry updating buckets\n", + __FUNCTION__); + goto buckets_walk; + } + else { + VERB("%s: bucket updating finished, go retry getting from free_list\n", + __FUNCTION__); + goto retry; + } + } + } +alloc: + if (!alloc_from_cache) { + allocated_bo_gem = calloc(1, sizeof(*allocated_bo_gem)); + if (!allocated_bo_gem) { + ERR("%s: calloc failed: %s\n", __FUNCTION__, strerror(errno)); + return NULL; + } + + if (reusable) + arg.size = alloc_size; + else + arg.size = size; + arg.tiling = tiling; + arg.cache_level = cache_level; + + now = get_time_ns(); + ret = drmCommandWriteRead(bufmgr_gem->fd, + DRM_IPVR_GEM_CREATE, + &arg, sizeof(arg)); + + if (ret != 0) { + ERR("%s: IOCTL GEM_CREATE failed: %d\n", + __FUNCTION__, ret); + free(allocated_bo_gem); + allocated_bo_gem = NULL; + return NULL; + } + time_kernel_alloc = get_time_ns() - now; + + allocated_bo_gem->base.bufmgr = bufmgr; + allocated_bo_gem->base.handle = arg.handle; + allocated_bo_gem->tiling = arg.tiling; + allocated_bo_gem->caching = arg.cache_level; + allocated_bo_gem->stride = 0; /* FIXME: does ipvr_drv_video maintain stride/sliceHeight itself? */ + allocated_bo_gem->base.offset = arg.gpu_offset; + allocated_bo_gem->base.alloc_size = arg.rounded_size; + allocated_bo_gem->base.size = size; + allocated_bo_gem->name = name; + allocated_bo_gem->base.virt = NULL; + atomic_set(&allocated_bo_gem->mapcount, 0); + + allocated_bo_gem->bucket = NULL; + + /* track created bo */ + if (bufmgr_gem->bo_trace_tail == NULL) { + assert(bufmgr_gem->bo_trace_head == NULL); + bufmgr_gem->bo_trace_head = calloc(1, sizeof(drm_ipvr_bo_trace)); + bufmgr_gem->bo_trace_head->next = NULL; + bufmgr_gem->bo_trace_tail = bufmgr_gem->bo_trace_head; + bufmgr_gem->bo_trace_tail->bo = &allocated_bo_gem->base; + } + else { + drm_ipvr_bo_trace *track = calloc(1, sizeof(drm_ipvr_bo_trace)); + track->bo = &allocated_bo_gem->base; + track->next = NULL; + bufmgr_gem->bo_trace_tail->next = track; + bufmgr_gem->bo_trace_tail = track; + } + + DBG("%s: allocated buf handle 0x%x from kernel, " + "offset 0x%lx, name "%s" size %lu (%lu), tiling %u, cache_level %u, bufmgr %p\n", + __FUNCTION__, + allocated_bo_gem->base.handle, allocated_bo_gem->base.offset, allocated_bo_gem->name, + allocated_bo_gem->base.size, allocated_bo_gem->base.alloc_size, allocated_bo_gem->tiling, allocated_bo_gem->caching, bufmgr); + } + else { + assert(allocated_bo_gem); + DBG("%s: allocated buf handle 0x%x from userspace cache, " + "offset 0x%lx, name "%s" size %lu (%lu), tiling %u, cache_level %u, bufmgr %p\n", + __FUNCTION__, + allocated_bo_gem->base.handle, allocated_bo_gem->base.offset, allocated_bo_gem->name, + allocated_bo_gem->base.size, allocated_bo_gem->base.alloc_size, allocated_bo_gem->tiling, allocated_bo_gem->caching, bufmgr); + } + + allocated_bo_gem->name = name; + allocated_bo_gem->base.size = size; + allocated_bo_gem->validate_index = -1; + allocated_bo_gem->ctx = ctx; + allocated_bo_gem->is_vmap = false; + allocated_bo_gem->user_virt = NULL; + allocated_bo_gem->base.reusable = reusable; + allocated_bo_gem->exec_seq = -1; + + assert(!allocated_bo_gem->bucket); + assert(!allocated_bo_gem->usrfence); + + atomic_set(&allocated_bo_gem->refcount, 1); + end_ns = get_time_ns(); + if (bucket) { + bucket_free_after = bucket->free_count; + bucket_busy_after = bucket->busy_count; + } + assert(atomic_read(&allocated_bo_gem->mapcount) == 0); + assert(allocated_bo_gem->usrfence == NULL); + + if (end_ns - begin_ns > 2 * 1000 * 1000) { + WARN("%s got from %s: "%s" hnd %u offset 0x%lx size %lu took %.2f ms, " + "(select %.2f, %d awaken, " + "wait %.2f, fence_destroying %.2f (%d), " + "bo_moving %.2f, kernel_alloc %.2f), " + "bucket (%d+%d/%zu)=>(%d+%d/%zu)\n", + __FUNCTION__, (alloc_from_cache? "CACHE": "KERNEL"), + allocated_bo_gem->name, allocated_bo_gem->base.handle, allocated_bo_gem->base.offset, + allocated_bo_gem->base.alloc_size, (end_ns - begin_ns)/1000000.0, + time_select/1000000.0, awaken_fds, + time_wait/1000000.0, time_fence_destroy/1000000.0, fences_destroyed, + bo_movings/1000000.0, time_kernel_alloc/1000000.0, + bucket_free_before, bucket_busy_before, (bucket? bucket->limit: 0), + bucket_free_after, bucket_busy_after, (bucket? bucket->limit: 0)); + } + return &allocated_bo_gem->base; +} + +drm_public drm_ipvr_bo * +drm_ipvr_gem_bo_alloc_vmap(drm_ipvr_bufmgr *bufmgr, drm_ipvr_context *ctx, + const char *name, void *addr, + uint8_t tiling, uint8_t cache_level, + uint32_t stride, size_t size) +{ + drm_ipvr_bufmgr_gem *bufmgr_gem = (drm_ipvr_bufmgr_gem*) bufmgr; + drm_ipvr_bo_gem *bo_gem; + struct drm_ipvr_gem_userptr arg; + int ret; + nsecs_t begin_ns = get_time_ns(); + nsecs_t end_ns; + + DBG("vmap enter\n"); + bo_gem = calloc(1, sizeof(*bo_gem)); + if (!bo_gem) { + ERR("%s: calloc failed: %s\n", __FUNCTION__, strerror(errno)); + return NULL; + } + + arg.user_ptr = (unsigned long)addr; + arg.user_size = size; + arg.tiling = tiling; + arg.cache_level = cache_level; + + ret = drmCommandWriteRead(bufmgr_gem->fd, + DRM_IPVR_GEM_USERPTR, + &arg, sizeof(arg)); + + if (ret != 0) { + ERR("%s: IOCTL GEM_CREATE failed: %d\n", + __FUNCTION__, ret); + free(bo_gem); + bo_gem = NULL; + return NULL; + } + + bo_gem->base.bufmgr = bufmgr; + bo_gem->base.handle = arg.handle; + bo_gem->tiling = arg.tiling; + bo_gem->caching = arg.cache_level; + bo_gem->stride = stride; /* FIXME: does ipvr_drv_video maintain stride/sliceHeight itself? */ + bo_gem->base.offset = arg.gpu_offset; + bo_gem->base.alloc_size = size; + bo_gem->user_virt = addr; + /* track created bo */ + if (bufmgr_gem->bo_trace_tail == NULL) { + assert(bufmgr_gem->bo_trace_head == NULL); + bufmgr_gem->bo_trace_head = calloc(1, sizeof(drm_ipvr_bo_trace)); + bufmgr_gem->bo_trace_head->next = NULL; + bufmgr_gem->bo_trace_tail = bufmgr_gem->bo_trace_head; + bufmgr_gem->bo_trace_tail->bo = &bo_gem->base; + } + else { + drm_ipvr_bo_trace *track = calloc(1, sizeof(drm_ipvr_bo_trace)); + track->bo = &bo_gem->base; + track->next = NULL; + bufmgr_gem->bo_trace_tail->next = track; + bufmgr_gem->bo_trace_tail = track; + } + + DBG("%s: vmapped buf handle 0x%x (vaddr %p) from kernel, " + "offset 0x%lx, name "%s" size %lu (%lu), tiling %u, cache_level %u, bufmgr %p\n", + __FUNCTION__, + bo_gem->base.handle, addr, bo_gem->base.offset, bo_gem->name, + bo_gem->base.size, bo_gem->base.alloc_size, bo_gem->tiling, bo_gem->caching, bufmgr); + + bo_gem->name = name; + bo_gem->base.size = size; + bo_gem->validate_index = -1; + bo_gem->ctx = ctx; + bo_gem->is_vmap = true; + bo_gem->exec_seq = -1; + atomic_set(&bo_gem->refcount, 1); + atomic_set(&bo_gem->mapcount, 0); + + bo_gem->bucket = NULL; + bo_gem->usrfence = NULL; + + end_ns = get_time_ns(); + if (end_ns - begin_ns > 2 * 1000 * 1000) { + WARN("%s took %.2f ms to finish: size %zu cache_level %u\n", + __FUNCTION__, (end_ns - begin_ns)/1000000.0, size, cache_level); + } + + return &bo_gem->base; +} + +drm_public void drm_ipvr_gem_bo_unreference(drm_ipvr_bo *bo); + +static void +drm__ipvr_gem_bo_remove_relocs(drm_ipvr_bo *bo, int depth, bool recursive) +{ + int i; + drm_ipvr_bo_gem *bo_gem = (drm_ipvr_bo_gem*)bo; + drm_ipvr_bo_gem *target_bo_gem; + for (i = 0; i < bo_gem->reloc_count; i++) { + if (bo_gem->reloc_target_info[i].bo != bo) { + target_bo_gem = (drm_ipvr_bo_gem*)bo_gem->reloc_target_info[i].bo; + VERB("%s (depth: %d) remove "%s" hnd %x off 0x%lx => "%s" hnd %x off 0x%lx", + __FUNCTION__, depth, bo_gem->name, bo_gem->base.handle, bo->offset, + target_bo_gem->name, target_bo_gem->base.handle, target_bo_gem->base.offset); + if (recursive) + drm__ipvr_gem_bo_remove_relocs(bo_gem->reloc_target_info[i].bo, depth + 1, true); + drm_ipvr_gem_bo_unreference(bo_gem->reloc_target_info[i].bo); + } + bo_gem->reloc_target_info[i].bo = NULL; + memset(&bo_gem->relocs[i], 0, sizeof(bo_gem->relocs[i])); + } + bo_gem->reloc_count = 0; +} + + +drm_public void +drm_ipvr_gem_bo_remove_relocs(drm_ipvr_bo *bo, uint8_t recursive) +{ + drm__ipvr_gem_bo_remove_relocs(bo, 0, recursive); +} + +drm_public void +drm_ipvr_gem_bo_reference(drm_ipvr_bo *bo) +{ + drm_ipvr_bo_gem *bo_gem = (drm_ipvr_bo_gem *)bo; + atomic_inc(&bo_gem->refcount); + VERB("%s "%s" hnd 0x%x offset 0x%lx, refcount became %d\n", + __FUNCTION__, bo_gem->name, bo->handle, bo->offset, atomic_read(&bo_gem->refcount)); +} + +static void +drm__ipvr_gem_bo_finalize(drm_ipvr_bo *bo) +{ + struct drm_ipvr_cache_bucket *bucket; + drm_ipvr_bo_gem *bo_gem = (drm_ipvr_bo_gem*)bo; + drm_ipvr_bufmgr_gem *bufmgr_gem = (drm_ipvr_bufmgr_gem*)bo->bufmgr; + int mapcount; + /* add lock? */ + /* Automatically unreference all the target buffers */ + drm_ipvr_gem_bo_remove_relocs(bo, false); + mapcount = atomic_read(&bo_gem->mapcount); + if (mapcount != 0) + WARN("%s BO is finalized with mapcount %d\n", __FUNCTION__, mapcount); + + assert(atomic_read(&bo_gem->mapcount) == 0); + + bo_gem->validate_index = -1; + /* make sure we are not finalizing a cached BO */ + assert(!bo_gem->bucket); + + if (bo_gem->is_vmap) + bucket = NULL; + else + bucket = drm__ipvr_cache_bucket_for_size(bo->bufmgr, bo->size, bo_gem->tiling); + + /* Put the buffer into our internal cache for reuse if we can. */ + if (bo->reusable && !bo_gem->is_vmap && bucket != NULL) { + bo_gem->validate_index = -1; + DBG("%s adding bo "%s" hnd %x (offset 0x%lx) fence FD %d to internal cache\n", + __FUNCTION__, bo_gem->name, bo->handle, bo->offset, + ((bo_gem->usrfence && bufmgr_gem->usr_fence_enabled)? bo_gem->usrfence->fd: -1)); + + pthread_mutex_lock(&bufmgr_gem->list_lock); + if (bufmgr_gem->usr_fence_enabled) { + if (bo_gem->usrfence) { + DRMLISTADDTAIL(&bo_gem->cache_head, &bucket->busy_head); + bucket->busy_count++; + drm__ipvr_bucket_add_fence_fd(bucket, bo_gem->usrfence); + } + else { + DRMLISTADDTAIL(&bo_gem->cache_head, &bucket->free_head); + bucket->free_count++; + } + } + else { + DRMLISTADDTAIL(&bo_gem->cache_head, &bucket->free_head); + bucket->free_count++; + } + + pthread_mutex_unlock(&bufmgr_gem->list_lock); + bo_gem->bucket = bucket; + } else { + VERB("%s freeing bo "%s" hnd %x (offset 0x%lx)\n", + __FUNCTION__, bo_gem->name, bo->handle, bo->offset); + drm__ipvr_gem_bo_free(bo); + } +} + +drm_public void +drm_ipvr_gem_bo_unreference(drm_ipvr_bo *bo) +{ + drm_ipvr_bo_gem * bo_gem = (drm_ipvr_bo_gem*)bo; + assert(atomic_read(&bo_gem->refcount) > 0); + if (atomic_dec_and_test(&bo_gem->refcount)) { + drm__ipvr_gem_bo_finalize(bo); + } else { + VERB("%s "%s" handle 0x%x offset 0x%lx, refcount became %d\n", + __FUNCTION__, bo_gem->name, bo->handle, bo->offset, atomic_read(&bo_gem->refcount)); + } +} + +drm_public int +drm_ipvr_gem_bo_map(drm_ipvr_bo *bo, unsigned long offset, + size_t size, int write_enable) +{ + int ret; + struct drm_ipvr_gem_mmap arg; + drm_ipvr_bufmgr_gem *bufmgr_gem = (drm_ipvr_bufmgr_gem *)bo->bufmgr; + drm_ipvr_bo_gem *bo_gem = (drm_ipvr_bo_gem*)bo; + nsecs_t now, grabns; + + assert(!bo_gem->is_vmap); + + if (bo_gem->is_vmap) { + /** + * for userptr gem bo, simply return the addr + */ + bo_gem->base.virt = bo_gem->user_virt; + return 0; + } + + arg.handle = bo->handle; + arg.offset = 0; + arg.size = bo->size; + + assert(atomic_read(&bo_gem->mapcount) >= 0); + /* maintain userspace mapping cache, to avoid unnecessary IOCTLs */ + if (atomic_read(&bo_gem->mapcount) == 0 && !bo->virt) { + /* no need to call synccpu-grab, kernel do it automatically */ + VERB("Calling GEM_MMAP with handle %u offset 0x%"PRIx64", size %"PRIu64"\n", + arg.handle, arg.offset, arg.size); + if (bufmgr_gem->usr_fence_enabled && bo_gem->usrfence) { + now = get_time_ns(); + ret = drm__ipvr_bo_synccpu_grab(bo); + grabns = get_time_ns() - now; + if (grabns > 2 * 1000 * 1000) { + WARN("%s: wait BO "%s", hnd %u, offset 0x%lx took %.2f ms to finish\n", + __FUNCTION__, bo_gem->name, bo->handle, bo->offset, grabns/1000000.0); + } + if (ret) { + WARN("%s: synccpu_grab error: %d (%s), ignored\n", + __FUNCTION__, ret, strerror(ret)); + } + } + + ret = drmCommandWriteRead(bufmgr_gem->fd, + DRM_IPVR_GEM_MMAP, + &arg, sizeof(arg)); + if (ret != 0) { + ERR("%s: Error mapping buffer "%s" hnd 0x%x (offset 0x%lx) (%s): %s .\n", + __FUNCTION__, bo_gem->name, bo->handle, bo->offset, + bo_gem->name, strerror(ret)); + return ret; + } + bo->virt = (void *)(uintptr_t) arg.addr_ptr; + VERB("%s: map for first time, "%s" hnd 0x%x (offset 0x%lx) (%s) -> %p\n", + __FUNCTION__, bo_gem->name, bo->handle, bo->offset, bo_gem->name, bo->virt); + } + else { + VERB("%s: already mapped, "%s" hnd 0x%x (offset 0x%lx) (%s) -> %p\n", + __FUNCTION__, bo_gem->name, bo->handle, bo->offset, bo_gem->name, bo->virt); + } + atomic_inc(&bo_gem->mapcount); + assert(bo->virt); + VERB("%s: map_count became %d\n", + __FUNCTION__, atomic_read(&bo_gem->mapcount)); + + return 0; +} + +drm_public int +drm_ipvr_gem_bo_unmap(drm_ipvr_bo *bo) +{ + drm_ipvr_bo_gem *bo_gem = (drm_ipvr_bo_gem*)bo; + int ret, mapcount; + + if (bo_gem->is_vmap) { + return 0; + } + + ret = drm__ipvr_bo_synccpu_release(bo); + ret = ((ret == -1) ? -errno : 0); + + mapcount = atomic_read(&bo_gem->mapcount); + if (mapcount <= 0) { + VERB("%s: unexpected unmap() when mapcount is %d, ignore it\n", __FUNCTION__, mapcount); + } + else if (atomic_dec_and_test(&bo_gem->mapcount)) { + bo->virt = NULL; + } + VERB("%s: "%s" hnd 0x%x offset 0x%lx map_count became %d\n", + __FUNCTION__, bo_gem->name, bo->handle, bo->offset, atomic_read(&bo_gem->mapcount)); + return 0; +} + +drm_public void +drm_ipvr_gem_bo_wait(drm_ipvr_bo *bo) +{ + drm_ipvr_bufmgr_gem *bufmgr_gem = (drm_ipvr_bufmgr_gem*) bo->bufmgr; + drm_ipvr_bo_gem * bo_gem = (drm_ipvr_bo_gem*)bo; + struct drm_ipvr_gem_wait arg; + int ret; + + arg.handle = bo->handle; + arg.flags = 0; + ret = drmCommandWriteRead(bufmgr_gem->fd, DRM_IPVR_GEM_WAIT, &arg, sizeof(arg)); + if (ret < 0) { + ERR("%s "%s" hnd %u offset 0x%lx failed, %d (%s)\n", + __FUNCTION__, bo_gem->name, bo->handle, bo->offset, ret, strerror(ret)); + } + + if (bufmgr_gem->usr_fence_enabled && bo_gem->usrfence) { + drm__ipvr_usrfence_destroy(bo_gem->usrfence, true); + bo_gem->usrfence = NULL; + } +} + +static unsigned +drm__ipvr_time_diff(struct timeval *now, struct timeval *then) +{ + long long val; + + val = now->tv_sec - then->tv_sec; + val *= 1000000LL; + val += now->tv_usec; + val -= then->tv_usec; + if (val < 1LL) + val = 1LL; + + return (unsigned) val; +} + +static int +drm__ipvr_setup_reloc_list(drm_ipvr_bo *bo) +{ + drm_ipvr_bo_gem *bo_gem = (drm_ipvr_bo_gem *) bo; + drm_ipvr_bufmgr_gem *bufmgr_gem = (drm_ipvr_bufmgr_gem *) bo->bufmgr; + unsigned int max_relocs = bufmgr_gem->max_relocs; + + if (bo->size / 4 < max_relocs) + max_relocs = bo->size / 4; + + bo_gem->relocs = malloc(max_relocs * + sizeof(drm_ipvr_reloc_entry)); + bo_gem->reloc_target_info = malloc(max_relocs * + sizeof(drm_ipvr_reloc_target)); + if (bo_gem->relocs == NULL || bo_gem->reloc_target_info == NULL) { + ERR("%s: failed to alloc relocs and reloc_target_info", __FUNCTION__); + free (bo_gem->relocs); + bo_gem->relocs = NULL; + + free (bo_gem->reloc_target_info); + bo_gem->reloc_target_info = NULL; + + return 1; + } + + return 0; +} + +drm_public int +drm_ipvr_gem_bo_emit_reloc(drm_ipvr_bo *bo, unsigned long offset, + drm_ipvr_bo *target_bo, unsigned long target_offset, uint32_t skip_fence) +{ + int ret; + drm_ipvr_bufmgr_gem *bufmgr_gem = (drm_ipvr_bufmgr_gem *) bo->bufmgr; + drm_ipvr_bo_gem *bo_gem = (drm_ipvr_bo_gem *) bo; + drm_ipvr_bo_gem *target_bo_gem = (drm_ipvr_bo_gem *) target_bo; + + /* Create a new relocation list if needed */ + if (bo_gem->relocs == NULL) { + ret = drm__ipvr_setup_reloc_list(bo); + if (ret) { + ERR("%s failed: relocs = %p, setup_reloc_list returns %d (%s)", + __FUNCTION__, bo_gem->relocs, ret, strerror(ret)); + return -ENOMEM; + } + } + + /* Check overflow */ + assert(bo_gem->reloc_count < bufmgr_gem->max_relocs); + + /* Check args */ + assert(offset <= bo->size - 4); + + /* Make sure that we're not adding a reloc to something whose size has + * already been accounted for. + */ + if (target_bo_gem != bo_gem) { + /* todo: check it */ + } + /* An object needing a fence is a tiled buffer, so it won't have + * relocs to other buffers. + */ + bo_gem->relocs[bo_gem->reloc_count].offset = offset; + bo_gem->relocs[bo_gem->reloc_count].delta = target_offset; + bo_gem->relocs[bo_gem->reloc_count].target_handle = + target_bo_gem->base.handle; + bo_gem->relocs[bo_gem->reloc_count].presumed_mmu_offset = target_bo->offset; + + bo_gem->reloc_target_info[bo_gem->reloc_count].bo = target_bo; + if (target_bo != bo) + drm_ipvr_gem_bo_reference(target_bo); + bo_gem->reloc_target_info[bo_gem->reloc_count].skip_fence = skip_fence; // fence or not + + bo_gem->reloc_count++; + + VERB("%s emitted reloc: "%s" hnd %x (0x%lx) => "%s" hnd %x (0x%lx = 0x%lx+0x%lx)", + __FUNCTION__, bo_gem->name, bo->handle, bo->offset, + target_bo_gem->name, target_bo->handle, + target_bo->offset + target_offset, target_bo->offset, target_offset); + return 0; +} + +drm_public drm_ipvr_bo * +drm_ipvr_gem_bo_create_from_name(drm_ipvr_bufmgr *bufmgr, drm_ipvr_context *ctx, + const char *name, uint32_t handle) +{ + drm_ipvr_bufmgr_gem *bufmgr_gem = (drm_ipvr_bufmgr_gem *) bufmgr; + drm_ipvr_bo_gem *bo_gem; + int ret; + struct drm_gem_open open_arg; + + open_arg.name = handle; + ret = drmIoctl(bufmgr_gem->fd, + DRM_IOCTL_GEM_OPEN, + &open_arg); + if (ret) { + ERR("Couldn't reference %s handle 0x%08x: %s\n", + name, handle, strerror(errno)); + return NULL; + } + bo_gem = calloc(1, sizeof(*bo_gem)); + if (!bo_gem) + return NULL; + + bo_gem->base.size = open_arg.size; + bo_gem->base.offset = 0; + bo_gem->base.bufmgr = bufmgr; + bo_gem->name = name; + atomic_set(&bo_gem->refcount, 1); + bo_gem->validate_index = -1; + bo_gem->base.handle = open_arg.handle; + bo_gem->global_name = handle; + bo_gem->base.reusable = false; + DBG("bo_create_from_handle: %d (%s)\n", handle, bo_gem->name); + + return &bo_gem->base; +} + +drm_public int +drm_ipvr_gem_bo_flink(drm_ipvr_bo *bo, uint32_t * name) +{ + drm_ipvr_bufmgr_gem *bufmgr_gem = (drm_ipvr_bufmgr_gem *) bo->bufmgr; + drm_ipvr_bo_gem *bo_gem = (drm_ipvr_bo_gem *) bo; + int ret; + struct drm_gem_flink flink; + if (!bo_gem->global_name) { + flink.handle = bo_gem->base.handle; + + ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_GEM_FLINK, &flink); + if (ret != 0) + return -errno; + + bo_gem->global_name = flink.name; + bo_gem->base.reusable = false; + } + + *name = bo_gem->global_name; + return 0; +} + +static int +drm__ipvr_add_validate_buffer(drm_ipvr_bo *bo, uint32_t skip_fence) +{ + drm_ipvr_bufmgr_gem *bufmgr_gem = NULL; + drm_ipvr_bo_gem *bo_gem = NULL; + int index; + + if (!bo) { + ERR("%s, invalid bo %p\n", __FUNCTION__, bo); + return -EINVAL; + } + bo_gem = (drm_ipvr_bo_gem *) bo; + if (!(bo->bufmgr)) { + ERR("%s, invalid bo bufmgr %p for bo "%s" hnd %x (off 0x%lx)\n", + __FUNCTION__, bo->bufmgr, bo_gem->name, bo->handle, bo->offset); + return -EINVAL; + } + + bufmgr_gem = (drm_ipvr_bufmgr_gem *)bo->bufmgr; + + if (bo_gem->validate_index != -1) { + if (bufmgr_gem->val_args[bo_gem->validate_index].skip_fence && !skip_fence) { + VERB("%s: already has validate_index %d, update skip_fence: %u->%u\n", + __FUNCTION__, bo_gem->validate_index, + bufmgr_gem->val_args[bo_gem->validate_index].skip_fence, 0); + bufmgr_gem->val_args[bo_gem->validate_index].skip_fence = 0; + } + return 0; + } + + /* Extend the array of validation entries as necessary. */ + if (bufmgr_gem->exec_count == bufmgr_gem->exec_size) { + int new_size = bufmgr_gem->exec_size * 2; + + if (new_size == 0) + new_size = 10; + + bufmgr_gem->val_args = + realloc(bufmgr_gem->val_args, + sizeof(*bufmgr_gem->val_args) * new_size); + bufmgr_gem->exec_bos = + realloc(bufmgr_gem->exec_bos, + sizeof(*bufmgr_gem->exec_bos) * new_size); + bufmgr_gem->exec_size = new_size; + } + + if (!bufmgr_gem->val_args || !bufmgr_gem->exec_bos) { + ERR("%s val_args = %p and exec_bos = %p\n", + __FUNCTION__, bufmgr_gem->val_args, bufmgr_gem->exec_bos); + return -ENOMEM; + } + + index = bufmgr_gem->exec_count; + bo_gem->validate_index = index; + /* Fill in array entry */ + if (bufmgr_gem->val_args && bufmgr_gem->exec_bos) { + bufmgr_gem->val_args[index].next = (unsigned long)NULL; + bufmgr_gem->val_args[index].presumed_gpu_offset = (unsigned long)bo->offset; + bufmgr_gem->val_args[index].handle = bo_gem->base.handle; + bufmgr_gem->val_args[index].pad64 = 0; + if (skip_fence) + bufmgr_gem->val_args[index].skip_fence = 1; + else + bufmgr_gem->val_args[index].skip_fence = 0; + bufmgr_gem->val_args[index].fence_fd = -1; + bufmgr_gem->exec_bos[index] = bo; + + VERB("%s added validate buffer "%s" hnd %x (off 0x%lx) at [%d]\n", + __FUNCTION__, bo_gem->name, bo->handle, bo->offset, index); + bufmgr_gem->exec_count++; + } + return 0; +} + +static int +drm__ipvr_bo_process_reloc(drm_ipvr_bo *bo, uint32_t skip_fence) +{ + drm_ipvr_bo_gem *bo_gem = (drm_ipvr_bo_gem *)bo; + int i; + int ret = 0; + + /* Add the target to the validate list */ + ret = drm__ipvr_add_validate_buffer(bo, skip_fence); + if (ret != 0) + return ret; + + if (bo_gem->relocs == NULL) + return 0; + + for (i = 0; i < bo_gem->reloc_count; i++) { + drm_ipvr_bo *target_bo = bo_gem->reloc_target_info[i].bo; + uint32_t target_flags = bo_gem->reloc_target_info[i].skip_fence; + if (target_bo == bo) + continue; + + /* Continue walking the tree depth-first. */ + ret = drm__ipvr_bo_process_reloc(target_bo, target_flags); + if (ret != 0) + return ret; + } + + return ret; +} + +drm_public int +drm_ipvr_gem_bo_exec(drm_ipvr_bo *bo, unsigned long offset, size_t len, + int fence_in, int *fence_out) +{ + int ret; + int i; + struct timeval then, now; + bool have_then = false; + struct drm_ipvr_gem_execbuffer exec_arg; + drm_ipvr_bo_gem *bo_gem = (drm_ipvr_bo_gem *)bo; + drm_ipvr_bufmgr_gem *bufmgr_gem = (drm_ipvr_bufmgr_gem*)bo->bufmgr; + struct drm_ipvr_usrfence *fence = NULL; + + pthread_mutex_lock(&bufmgr_gem->lock); + + ret = drm__ipvr_bo_process_reloc(bo, 0); + if (ret != 0) { + ERR("%s bo_process_reloc2 failed: %d (%s)", + __FUNCTION__, ret, strerror(ret)); + pthread_mutex_unlock(&bufmgr_gem->lock); + return ret; + } + + /* link all the validate args */ + assert(bufmgr_gem->exec_count > 1); + assert(bo_gem->ctx != NULL); + for (i = 0; i < bufmgr_gem->exec_count - 1; ++i) { + bufmgr_gem->val_args[i].next = (unsigned long)&bufmgr_gem->val_args[i+1]; + } + + VERB("%s finished the reloc/validate processing. exec_count=%d\n", + __FUNCTION__, bufmgr_gem->exec_count); + exec_arg.cmdbuf_handle = bo->handle; + exec_arg.cmdbuf_size = len; + exec_arg.buffer_list = (unsigned long)bufmgr_gem->val_args; + exec_arg.buffer_count = bufmgr_gem->exec_count; + exec_arg.ctx_id = bo_gem->ctx->ctx_id; + VERB("%s sending EXEC IOCTL to kernel with: cmdbuf_handle %x (0x%lx), size %zu, " + "buffer_list_count %u, ctx_id 0x%08x\n", __FUNCTION__, exec_arg.cmdbuf_handle, + bo->offset, len, + exec_arg.buffer_count, exec_arg.ctx_id); +#if 0 + VERB("%s dumping validate args:\n", __FUNCTION__); + char tmp[1024]; + uint32_t *tmpaddr; + for (i = 0; i < exec_arg.buffer_count; ++i) { + memset(tmp, 0, 1024); + tmpaddr = (uint32_t*)((unsigned long)exec_arg.buffer_list + i * sizeof (struct ipvr_validate_arg)); + sprintf(tmp, " [%03d: %p]: ", i, tmpaddr); + for (j = 0; j < sizeof (struct ipvr_validate_arg)/sizeof(uint32_t); ++j) { + sprintf(tmp + strlen(tmp), "%08x ", *(tmpaddr + j)); + } + VERB("%s\n", tmp); + } + VERB("%s dumping mtxmsg (%u bytes):\n", __FUNCTION__, exec_arg.cmdbuf_size); + memset(tmp, 0, 1024); + drm_ipvr_gem_bo_map(bo, 0, bo->size, 0); + for (i = 0; i < exec_arg.cmdbuf_size/sizeof(uint32_t); ++i) { + sprintf(tmp + strlen(tmp), "%08x ", *(((uint32_t*)bo->virt) + i)); + } + drm_ipvr_gem_bo_unmap(bo); + VERB(" %s\n", tmp); +#endif + bufmgr_gem->exec_seq ++; + do { + ret = drmCommandWriteRead(bufmgr_gem->fd, + DRM_IPVR_GEM_EXECBUFFER, + &exec_arg, sizeof(exec_arg)); + if (ret == EAGAIN) { + if (!have_then) { + if (gettimeofday(&then, NULL)) { + ERR("%s have no then, gettimeofday error.\n", __FUNCTION__); + break; + } + + have_then = true; + } + if (gettimeofday(&now, NULL)) { + ERR("%s: Gettimeofday error.\n", __FUNCTION__); + break; + } + + } + } while ((ret == EAGAIN) && (drm__ipvr_time_diff(&now, &then) < IPVR_TIMEOUT_USEC)); + + if (ret) { + WARN("%s: command write return is %d\n", __FUNCTION__, ret); + goto out; + } +#if 0 + VERB("%s AFTER exec ioctl:\n", __FUNCTION__); + for (i = 0; i < exec_arg.buffer_count; ++i) { + memset(tmp, 0, 1024); + tmpaddr = (uint32_t*)((unsigned long)exec_arg.buffer_list + i * sizeof (struct ipvr_validate_arg)); + sprintf(tmp, " [%03d: %p]: ", i, tmpaddr); + for (j = 0; j < sizeof (struct ipvr_validate_arg)/sizeof(uint32_t); ++j) { + sprintf(tmp + strlen(tmp), "%08x ", *(tmpaddr + j)); + } + VERB("%s\n", tmp); + } +#endif + /* update the presumed_mmu_offsets + * in case we support eviction in IPVR driver later */ + for (i = 0; i < bufmgr_gem->exec_count; i++) { + drm_ipvr_bo *bo = bufmgr_gem->exec_bos[i]; + drm_ipvr_bo_gem *bo_gem = (drm_ipvr_bo_gem *)bo; + + /* Update the buffer offset */ + if (bufmgr_gem->val_args[i].presumed_gpu_offset != bo->offset) { + VERB("BO "%s" hnd %x migrated: 0x%lx -> 0x%"PRIx64"\n", + bo_gem->name, bo->handle, bo->offset, + bufmgr_gem->val_args[i].presumed_gpu_offset); + bo->offset = bufmgr_gem->val_args[i].presumed_gpu_offset; + } + bo_gem->exec_seq = bufmgr_gem->exec_seq; + + if (bufmgr_gem->usr_fence_enabled) { + if (!fence && bufmgr_gem->val_args[i].fence_fd >= 0) { + assert(!bufmgr_gem->val_args[i].skip_fence); + fence = drm__ipvr_usrfence_create(bufmgr_gem->val_args[i].fence_fd); + } + if (fence && !bufmgr_gem->val_args[i].skip_fence) { + DBG("AFTER EXEC: BO "%s" hnd %u off 0x%lx added to fence [%d]\n", + bo_gem->name, bo->handle, bo->offset, fence->fd); + drm__ipvr_usrfence_add_bo(fence, bo); + } + } + } + + VERB("%s EXECBUFFER IOCTL succeeded", __FUNCTION__); +out: + for (i = 0; i < bufmgr_gem->exec_count; i++) { + drm_ipvr_bo_gem *bo_gem = (drm_ipvr_bo_gem*)bufmgr_gem->exec_bos[i]; + + /* Disconnect the buffer from the validate list */ + bo_gem->validate_index = -1; + bufmgr_gem->exec_bos[i] = NULL; + } + + /* autmatically decrease all bo's refcount in the reloc tree. + * VA created bo will be cached if unreferencing in vaRenderPicture. + * execbuf/mtxmsg/surface/colocated_buffer's refcount will become 1. + */ + drm_ipvr_gem_bo_remove_relocs(bo, 1); + + bufmgr_gem->exec_count = 0; + pthread_mutex_unlock(&bufmgr_gem->lock); + return 0; +} + +drm_public int +drm_ipvr_gem_bo_busy(drm_ipvr_bo *bo) +{ + drm_ipvr_bufmgr_gem *bufmgr_gem = (drm_ipvr_bufmgr_gem*)bo->bufmgr; + drm_ipvr_bo_gem *bo_gem = (drm_ipvr_bo_gem *) bo; + struct drm_ipvr_gem_busy arg; + int ret; + /* make sure it's not a cached BO */ + assert(!bo_gem->bucket); + if (bufmgr_gem->usr_fence_enabled && !bo_gem->usrfence) { + return 0; + } + + arg.handle = bo->handle; + + ret = drmCommandWriteRead(bufmgr_gem->fd, DRM_IPVR_GEM_BUSY, &arg, sizeof(arg)); + if (ret == -EBUSY || (ret == 0 && arg.busy)) { + VERB("%s returns %d: buffer "%s" hnd %x (offset 0x%lx) param is busy".\n", + __FUNCTION__, ret, bo_gem->name, bo->handle, bo->offset); + return 1; + } + else if (!ret && !arg.busy){ + VERB("%s: buffer "%s" hnd %x (offset 0x%lx) param is free".\n", + __FUNCTION__, bo_gem->name, bo->handle, bo->offset); + /* destroy usrfence */ + if (bufmgr_gem->usr_fence_enabled) + drm__ipvr_usrfence_destroy(bo_gem->usrfence, true); + + return 0; + } + else { + WARN("%s: checking buffer busy "%s" hnd %u (offset 0x%lx) " + "got unexpected result: %d (%s), busy state=%d, view it as free.\n", + __FUNCTION__, bo_gem->name, bo->handle, bo->offset, ret, strerror(ret), arg.busy); + + if (bufmgr_gem->usr_fence_enabled) + drm__ipvr_usrfence_destroy(bo_gem->usrfence, true); + + return 0; + } +} + +drm_public void +drm_ipvr_gem_bufmgr_destroy(drm_ipvr_bufmgr *bufmgr) +{ + int j, count; + drm_ipvr_bufmgr_gem *bufmgr_gem = (drm_ipvr_bufmgr_gem*)bufmgr; + char hitratestr[11]; + + if (bufmgr_gem->exec_bos) + free(bufmgr_gem->exec_bos); + if (bufmgr_gem->val_args) + free(bufmgr_gem->val_args); + + if (bufmgr_gem->cache_buckets) { + INFO("BO alloc/cache statistics:\n"); + INFO("Hit1: cache direct hits without delay\n"); + INFO("Hit2: cache hits after select system call\n"); + INFO("Hit3: cache hits after force waiting\n"); + INFO("Miss1: cache misses due to empty bucket\n"); + INFO("Miss2: cache misses due to seqno too new\n"); + INFO("Miss3: cache misses due to no matched cache level\n"); + INFO("BucketSize|" + " Hit1|" + " Hit2|" + " Hit3|" + " Miss1|" + " Miss2|" + " Miss3|" + " Allocs|" + " Count|" + " HitRate\n"); + for (j = 0; j < bufmgr_gem->cache_bucket_size; j++) { + count = bufmgr_gem->cache_buckets[j].busy_count + bufmgr_gem->cache_buckets[j].free_count; + memset(hitratestr, 0, 11); + if (bufmgr_gem->cache_buckets[j].stat_allocs) { + double hitrate = (bufmgr_gem->cache_buckets[j].stat_hits_direct + + bufmgr_gem->cache_buckets[j].stat_hits_after_select + + bufmgr_gem->cache_buckets[j].stat_hits_after_wait) * 100.0 / + bufmgr_gem->cache_buckets[j].stat_allocs; + snprintf(hitratestr, 11, " %5.2f%%", hitrate); + } + else { + snprintf(hitratestr, 11, " N/A"); + } + INFO(" %8lu| %8d| %8d| %8d| %8d|" + " %8d| %8d| %8d| %8d|%s\n", + bufmgr_gem->cache_buckets[j].size, + bufmgr_gem->cache_buckets[j].stat_hits_direct, + bufmgr_gem->cache_buckets[j].stat_hits_after_select, + bufmgr_gem->cache_buckets[j].stat_hits_after_wait, + bufmgr_gem->cache_buckets[j].stat_misses_empty, + bufmgr_gem->cache_buckets[j].stat_misses_seqno, + bufmgr_gem->cache_buckets[j].stat_misses_cache, + bufmgr_gem->cache_buckets[j].stat_allocs, + count, + hitratestr); + } + } + + if (bufmgr_gem->cache_buckets) { + for (j = 0; j < bufmgr_gem->cache_bucket_size; j++) { + struct drm_ipvr_cache_bucket *bucket = + &bufmgr_gem->cache_buckets[j]; + + while (!DRMLISTEMPTY(&bucket->busy_head)) { + drm_ipvr_bo_gem *bo_gem; + + bo_gem = DRMLISTENTRY(drm_ipvr_bo_gem, + bucket->busy_head.next, cache_head); + + DRMLISTDELINIT(&bo_gem->cache_head); + bucket->busy_count--; + if (bo_gem->usrfence) { + DRMLISTDELINIT(&bo_gem->fence_head); + if (DRMLISTEMPTY(&bo_gem->usrfence->head)) { + if (bo_gem->usrfence->fd >= 0) { + DBG("%s closing FD %d\n", __FUNCTION__, bo_gem->usrfence->fd); + close (bo_gem->usrfence->fd); + } + free(bo_gem->usrfence); + } + } + bo_gem->usrfence = NULL; + assert(bo_gem->reloc_count == 0); + drm__ipvr_gem_bo_free(&bo_gem->base); + } + + while (!DRMLISTEMPTY(&bucket->free_head)) { + drm_ipvr_bo_gem *bo_gem; + + bo_gem = DRMLISTENTRY(drm_ipvr_bo_gem, + bucket->free_head.next, cache_head); + + DRMLISTDELINIT(&bo_gem->cache_head); + bucket->free_count--; + assert(bo_gem->reloc_count == 0); + drm__ipvr_gem_bo_free(&bo_gem->base); + } + } + + free(bufmgr_gem->cache_buckets); + } + + pthread_mutex_destroy(&bufmgr_gem->lock); + free(bufmgr_gem); +} + +drm_public int +drm_ipvr_gem_bo_references(drm_ipvr_bo *bo, drm_ipvr_bo *target_bo) +{ + return -1; +} + +drm_public void +drm_ipvr_gem_context_destroy(drm_ipvr_context *ctx) +{ + int ret; + drm_ipvr_bufmgr_gem *bufmgr_gem = (drm_ipvr_bufmgr_gem*)ctx->bufmgr; + struct drm_ipvr_context_destroy arg; + arg.ctx_id = ctx->ctx_id; + + ret = drmCommandWriteRead(bufmgr_gem->fd, DRM_IPVR_CONTEXT_DESTROY, &arg, sizeof(arg)); + if (ret != 0) { + ERR("%s: Error destroying context %u: %s .\n", + __FUNCTION__, ctx->ctx_id, strerror(ret)); + } + + pthread_mutex_destroy(&bufmgr_gem->lock); + pthread_mutex_destroy(&bufmgr_gem->list_lock); + free(ctx); +} + +drm_public drm_ipvr_context* +drm_ipvr_gem_context_create(drm_ipvr_bufmgr *bufmgr, uint32_t ctx_type, + uint32_t tiling_stride, uint32_t tiling_mode) +{ + int ret; + drm_ipvr_bufmgr_gem *bufmgr_gem = (drm_ipvr_bufmgr_gem*)bufmgr; + struct drm_ipvr_context_create arg; + drm_ipvr_context *ctx = calloc(1, sizeof(drm_ipvr_context)); + arg.ctx_type = ctx_type; + arg.tiling_stride = tiling_stride; + arg.tiling_scheme = tiling_mode; + ret = drmCommandWriteRead(bufmgr_gem->fd, DRM_IPVR_CONTEXT_CREATE, &arg, sizeof(arg)); + if (ret != 0) { + ERR("%s: Error creating context %d: %s. tiling stride=%u, scheme=%u\n", + __FUNCTION__, ctx_type, strerror(ret), + arg.tiling_stride, arg.tiling_scheme); + free(ctx); + return NULL; + } + ctx->ctx_id = arg.ctx_id; + ctx->ctx_type = ctx_type; + ctx->bufmgr = bufmgr; + + DBG("%s: successfully create drm context: id=%x, tiling stride=%u, scheme=%u\n", + __FUNCTION__, ctx->ctx_id, arg.tiling_stride, arg.tiling_scheme); + return ctx; +} + +drm_public int +drm_ipvr_gem_bufmgr_get_device_info(drm_ipvr_bufmgr *bufmgr, uint16_t *dev_id, uint16_t *caps) +{ + struct drm_ipvr_misc arg; + int ret; + drm_ipvr_bufmgr_gem *bufmgr_gem = (drm_ipvr_bufmgr_gem*)bufmgr; + unsigned long info; + arg.key = IPVR_DEVICE_INFO; + arg.value = (uint64_t)((unsigned long)&info); + ret = drmCommandWriteRead(bufmgr_gem->fd, DRM_IPVR_MISC, &arg, sizeof(arg)); + if (ret != 0) { + ERR("%s: Error getting device info: %s .\n", + __FUNCTION__, strerror(ret)); + return ret; + } + *dev_id = (info >> 16) & 0xffff; + *caps = info & 0xffff; + return 0; +} + +drm_public int +drm_ipvr_gem_bo_get_MB_error(drm_ipvr_bo *bo) +{ + /** no full support yet */ + return 0; +} + +drm_public drm_ipvr_bufmgr * +drm_ipvr_gem_bufmgr_init(int fd, int batch_size) +{ + drm_ipvr_bufmgr_gem * bufmgr_gem = NULL; + int j; + + bufmgr_gem = calloc(1, sizeof(*bufmgr_gem)); + if (bufmgr_gem == NULL) { + ERR("bufmgr init: calloc failed: %s\n", strerror(errno)); + return NULL; + } + + bufmgr_gem->fd = fd; + + if (pthread_mutex_init(&bufmgr_gem->lock, NULL) != 0) { + ERR("bufmgr init: mutex init failed: %s\n", strerror(errno)); + free(bufmgr_gem); + bufmgr_gem = NULL; + return NULL; + } + if (pthread_mutex_init(&bufmgr_gem->list_lock, NULL) != 0) { + ERR("bufmgr init: mutex init failed: %s\n", strerror(errno)); + free(bufmgr_gem); + bufmgr_gem = NULL; + return NULL; + } + + /* Hard code one. + */ + bufmgr_gem->max_relocs = 32; + + bufmgr_gem->exec_seq = -1; + + /* init cache buckets */ + /* 4KB, 8KB, 16KB, 32KB, 64KB, 128KB, 256KB, 512KB, 1MB, 2MB, 4MB, 8MB, 16MB, 32MB */ + bufmgr_gem->cache_bucket_size = 14; + bufmgr_gem->cache_buckets = calloc(bufmgr_gem->cache_bucket_size, + sizeof(struct drm_ipvr_cache_bucket)); + if (!bufmgr_gem->cache_buckets) { + ERR("%s failed to allocate cache buckets\n", __FUNCTION__); + return NULL; + } + + for (j = 0; j < bufmgr_gem->cache_bucket_size; ++j) { + DRMINITLISTHEAD(&bufmgr_gem->cache_buckets[j].free_head); + bufmgr_gem->cache_buckets[j].size = 0x1000 << j; + bufmgr_gem->cache_buckets[j].limit = 2 << ((14 - j)/2); + bufmgr_gem->cache_buckets[j].free_count = 0; + DRMINITLISTHEAD(&bufmgr_gem->cache_buckets[j].busy_head); + bufmgr_gem->cache_buckets[j].busy_count = 0; + FD_ZERO(&bufmgr_gem->cache_buckets[j].fdset); + } + + DBG("%s created bufmgr %p with cache_bucket_size %u\n", + __FUNCTION__, &bufmgr_gem->base, bufmgr_gem->cache_bucket_size); + + bufmgr_gem->usr_fence_enabled = 1; + return &bufmgr_gem->base; +} diff --git a/ipvr/libdrm_ipvr.pc.in b/ipvr/libdrm_ipvr.pc.in new file mode 100644 index 0000000..2fe9ab6 --- /dev/null +++ b/ipvr/libdrm_ipvr.pc.in @@ -0,0 +1,11 @@ +prefix=@prefix@ +exec_prefix=@exec_prefix@ +libdir=@libdir@ +includedir=@includedir@ + +Name: libdrm_ipvr +Description: Userspace interface to VP8 hardware decoder on baytrail +Version: @PACKAGE_VERSION@ +Requires: libdrm +Libs: -L${libdir} -ldrm_ipvr +Cflags: -I${includedir} -I${includedir}/libdrm diff --git a/ipvr/test_decode.c b/ipvr/test_decode.c new file mode 100644 index 0000000..a55b534 --- /dev/null +++ b/ipvr/test_decode.c @@ -0,0 +1,6807 @@ +/************************************************************************** + * test_decode.c: it is drm based VP8 on frame decoding test + * + * Copyright (c) 2014 Intel Corporation, Hillsboro, OR, USA + * All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. + * + * Authors: + * Yao Cheng yao.cheng@intel.com + * Fei Jiang fei.jiang@intel.com + * + **************************************************************************/ + +#include <stdlib.h> +#include <stdio.h> +#include <string.h> +#include <unistd.h> +#include <assert.h> +#include <fcntl.h> +#include <inttypes.h> +#include <errno.h> +#include <sys/stat.h> +#include <sys/ioctl.h> +#include <stdint.h> +#include <sys/ioctl.h> +#include "ipvr_drm.h" +#include "ipvr_bufmgr.h" +#include <xf86drm.h> +#include <sys/time.h> +#include <time.h> + +int reference_cache_size = 512 * 1024; +#define CLIP_WIDTH 1280 +#define CLIP_HEIGHT 720 + +#define ALLOC_SURFACE_WITH_USERPTR_IOCTL 1 + +static unsigned char mtxmsg[20]= +{ + 0x14,0x81,0x00,0x00,0x00,0x41,0x54,0x00,0x00,0xE0,0xA9, + 0x00,0x0E,0x00,0x00,0x00,0x00,0x10,0x0B,0x02, +}; + +static unsigned char cmdbuf[3000]= +{ + 0x43,0x1C,0x00,0x91,0x08,0x00,0x00,0x00,0x00,0x70,0x88, + 0x00,0x00,0x00,0x00,0x00,0x4F,0x2C,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x00, + 0x00,0x00,0xB0,0x01,0x00,0x00,0x00,0x49,0xB5,0x00,0x00, + 0x49,0xB5,0x00,0xA0,0x00,0x80,0x88,0x00,0x00,0x10,0x03, + 0x50,0xFF,0xF4,0x2C,0x00,0xFF,0xF4,0x2C,0x00,0x00,0x10, + 0x0B,0x02,0xF0,0x11,0x01,0x50,0x08,0x00,0x00,0x00,0xF4, + 0x11,0x01,0x50,0x02,0x02,0x02,0x02,0xF8,0x11,0x01,0x50, + 0x02,0x00,0x7E,0x7E,0xFC,0x11,0x01,0x50,0x04,0x7E,0x02, + 0x04,0x1C,0x10,0x01,0x50,0x08,0x00,0x09,0x00,0x18,0x10, + 0x01,0x50,0x00,0x80,0x89,0x00,0xEC,0x11,0x01,0x50,0x00, + 0x00,0x8A,0x00,0x3C,0x10,0x02,0x50,0x00,0x04,0x00,0x00, + 0x00,0x05,0x00,0x00,0x0C,0x08,0x01,0x10,0x23,0x00,0x00, + 0x00,0x00,0x0A,0x05,0x10,0x00,0x00,0x00,0x00,0x4F,0x2C, + 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0x20,0x53,0x53,0x44,0x54,0x20,0x33,0x61,0x66,0x65,0x38, + 0x39,0x31,0x30,0x20,0x30,0x30,0x34,0x33,0x33,0x20,0x28, + 0x76,0x30,0x31,0x20,0x20,0x50,0x6D,0x52,0x65,0x66,0x20, + 0x20,0x43,0x70,0x75,0x30,0x43,0x73,0x74, +}; + +static unsigned char prob_1st_part[1200]= +{ + 0xE7,0x78,0x30,0x59,0x73,0x78,0x71,0xE7,0x98,0x70,0xE7, + 0xE7,0x98,0xB3,0x40,0x7E,0xAA,0x2E,0x76,0x98,0x46,0x5F, + 0x98,0x98,0xAF,0x45,0x8F,0x50,0x55,0x48,0x52,0xAF,0x9B, + 0x67,0xAF,0xAF,0x38,0x3A,0x0A,0xAB,0xDA,0x11,0xBD,0x38, + 0x0D,0x98,0x38,0x38,0x90,0x47,0x0A,0x26,0xAB,0x90,0xD5, + 0x90,0x22,0x1A,0x90,0x90,0x72,0x1A,0x11,0xA3,0x2C,0x15, + 0xC3,0x72,0x0A,0xAD,0x72,0x72,0x79,0x18,0x50,0xC3,0x1A, + 0x2C,0x3E,0x79,0x40,0x55,0x79,0x79,0xAA,0x2E,0x37,0x13, + 0x88,0x21,0xA0,0xAA,0xCE,0x47,0xAA,0xAA,0x3F,0x14,0x08, + 0x72,0x72,0x0C,0xD0,0x3F,0x09,0xE2,0x3F,0x3F,0x51,0x28, + 0x0B,0x60,0xB6,0x1D,0x54,0x51,0x10,0x24,0x51,0x51,0x86, + 0xB7,0x59,0x89,0x62,0x6A,0x65,0x86,0xA5,0x94,0x86,0x86, + 0x48,0xBB,0x64,0x82,0x9D,0x20,0x6F,0x48,0x4B,0x50,0x48, + 0x48,0x42,0x66,0xA7,0x63,0x4A,0x28,0x3E,0x42,0xEA,0x80, + 0x42,0x42,0x29,0x35,0x09,0xB2,0xF1,0x1A,0x8D,0x29,0x08, + 0x6B,0x29,0x29,0x68,0x4F,0x0C,0x1B,0xD9,0x57,0xFF,0x68, + 0x11,0x07,0x68,0x68,0x4A,0x2B,0x1A,0x92,0x49,0x31,0xA6, + 0x4A,0x17,0x9D,0x4A,0x4A,0x41,0x26,0x69,0xA0,0x33,0x1F, + 0x34,0x41,0x73,0x80,0x41,0x41,0x57,0x44,0x47,0x2C,0x72, + 0x0F,0x33,0x57,0xBA,0x17,0x57,0x57,0x2F,0x29,0x0E,0x6E, + 0xB6,0x15,0xB7,0x2F,0x11,0xC2,0x2F,0x2F,0x42,0x2D,0x19, + 0x66,0xC5,0x17,0xBD,0x42,0x12,0x16,0x42,0x42,0x58,0x58, + 0x93,0x96,0x2A,0x2D,0x2E,0x58,0xC4,0xCD,0x58,0x58,0x2B, + 0x61,0xB7,0x75,0x55,0x23,0x26,0x2B,0xB3,0x3D,0x2B,0x2B, + 0x27,0x35,0xC8,0x57,0x1A,0x2B,0x15,0x27,0xE8,0xAB,0x27, + 0x27,0x38,0x22,0x33,0x68,0x72,0x1D,0x66,0x38,0x5D,0x4D, + 0x38,0x38,0x6B,0x36,0x20,0x1A,0x33,0x51,0x01,0x6B,0x2B, + 0x1F,0x6B,0x6B,0x27,0x1C,0x55,0xAB,0x3A,0x5A,0xA5,0x27, + 0x62,0x40,0x27,0x27,0x22,0x16,0x74,0xCE,0x17,0x2B,0x22, + 0x22,0xA6,0x49,0x22,0x22,0x44,0x19,0x6A,0x16,0x40,0x24, + 0xAB,0x44,0xE1,0x72,0x44,0x44,0x22,0x13,0x15,0x66,0x84, + 0x10,0xBC,0x22,0x4C,0x7C,0x22,0x22,0x3E,0x12,0x4E,0x5F, + 0x55,0x32,0x39,0x3E,0x30,0x33,0x3E,0x3E,0xC1,0x65,0x23, + 0x9F,0xD7,0x59,0x6F,0xC1,0x2E,0x6F,0xC1,0xC1,0x3C,0x94, + 0x1F,0xAC,0xDB,0x15,0xE4,0x3C,0x12,0x6F,0x3C,0x3C,0x70, + 0x71,0x4D,0x55,0xB3,0x26,0xFF,0x70,0x78,0x72,0x70,0x70, + 0x28,0x2A,0x01,0xC4,0xF5,0x0A,0xD1,0x28,0x19,0x6D,0x28, + 0x28,0x64,0x50,0x08,0x2B,0x9A,0x33,0x01,0x64,0x1A,0x47, + 0x64,0x64,0x58,0x2B,0x1D,0x8C,0xA6,0x25,0xD5,0x58,0x2B, + 0x9A,0x58,0x58,0x3D,0x3F,0x1E,0x9B,0x43,0x44,0x2D,0x3D, + 0x01,0xD1,0x3D,0x3D,0x8E,0x4E,0x4E,0x10,0xFF,0x22,0x80, + 0x8E,0xC5,0xAB,0x8E,0x8E,0x29,0x28,0x05,0x66,0xD3,0x04, + 0xB7,0x29,0x01,0xDD,0x29,0x29,0x33,0x32,0x11,0xA8,0xD1, + 0x17,0xC0,0x33,0x19,0x52,0x33,0x33,0x7D,0x62,0x2A,0x58, + 0x68,0x75,0x55,0x7D,0xAF,0x52,0x7D,0x7D,0x5F,0x54,0x35, + 0x59,0x80,0x71,0x64,0x5F,0x65,0x2D,0x5F,0x5F,0x4B,0x4F, + 0x7B,0x2F,0x33,0x51,0x80,0x4B,0xAB,0x01,0x4B,0x4B,0x39, + 0x11,0x05,0x47,0x66,0x35,0x39,0x39,0x29,0x31,0x39,0x39, + 0x73,0x15,0x02,0x0A,0x66,0xA6,0xFF,0x73,0x17,0x06,0x73, + 0x73,0x26,0x21,0x0D,0x79,0x39,0x1A,0x49,0x26,0x01,0x55, + 0x26,0x26,0x29,0x0A,0x43,0x8A,0x4D,0x5A,0x6E,0x29,0x2F, + 0x72,0x29,0x29,0x65,0x1D,0x10,0x0A,0x55,0x65,0x80,0x65, + 0xC4,0x1A,0x65,0x65,0x39,0x12,0x0A,0x66,0x66,0x22,0xD5, + 0x39,0x14,0x2B,0x39,0x39,0x75,0x14,0x0F,0x24,0xA3,0x44, + 0x80,0x75,0x01,0x1A,0x75,0x75,0x8A,0x1F,0x24,0xAB,0x1B, + 0x26,0xA6,0x8A,0x2C,0xE5,0x8A,0x8A,0x43,0x57,0x3A,0xA9, + 0x52,0x1A,0x73,0x43,0x3B,0xB3,0x43,0x43,0x3F,0x3B,0x5A, + 0xB4,0x3B,0x5D,0xA6,0x3F,0x49,0x9A,0x3F,0x3F,0x28,0x28, + 0x15,0x74,0x8F,0x22,0xD1,0x28,0x27,0xAF,0x28,0x28,0x39, + 0x2E,0x16,0x18,0x80,0x36,0x01,0x39,0x11,0x25,0x39,0x39, + 0x2F,0x0F,0x10,0xB7,0x22,0x31,0xDF,0x2F,0x2D,0xB7,0x2F, + 0x2F,0x2E,0x11,0x21,0xB7,0x06,0x0F,0x62,0x2E,0x20,0xB7, + 0x2E,0x2E,0x41,0x20,0x49,0x73,0x1C,0x17,0x80,0x41,0x80, + 0xCD,0x41,0x41,0x28,0x03,0x09,0x73,0x33,0x12,0xC0,0x28, + 0x06,0xDF,0x28,0x28,0x57,0x25,0x09,0x73,0x3B,0x40,0x4D, + 0x57,0x15,0x2F,0x57,0x57,0x68,0x37,0x2C,0xDA,0x09,0x35, + 0x36,0x68,0x82,0xE2,0x68,0x68,0x40,0x5A,0x46,0xCD,0x28, + 0x17,0x29,0x40,0x1A,0x39,0x40,0x40,0x36,0x39,0x70,0xB8, + 0x05,0x26,0x29,0x36,0xA6,0xD5,0x36,0x36,0x1E,0x22,0x1A, + 0x85,0x98,0x0A,0x74,0x1E,0x20,0x86,0x1E,0x1E,0x4B,0x20, + 0x0C,0x33,0xC0,0xA0,0xFF,0x4B,0x2B,0x33,0x4B,0x4B,0x27, + 0x13,0x35,0xDD,0x1A,0x20,0x72,0x27,0x49,0xFF,0x27,0x27, + 0x1F,0x09,0x41,0xEA,0x02,0x01,0x0F,0x1F,0x76,0x49,0x1F, + 0x1F,0x58,0x1F,0x23,0x43,0x66,0x37,0x55,0x58,0xBA,0x55, + 0x58,0x58,0x38,0x15,0x17,0x6F,0x3B,0x2D,0xCD,0x38,0x25, + 0xC0,0x38,0x38,0x37,0x26,0x46,0x7C,0x49,0x01,0x66,0x37, + 0x22,0x62,0x37,0x37,0x66,0x3D,0x47,0x25,0x22,0x1F,0x35, + 0x66,0xF3,0xC0,0x66,0x66,0x45,0x3C,0x47,0x26,0x49,0x1C, + 0x77,0x45,0xDE,0x25,0x45,0x45,0x44,0x2D,0x80,0x22,0x01, + 0x0B,0x2F,0x44,0xF5,0xAB,0x44,0x44,0x3E,0x11,0x13,0x46, + 0x92,0x37,0x55,0x3E,0x3E,0x46,0x3E,0x3E,0x4B,0x0F,0x09, + 0x09,0x40,0xB8,0xFF,0x4B,0x77,0x10,0x4B,0x4B,0x25,0x2B, + 0x25,0x9A,0x64,0x55,0xA3,0x25,0xA0,0x01,0x25,0x25,0x3F, + 0x09,0x5C,0x88,0x1C,0x20,0x40,0x3F,0xC9,0x55,0x3F,0x3F, + 0x56,0x06,0x1C,0x05,0x40,0x19,0xFF,0x56,0xF8,0x01,0x56, + 0x56,0x38,0x08,0x11,0x84,0x89,0x37,0xFF,0x38,0x74,0x80, + 0x38,0x38,0x3A,0x0F,0x14,0x52,0x87,0x1A,0x39,0x3A,0x79, + 0x28,0x3A,0x3A,0xA4,0x32,0x1F,0x89,0x9A,0x19,0x85,0xA4, + 0x23,0xDA,0xA4,0xA4,0x33,0x67,0x2C,0x83,0x83,0x1F,0x7B, + 0x33,0x06,0x9E,0x33,0x33,0x56,0x28,0x40,0x87,0x94,0x2D, + 0xE0,0x56,0xB7,0x80,0x56,0x56,0x16,0x1A,0x11,0x83,0xF0, + 0x0E,0x9A,0x16,0x01,0xD1,0x16,0x16,0x53,0x0C,0x0D,0x36, + 0xC0,0x44,0xFF,0x53,0x2F,0x1C,0x53,0x53,0x2D,0x10,0x15, + 0x5B,0x40,0x07,0xDE,0x2D,0x01,0xC5,0x2D,0x2D,0x38,0x15, + 0x27,0x9B,0x3C,0x17,0x8A,0x38,0x66,0xD5,0x38,0x38,0x55, + 0x1A,0x55,0x55,0x80,0x20,0x80,0x55,0x92,0xAB,0x55,0x55, + 0x12,0x0B,0x07,0x3F,0x90,0x04,0xAB,0x12,0x04,0xF6,0x12, + 0x12,0x23,0x1B,0x0A,0x92,0xAE,0x0C,0xAB,0x23,0x1A,0x80, + 0x23,0x23,0xBE,0x50,0x23,0x63,0xB4,0x7E,0x50,0xBE,0x36, + 0x2D,0xBE,0xBE,0x55,0x7E,0x2F,0x57,0xB0,0x29,0x33,0x55, + 0x14,0x20,0x55,0x55,0x65,0x4B,0x80,0x8B,0x76,0x74,0x92, + 0x65,0x80,0x55,0x65,0x65,0x38,0x29,0x0F,0xB0,0xEC,0x25, + 0x55,0x38,0x09,0x3E,0x38,0x38,0x92,0x24,0x13,0x1E,0xAB, + 0x61,0xFF,0x92,0x1B,0x14,0x92,0x92,0x47,0x1E,0x11,0x77, + 0x76,0x11,0xFF,0x47,0x12,0x8A,0x47,0x47,0x65,0x26,0x3C, + 0x8A,0x37,0x2B,0x46,0x65,0x1A,0x8E,0x65,0x65,0x8A,0x2D, + 0x3D,0x3E,0xDB,0x51,0x01,0x8A,0xBC,0x40,0x8A,0x8A,0x20, + 0x29,0x14,0x75,0x97,0x14,0x8E,0x20,0x15,0xA3,0x20,0x20, + 0x70,0x13,0x0C,0x3D,0xC3,0x30,0x80,0x70,0x04,0x18,0x70, + 0x70, +}; + +static unsigned char prob_2nd_part[1200]= +{ + 0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80, + 0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80, + 0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80, + 0x80,0x80,0x80,0xFD,0x88,0xFE,0xFF,0xE4,0x80,0xFD,0xDB, + 0x80,0x80,0x80,0x80,0xE0,0x81,0xF2,0xFF,0xE3,0xFF,0xE0, + 0xD5,0xDB,0x80,0x80,0x80,0x6A,0x7E,0xE3,0xFC,0xD6,0xFF, + 0x6A,0xD1,0xFF,0x80,0x80,0x80,0x01,0x62,0xF8,0xFF,0xEC, + 0xFF,0x01,0xE2,0xFF,0x80,0x80,0x80,0xB5,0x85,0xEE,0xFE, + 0xDD,0xFF,0xB5,0xEA,0x9A,0x80,0x80,0x80,0x4E,0x86,0xCA, + 0xF7,0xC6,0xFF,0x4E,0xB4,0xDB,0x80,0x80,0x80,0x01,0xB9, + 0xF9,0xFF,0xF3,0x80,0x01,0xFF,0x80,0x80,0x80,0x80,0xB8, + 0x96,0xF7,0xFF,0xEC,0x80,0xB8,0xE0,0x80,0x80,0x80,0x80, + 0x4D,0x6E,0xD8,0xFF,0xEC,0x80,0x4D,0xE6,0x80,0x80,0x80, + 0x80,0x01,0x65,0xFB,0xFF,0xF1,0x80,0x01,0xFF,0x80,0x80, + 0x80,0x80,0xAA,0x8B,0xF1,0xFC,0xEC,0xFF,0xAA,0xD1,0xFF, + 0x80,0x80,0x80,0x25,0x74,0xC4,0xF3,0xE4,0xFF,0x25,0xFF, + 0xFF,0x80,0x80,0x80,0x01,0xCC,0xFE,0xFF,0xF5,0x80,0x01, + 0xFF,0x80,0x80,0x80,0x80,0xCF,0xA0,0xFA,0xFF,0xEE,0x80, + 0xCF,0x80,0x80,0x80,0x80,0x80,0x66,0x67,0xE7,0xFF,0xD3, + 0x80,0x66,0xAB,0x80,0x80,0x80,0x80,0x01,0x98,0xFC,0xFF, + 0xF0,0x80,0x01,0xFF,0x80,0x80,0x80,0x80,0xB1,0x87,0xF3, + 0xFF,0xEA,0x80,0xB1,0xE1,0x80,0x80,0x80,0x80,0x50,0x81, + 0xD3,0xFF,0xC2,0x80,0x50,0xE0,0x80,0x80,0x80,0x80,0x01, + 0x01,0xFF,0x80,0x80,0x80,0x01,0x80,0x80,0x80,0x80,0x80, + 0xF6,0x01,0xFF,0x80,0x80,0x80,0xF6,0x80,0x80,0x80,0x80, + 0x80,0xFF,0x80,0x80,0x80,0x80,0x80,0xFF,0x80,0x80,0x80, + 0x80,0x80,0x2A,0x23,0xA4,0xDF,0xC1,0xA2,0x2A,0xBB,0xA0, + 0x91,0x9B,0x3E,0x83,0x2D,0xC6,0xDD,0xAC,0xDC,0x83,0xB0, + 0x9D,0xFC,0xDD,0x01,0x44,0x2F,0x92,0xD0,0x95,0xDD,0x44, + 0xA7,0xA2,0xFF,0xDF,0x80,0x01,0x95,0xF1,0xFF,0xDD,0xFF, + 0x01,0xE0,0xFF,0x80,0x80,0x80,0xB8,0x8D,0xEA,0xFD,0xDE, + 0xFF,0xB8,0xDC,0xC7,0x80,0x80,0x80,0x51,0x63,0xB5,0xF2, + 0xB0,0xF9,0x51,0xBE,0xCA,0xFF,0xFF,0x80,0x01,0x81,0xE8, + 0xFD,0xD6,0xF2,0x01,0xC5,0xC4,0xFF,0xFF,0x80,0x63,0x79, + 0xD2,0xFA,0xC9,0xFF,0x63,0xC6,0xCA,0x80,0x80,0x80,0x17, + 0x5B,0xA3,0xF2,0xAA,0xF7,0x17,0xBB,0xD2,0xFF,0xFF,0x80, + 0x01,0xC8,0xF6,0xFF,0xEA,0x80,0x01,0xFF,0x80,0x80,0x80, + 0x80,0x6D,0xB2,0xF1,0xFF,0xE7,0xFF,0x6D,0xF5,0xFF,0x80, + 0x80,0x80,0x2C,0x82,0xC9,0xFD,0xCD,0xFF,0x2C,0xC0,0xFF, + 0x80,0x80,0x80,0x01,0x84,0xEF,0xFB,0xDB,0xFF,0x01,0xD1, + 0xA5,0x80,0x80,0x80,0x5E,0x88,0xE1,0xFB,0xDA,0xFF,0x5E, + 0xBE,0xFF,0x80,0x80,0x80,0x16,0x64,0xAE,0xF5,0xBA,0xFF, + 0x16,0xA1,0xC7,0x80,0x80,0x80,0x01,0xB6,0xF9,0xFF,0xE8, + 0x80,0x01,0xEB,0x80,0x80,0x80,0x80,0x7C,0x8F,0xF1,0xFF, + 0xE3,0x80,0x7C,0xEA,0x80,0x80,0x80,0x80,0x23,0x4D,0xB5, + 0xFB,0xC1,0xFF,0x23,0xD3,0xCD,0x80,0x80,0x80,0x01,0x9D, + 0xF7,0xFF,0xEC,0xFF,0x01,0xE7,0xFF,0x80,0x80,0x80,0x79, + 0x8D,0xEB,0xFF,0xE1,0xFF,0x79,0xE3,0xFF,0x80,0x80,0x80, + 0x2D,0x63,0xBC,0xFB,0xC3,0xFF,0x2D,0xD9,0xE0,0x80,0x80, + 0x80,0x01,0x01,0xFB,0xFF,0xD5,0x80,0x01,0xFF,0x80,0x80, + 0x80,0x80,0xCB,0x01,0xF8,0xFF,0xFF,0x80,0xCB,0x80,0x80, + 0x80,0x80,0x80,0x89,0x01,0xB1,0xFF,0xE0,0x80,0x89,0xFF, + 0x80,0x80,0x80,0x80,0xDE,0x1A,0xDA,0xFB,0xCF,0xFF,0xDE, + 0xD0,0xC0,0x80,0x80,0x80,0x79,0x1D,0xAA,0xF3,0x9E,0xF9, + 0x79,0xB9,0xC6,0xFF,0xFF,0x80,0x25,0x1D,0x6C,0xB3,0x7C, + 0xC2,0x25,0xB3,0xA7,0xFF,0xEA,0x80,0x01,0x91,0xE2,0xFD, + 0xD4,0xFF,0x01,0xB7,0xFF,0x80,0x80,0x80,0xA1,0x9A,0xE5, + 0xFA,0xD3,0xFF,0xA1,0xD1,0xFF,0x80,0x80,0x80,0x53,0x6C, + 0xC3,0xE4,0xBC,0xFF,0x53,0xC3,0xC3,0x80,0x80,0x80,0x01, + 0x35,0xD1,0xFB,0xDA,0xFF,0x01,0xDB,0xCD,0x80,0x80,0x80, + 0x5D,0x33,0xAD,0xEF,0xC4,0x80,0x5D,0xBA,0x80,0x80,0x80, + 0x80,0x16,0x2E,0x5C,0xEF,0x76,0xFF,0x16,0xDA,0xE4,0x80, + 0x80,0x80,0x01,0x8F,0xDF,0xFF,0xD2,0x80,0x01,0x80,0x80, + 0x80,0x80,0x80,0xAE,0x8B,0xDB,0xFF,0xD5,0x80,0xAE,0xFF, + 0x80,0x80,0x80,0x80,0x38,0x7C,0xBD,0xFF,0xB6,0x80,0x38, + 0x80,0x80,0x80,0x80,0x80,0x01,0xB4,0xF8,0xFF,0xFF,0x80, + 0x01,0x80,0x80,0x80,0x80,0x80,0x6D,0xA1,0xE6,0xFF,0xEC, + 0x80,0x6D,0xFF,0x80,0x80,0x80,0x80,0x0A,0x7B,0xCB,0x80, + 0x80,0x80,0x0A,0x80,0x80,0x80,0x80,0x80,0x01,0xD1,0xE4, + 0x80,0x80,0x80,0x01,0x80,0x80,0x80,0x80,0x80,0x5E,0xC0, + 0xFF,0x80,0x80,0x80,0x5E,0x80,0x80,0x80,0x80,0x80,0x32, + 0x80,0xFF,0x80,0x80,0x80,0x32,0x80,0x80,0x80,0x80,0x80, + 0x01,0x98,0xE2,0xFF,0xE8,0x80,0x01,0x80,0x80,0x80,0x80, + 0x80,0x6A,0x77,0xD0,0xFF,0xD5,0x80,0x6A,0x80,0x80,0x80, + 0x80,0x80,0x37,0x5D,0xB8,0xFB,0x80,0x80,0x37,0x80,0x80, + 0x80,0x80,0x80,0x01,0x01,0xFB,0x80,0x80,0x80,0x01,0x80, + 0x80,0x80,0x80,0x80,0xD4,0x01,0x80,0x80,0x80,0x80,0xD4, + 0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80, + 0x80,0x80,0x80,0x80,0x80,0x80,0xD7,0x18,0xB7,0xEB,0xBA, + 0xDC,0xD7,0xBF,0xA0,0xF0,0xAF,0xFF,0x64,0x30,0xA0,0xE8, + 0xA9,0xE4,0x64,0xB8,0xAE,0xFF,0xBB,0x80,0x19,0x2E,0x63, + 0xC7,0x88,0xE5,0x19,0xB2,0xAA,0xFF,0xD8,0x80,0x01,0x70, + 0xD7,0xFA,0xC7,0xF7,0x01,0xBF,0x9F,0xFF,0xFF,0x80,0x63, + 0x6D,0xD2,0xFC,0xD3,0xFF,0x63,0xD7,0xAE,0x80,0x80,0x80, + 0x13,0x4D,0x84,0xE0,0x98,0xF5,0x13,0xB4,0xB2,0xFF,0xFF, + 0x80,0x01,0x43,0xB3,0xF6,0xB2,0xF9,0x01,0xC7,0xDC,0xFF, + 0xFF,0x80,0x3A,0x4A,0x9B,0xF3,0xB7,0xFA,0x3A,0xC1,0xDD, + 0xFF,0xFF,0x80,0x06,0x3C,0x53,0xCD,0x9A,0xF3,0x06,0xAA, + 0xB6,0xFF,0xFF,0x80,0x01,0x94,0xC6,0xF9,0xDB,0xFF,0x01, + 0xF0,0xE0,0x80,0x80,0x80,0x51,0x84,0xC6,0xFC,0xBA,0xFF, + 0x51,0xCD,0xAB,0x80,0x80,0x80,0x0B,0x58,0x83,0xF2,0xA1, + 0xFE,0x0B,0xC2,0xDF,0xFF,0xFF,0x80,0x01,0x6F,0xCE,0xFC, + 0xCC,0xFF,0x01,0xCB,0xC0,0x80,0x80,0x80,0x5B,0x66,0xBB, + 0xF7,0xBC,0xFF,0x5B,0xC4,0xE9,0x80,0x80,0x80,0x14,0x5F, + 0x99,0xF3,0xA4,0xFF,0x14,0xAD,0xCB,0x80,0x80,0x80,0x01, + 0xEB,0xF8,0xFF,0xD8,0x80,0x01,0xD5,0x80,0x80,0x80,0x80, + 0x5A,0xCB,0xF6,0xFC,0xEB,0xFF,0x5A,0xCD,0xFF,0x80,0x80, + 0x80,0x0E,0x74,0xD7,0xFF,0xD3,0xFF,0x0E,0xD4,0xFF,0x80, + 0x80,0x80,0x01,0x64,0xD3,0xF9,0xC4,0xFF,0x01,0xD6,0xFF, + 0x80,0x80,0x80,0x69,0x54,0xB8,0xF7,0xB5,0xFF,0x69,0xCA, + 0xDB,0x80,0x80,0x80,0x1A,0x5C,0x94,0xE6,0xA2,0xFF,0x1A, + 0xB9,0xCD,0x80,0x80,0x80,0x01,0x01,0xFF,0x80,0x80,0x80, + 0x01,0x80,0x80,0x80,0x80,0x80,0xF4,0x01,0xFF,0x80,0x80, + 0x80,0xF4,0x80,0x80,0x80,0x80,0x80,0xEE,0x01,0xFF,0x80, + 0x80,0x80,0xEE,0x80,0x80,0x80,0x80,0x80,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00, +}; + +static unsigned char slc_data[65536]= +{ + 0x90,0x4F,0x63,0x52,0x00,0x03,0x9D,0x07,0xB1,0xA9,0x00, + 0x01,0xCE,0x83,0xD8,0xD4,0x80,0x00,0xE7,0x41,0xEA,0x9D, + 0x31,0x0D,0x96,0xD2,0xAB,0x33,0xCE,0x83,0xD8,0xD4,0x80, + 0x00,0xE7,0x41,0xEC,0x6A,0x40,0x00,0x73,0xA0,0xF6,0x35, + 0x20,0x00,0x39,0xD0,0x7B,0x1A,0x90,0x00,0x1C,0xE8,0x3D, + 0x8D,0x48,0x00,0x0E,0x74,0x1E,0xC4,0x60,0xCB,0xA5,0x1A, + 0xFF,0xA9,0xE5,0x0E,0xC6,0xFB,0x3A,0x6B,0x72,0x76,0x41, + 0xC7,0x3A,0x0F,0x63,0x52,0x00,0x03,0x9D,0x07,0xB1,0xA9, + 0x00,0x01,0xCE,0x83,0xD8,0xD4,0x80,0x00,0xE7,0x41,0xEC, + 0x6A,0x40,0x00,0x73,0xA0,0xF6,0x35,0x20,0x00,0x39,0xD0, + 0x7B,0x1A,0x8F,0xF9,0x06,0x0E,0xBF,0xD6,0x54,0x90,0xA6, + 0xA4,0x31,0xC8,0xCE,0x73,0x85,0x4B,0x39,0x10,0x1C,0x0B, + 0x72,0x39,0x92,0xC2,0x8C,0x34,0x45,0x42,0x6F,0x74,0x2E, + 0x0F,0xF1,0x41,0xAA,0x76,0x9B,0x74,0x13,0x28,0x42,0xDA, + 0xBA,0xE4,0x2A,0x89,0xE6,0xA0,0x2B,0x8E,0xA4,0x00,0x07, + 0x3A,0x0F,0x63,0x52,0x00,0x03,0x9D,0x07,0xB1,0xA9,0x00, + 0x01,0xCE,0x83,0xD8,0xD4,0x80,0x00,0xE7,0x41,0xEC,0x6A, + 0x40,0x00,0x73,0xA0,0xF6,0x35,0x1F,0xFF,0x89,0xD6,0x04, + 0xC1,0x18,0x34,0x5B,0x6A,0xFD,0x9C,0x85,0x69,0x28,0xC0, + 0x32,0x2A,0x98,0x9F,0xE3,0x68,0x17,0xE5,0xFB,0x4F,0x64, + 0x2B,0xC3,0x33,0xD0,0xAA,0xD1,0x99,0x2F,0xA8,0x5D,0x23, + 0x8A,0x55,0xC8,0xC7,0x47,0xF3,0xCE,0x83,0xD8,0xD4,0x80, + 0x00,0xE7,0x41,0xEC,0x6A,0x40,0x00,0x73,0xA0,0xF6,0x35, + 0x20,0x00,0x39,0xD0,0x7B,0x1A,0x90,0x00,0x1C,0xE8,0x3D, + 0x8D,0x48,0x00,0x0E,0x74,0x1E,0xA0,0x24,0x67,0xAA,0xC9, + 0xDD,0x48,0x0B,0x33,0xA3,0x0C,0x18,0xEA,0x14,0xD5,0x84, + 0x71,0x66,0x3D,0xB0,0x5F,0x9D,0x5C,0xB2,0x87,0x29,0xF8, + 0x61,0xA9,0xB8,0xCE,0xF4,0x67,0x4A,0x3F,0x52,0xF0,0xC9, + 0xCC,0xAA,0x5F,0xD3,0xDE,0xB6,0x2A,0xB3,0xE9,0xDE,0x47, + 0x1F,0xF7,0x76,0x9A,0x7F,0xF5,0x89,0xBC,0xED,0x19,0x7D, + 0x02,0x04,0x94,0x82,0xCA,0x89,0x21,0x9D,0x6C,0x6A,0x40, + 0x00,0x73,0xA0,0xF6,0x35,0x20,0x00,0x39,0xD0,0x7B,0x1A, + 0x90,0x00,0x1C,0xE8,0x3D,0x8D,0x48,0x00,0x0E,0x74,0x1E, + 0xC6,0xA4,0x00,0x07,0x3A,0x0E,0x20,0x81,0xB6,0x21,0x97, + 0x37,0xE0,0x98,0xBA,0x71,0x7B,0x7C,0x58,0x58,0xA6,0x1C, + 0x3B,0x29,0x3E,0x25,0x78,0x8D,0xC6,0x10,0x9E,0x88,0x4F, + 0x19,0x26,0x41,0x50,0x17,0xA9,0x38,0xD2,0x0F,0x20,0x84, + 0xDA,0x1A,0x44,0xB1,0x87,0x19,0x2F,0x37,0xBD,0x17,0x3C, + 0xA7,0xA0,0x8A,0xFE,0x4F,0x55,0x35,0xB4,0x0A,0xAF,0x61, + 0x27,0xC7,0xB0,0xC2,0x34,0xE3,0x7A,0x6D,0x66,0xC7,0xEE, + 0x4D,0xC0,0x84,0xF6,0x51,0x2F,0x3F,0x1F,0xBA,0xD9,0x84, + 0x1F,0xEA,0x6F,0x09,0x50,0x62,0xF4,0x9D,0x9B,0x43,0xD8, + 0xFC,0xB6,0x2F,0x91,0xA2,0x7B,0x9F,0xAD,0x8D,0x48,0x00, + 0x0E,0x74,0x1E,0xC6,0xA4,0x00,0x07,0x3A,0x0F,0x63,0x52, + 0x00,0x03,0x9D,0x07,0xB1,0xA9,0x00,0x01,0xCE,0x83,0xD8, + 0xD4,0x7C,0x41,0xDC,0x52,0x73,0x19,0xAC,0xE5,0x3E,0x6E, + 0x79,0x37,0x72,0x4C,0x8C,0x00,0x14,0x62,0xCA,0xAE,0xFB, + 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void decode_test(int fd) +{ + struct drm_ipvr_context_create ctx_create; + struct drm_ipvr_context_destroy ctx_destroy; + struct drm_ipvr_gem_create create; + struct drm_ipvr_gem_mmap mmap; + struct drm_ipvr_sync_cpu synccpu; + struct drm_ipvr_gem_execbuffer exec; + struct drm_ipvr_gem_wait wait; + struct drm_gem_close close; + struct ipvr_validate_arg *val_list; + unsigned char *Y_start = NULL, *UV_start = NULL; + int Y_pitch = 1280, UV_pitch = 1280, row, size = 0; + FILE *decyuv_fp = NULL; + int i, ret, buffer_count, ctx_type; + unsigned char *surface_addr; + unsigned int *cmd_int_addr, *msg_int_addr; + uint32_t surface_handle = 0; + uint32_t cmd_size = 0, msg_size = 0; + printf("this is one frame vp8 decoding test, resolution is 720p:\n"); + + buffer_count = 12; + val_list = calloc(1, sizeof(struct ipvr_validate_arg) * buffer_count); + + /* create a ctx_context, which is needed for exec ioctl */ + ctx_type = 0x1 | (0x1 << 8); + ctx_create.ctx_type = ctx_type; + ctx_create.tiling_scheme = 0; + ctx_create.tiling_stride = 0; + ret = drmCommandWriteRead(fd, DRM_IPVR_CONTEXT_CREATE, &ctx_create, sizeof(ctx_create)); + if (ret == 0) + printf("succeed to call DRM_IOCTL_IPVR_CONTEXT_CREATE ioctl, ctx_id is %d.\n", + ctx_create.ctx_id); + else { + printf("failed to call DRM_IOCTL_IPVR_CONTEXT_CREATE ioctl.\n"); + abort(); + } + + for (i = 0; i < buffer_count; ++i) { + memset(&create, 0, sizeof(create)); + create.size = bo_size[i]; + create.tiling = 0; + create.cache_level = 0; + ret = drmCommandWriteRead(fd, DRM_IPVR_GEM_CREATE, &create, sizeof(create)); + if (ret == 0) + printf("succeed to call DRM_IOCTL_IPVR_GEM_CREATE ioctl for bo %03d, handle is 0x%x, rounded_size is %"PRIu64", gpu_offset is 0x%"PRIx64".\n", + i, create.handle, create.rounded_size, create.gpu_offset); + else { + printf("failed to call DRM_IOCTL_IPVR_GEM_CREATE ioctl of bo %03d, size %zu.\n", i, bo_size[i]); + abort(); + } + if (bo_data[i] != NULL) { + mmap.handle = create.handle; + mmap.offset = 0; + mmap.size = create.rounded_size; + ret = drmCommandWriteRead(fd, DRM_IPVR_GEM_MMAP, &mmap, sizeof(mmap)); + if (ret == 0) { + printf("succeed to call DRM_IOCTL_IPVR_GEM_MMAP ioctl for bo %03d, addr_ptr is 0x%"PRIx64".\n", + i, mmap.addr_ptr); + memcpy((void*)(unsigned long)mmap.addr_ptr, bo_data[i], bo_size[i]); + } else { + printf("failed to call DRM_IOCTL_IPVR_GEM_MMAP ioctl.\n"); + abort(); + } + + synccpu.handle = mmap.handle; + synccpu.op = IPVR_SYNCCPU_OP_RELEASE; + ret = drmCommandWriteRead(fd, DRM_IPVR_SYNC_CPU, &synccpu, sizeof(synccpu)); + if (ret) { + printf("failed to call DRM_IOCTL_IPVR_SYNC_CPU ioctl.\n"); + abort(); + } + } + + if (i == 0) { + msg_size = create.rounded_size; + } + if (i == 1) { + cmd_size = create.rounded_size; + } + if (i == 11) { + surface_handle = create.handle; + } + + val_list[i].handle = create.handle; + val_list[i].presumed_gpu_offset = create.gpu_offset; + + if (i == buffer_count - 1) + val_list[i].next = 0; + else + val_list[i].next = (unsigned long) & (val_list[i+1]); + } + + /* write relocs into cmd bo */ + mmap.handle = val_list[1].handle; + mmap.offset = 0; + mmap.size = cmd_size; + ret = drmCommandWriteRead(fd, DRM_IPVR_GEM_MMAP, &mmap, sizeof(mmap)); + if (ret == 0) { + printf("succeed to call DRM_IOCTL_IPVR_GEM_MMAP ioctl for cmd bo, addr_ptr is 0x%"PRIx64".\n", + mmap.addr_ptr); + cmd_int_addr = (unsigned int *)(unsigned long)mmap.addr_ptr; + cmd_int_addr[0x8/4] = val_list[2].presumed_gpu_offset; + cmd_int_addr[0x30/4] = val_list[3].presumed_gpu_offset; + cmd_int_addr[0x70/4] = val_list[4].presumed_gpu_offset; + cmd_int_addr[0x78/4] = val_list[5].presumed_gpu_offset; + cmd_int_addr[0xac/4] = val_list[6].presumed_gpu_offset; + cmd_int_addr[0xb4/4] = val_list[7].presumed_gpu_offset; + cmd_int_addr[0xbc/4] = val_list[3].presumed_gpu_offset + 0x1c43; + cmd_int_addr[0xf0/4] = val_list[8].presumed_gpu_offset; + cmd_int_addr[0xf8/4] = val_list[9].presumed_gpu_offset; + cmd_int_addr[0x108/4] = val_list[10].presumed_gpu_offset; + cmd_int_addr[0x110/4] = val_list[11].presumed_gpu_offset; + cmd_int_addr[0x114/4] = val_list[11].presumed_gpu_offset + 0xe6000; + cmd_int_addr[0x11c/4] = val_list[11].presumed_gpu_offset; + cmd_int_addr[0x120/4] = val_list[11].presumed_gpu_offset + 0xe6000; + cmd_int_addr[0x124/4] = val_list[11].presumed_gpu_offset; + cmd_int_addr[0x128/4] = val_list[11].presumed_gpu_offset + 0xe6000; + cmd_int_addr[0x12c/4] = val_list[11].presumed_gpu_offset; + cmd_int_addr[0x130/4] = val_list[11].presumed_gpu_offset + 0xe6000; + } else { + printf("failed to call DRM_IOCTL_IPVR_GEM_MMAP ioctl.\n"); + } + synccpu.handle = mmap.handle; + synccpu.op = IPVR_SYNCCPU_OP_RELEASE; + ret = drmCommandWriteRead(fd, DRM_IPVR_SYNC_CPU, &synccpu, sizeof(synccpu)); + if (ret) { + printf("failed to call DRM_IOCTL_IPVR_SYNC_CPU ioctl.\n"); + abort(); + } + /* cmd buf end */ + + /* write relocs/ctx into msg bo */ + mmap.handle = val_list[0].handle; + mmap.offset = 0; + mmap.size = msg_size; + ret = drmCommandWriteRead(fd, DRM_IPVR_GEM_MMAP, &mmap, sizeof(mmap)); + if (ret == 0) { + printf("succeed to call DRM_IOCTL_IPVR_GEM_MMAP ioctl for msg bo, addr_ptr is 0x%"PRIx64".\n", + mmap.addr_ptr); + msg_int_addr = (unsigned int *)(unsigned long)mmap.addr_ptr; + msg_int_addr[2] = val_list[1].presumed_gpu_offset; + msg_int_addr[3] &= 0xffffff00; + msg_int_addr[3] |= ctx_create.ctx_id; + } else { + printf("failed to call DRM_IOCTL_IPVR_GEM_MMAP ioctl.\n"); + } + synccpu.handle = mmap.handle; + synccpu.op = IPVR_SYNCCPU_OP_RELEASE; + ret = drmCommandWriteRead(fd, DRM_IPVR_SYNC_CPU, &synccpu, sizeof(synccpu)); + if (ret) { + printf("failed to call DRM_IOCTL_IPVR_SYNC_CPU ioctl.\n"); + abort(); + } + /* msg buf end */ + + /* run execbuffer ioctl */ + exec.buffer_count = buffer_count; + exec.buffer_list = (unsigned long)val_list; + exec.cmdbuf_handle = val_list[0].handle; + exec.cmdbuf_size = 20; + exec.ctx_id = ctx_create.ctx_id; + + ret = drmCommandWriteRead(fd, DRM_IPVR_GEM_EXECBUFFER, &exec, sizeof(exec)); + if (ret == 0) { + printf("succeed to call DRM_IOCTL_IPVR_GEM_EXECBUFFER ioctl.\n"); + } else { + printf("failed to call DRM_IOCTL_IPVR_GEM_EXECBUFFER ioctl.\n"); + } + + /* wait decode complete */ + wait.handle = surface_handle; + ret = drmCommandWriteRead(fd, DRM_IPVR_GEM_WAIT, &wait, sizeof(exec)); + if (ret == 0) { + printf("succeed to call DRM_IOCTL_IPVR_GEM_WAIT ioctl.\n"); + } else { + printf("failed to call DRM_IOCTL_IPVR_GEM_WAIT ioctl.\n"); + abort(); + } + /* wait end */ + + /* dump decoded surface */ + { + mmap.handle = surface_handle; + mmap.offset = 0; + mmap.size = 1280*736*3/2; + ret = drmCommandWriteRead(fd, DRM_IPVR_GEM_MMAP, &mmap, sizeof(mmap)); + if (ret) { + printf("failed to call DRM_IOCTL_IPVR_GEM_MMAP ioctl on surface.\n"); + abort(); + } + surface_addr =(unsigned char *)(unsigned long)mmap.addr_ptr; + Y_start = surface_addr; + UV_start = surface_addr + 1280 * 736; + decyuv_fp = fopen("1280x720.nv12","w+"); + if (decyuv_fp == NULL) + printf("Open YUV file 1280x720.nv12 failed\n"); + /* copy Y plane */ + for (row = 0; row < CLIP_HEIGHT; row++) { + unsigned char *Y_row = Y_start + row * Y_pitch; + if (decyuv_fp) + size += fwrite(Y_row, 1, CLIP_WIDTH, decyuv_fp); + } + /* copy UV plane */ + for (row = 0; row < CLIP_HEIGHT/2; row++) { + unsigned char *U_row = UV_start + row * UV_pitch; + if (decyuv_fp) + size += fwrite(U_row, 1, CLIP_WIDTH, decyuv_fp); + } + fflush(decyuv_fp); + fsync(fileno(decyuv_fp)); + fclose(decyuv_fp); + synccpu.handle = mmap.handle; + synccpu.op = IPVR_SYNCCPU_OP_RELEASE; + ret = drmCommandWriteRead(fd, DRM_IPVR_SYNC_CPU, &synccpu, sizeof(synccpu)); + if (ret) { + printf("failed to call DRM_IOCTL_IPVR_SYNC_CPU ioctl.\n"); + abort(); + } + } + /* close val bo and cmd bo */ + for (i = 0; i < buffer_count; i++) { + close.handle = val_list[i].handle; + ret = drmIoctl(fd, DRM_IOCTL_GEM_CLOSE, &close); + if (ret == 0) { + printf("succeed to call DRM_IOCTL_GEM_CLOSE ioctl.\n"); + } else { + printf("failed to call DRM_IOCTL_GEM_CLOSE ioctl.\n"); + abort(); + } + } + + free(val_list); + + /* destroy the ctx_context */ + ctx_destroy.ctx_id = ctx_create.ctx_id; + ret = drmCommandWriteRead(fd, DRM_IPVR_CONTEXT_DESTROY, &ctx_destroy, sizeof(ctx_destroy)); + if (ret == 0) + printf("succeed to call DRM_IOCTL_IPVR_CONTEXT_DESTROY ioctl.\n"); + else { + printf("failed to call DRM_IOCTL_IPVR_CONTEXT_DESTROY ioctl.\n"); + abort(); + } +} + +int main(int argc, char **argv) +{ + int fd; + fd = open("/dev/dri/card1", O_RDWR); + /* decode unit test */ + decode_test(fd); + close(fd); + return 0; +} diff --git a/ipvr/test_ioctl.c b/ipvr/test_ioctl.c new file mode 100644 index 0000000..ecde21a --- /dev/null +++ b/ipvr/test_ioctl.c @@ -0,0 +1,323 @@ +/************************************************************************** + * test_ioctl.c: it is gem ioctl unit test + * + * Copyright (c) 2014 Intel Corporation, Hillsboro, OR, USA + * All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. + * + * Authors: + * Fei Jiang fei.jiang@intel.com + * Yao Cheng yao.cheng@intel.com + * + **************************************************************************/ +#include <stdlib.h> +#include <stdio.h> +#include <unistd.h> +#include <string.h> +#include <assert.h> +#include <fcntl.h> +#include <inttypes.h> +#include <errno.h> +#include <sys/stat.h> +#include <sys/ioctl.h> +#include <stdint.h> +#include <sys/ioctl.h> +#include "ipvr_drm.h" +#include "i915_drm.h" +#include <xf86drm.h> +#include <sys/time.h> +#include <time.h> +#include <errno.h> + +#define exiterr(ret, fmt, ...) \ + do { \ + fprintf(stderr, fmt, ##__VA_ARGS__); \ + exit(ret); \ + } while (0); + +static unsigned char msg_data[] = { + 0x14,0x81,0x80,0x01,0x11,0x49,0x85,0x00,0x00,0xd0,0x5b,0x00,0x95,0x70,0xee,0x31, + 0x00,0x10,0x21,0x04 +}; + +static void basic_test(int fd) +{ + struct drm_ipvr_gem_create create_arg; + struct drm_ipvr_gem_mmap mmap_arg; + struct drm_gem_close close_arg; + struct drm_gem_flink flink_arg; + struct drm_gem_open open_arg; + uint32_t global_name; + uint32_t *pdword; + int ret; + + printf("Testing gem create.\n"); + printf("\nPress any key to continue gem create ioctl.\n"); + getchar(); + + /* create bo iotcl*/ + memset(&create_arg, 0, sizeof(create_arg)); + create_arg.size = 16 * 1024; + ret = drmCommandWriteRead(fd, DRM_IPVR_GEM_CREATE, &create_arg, sizeof(create_arg)); + if (ret == 0) { + printf("succeed to call DRM_IOCTL_IPVR_GEM_CREATE ioctl, handle is 0x%x, rounded_size is %ld, gpu_offset is 0x%lx.\n", + create_arg.handle, (unsigned long)create_arg.rounded_size, (unsigned long)create_arg.gpu_offset); + } + else + exiterr(-1, "failed to call DRM_IOCTL_IPVR_GEM_CREATE ioctl: %d (%s).\n", ret, strerror(ret)); + + printf("\nPress any key to continue gem mmap ioctl.\n"); + getchar(); + + /* mmap bo ioctl*/ + mmap_arg.handle = create_arg.handle; + mmap_arg.offset = 0; + mmap_arg.size = create_arg.rounded_size; + ret = drmCommandWriteRead(fd, DRM_IPVR_GEM_MMAP, &mmap_arg, sizeof(mmap_arg)); + if (ret == 0) { + printf("succeed to call DRM_IOCTL_IPVR_GEM_MMAP ioctl, addr_ptr is 0x%lx.\n", + (unsigned long)mmap_arg.addr_ptr); + pdword = (uint32_t *)(unsigned long)mmap_arg.addr_ptr; + *pdword++ = 0xa5a5a5a5; + *pdword++ = 0xb6b6b6b6; + *pdword++ = 0xc7c7c7c7; + *pdword++ = 0xd8d8d8d8; + } else + exiterr(-1, "failed to call DRM_IOCTL_IPVR_GEM_MMAP ioctl: %d (%s).\n", ret, strerror(ret)); + + printf("\nPress any key to test opening flinked BOs.\n"); + getchar(); + + { + /* flink the bo */ + flink_arg.handle = create_arg.handle; + flink_arg.name = 0; + ret = drmIoctl(fd, DRM_IOCTL_GEM_FLINK, &flink_arg); + if (ret == 0) + printf("succeed to call DRM_IOCTL_GEM_FLINK ioctl.\n"); + else + exiterr(-1, "failed to call DRM_IOCTL_GEM_FLINK ioctl: %d (%s).\n", ret, strerror(ret)); + + global_name = flink_arg.name; + + /* open from flink name */ + open_arg.name = global_name; + ret = drmIoctl(fd, DRM_IOCTL_GEM_OPEN, &open_arg); + if (ret == 0) + printf("succeed to call DRM_IOCTL_GEM_OPEN ioctl.\n"); + else + exiterr(-1, "failed to call DRM_IOCTL_GEM_OPEN ioctl: %d (%s).\n", ret, strerror(ret)); + + if (open_arg.size != create_arg.rounded_size) + exiterr(-1, "opened size %llu not consistent with created size %"PRIu64"\n", + open_arg.size, create_arg.rounded_size); + + /* mmap opened bo ioctl and check content */ + mmap_arg.handle = open_arg.handle; + mmap_arg.offset = 0; + mmap_arg.size = open_arg.size; + ret = drmCommandWriteRead(fd, DRM_IPVR_GEM_MMAP, &mmap_arg, sizeof(mmap_arg)); + if (ret == 0) { + printf("succeed to call DRM_IOCTL_IPVR_GEM_MMAP ioctl, addr_ptr is 0x%"PRIx64".\n", + mmap_arg.addr_ptr); + pdword = (uint32_t *)(unsigned long)mmap_arg.addr_ptr; + printf("flinked bo data is 0x%08x 0x%08x 0x%08x 0x%08x\n", + *pdword, *(pdword+1), *(pdword+2), *(pdword+3)); + if ((*pdword != 0xa5a5a5a5) || + (*(pdword+1) != 0xb6b6b6b6) || + (*(pdword+2) != 0xc7c7c7c7) || + (*(pdword+3) != 0xd8d8d8d8)) + exiterr(-1, "failed on data consistency check\n"); + + *pdword++ = 0x1a1a1a1a; + *pdword++ = 0x2b2b2b2b; + *pdword++ = 0x3c3c3c3c; + *pdword++ = 0x4d4d4d4d; + } else + exiterr(-1, "failed to call DRM_IOCTL_IPVR_GEM_MMAP ioctl: %d (%s).\n", ret, strerror(ret)); + + + /* close opened bo ioctl*/ + close_arg.handle = open_arg.handle; + ret = drmIoctl(fd, DRM_IOCTL_GEM_CLOSE, &close_arg); + if (ret == 0) + printf("succeed to call DRM_IOCTL_GEM_CLOSE ioctl.\n"); + else + exiterr(-1, "failed to call DRM_IOCTL_GEM_CLOSE ioctl: %d (%s).\n", ret, strerror(ret)); + + } + + /* close bo ioctl*/ + close_arg.handle = create_arg.handle; + ret = drmIoctl(fd, DRM_IOCTL_GEM_CLOSE, &close_arg); + if (ret == 0) + printf("succeed to call DRM_IOCTL_GEM_CLOSE ioctl.\n"); + else + exiterr(-1, "failed to call DRM_IOCTL_GEM_CLOSE ioctl: %d (%s).\n", ret, strerror(ret)); + + printf("\nPress any key to exit gem basic test.\n"); +} + +static void exec_test(int fd) +{ + struct drm_ipvr_context_create ctx_create_arg; + struct drm_ipvr_context_destroy ctx_destroy_arg; + struct drm_ipvr_gem_create create_arg; + struct drm_ipvr_gem_mmap mmap_arg; + struct drm_ipvr_gem_execbuffer exec_arg; + struct drm_ipvr_sync_cpu synccpu_arg; + struct drm_ipvr_gem_busy busy_arg; + struct drm_gem_close close_arg; + struct ipvr_validate_arg *val_list; + struct ipvr_validate_arg *arg; + int i, ret, buffer_count, cmdbuf_size, ctx_type; + + + /* create a ctx_context, which is needed for exec ioctl */ + memset(&ctx_create_arg, 0, sizeof(ctx_create_arg)); + ctx_type = 0x1 | (0x1 << 8); + ctx_create_arg.ctx_type = ctx_type; + ctx_create_arg.tiling_scheme = 0; + ctx_create_arg.tiling_stride = 0; + ret = drmCommandWriteRead(fd, DRM_IPVR_CONTEXT_CREATE, &ctx_create_arg, sizeof(ctx_create_arg)); + if (ret == 0) + printf("succeed to call DRM_IOCTL_IPVR_CONTEXT_CREATE ioctl, ctx_id is %d.\n", + ctx_create_arg.ctx_id); + else + exiterr(-1, "failed to call DRM_IOCTL_IPVR_CONTEXT_CREATE ioctl.\n"); + + /* create 3 bo which will be inserted into cmd bo */ + memset(&create_arg, 0, sizeof(create_arg)); + buffer_count = 3; + val_list = calloc(1, sizeof(struct ipvr_validate_arg) * buffer_count); + for (i = 0; i < buffer_count; i++) { + arg = &(val_list[i]); + memset(&create_arg, 0, sizeof(create_arg)); + create_arg.size = 16 * 1024; + ret = drmCommandWriteRead(fd, DRM_IPVR_GEM_CREATE, &create_arg, sizeof(create_arg)); + if (ret == 0) + printf("succeed to call DRM_IOCTL_IPVR_GEM_CREATE ioctl, handle is 0x%x, rounded_size is %ld, gpu_offset is 0x%lx.\n", + create_arg.handle, (unsigned long)create_arg.rounded_size, (unsigned long)create_arg.gpu_offset); + else + exiterr(-1, "failed to call DRM_IOCTL_IPVR_GEM_CREATE ioctl.\n"); + + arg->handle = create_arg.handle; + arg->presumed_gpu_offset = create_arg.gpu_offset; + arg->next = (unsigned long) & (val_list[i+1]);; + } + val_list[i-1].next = 0; + + /* create a cmd bo with 1 page */ + memset(&create_arg, 0, sizeof(create_arg)); + cmdbuf_size = 4 * 1024; + create_arg.size = cmdbuf_size; + ret = drmCommandWriteRead(fd, DRM_IPVR_GEM_CREATE, &create_arg, sizeof(create_arg)); + if (ret == 0) + printf("succeed to call DRM_IOCTL_IPVR_GEM_CREATE ioctl, handle is 0x%x, rounded_size is %ld, gpu_offset is 0x%lx.\n", + create_arg.handle, (unsigned long)create_arg.rounded_size, (unsigned long)create_arg.gpu_offset); + else + exiterr(-1, "failed to call DRM_IOCTL_IPVR_GEM_CREATE ioctl.\n"); + + memset(&mmap_arg, 0, sizeof(mmap_arg)); + mmap_arg.handle = create_arg.handle; + mmap_arg.offset = 0; + mmap_arg.size = create_arg.rounded_size; + ret = drmCommandWriteRead(fd, DRM_IPVR_GEM_MMAP, &mmap_arg, sizeof(mmap_arg)); + if (ret == 0) { + printf("succeed to call DRM_IOCTL_IPVR_GEM_MMAP ioctl, addr_ptr is 0x%lx.\n", + (unsigned long)mmap_arg.addr_ptr); + memcpy((void *)(unsigned long)mmap_arg.addr_ptr, msg_data, sizeof(msg_data)); + //*((uint32_t *)(unsigned long)mmap.addr_ptr) = val_list[0].presumed_gpu_offset; + //*((uint32_t *)(unsigned long)mmap.addr_ptr + 1) = val_list[1].presumed_gpu_offset; + //*((uint32_t *)(unsigned long)mmap.addr_ptr + 2) = val_list[2].presumed_gpu_offset; + } else + exiterr(-1, "failed to call DRM_IOCTL_IPVR_GEM_MMAP ioctl.\n"); + + /* run execbuffer ioctl */ + memset(&exec_arg, 0, sizeof(exec_arg)); + exec_arg.buffer_count = buffer_count; + exec_arg.buffer_list = (unsigned long)val_list; + exec_arg.cmdbuf_handle = mmap_arg.handle; + exec_arg.cmdbuf_size = 20; + exec_arg.ctx_id = ctx_create_arg.ctx_id; + + ret = drmCommandWriteRead(fd, DRM_IPVR_GEM_EXECBUFFER, &exec_arg, sizeof(exec_arg)); + if (ret == 0) + printf("succeed to call DRM_IOCTL_IPVR_GEM_EXECBUFFER ioctl.\n"); + else + exiterr(-1, "failed to call DRM_IOCTL_IPVR_GEM_EXECBUFFER ioctl.\n"); + + /*check busy ioctl*/ + memset(&busy_arg, 0, sizeof(busy_arg)); + busy_arg.handle = mmap_arg.handle; + ret = drmCommandWriteRead(fd, DRM_IPVR_GEM_BUSY, &busy_arg, sizeof(busy_arg)); + if (ret == 0) + printf("succeed to call DRM_IOCTL_IPVR_GEM_BUSY ioctl.\n"); + else + exiterr(-1, "failed to call DRM_IOCTL_IPVR_GEM_BUSY ioctl.\n"); + + /*sync cpu ioctl*/ + memset(&synccpu_arg, 0, sizeof(synccpu_arg)); + synccpu_arg.handle = mmap_arg.handle; + synccpu_arg.op = IPVR_SYNCCPU_OP_RELEASE; + ret = drmCommandWriteRead(fd, DRM_IPVR_SYNC_CPU, &synccpu_arg, sizeof(synccpu_arg)); + if (ret == 0) + printf("succeed to call DRM_IOCTL_IPVR_SYNC_CPU iotcl.\n"); + else + exiterr(-1, "failed to call DRM_IOCTL_IPVR_SYNC_CPU iotcl.\n"); + + /* close val bo and cmd bo */ + memset(&close_arg, 0, sizeof(close_arg)); + for (i = 0; i < buffer_count; i++) { + close_arg.handle = val_list[i].handle; + ret = drmIoctl(fd, DRM_IOCTL_GEM_CLOSE, &close_arg); + if (ret == 0) + printf("succeed to call DRM_IOCTL_GEM_CLOSE ioctl.\n"); + else + exiterr(-1, "failed to call DRM_IOCTL_GEM_CLOSE ioctl.\n"); + } + memset(&close_arg, 0, sizeof(close_arg)); + close_arg.handle = exec_arg.cmdbuf_handle; + ret = drmIoctl(fd, DRM_IOCTL_GEM_CLOSE, &close_arg); + if (ret == 0) + printf("succeed to call DRM_IOCTL_GEM_CLOSE ioctl.\n"); + else + exiterr(-1, "failed to call DRM_IOCTL_GEM_CLOSE ioctl.\n"); + + free(val_list); + + /* destroy the ctx_context */ + memset(&ctx_destroy_arg, 0, sizeof(ctx_destroy_arg)); + ctx_destroy_arg.ctx_id = ctx_create_arg.ctx_id; + ret = drmCommandWriteRead(fd, DRM_IPVR_CONTEXT_DESTROY, &ctx_destroy_arg, sizeof(ctx_destroy_arg)); + if (ret == 0) + printf("succeed to call DRM_IOCTL_IPVR_CONTEXT_DESTROY ioctl.\n"); + else + exiterr(-1, "failed to call DRM_IOCTL_IPVR_CONTEXT_DESTROY ioctl.\n"); + return; +} + +int main(int argc, char **argv) +{ + int fd; + + fd = open("/dev/dri/card1", O_RDWR); + /* test bo create, mmap, close */ + basic_test(fd); + /* simulate exec ioctl */ + exec_test(fd); + close(fd); + return 0; +}