This series updates DPCD 248h register name and PHY test patterns names to follow DP 2.0 Specs. Also updates the DP PHY CTS codes of the affected drivers (i915, amd, msm) No functional changes expected.
Reference: “DPCD 248h/10Bh/10Ch/10Dh/10Eh Name/Description Consistency” https://groups.vesa.org/wg/AllMem/documentComment/2738
Khaled Almahallawy (4): drm/dp: Rename DPCD 248h according to DP 2.0 specs drm/i915/dp: Use DP 2.0 LINK_QUAL_PATTERN_* Phy test pattern definitions drm/amd/dc: Use DPCD 248h DP 2.0 new name drm/msm/dp: Use DPCD 248h DP 2.0 new names/definitions
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 2 +- drivers/gpu/drm/drm_dp_helper.c | 6 +++--- drivers/gpu/drm/i915/display/intel_dp.c | 12 ++++++------ drivers/gpu/drm/msm/dp/dp_catalog.c | 12 ++++++------ drivers/gpu/drm/msm/dp/dp_ctrl.c | 12 ++++++------ drivers/gpu/drm/msm/dp/dp_link.c | 16 ++++++++-------- include/drm/drm_dp_helper.h | 13 +++---------- 7 files changed, 33 insertions(+), 40 deletions(-)
DPCD 248h name was changed from “PHY_TEST_PATTERN” in DP 1.4 to “LINK_QUAL_PATTERN_SELECT” in DP 2.0.
Also, DPCD 248h [6:0] is the same as DPCDs 10Bh/10Ch/10Dh/10Eh [6:0]. So removed the repeated definition of PHY patterns.
Reference: “DPCD 248h/10Bh/10Ch/10Dh/10Eh Name/Description Consistency” https://groups.vesa.org/wg/AllMem/documentComment/2738
Signed-off-by: Khaled Almahallawy khaled.almahallawy@intel.com --- drivers/gpu/drm/drm_dp_helper.c | 6 +++--- include/drm/drm_dp_helper.h | 13 +++---------- 2 files changed, 6 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c index ada0a1ff262d..c9c928c08026 100644 --- a/drivers/gpu/drm/drm_dp_helper.c +++ b/drivers/gpu/drm/drm_dp_helper.c @@ -2489,19 +2489,19 @@ int drm_dp_get_phy_test_pattern(struct drm_dp_aux *aux, if (lanes & DP_ENHANCED_FRAME_CAP) data->enhanced_frame_cap = true;
- err = drm_dp_dpcd_readb(aux, DP_PHY_TEST_PATTERN, &data->phy_pattern); + err = drm_dp_dpcd_readb(aux, DP_LINK_QUAL_PATTERN_SELECT, &data->phy_pattern); if (err < 0) return err;
switch (data->phy_pattern) { - case DP_PHY_TEST_PATTERN_80BIT_CUSTOM: + case DP_LINK_QUAL_PATTERN_80BIT_CUSTOM: err = drm_dp_dpcd_read(aux, DP_TEST_80BIT_CUSTOM_PATTERN_7_0, &data->custom80, sizeof(data->custom80)); if (err < 0) return err;
break; - case DP_PHY_TEST_PATTERN_CP2520: + case DP_LINK_QUAL_PATTERN_CP2520_PAT_1: err = drm_dp_dpcd_read(aux, DP_TEST_HBR2_SCRAMBLER_RESET, &data->hbr2_reset, sizeof(data->hbr2_reset)); diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index afdf7f4183f9..ef915bb75bb4 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h @@ -862,16 +862,9 @@ struct drm_panel; # define DP_TEST_CRC_SUPPORTED (1 << 5) # define DP_TEST_COUNT_MASK 0xf
-#define DP_PHY_TEST_PATTERN 0x248 -# define DP_PHY_TEST_PATTERN_SEL_MASK 0x7 -# define DP_PHY_TEST_PATTERN_NONE 0x0 -# define DP_PHY_TEST_PATTERN_D10_2 0x1 -# define DP_PHY_TEST_PATTERN_ERROR_COUNT 0x2 -# define DP_PHY_TEST_PATTERN_PRBS7 0x3 -# define DP_PHY_TEST_PATTERN_80BIT_CUSTOM 0x4 -# define DP_PHY_TEST_PATTERN_CP2520 0x5 - -#define DP_PHY_SQUARE_PATTERN 0x249 +#define DP_LINK_QUAL_PATTERN_SELECT 0x248 + +#define DP_PHY_SQUARE_PATTERN 0x249
#define DP_TEST_HBR2_SCRAMBLER_RESET 0x24A #define DP_TEST_80BIT_CUSTOM_PATTERN_7_0 0x250
On Wed, 20 Oct 2021, Khaled Almahallawy khaled.almahallawy@intel.com wrote:
DPCD 248h name was changed from “PHY_TEST_PATTERN” in DP 1.4 to “LINK_QUAL_PATTERN_SELECT” in DP 2.0.
Please use ASCII double quotes ". Please reflow the commit message to limit line lenghts to about 72 characters.
Also, DPCD 248h [6:0] is the same as DPCDs 10Bh/10Ch/10Dh/10Eh [6:0]. So removed the repeated definition of PHY patterns.
Reference: “DPCD 248h/10Bh/10Ch/10Dh/10Eh Name/Description Consistency” https://groups.vesa.org/wg/AllMem/documentComment/2738
Signed-off-by: Khaled Almahallawy khaled.almahallawy@intel.com
drivers/gpu/drm/drm_dp_helper.c | 6 +++--- include/drm/drm_dp_helper.h | 13 +++---------- 2 files changed, 6 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c index ada0a1ff262d..c9c928c08026 100644 --- a/drivers/gpu/drm/drm_dp_helper.c +++ b/drivers/gpu/drm/drm_dp_helper.c @@ -2489,19 +2489,19 @@ int drm_dp_get_phy_test_pattern(struct drm_dp_aux *aux, if (lanes & DP_ENHANCED_FRAME_CAP) data->enhanced_frame_cap = true;
- err = drm_dp_dpcd_readb(aux, DP_PHY_TEST_PATTERN, &data->phy_pattern);
err = drm_dp_dpcd_readb(aux, DP_LINK_QUAL_PATTERN_SELECT, &data->phy_pattern); if (err < 0) return err;
switch (data->phy_pattern) {
- case DP_PHY_TEST_PATTERN_80BIT_CUSTOM:
case DP_LINK_QUAL_PATTERN_80BIT_CUSTOM: err = drm_dp_dpcd_read(aux, DP_TEST_80BIT_CUSTOM_PATTERN_7_0, &data->custom80, sizeof(data->custom80)); if (err < 0) return err;
break;
- case DP_PHY_TEST_PATTERN_CP2520:
- case DP_LINK_QUAL_PATTERN_CP2520_PAT_1: err = drm_dp_dpcd_read(aux, DP_TEST_HBR2_SCRAMBLER_RESET, &data->hbr2_reset, sizeof(data->hbr2_reset));
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index afdf7f4183f9..ef915bb75bb4 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h @@ -862,16 +862,9 @@ struct drm_panel; # define DP_TEST_CRC_SUPPORTED (1 << 5) # define DP_TEST_COUNT_MASK 0xf
-#define DP_PHY_TEST_PATTERN 0x248 -# define DP_PHY_TEST_PATTERN_SEL_MASK 0x7 -# define DP_PHY_TEST_PATTERN_NONE 0x0 -# define DP_PHY_TEST_PATTERN_D10_2 0x1 -# define DP_PHY_TEST_PATTERN_ERROR_COUNT 0x2 -# define DP_PHY_TEST_PATTERN_PRBS7 0x3 -# define DP_PHY_TEST_PATTERN_80BIT_CUSTOM 0x4 -# define DP_PHY_TEST_PATTERN_CP2520 0x5
-#define DP_PHY_SQUARE_PATTERN 0x249 +#define DP_LINK_QUAL_PATTERN_SELECT 0x248
Please add a comment here referencing where the values are. There are examples in the file.
+#define DP_PHY_SQUARE_PATTERN 0x249
#define DP_TEST_HBR2_SCRAMBLER_RESET 0x24A #define DP_TEST_80BIT_CUSTOM_PATTERN_7_0 0x250
Update selected phy test pattern names to use the new names/definitions of DPCD 248h in DP2.0/drm_dp_helpers.h No functional changes
Cc: Manasi Navare manasi.d.navare@intel.com CC: Jani Nikula jani.nikula@intel.com Cc: Imre Deak imre.deak@intel.com Signed-off-by: Khaled Almahallawy khaled.almahallawy@intel.com --- drivers/gpu/drm/i915/display/intel_dp.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index f5dc2126d140..931e8083e54a 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -3367,27 +3367,27 @@ static void intel_dp_phy_pattern_update(struct intel_dp *intel_dp, u32 pattern_val;
switch (data->phy_pattern) { - case DP_PHY_TEST_PATTERN_NONE: + case DP_LINK_QUAL_PATTERN_DISABLE: DRM_DEBUG_KMS("Disable Phy Test Pattern\n"); intel_de_write(dev_priv, DDI_DP_COMP_CTL(pipe), 0x0); break; - case DP_PHY_TEST_PATTERN_D10_2: + case DP_LINK_QUAL_PATTERN_D10_2: DRM_DEBUG_KMS("Set D10.2 Phy Test Pattern\n"); intel_de_write(dev_priv, DDI_DP_COMP_CTL(pipe), DDI_DP_COMP_CTL_ENABLE | DDI_DP_COMP_CTL_D10_2); break; - case DP_PHY_TEST_PATTERN_ERROR_COUNT: + case DP_LINK_QUAL_PATTERN_ERROR_RATE: DRM_DEBUG_KMS("Set Error Count Phy Test Pattern\n"); intel_de_write(dev_priv, DDI_DP_COMP_CTL(pipe), DDI_DP_COMP_CTL_ENABLE | DDI_DP_COMP_CTL_SCRAMBLED_0); break; - case DP_PHY_TEST_PATTERN_PRBS7: + case DP_LINK_QUAL_PATTERN_PRBS7: DRM_DEBUG_KMS("Set PRBS7 Phy Test Pattern\n"); intel_de_write(dev_priv, DDI_DP_COMP_CTL(pipe), DDI_DP_COMP_CTL_ENABLE | DDI_DP_COMP_CTL_PRBS7); break; - case DP_PHY_TEST_PATTERN_80BIT_CUSTOM: + case DP_LINK_QUAL_PATTERN_80BIT_CUSTOM: /* * FIXME: Ideally pattern should come from DPCD 0x250. As * current firmware of DPR-100 could not set it, so hardcoding @@ -3404,7 +3404,7 @@ static void intel_dp_phy_pattern_update(struct intel_dp *intel_dp, DDI_DP_COMP_CTL_ENABLE | DDI_DP_COMP_CTL_CUSTOM80); break; - case DP_PHY_TEST_PATTERN_CP2520: + case DP_LINK_QUAL_PATTERN_CP2520_PAT_1: /* * FIXME: Ideally pattern should come from DPCD 0x24A. As * current firmware of DPR-100 could not set it, so hardcoding
Use the new definition of DPCD 248h (DP_LINK_QUAL_PATTERN_SELECT) No functional changes.
Cc: Harry Wentland harry.wentland@amd.com Cc: Alex Deucher alexander.deucher@amd.com Signed-off-by: Khaled Almahallawy khaled.almahallawy@intel.com --- drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c index 54662d74c65a..d34187bb42dd 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c @@ -3604,7 +3604,7 @@ static void dp_test_send_phy_test_pattern(struct dc_link *link) /* get phy test pattern and pattern parameters from DP receiver */ core_link_read_dpcd( link, - DP_PHY_TEST_PATTERN, + DP_LINK_QUAL_PATTERN_SELECT, &dpcd_test_pattern.raw, sizeof(dpcd_test_pattern)); core_link_read_dpcd(
Use DP 2.0 DPCD 248h new name (LINK_QUAL_PATTERN_SELECT) and rename selected phy test patterns to LINK_QUAL_PATTERN_*
Note: TPS4 LT pattern is CP2520 Pattern 3 (refer to DP2.0 spaces Table 3-11, DPCD 00248h LINK_QUAL_PATTERN_SELECT, and DP PHY 1.4 CTS - Appendix A - Compliance EYE Pattern(CP2520; Normative)) That is why the change from DP_PHY_TEST_PATTERN_SEL_MASK to DP_LINK_QUAL_PATTERN_CP2520_PAT_3 No functional changes
Cc: Chandan Uddaraju chandanu@codeaurora.org Cc: Kuogee Hsieh khsieh@codeaurora.org Signed-off-by: Khaled Almahallawy khaled.almahallawy@intel.com --- drivers/gpu/drm/msm/dp/dp_catalog.c | 12 ++++++------ drivers/gpu/drm/msm/dp/dp_ctrl.c | 12 ++++++------ drivers/gpu/drm/msm/dp/dp_link.c | 16 ++++++++-------- 3 files changed, 20 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/msm/dp/dp_catalog.c b/drivers/gpu/drm/msm/dp/dp_catalog.c index cc2bb8295329..2076439ac2a2 100644 --- a/drivers/gpu/drm/msm/dp/dp_catalog.c +++ b/drivers/gpu/drm/msm/dp/dp_catalog.c @@ -690,11 +690,11 @@ void dp_catalog_ctrl_send_phy_pattern(struct dp_catalog *dp_catalog,
DRM_DEBUG_DP("pattern: %#x\n", pattern); switch (pattern) { - case DP_PHY_TEST_PATTERN_D10_2: + case DP_LINK_QUAL_PATTERN_D10_2: dp_write_link(catalog, REG_DP_STATE_CTRL, DP_STATE_CTRL_LINK_TRAINING_PATTERN1); break; - case DP_PHY_TEST_PATTERN_ERROR_COUNT: + case DP_LINK_QUAL_PATTERN_ERROR_RATE: value &= ~(1 << 16); dp_write_link(catalog, REG_DP_HBR2_COMPLIANCE_SCRAMBLER_RESET, value); @@ -706,11 +706,11 @@ void dp_catalog_ctrl_send_phy_pattern(struct dp_catalog *dp_catalog, dp_write_link(catalog, REG_DP_STATE_CTRL, DP_STATE_CTRL_LINK_SYMBOL_ERR_MEASURE); break; - case DP_PHY_TEST_PATTERN_PRBS7: + case DP_LINK_QUAL_PATTERN_PRBS7: dp_write_link(catalog, REG_DP_STATE_CTRL, DP_STATE_CTRL_LINK_PRBS7); break; - case DP_PHY_TEST_PATTERN_80BIT_CUSTOM: + case DP_LINK_QUAL_PATTERN_80BIT_CUSTOM: dp_write_link(catalog, REG_DP_STATE_CTRL, DP_STATE_CTRL_LINK_TEST_CUSTOM_PATTERN); /* 00111110000011111000001111100000 */ @@ -723,7 +723,7 @@ void dp_catalog_ctrl_send_phy_pattern(struct dp_catalog *dp_catalog, dp_write_link(catalog, REG_DP_TEST_80BIT_CUSTOM_PATTERN_REG2, 0x0000F83E); break; - case DP_PHY_TEST_PATTERN_CP2520: + case DP_LINK_QUAL_PATTERN_CP2520_PAT_1: value = dp_read_link(catalog, REG_DP_MAINLINK_CTRL); value &= ~DP_MAINLINK_CTRL_SW_BYPASS_SCRAMBLER; dp_write_link(catalog, REG_DP_MAINLINK_CTRL, value); @@ -742,7 +742,7 @@ void dp_catalog_ctrl_send_phy_pattern(struct dp_catalog *dp_catalog, value |= DP_MAINLINK_CTRL_ENABLE; dp_write_link(catalog, REG_DP_MAINLINK_CTRL, value); break; - case DP_PHY_TEST_PATTERN_SEL_MASK: + case DP_LINK_QUAL_PATTERN_CP2520_PAT_3: dp_write_link(catalog, REG_DP_MAINLINK_CTRL, DP_MAINLINK_CTRL_ENABLE); dp_write_link(catalog, REG_DP_STATE_CTRL, diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c index 62e75dc8afc6..a97f9dd03a8c 100644 --- a/drivers/gpu/drm/msm/dp/dp_ctrl.c +++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c @@ -1553,25 +1553,25 @@ static bool dp_ctrl_send_phy_test_pattern(struct dp_ctrl_private *ctrl) switch (pattern_sent) { case MR_LINK_TRAINING1: success = (pattern_requested == - DP_PHY_TEST_PATTERN_D10_2); + DP_LINK_QUAL_PATTERN_D10_2); break; case MR_LINK_SYMBOL_ERM: success = ((pattern_requested == - DP_PHY_TEST_PATTERN_ERROR_COUNT) || + DP_LINK_QUAL_PATTERN_ERROR_RATE) || (pattern_requested == - DP_PHY_TEST_PATTERN_CP2520)); + DP_LINK_QUAL_PATTERN_CP2520_PAT_1)); break; case MR_LINK_PRBS7: success = (pattern_requested == - DP_PHY_TEST_PATTERN_PRBS7); + DP_LINK_QUAL_PATTERN_PRBS7); break; case MR_LINK_CUSTOM80: success = (pattern_requested == - DP_PHY_TEST_PATTERN_80BIT_CUSTOM); + DP_LINK_QUAL_PATTERN_80BIT_CUSTOM); break; case MR_LINK_TRAINING4: success = (pattern_requested == - DP_PHY_TEST_PATTERN_SEL_MASK); + DP_LINK_QUAL_PATTERN_CP2520_PAT_3); break; default: success = false; diff --git a/drivers/gpu/drm/msm/dp/dp_link.c b/drivers/gpu/drm/msm/dp/dp_link.c index a5bdfc5029de..d5b56ab3c09d 100644 --- a/drivers/gpu/drm/msm/dp/dp_link.c +++ b/drivers/gpu/drm/msm/dp/dp_link.c @@ -574,7 +574,7 @@ static int dp_link_parse_phy_test_params(struct dp_link_private *link) u8 data; ssize_t rlen;
- rlen = drm_dp_dpcd_readb(link->aux, DP_PHY_TEST_PATTERN, + rlen = drm_dp_dpcd_readb(link->aux, DP_LINK_QUAL_PATTERN_SELECT, &data); if (rlen < 0) { DRM_ERROR("failed to read phy link pattern. rlen=%zd\n", rlen); @@ -586,13 +586,13 @@ static int dp_link_parse_phy_test_params(struct dp_link_private *link) DRM_DEBUG_DP("phy_test_pattern_sel = 0x%x\n", data);
switch (data) { - case DP_PHY_TEST_PATTERN_SEL_MASK: - case DP_PHY_TEST_PATTERN_NONE: - case DP_PHY_TEST_PATTERN_D10_2: - case DP_PHY_TEST_PATTERN_ERROR_COUNT: - case DP_PHY_TEST_PATTERN_PRBS7: - case DP_PHY_TEST_PATTERN_80BIT_CUSTOM: - case DP_PHY_TEST_PATTERN_CP2520: + case DP_LINK_QUAL_PATTERN_DISABLE: + case DP_LINK_QUAL_PATTERN_D10_2: + case DP_LINK_QUAL_PATTERN_ERROR_RATE: + case DP_LINK_QUAL_PATTERN_PRBS7: + case DP_LINK_QUAL_PATTERN_80BIT_CUSTOM: + case DP_LINK_QUAL_PATTERN_CP2520_PAT_1: + case DP_LINK_QUAL_PATTERN_CP2520_PAT_3 return 0; default: return -EINVAL;
On Wed, 20 Oct 2021, Khaled Almahallawy khaled.almahallawy@intel.com wrote:
This series updates DPCD 248h register name and PHY test patterns names to follow DP 2.0 Specs. Also updates the DP PHY CTS codes of the affected drivers (i915, amd, msm) No functional changes expected.
Reference: “DPCD 248h/10Bh/10Ch/10Dh/10Eh Name/Description Consistency” https://groups.vesa.org/wg/AllMem/documentComment/2738
You can't do renames like this piece by piece. Every commit must build.
Incidentally, this is one of the reasons we often don't bother with renames to follow spec changes, but rather stick to the original names.
However, in this case you could switch all drivers to the different test pattern macros piece by piece, as they're already there.
BR, Jani.
Khaled Almahallawy (4): drm/dp: Rename DPCD 248h according to DP 2.0 specs drm/i915/dp: Use DP 2.0 LINK_QUAL_PATTERN_* Phy test pattern definitions drm/amd/dc: Use DPCD 248h DP 2.0 new name drm/msm/dp: Use DPCD 248h DP 2.0 new names/definitions
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 2 +- drivers/gpu/drm/drm_dp_helper.c | 6 +++--- drivers/gpu/drm/i915/display/intel_dp.c | 12 ++++++------ drivers/gpu/drm/msm/dp/dp_catalog.c | 12 ++++++------ drivers/gpu/drm/msm/dp/dp_ctrl.c | 12 ++++++------ drivers/gpu/drm/msm/dp/dp_link.c | 16 ++++++++-------- include/drm/drm_dp_helper.h | 13 +++---------- 7 files changed, 33 insertions(+), 40 deletions(-)
On Thu, 2021-10-21 at 13:00 +0300, Jani Nikula wrote:
On Wed, 20 Oct 2021, Khaled Almahallawy <khaled.almahallawy@intel.com
wrote: This series updates DPCD 248h register name and PHY test patterns names to follow DP 2.0 Specs. Also updates the DP PHY CTS codes of the affected drivers (i915, amd, msm) No functional changes expected.
Reference: “DPCD 248h/10Bh/10Ch/10Dh/10Eh Name/Description Consistency” https://groups.vesa.org/wg/AllMem/documentComment/2738
You can't do renames like this piece by piece. Every commit must build.
Noted, I apologize for messing that up.
I will send v2 to make sure all renames of DP_PHY_TEST_PATTERN done in one patch with the other changes you requested.
Thank you for your review Khaled
Incidentally, this is one of the reasons we often don't bother with renames to follow spec changes, but rather stick to the original names.
However, in this case you could switch all drivers to the different test pattern macros piece by piece, as they're already there.
BR, Jani.
Khaled Almahallawy (4): drm/dp: Rename DPCD 248h according to DP 2.0 specs drm/i915/dp: Use DP 2.0 LINK_QUAL_PATTERN_* Phy test pattern definitions drm/amd/dc: Use DPCD 248h DP 2.0 new name drm/msm/dp: Use DPCD 248h DP 2.0 new names/definitions
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 2 +- drivers/gpu/drm/drm_dp_helper.c | 6 +++--- drivers/gpu/drm/i915/display/intel_dp.c | 12 ++++++------ drivers/gpu/drm/msm/dp/dp_catalog.c | 12 ++++++------ drivers/gpu/drm/msm/dp/dp_ctrl.c | 12 ++++++------ drivers/gpu/drm/msm/dp/dp_link.c | 16 ++++++++--
include/drm/drm_dp_helper.h | 13 +++---------
7 files changed, 33 insertions(+), 40 deletions(-)
dri-devel@lists.freedesktop.org
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Almahallawy, Khaled -
Jani Nikula -
Khaled Almahallawy