From: Ondrej Jirman megous@megous.com
This series implements support for Xunlong Orange Pi 3 board.
Unfortunately, this board needs some small driver patches, so I have split the boards DT patch into chunks that require patches for drivers in various subsystems.
Suggested merging plan/dependencies:
- Pinctrl and stmmac patches are needed for ethernet support. (patches 1-5) - these should be ready now - HDMI support - waits for DT review. (patches 6-8) - mmc1 pinconf (patch 9) can probably be merged now, too (it will certainly be used soon by all the other WiFi featuring boards based on H6)
This patch is also needed to not get segfault on boot (it was already merged): https://lkml.org/lkml/2019/4/5/856
Changes in v2: - added dt-bindings documentation for the board's compatible string (suggested by Clement) - addressed checkpatch warnings and code formatting issues (on Maxime's suggestions) - stmmac: dropped useless parenthesis, reworded description of the patch (suggested by Sergei) - drop useles dev_info() about the selected io bias voltage - docummented io voltage bias selection variant macros - wifi: marked WiFi DTS patch and realted mmc1_pins as "DO NOT MERGE", because wifi depends on H6 RTC support that's not merged yet (suggested by Clement) - added missing signed-of-bys - changed &usb2otg dr_mode to otg, and added a note about VBUS - improved wording of HDMI driver's DDC power supply patch
Changes in v3: - dropped already applied patches - changed pinctrl I/O bias selection constants to enum and renamed - added /omit-if-no-ref/ to mmc1_pins - made mmc1_pins default pinconf for mmc1 in H6 dtsi - move ddc-supply to HDMI connector node, updated patch descriptions, changed dt-bindings docs
Changes in v4: - fix checkpatch warnings/style issues - use enum in struct sunxi_desc_function for io_bias_cfg_variant - collected acked-by's - fix compile error in drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c:156 caused by missing conversion from has_io_bias_cfg struct member (I've kept the acked-by, because it's a trivial change, but feel free to object.) (reported by Martin A. on github) I did not have A80 pinctrl enabled for some reason, so I did not catch this sooner. - dropped brcm firmware patch (was already applied) - dropped the wifi dts patch (will re-send after H6 RTC gets merged, along with bluetooth support, in a separate series)
Please take a look.
thank you and regards, Ondrej Jirman
Icenowy Zheng (2): net: stmmac: sun8i: add support for Allwinner H6 EMAC net: stmmac: sun8i: force select external PHY when no internal one
Ondrej Jirman (7): pinctrl: sunxi: Prepare for alternative bias voltage setting methods pinctrl: sunxi: Support I/O bias voltage setting on H6 arm64: dts: allwinner: orange-pi-3: Enable ethernet dt-bindings: display: hdmi-connector: Add DDC power supply drm: sun4i: Add support for enabling DDC I2C bus power to dw_hdmi glue arm64: dts: allwinner: orange-pi-3: Enable HDMI output arm64: dts: allwinner: h6: Add MMC1 pins
.../display/connector/hdmi-connector.txt | 1 + .../dts/allwinner/sun50i-h6-orangepi-3.dts | 79 +++++++++++++++++++ arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 11 +++ drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c | 61 +++++++++++++- drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h | 2 + .../net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 21 +++++ drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c | 1 + drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c | 2 +- drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c | 2 +- drivers/pinctrl/sunxi/pinctrl-sunxi.c | 56 ++++++++----- drivers/pinctrl/sunxi/pinctrl-sunxi.h | 18 ++++- 11 files changed, 230 insertions(+), 24 deletions(-)
From: Icenowy Zheng icenowy@aosc.io
The EMAC on Allwinner H6 is just like the one on A64. The "internal PHY" on H6 is on a co-packaged AC200 chip, and it's not really internal (it's connected via RMII at PA GPIO bank).
Add support for the Allwinner H6 EMAC in the dwmac-sun8i driver.
Signed-off-by: Icenowy Zheng icenowy@aosc.io Signed-off-by: Ondrej Jirman megous@megous.com --- .../net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c index 195669f550f0..20c19afb8316 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c @@ -147,6 +147,20 @@ static const struct emac_variant emac_variant_a64 = { .tx_delay_max = 7, };
+static const struct emac_variant emac_variant_h6 = { + .default_syscon_value = 0x50000, + .syscon_field = &sun8i_syscon_reg_field, + /* The "Internal PHY" of H6 is not on the die. It's on the + * co-packaged AC200 chip instead. + */ + .soc_has_internal_phy = false, + .support_mii = true, + .support_rmii = true, + .support_rgmii = true, + .rx_delay_max = 31, + .tx_delay_max = 7, +}; + #define EMAC_BASIC_CTL0 0x00 #define EMAC_BASIC_CTL1 0x04 #define EMAC_INT_STA 0x08 @@ -1210,6 +1224,8 @@ static const struct of_device_id sun8i_dwmac_match[] = { .data = &emac_variant_r40 }, { .compatible = "allwinner,sun50i-a64-emac", .data = &emac_variant_a64 }, + { .compatible = "allwinner,sun50i-h6-emac", + .data = &emac_variant_h6 }, { } }; MODULE_DEVICE_TABLE(of, sun8i_dwmac_match);
From: Icenowy Zheng icenowy@aosc.io
The PHY selection bit also exists on SoCs without an internal PHY; if it's set to 1 (internal PHY, default value) then the MAC will not make use of any PHY such SoCs.
This problem appears when adapting for H6, which has no real internal PHY (the "internal PHY" on H6 is not on-die, but on a co-packaged AC200 chip, connected via RMII interface at GPIO bank A).
Force the PHY selection bit to 0 when the SOC doesn't have an internal PHY, to address the problem of a wrong default value.
Signed-off-by: Icenowy Zheng icenowy@aosc.io Signed-off-by: Ondrej Jirman megous@megous.com --- drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 5 +++++ 1 file changed, 5 insertions(+)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c index 20c19afb8316..cb7e7f53be7d 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c @@ -907,6 +907,11 @@ static int sun8i_dwmac_set_syscon(struct stmmac_priv *priv) * address. No need to mask it again. */ reg |= 1 << H3_EPHY_ADDR_SHIFT; + } else { + /* For SoCs without internal PHY the PHY selection bit should be + * set to 0 (external PHY). + */ + reg &= ~H3_EPHY_SELECT; }
if (!of_property_read_u32(node, "allwinner,tx-delay-ps", &val)) {
From: Ondrej Jirman megous@megous.com
H6 has a different I/O voltage bias setting method than A80. Prepare existing code for using alternative bias voltage setting methods.
Signed-off-by: Ondrej Jirman megous@megous.com Acked-by: Maxime Ripard maxime.ripard@bootlin.com --- drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c | 2 +- drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c | 2 +- drivers/pinctrl/sunxi/pinctrl-sunxi.c | 47 ++++++++++++--------- drivers/pinctrl/sunxi/pinctrl-sunxi.h | 11 ++++- 4 files changed, 39 insertions(+), 23 deletions(-)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c b/drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c index e05dd9a5551d..a191a65217ac 100644 --- a/drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c +++ b/drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c @@ -153,7 +153,7 @@ static const struct sunxi_pinctrl_desc sun9i_a80_r_pinctrl_data = { .pin_base = PL_BASE, .irq_banks = 2, .disable_strict_mode = true, - .has_io_bias_cfg = true, + .io_bias_cfg_variant = BIAS_VOLTAGE_GRP_CONFIG, };
static int sun9i_a80_r_pinctrl_probe(struct platform_device *pdev) diff --git a/drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c b/drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c index da37d594a13d..0633a03d5e13 100644 --- a/drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c +++ b/drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c @@ -722,7 +722,7 @@ static const struct sunxi_pinctrl_desc sun9i_a80_pinctrl_data = { .npins = ARRAY_SIZE(sun9i_a80_pins), .irq_banks = 5, .disable_strict_mode = true, - .has_io_bias_cfg = true, + .io_bias_cfg_variant = BIAS_VOLTAGE_GRP_CONFIG, };
static int sun9i_a80_pinctrl_probe(struct platform_device *pdev) diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c index be04223591d4..98c4de5f4019 100644 --- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c +++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c @@ -617,7 +617,7 @@ static int sunxi_pinctrl_set_io_bias_cfg(struct sunxi_pinctrl *pctl, u32 val, reg; int uV;
- if (!pctl->desc->has_io_bias_cfg) + if (!pctl->desc->io_bias_cfg_variant) return 0;
uV = regulator_get_voltage(supply); @@ -628,25 +628,32 @@ static int sunxi_pinctrl_set_io_bias_cfg(struct sunxi_pinctrl *pctl, if (uV == 0) return 0;
- /* Configured value must be equal or greater to actual voltage */ - if (uV <= 1800000) - val = 0x0; /* 1.8V */ - else if (uV <= 2500000) - val = 0x6; /* 2.5V */ - else if (uV <= 2800000) - val = 0x9; /* 2.8V */ - else if (uV <= 3000000) - val = 0xA; /* 3.0V */ - else - val = 0xD; /* 3.3V */ - - pin -= pctl->desc->pin_base; - - reg = readl(pctl->membase + sunxi_grp_config_reg(pin)); - reg &= ~IO_BIAS_MASK; - writel(reg | val, pctl->membase + sunxi_grp_config_reg(pin)); - - return 0; + switch (pctl->desc->io_bias_cfg_variant) { + case BIAS_VOLTAGE_GRP_CONFIG: + /* + * Configured value must be equal or greater to actual + * voltage. + */ + if (uV <= 1800000) + val = 0x0; /* 1.8V */ + else if (uV <= 2500000) + val = 0x6; /* 2.5V */ + else if (uV <= 2800000) + val = 0x9; /* 2.8V */ + else if (uV <= 3000000) + val = 0xA; /* 3.0V */ + else + val = 0xD; /* 3.3V */ + + pin -= pctl->desc->pin_base; + + reg = readl(pctl->membase + sunxi_grp_config_reg(pin)); + reg &= ~IO_BIAS_MASK; + writel(reg | val, pctl->membase + sunxi_grp_config_reg(pin)); + return 0; + default: + return -EINVAL; + } }
static int sunxi_pmx_get_funcs_cnt(struct pinctrl_dev *pctldev) diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.h b/drivers/pinctrl/sunxi/pinctrl-sunxi.h index ee15ab067b5f..a62b81357136 100644 --- a/drivers/pinctrl/sunxi/pinctrl-sunxi.h +++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.h @@ -95,6 +95,15 @@ #define PINCTRL_SUN7I_A20 BIT(7) #define PINCTRL_SUN8I_R40 BIT(8)
+enum sunxi_desc_bias_voltage { + BIAS_VOLTAGE_NONE, + /* + * Bias voltage configuration is done through + * Pn_GRP_CONFIG registers, as seen on A80 SoC. + */ + BIAS_VOLTAGE_GRP_CONFIG, +}; + struct sunxi_desc_function { unsigned long variant; const char *name; @@ -117,7 +126,7 @@ struct sunxi_pinctrl_desc { const unsigned int *irq_bank_map; bool irq_read_needs_mux; bool disable_strict_mode; - bool has_io_bias_cfg; + enum sunxi_desc_bias_voltage io_bias_cfg_variant; };
struct sunxi_pinctrl_function {
On Sat, Apr 13, 2019 at 6:54 PM megous@megous.com wrote:
From: Ondrej Jirman megous@megous.com
H6 has a different I/O voltage bias setting method than A80. Prepare existing code for using alternative bias voltage setting methods.
Signed-off-by: Ondrej Jirman megous@megous.com Acked-by: Maxime Ripard maxime.ripard@bootlin.com
This patch applied to the pinctrl tree for v5.2.
Yours, Linus Walleij
From: Ondrej Jirman megous@megous.com
H6 SoC has a "pio group withstand voltage mode" register (datasheet description), that needs to be used to select either 1.8V or 3.3V I/O mode, based on what voltage is powering the respective pin banks and is thus used for I/O signals.
Add support for configuring this register according to the voltage of the pin bank regulator (if enabled).
This is similar to the support for I/O bias voltage setting patch for A80 and the same concerns apply. See:
commit 402bfb3c1352 ("Support I/O bias voltage setting on A80")
Signed-off-by: Ondrej Jirman megous@megous.com Acked-by: Maxime Ripard maxime.ripard@bootlin.com --- drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c | 1 + drivers/pinctrl/sunxi/pinctrl-sunxi.c | 11 +++++++++++ drivers/pinctrl/sunxi/pinctrl-sunxi.h | 7 +++++++ 3 files changed, 19 insertions(+)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c index ef4268cc6227..3cc1121589c9 100644 --- a/drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c +++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c @@ -591,6 +591,7 @@ static const struct sunxi_pinctrl_desc h6_pinctrl_data = { .irq_banks = 4, .irq_bank_map = h6_irq_bank_map, .irq_read_needs_mux = true, + .io_bias_cfg_variant = BIAS_VOLTAGE_PIO_POW_MODE_SEL, };
static int h6_pinctrl_probe(struct platform_device *pdev) diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c index 98c4de5f4019..0cbca30b75dc 100644 --- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c +++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c @@ -614,6 +614,8 @@ static int sunxi_pinctrl_set_io_bias_cfg(struct sunxi_pinctrl *pctl, unsigned pin, struct regulator *supply) { + unsigned short bank = pin / PINS_PER_BANK; + unsigned long flags; u32 val, reg; int uV;
@@ -651,6 +653,15 @@ static int sunxi_pinctrl_set_io_bias_cfg(struct sunxi_pinctrl *pctl, reg &= ~IO_BIAS_MASK; writel(reg | val, pctl->membase + sunxi_grp_config_reg(pin)); return 0; + case BIAS_VOLTAGE_PIO_POW_MODE_SEL: + val = uV <= 1800000 ? 1 : 0; + + raw_spin_lock_irqsave(&pctl->lock, flags); + reg = readl(pctl->membase + PIO_POW_MOD_SEL_REG); + reg &= ~(1 << bank); + writel(reg | val << bank, pctl->membase + PIO_POW_MOD_SEL_REG); + raw_spin_unlock_irqrestore(&pctl->lock, flags); + return 0; default: return -EINVAL; } diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.h b/drivers/pinctrl/sunxi/pinctrl-sunxi.h index a62b81357136..44e30deeee38 100644 --- a/drivers/pinctrl/sunxi/pinctrl-sunxi.h +++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.h @@ -95,6 +95,8 @@ #define PINCTRL_SUN7I_A20 BIT(7) #define PINCTRL_SUN8I_R40 BIT(8)
+#define PIO_POW_MOD_SEL_REG 0x340 + enum sunxi_desc_bias_voltage { BIAS_VOLTAGE_NONE, /* @@ -102,6 +104,11 @@ enum sunxi_desc_bias_voltage { * Pn_GRP_CONFIG registers, as seen on A80 SoC. */ BIAS_VOLTAGE_GRP_CONFIG, + /* + * Bias voltage is set through PIO_POW_MOD_SEL_REG + * register, as seen on H6 SoC, for example. + */ + BIAS_VOLTAGE_PIO_POW_MODE_SEL, };
struct sunxi_desc_function {
On Sat, Apr 13, 2019 at 6:54 PM megous@megous.com wrote:
From: Ondrej Jirman megous@megous.com
H6 SoC has a "pio group withstand voltage mode" register (datasheet description), that needs to be used to select either 1.8V or 3.3V I/O mode, based on what voltage is powering the respective pin banks and is thus used for I/O signals.
Add support for configuring this register according to the voltage of the pin bank regulator (if enabled).
This is similar to the support for I/O bias voltage setting patch for A80 and the same concerns apply. See:
commit 402bfb3c1352 ("Support I/O bias voltage setting on A80")
Signed-off-by: Ondrej Jirman megous@megous.com Acked-by: Maxime Ripard maxime.ripard@bootlin.com
This patch applied to the pinctrl tree for v5.2.
Yours, Linus Walleij
From: Ondrej Jirman megous@megous.com
Orange Pi 3 has two regulators that power the Realtek RTL8211E. According to the phy datasheet, both regulators need to be enabled at the same time, but we can only specify a single phy-supply in the DT.
This can be achieved by making one regulator depedning on the other via vin-supply. While it's not a technically correct description of the hardware, it achieves the purpose.
All values of RX/TX delay were tested exhaustively and a middle one of the working values was chosen.
Signed-off-by: Ondrej Jirman megous@megous.com --- .../dts/allwinner/sun50i-h6-orangepi-3.dts | 44 +++++++++++++++++++ 1 file changed, 44 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts index 17d496990108..6d6b1f66796d 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts @@ -15,6 +15,7 @@
aliases { serial0 = &uart0; + ethernet0 = &emac; };
chosen { @@ -44,6 +45,27 @@ regulator-max-microvolt = <5000000>; regulator-always-on; }; + + /* + * The board uses 2.5V RGMII signalling. Power sequence to enable + * the phy is to enable GMAC-2V5 and GMAC-3V3 (aldo2) power rails + * at the same time and to wait 100ms. + */ + reg_gmac_2v5: gmac-2v5 { + compatible = "regulator-fixed"; + regulator-name = "gmac-2v5"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + startup-delay-us = <100000>; + enable-active-high; + gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */ + + /* The real parent of gmac-2v5 is reg_vcc5v, but we need to + * enable two regulators to power the phy. This is one way + * to achieve that. + */ + vin-supply = <®_aldo2>; /* GMAC-3V3 */ + }; };
&cpu0 { @@ -58,6 +80,28 @@ status = "okay"; };
+&emac { + pinctrl-names = "default"; + pinctrl-0 = <&ext_rgmii_pins>; + phy-mode = "rgmii"; + phy-handle = <&ext_rgmii_phy>; + phy-supply = <®_gmac_2v5>; + allwinner,rx-delay-ps = <1500>; + allwinner,tx-delay-ps = <700>; + status = "okay"; +}; + +&mdio { + ext_rgmii_phy: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + + reset-gpios = <&pio 3 14 GPIO_ACTIVE_LOW>; /* PD14 */ + reset-assert-us = <15000>; + reset-deassert-us = <40000>; + }; +}; + &mmc0 { vmmc-supply = <®_cldo1>; cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
On Sat, Apr 13, 2019 at 10:24 PM megous via linux-sunxi linux-sunxi@googlegroups.com wrote:
From: Ondrej Jirman megous@megous.com
Orange Pi 3 has two regulators that power the Realtek RTL8211E. According to the phy datasheet, both regulators need to be enabled at the same time, but we can only specify a single phy-supply in the DT.
This can be achieved by making one regulator depedning on the other via vin-supply. While it's not a technically correct description of the hardware, it achieves the purpose.
All values of RX/TX delay were tested exhaustively and a middle one of the working values was chosen.
Signed-off-by: Ondrej Jirman megous@megous.com
.../dts/allwinner/sun50i-h6-orangepi-3.dts | 44 +++++++++++++++++++ 1 file changed, 44 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts index 17d496990108..6d6b1f66796d 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts @@ -15,6 +15,7 @@
aliases { serial0 = &uart0;
ethernet0 = &emac; }; chosen {@@ -44,6 +45,27 @@ regulator-max-microvolt = <5000000>; regulator-always-on; };
/** The board uses 2.5V RGMII signalling. Power sequence to enable* the phy is to enable GMAC-2V5 and GMAC-3V3 (aldo2) power rails* at the same time and to wait 100ms.*/reg_gmac_2v5: gmac-2v5 {compatible = "regulator-fixed";regulator-name = "gmac-2v5";regulator-min-microvolt = <2500000>;regulator-max-microvolt = <2500000>;startup-delay-us = <100000>;enable-active-high;gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 *//* The real parent of gmac-2v5 is reg_vcc5v, but we need to* enable two regulators to power the phy. This is one way* to achieve that.*/vin-supply = <®_aldo2>; /* GMAC-3V3 */
The actual output supply pin name is GMAC-3V which has an input of VCC3V3-MAC (ie aldo2), if we compatible to schematics better to use the same, IMHO.
From: Ondrej Jirman megous@megous.com
Some Allwinner SoC using boards (Orange Pi 3 for example) need to enable on-board voltage shifting logic for the DDC bus to be usable. Use ddc-supply on the hdmi-connector to model this.
Add binding documentation for optional ddc-supply property.
Signed-off-by: Ondrej Jirman megous@megous.com --- .../devicetree/bindings/display/connector/hdmi-connector.txt | 1 + 1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/display/connector/hdmi-connector.txt b/Documentation/devicetree/bindings/display/connector/hdmi-connector.txt index 508aee461e0d..33085aeb0bb9 100644 --- a/Documentation/devicetree/bindings/display/connector/hdmi-connector.txt +++ b/Documentation/devicetree/bindings/display/connector/hdmi-connector.txt @@ -9,6 +9,7 @@ Optional properties: - label: a symbolic name for the connector - hpd-gpios: HPD GPIO number - ddc-i2c-bus: phandle link to the I2C controller used for DDC EDID probing +- ddc-supply: the power supply for the DDC bus
Required nodes: - Video port for HDMI input
On Sat, Apr 13, 2019 at 06:54:15PM +0200, megous@megous.com wrote:
From: Ondrej Jirman megous@megous.com
Some Allwinner SoC using boards (Orange Pi 3 for example) need to enable on-board voltage shifting logic for the DDC bus to be usable. Use ddc-supply on the hdmi-connector to model this.
Add binding documentation for optional ddc-supply property.
Signed-off-by: Ondrej Jirman megous@megous.com
.../devicetree/bindings/display/connector/hdmi-connector.txt | 1 + 1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/display/connector/hdmi-connector.txt b/Documentation/devicetree/bindings/display/connector/hdmi-connector.txt index 508aee461e0d..33085aeb0bb9 100644 --- a/Documentation/devicetree/bindings/display/connector/hdmi-connector.txt +++ b/Documentation/devicetree/bindings/display/connector/hdmi-connector.txt @@ -9,6 +9,7 @@ Optional properties:
- label: a symbolic name for the connector
- hpd-gpios: HPD GPIO number
- ddc-i2c-bus: phandle link to the I2C controller used for DDC EDID probing
+- ddc-supply: the power supply for the DDC bus
It's not just for DDC. It powers the chips in bridge dongles for example. Pretty much every diagram I find just calls it 5V or +5V.
So how about '5V-supply' or 'v5V-supply'?
Rob
On Fri, Apr 26, 2019 at 01:23:37PM -0500, Rob Herring wrote:
On Sat, Apr 13, 2019 at 06:54:15PM +0200, megous@megous.com wrote:
From: Ondrej Jirman megous@megous.com
Some Allwinner SoC using boards (Orange Pi 3 for example) need to enable on-board voltage shifting logic for the DDC bus to be usable. Use ddc-supply on the hdmi-connector to model this.
Add binding documentation for optional ddc-supply property.
Signed-off-by: Ondrej Jirman megous@megous.com
.../devicetree/bindings/display/connector/hdmi-connector.txt | 1 + 1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/display/connector/hdmi-connector.txt b/Documentation/devicetree/bindings/display/connector/hdmi-connector.txt index 508aee461e0d..33085aeb0bb9 100644 --- a/Documentation/devicetree/bindings/display/connector/hdmi-connector.txt +++ b/Documentation/devicetree/bindings/display/connector/hdmi-connector.txt @@ -9,6 +9,7 @@ Optional properties:
- label: a symbolic name for the connector
- hpd-gpios: HPD GPIO number
- ddc-i2c-bus: phandle link to the I2C controller used for DDC EDID probing
+- ddc-supply: the power supply for the DDC bus
It's not just for DDC. It powers the chips in bridge dongles for example. Pretty much every diagram I find just calls it 5V or +5V.
So how about '5V-supply' or 'v5V-supply'?
Just to be sure, the schematic that inspired this change looks like this:
https://megous.com/dl/tmp/33b2971de6943e9d.png
HDMI-5V is always on, and what is really being enabled here are mosfets connected to DDC_CEC_EN and not the HDMI-5V power supply. So in this case it really is just for DDC. It is conceivable that some boards may need both to enable 5V for HDMI circuitry and some separate power shifting logic for DDC bus.
So if I renamed this, the DTS would not describe the real HW very well on Orange Pi 3.
thank you and regards, Ondrej
Rob
On Fri, Apr 26, 2019 at 2:20 PM Ondřej Jirman megous@megous.com wrote:
On Fri, Apr 26, 2019 at 01:23:37PM -0500, Rob Herring wrote:
On Sat, Apr 13, 2019 at 06:54:15PM +0200, megous@megous.com wrote:
From: Ondrej Jirman megous@megous.com
Some Allwinner SoC using boards (Orange Pi 3 for example) need to enable on-board voltage shifting logic for the DDC bus to be usable. Use ddc-supply on the hdmi-connector to model this.
Add binding documentation for optional ddc-supply property.
Signed-off-by: Ondrej Jirman megous@megous.com
.../devicetree/bindings/display/connector/hdmi-connector.txt | 1 + 1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/display/connector/hdmi-connector.txt b/Documentation/devicetree/bindings/display/connector/hdmi-connector.txt index 508aee461e0d..33085aeb0bb9 100644 --- a/Documentation/devicetree/bindings/display/connector/hdmi-connector.txt +++ b/Documentation/devicetree/bindings/display/connector/hdmi-connector.txt @@ -9,6 +9,7 @@ Optional properties:
- label: a symbolic name for the connector
- hpd-gpios: HPD GPIO number
- ddc-i2c-bus: phandle link to the I2C controller used for DDC EDID probing
+- ddc-supply: the power supply for the DDC bus
It's not just for DDC. It powers the chips in bridge dongles for example. Pretty much every diagram I find just calls it 5V or +5V.
So how about '5V-supply' or 'v5V-supply'?
Just to be sure, the schematic that inspired this change looks like this:
https://megous.com/dl/tmp/33b2971de6943e9d.png
HDMI-5V is always on, and what is really being enabled here are mosfets connected to DDC_CEC_EN and not the HDMI-5V power supply. So in this case it really is just for DDC. It is conceivable that some boards may need both to enable 5V for HDMI circuitry and some separate power shifting logic for DDC bus.
Okay, not what I thought you were defining. DDC_CEC_EN is a GPIO line? I wouldn't characterize this as a voltage rail, so I don't think it should be a supply. Perhaps 'ddc-en-gpios'?
We certainly want to make it clear this is not the 5V supply.
Rob
On Fri, Apr 26, 2019 at 03:02:50PM -0500, Rob Herring wrote:
On Fri, Apr 26, 2019 at 2:20 PM Ondřej Jirman megous@megous.com wrote:
On Fri, Apr 26, 2019 at 01:23:37PM -0500, Rob Herring wrote:
On Sat, Apr 13, 2019 at 06:54:15PM +0200, megous@megous.com wrote:
From: Ondrej Jirman megous@megous.com
Some Allwinner SoC using boards (Orange Pi 3 for example) need to enable on-board voltage shifting logic for the DDC bus to be usable. Use ddc-supply on the hdmi-connector to model this.
Add binding documentation for optional ddc-supply property.
Signed-off-by: Ondrej Jirman megous@megous.com
.../devicetree/bindings/display/connector/hdmi-connector.txt | 1 + 1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/display/connector/hdmi-connector.txt b/Documentation/devicetree/bindings/display/connector/hdmi-connector.txt index 508aee461e0d..33085aeb0bb9 100644 --- a/Documentation/devicetree/bindings/display/connector/hdmi-connector.txt +++ b/Documentation/devicetree/bindings/display/connector/hdmi-connector.txt @@ -9,6 +9,7 @@ Optional properties:
- label: a symbolic name for the connector
- hpd-gpios: HPD GPIO number
- ddc-i2c-bus: phandle link to the I2C controller used for DDC EDID probing
+- ddc-supply: the power supply for the DDC bus
It's not just for DDC. It powers the chips in bridge dongles for example. Pretty much every diagram I find just calls it 5V or +5V.
So how about '5V-supply' or 'v5V-supply'?
Just to be sure, the schematic that inspired this change looks like this:
https://megous.com/dl/tmp/33b2971de6943e9d.png
HDMI-5V is always on, and what is really being enabled here are mosfets connected to DDC_CEC_EN and not the HDMI-5V power supply. So in this case it really is just for DDC. It is conceivable that some boards may need both to enable 5V for HDMI circuitry and some separate power shifting logic for DDC bus.
Okay, not what I thought you were defining. DDC_CEC_EN is a GPIO line? I wouldn't characterize this as a voltage rail, so I don't think it should be a supply. Perhaps 'ddc-en-gpios'?
Yes it's GPIO. I'll implement it as GPIO.
We certainly want to make it clear this is not the 5V supply.
Right. Thank you for review.
regards, Ondrej
Rob
linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
From: Ondrej Jirman megous@megous.com
Orange Pi 3 board requires enabling DDC I2C bus via some GPIO connected transistors, before the bus can be used.
Model this as a power supply for DDC bus on the HDMI connector connected to the output port (port 1) of the HDMI controller.
Signed-off-by: Ondrej Jirman megous@megous.com --- drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c | 61 ++++++++++++++++++++++++++- drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h | 2 + 2 files changed, 61 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c index 39d8509d96a0..acf89780260d 100644 --- a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c +++ b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c @@ -98,6 +98,30 @@ static u32 sun8i_dw_hdmi_find_possible_crtcs(struct drm_device *drm, return crtcs; }
+static int sun8i_dw_hdmi_find_connector_pdev(struct device *dev, + struct platform_device **pdev_out) +{ + struct platform_device *pdev; + struct device_node *remote; + + remote = of_graph_get_remote_node(dev->of_node, 1, -1); + if (!remote) + return -ENODEV; + + if (!of_device_is_compatible(remote, "hdmi-connector")) { + of_node_put(remote); + return -ENODEV; + } + + pdev = of_find_device_by_node(remote); + of_node_put(remote); + if (!pdev) + return -ENODEV; + + *pdev_out = pdev; + return 0; +} + static int sun8i_dw_hdmi_bind(struct device *dev, struct device *master, void *data) { @@ -151,16 +175,35 @@ static int sun8i_dw_hdmi_bind(struct device *dev, struct device *master, return PTR_ERR(hdmi->regulator); }
+ ret = sun8i_dw_hdmi_find_connector_pdev(dev, &hdmi->connector_pdev); + if (!ret) { + hdmi->ddc_regulator = regulator_get(&hdmi->connector_pdev->dev, + "ddc"); + if (IS_ERR(hdmi->ddc_regulator)) { + platform_device_put(hdmi->connector_pdev); + dev_err(dev, "Couldn't get ddc regulator\n"); + return PTR_ERR(hdmi->ddc_regulator); + } + } + ret = regulator_enable(hdmi->regulator); if (ret) { dev_err(dev, "Failed to enable regulator\n"); - return ret; + goto err_unref_ddc_regulator; + } + + if (hdmi->ddc_regulator) { + ret = regulator_enable(hdmi->ddc_regulator); + if (ret) { + dev_err(dev, "Failed to enable ddc regulator\n"); + goto err_disable_regulator; + } }
ret = reset_control_deassert(hdmi->rst_ctrl); if (ret) { dev_err(dev, "Could not deassert ctrl reset control\n"); - goto err_disable_regulator; + goto err_disable_ddc_regulator; }
ret = clk_prepare_enable(hdmi->clk_tmds); @@ -213,8 +256,15 @@ static int sun8i_dw_hdmi_bind(struct device *dev, struct device *master, clk_disable_unprepare(hdmi->clk_tmds); err_assert_ctrl_reset: reset_control_assert(hdmi->rst_ctrl); +err_disable_ddc_regulator: + if (hdmi->ddc_regulator) + regulator_disable(hdmi->ddc_regulator); err_disable_regulator: regulator_disable(hdmi->regulator); +err_unref_ddc_regulator: + if (hdmi->ddc_regulator) + regulator_put(hdmi->ddc_regulator); + platform_device_put(hdmi->connector_pdev);
return ret; } @@ -229,6 +279,13 @@ static void sun8i_dw_hdmi_unbind(struct device *dev, struct device *master, clk_disable_unprepare(hdmi->clk_tmds); reset_control_assert(hdmi->rst_ctrl); regulator_disable(hdmi->regulator); + + if (hdmi->ddc_regulator) { + regulator_disable(hdmi->ddc_regulator); + regulator_put(hdmi->ddc_regulator); + } + + platform_device_put(hdmi->connector_pdev); }
static const struct component_ops sun8i_dw_hdmi_ops = { diff --git a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h index 720c5aa8adc1..60f5200aee73 100644 --- a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h +++ b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h @@ -188,8 +188,10 @@ struct sun8i_dw_hdmi { struct sun8i_hdmi_phy *phy; struct dw_hdmi_plat_data plat_data; struct regulator *regulator; + struct regulator *ddc_regulator; const struct sun8i_dw_hdmi_quirks *quirks; struct reset_control *rst_ctrl; + struct platform_device *connector_pdev; };
static inline struct sun8i_dw_hdmi *
From: Ondrej Jirman megous@megous.com
Orange Pi 3 has a DDC_CEC_EN signal connected to PH2, that enables the DDC I2C bus voltage shifter. Before EDID can be read, we need to pull PH2 high.
Signed-off-by: Ondrej Jirman megous@megous.com --- .../dts/allwinner/sun50i-h6-orangepi-3.dts | 35 +++++++++++++++++++ 1 file changed, 35 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts index 6d6b1f66796d..58a6635c909e 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts @@ -22,6 +22,18 @@ stdout-path = "serial0:115200n8"; };
+ connector { + compatible = "hdmi-connector"; + type = "a"; + ddc-supply = <®_ddc>; + + port { + hdmi_con_in: endpoint { + remote-endpoint = <&hdmi_out_con>; + }; + }; + }; + leds { compatible = "gpio-leds";
@@ -37,6 +49,15 @@ }; };
+ reg_ddc: ddc-io { + compatible = "regulator-fixed"; + regulator-name = "ddc-io"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + gpio = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */ + }; + reg_vcc5v: vcc5v { /* board wide 5V supply directly from the DC jack */ compatible = "regulator-fixed"; @@ -72,6 +93,10 @@ cpu-supply = <®_dcdca>; };
+&de { + status = "okay"; +}; + &ehci0 { status = "okay"; }; @@ -91,6 +116,16 @@ status = "okay"; };
+&hdmi { + status = "okay"; +}; + +&hdmi_out { + hdmi_out_con: endpoint { + remote-endpoint = <&hdmi_con_in>; + }; +}; + &mdio { ext_rgmii_phy: ethernet-phy@1 { compatible = "ethernet-phy-ieee802.3-c22";
From: Ondrej Jirman megous@megous.com
MMC1 is used on some H6 boards we want to support. Typical use is 4-bit SDIO interface with a WiFi chip. Add pin definitions for this use case.
As this is the only possible configration for mmc1, make it the default one, too.
Signed-off-by: Ondrej Jirman megous@megous.com --- arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi index e0dc4a05c1ba..bd37b849d3b7 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi @@ -243,6 +243,15 @@ bias-pull-up; };
+ /omit-if-no-ref/ + mmc1_pins: mmc1-pins { + pins = "PG0", "PG1", "PG2", "PG3", + "PG4", "PG5"; + function = "mmc1"; + drive-strength = <30>; + bias-pull-up; + }; + mmc2_pins: mmc2-pins { pins = "PC1", "PC4", "PC5", "PC6", "PC7", "PC8", "PC9", "PC10", @@ -294,6 +303,8 @@ resets = <&ccu RST_BUS_MMC1>; reset-names = "ahb"; interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins>; status = "disabled"; #address-cells = <1>; #size-cells = <0>;
On Sat, Apr 13, 2019 at 06:54:18PM +0200, megous@megous.com wrote:
From: Ondrej Jirman megous@megous.com
MMC1 is used on some H6 boards we want to support. Typical use is 4-bit SDIO interface with a WiFi chip. Add pin definitions for this use case.
As this is the only possible configration for mmc1, make it the default one, too.
Signed-off-by: Ondrej Jirman megous@megous.com
Applied, thanks! Maxime
-- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com
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