From: Dave Airlie airlied@redhat.com
Signed-off-by: Dave Airlie airlied@redhat.com Signed-off-by: Oded Gabbay oded.gabbay@gmail.com --- include/drm/drm_cache.h | 9 +++++++++ 1 file changed, 9 insertions(+)
diff --git a/include/drm/drm_cache.h b/include/drm/drm_cache.h index 7bfb063..461a055 100644 --- a/include/drm/drm_cache.h +++ b/include/drm/drm_cache.h @@ -35,4 +35,13 @@
void drm_clflush_pages(struct page *pages[], unsigned long num_pages);
+static inline bool drm_arch_can_wc_memory(void) +{ +#if defined(CONFIG_PPC) && !defined(CONFIG_NOT_COHERENT_CACHE) + return false; +#else + return true; +#endif +} + #endif
Signed-off-by: Oded Gabbay oded.gabbay@gmail.com --- drivers/gpu/drm/radeon/radeon_object.c | 8 ++++++++ 1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c index 84d4563..255faf6 100644 --- a/drivers/gpu/drm/radeon/radeon_object.c +++ b/drivers/gpu/drm/radeon/radeon_object.c @@ -33,6 +33,7 @@ #include <linux/slab.h> #include <drm/drmP.h> #include <drm/radeon_drm.h> +#include <drm/drm_cache.h> #include "radeon.h" #include "radeon_trace.h"
@@ -245,6 +246,13 @@ int radeon_bo_create(struct radeon_device *rdev, DRM_INFO_ONCE("Please enable CONFIG_MTRR and CONFIG_X86_PAT for " "better performance thanks to write-combining\n"); bo->flags &= ~(RADEON_GEM_GTT_WC | RADEON_GEM_GTT_UC); +#else + /* + * For architectures that don't support WC memory, + * mask out the WC flag from the BO + */ + if (!drm_arch_can_wc_memory()) + bo->flags &= ~RADEON_GEM_GTT_WC; #endif
radeon_ttm_placement_from_domain(bo, domain);
On 30.01.2016 14:59, Oded Gabbay wrote:
For consistency with existing multi-line comments, please start the comment on the opening line:
/* For architectures that don't support WC memory, * mask out the WC flag from the BO */
With that fixed (in patch 3 as well), the series is
Reviewed-by: Michel Dänzer michel.daenzer@amd.com
On Sat, Jan 30, 2016 at 10:11 AM, Michel Dänzer michel@daenzer.net wrote:
Kernel coding style says differently...
Signed-off-by: Oded Gabbay oded.gabbay@gmail.com --- drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 9 +++++++++ 1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c index c3ce103..7b963e6 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c @@ -33,6 +33,7 @@ #include <linux/slab.h> #include <drm/drmP.h> #include <drm/amdgpu_drm.h> +#include <drm/drm_cache.h> #include "amdgpu.h" #include "amdgpu_trace.h"
@@ -261,6 +262,14 @@ int amdgpu_bo_create_restricted(struct amdgpu_device *adev, AMDGPU_GEM_DOMAIN_OA);
bo->flags = flags; + + /* + * For architectures that don't support WC memory, + * mask out the WC flag from the BO + */ + if (!drm_arch_can_wc_memory()) + bo->flags &= ~AMDGPU_GEM_CREATE_CPU_GTT_USWC; + amdgpu_fill_placement_to_bo(bo, placement); /* Kernel allocation are uninterruptible */ r = ttm_bo_init(&adev->mman.bdev, &bo->tbo, size, type,
Am 30.01.2016 um 06:59 schrieb Oded Gabbay:
With the minor issues Michel noted fixed this series is Reviewed-by: Christian König christian.koenig@amd.com as well.
On Sat, Jan 30, 2016 at 4:57 AM, Christian König deathsimple@vodafone.de wrote:
Applied with the comments fixed up. Thanks!
Alex
On Mon, Feb 1, 2016 at 7:01 PM, Alex Deucher alexdeucher@gmail.com wrote:
Hi Alex, Could you please add stable tag ? I forgot to add them. Thanks,
Oded
On Tue, Feb 2, 2016 at 5:07 PM, Alex Deucher alexdeucher@gmail.com wrote:
Thanks.
Alex, I saw you put the patches into your drm-next-4.6. As these are fixes, any chance you could instead put them to drm-fixes-4.5 ? for -rc3/4 ?
Oded
On Wed, Feb 3, 2016 at 3:17 AM, Oded Gabbay oded.gabbay@gmail.com wrote:
They'll be in my -fixes pull this week. I put them in my 4.6-wip tree for additional testing.
Alex
On Wed, Feb 3, 2016 at 3:53 PM, Alex Deucher alexdeucher@gmail.com wrote:
ah, great. Thanks again Oded
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