Signed-off-by: Rafał Miłecki zajec5@gmail.com --- drivers/gpu/drm/radeon/r600_hdmi.c | 10 ++++++++-- 1 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/radeon/r600_hdmi.c b/drivers/gpu/drm/radeon/r600_hdmi.c index 5021372..06f923e 100644 --- a/drivers/gpu/drm/radeon/r600_hdmi.c +++ b/drivers/gpu/drm/radeon/r600_hdmi.c @@ -571,9 +571,15 @@ void r600_hdmi_disable(struct drm_encoder *encoder) /* disable polling */ r600_audio_disable_polling(encoder);
- if (ASIC_IS_DCE32(rdev) && !ASIC_IS_DCE4(rdev)) { + if (ASIC_IS_DCE5(rdev)) { + /* TODO */ + } else if (ASIC_IS_DCE4(rdev)) { + /* TODO */ + } else if (ASIC_IS_DCE32(rdev)) { WREG32_P(radeon_encoder->hdmi_config_offset + 0x4, 0, ~0x1); - } else if (rdev->family >= CHIP_R600 && !ASIC_IS_DCE3(rdev)) { + } else if (ASIC_IS_DCE3(rdev)) { + /* TODO */ + } else if (rdev->family >= CHIP_R600) { switch (radeon_encoder->encoder_id) { case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1: WREG32_P(AVIVO_TMDSA_CNTL, 0, ~0x4);
Signed-off-by: Rafał Miłecki zajec5@gmail.com --- drivers/gpu/drm/radeon/evergreen.c | 14 ++++++++++++++ drivers/gpu/drm/radeon/evergreen_reg.h | 8 ++++++++ drivers/gpu/drm/radeon/r600_audio.c | 22 +++++++++++++++++++--- 3 files changed, 41 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 1d603a3..651719a 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c @@ -3120,6 +3120,12 @@ static int evergreen_startup(struct radeon_device *rdev) if (r) return r;
+ r = r600_audio_init(rdev); + if (r) { + DRM_ERROR("radeon: audio init failed\n"); + return r; + } + return 0; }
@@ -3151,12 +3157,19 @@ int evergreen_resume(struct radeon_device *rdev) return r; }
+ r = r600_audio_init(rdev); + if (r) { + DRM_ERROR("radeon: audio resume failed\n"); + return r; + } + return r;
}
int evergreen_suspend(struct radeon_device *rdev) { + r600_audio_fini(rdev); /* FIXME: we should wait for ring to be empty */ r700_cp_stop(rdev); rdev->cp.ready = false; @@ -3276,6 +3289,7 @@ int evergreen_init(struct radeon_device *rdev)
void evergreen_fini(struct radeon_device *rdev) { + r600_audio_fini(rdev); r600_blit_fini(rdev); r700_cp_fini(rdev); r600_irq_fini(rdev); diff --git a/drivers/gpu/drm/radeon/evergreen_reg.h b/drivers/gpu/drm/radeon/evergreen_reg.h index c781c92..01cff84 100644 --- a/drivers/gpu/drm/radeon/evergreen_reg.h +++ b/drivers/gpu/drm/radeon/evergreen_reg.h @@ -35,6 +35,14 @@ #define EVERGREEN_P1PLL_SS_CNTL 0x414 #define EVERGREEN_P2PLL_SS_CNTL 0x454 # define EVERGREEN_PxPLL_SS_EN (1 << 12) + +#define EVERGREEN_AUDIO_PLL1_MUL 0x5b0 +#define EVERGREEN_AUDIO_PLL1_DIV 0x5b4 +#define EVERGREEN_AUDIO_PLL1_UNK 0x5bc + +#define EVERGREEN_AUDIO_ENABLE 0x5e78 +#define EVERGREEN_AUDIO_VENDOR_ID 0x5ec0 + /* GRPH blocks at 0x6800, 0x7400, 0x10000, 0x10c00, 0x11800, 0x12400 */ #define EVERGREEN_GRPH_ENABLE 0x6800 #define EVERGREEN_GRPH_CONTROL 0x6804 diff --git a/drivers/gpu/drm/radeon/r600_audio.c b/drivers/gpu/drm/radeon/r600_audio.c index fa3bb53..ba66f30 100644 --- a/drivers/gpu/drm/radeon/r600_audio.c +++ b/drivers/gpu/drm/radeon/r600_audio.c @@ -36,7 +36,7 @@ */ static int r600_audio_chipset_supported(struct radeon_device *rdev) { - return (rdev->family >= CHIP_R600 && !ASIC_IS_DCE4(rdev)) + return (rdev->family >= CHIP_R600 && !ASIC_IS_DCE5(rdev)) || rdev->family == CHIP_RS600 || rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740; @@ -161,8 +161,18 @@ static void r600_audio_update_hdmi(unsigned long param) */ static void r600_audio_engine_enable(struct radeon_device *rdev, bool enable) { + u32 value = 0; DRM_INFO("%s audio support\n", enable ? "Enabling" : "Disabling"); - WREG32_P(R600_AUDIO_ENABLE, enable ? 0x81000000 : 0x0, ~0x81000000); + if (ASIC_IS_DCE4(rdev)) { + if (enable) { + value |= 0x81000000; /* Required to enable audio */ + value |= 0x0e1000f0; /* fglrx sets that too */ + } + WREG32(EVERGREEN_AUDIO_ENABLE, value); + } else { + WREG32_P(R600_AUDIO_ENABLE, + enable ? 0x81000000 : 0x0, ~0x81000000); + } rdev->audio_enabled = enable; }
@@ -249,7 +259,13 @@ void r600_audio_set_clock(struct drm_encoder *encoder, int clock) }
if (ASIC_IS_DCE4(rdev)) { - /* TODO */ + /* TODO: other PLLs? */ + WREG32(EVERGREEN_AUDIO_PLL1_MUL, base_rate * 10); + WREG32(EVERGREEN_AUDIO_PLL1_DIV, clock * 10); + WREG32(EVERGREEN_AUDIO_PLL1_UNK, 0x00000071); + + /* Some magic trigger or src sel? */ + WREG32_P(0x5ac, 0x01, ~0x77); } else { switch (dig->dig_encoder) { case 0:
Signed-off-by: Rafał Miłecki zajec5@gmail.com --- drivers/gpu/drm/radeon/evergreen_reg.h | 10 +++++++ drivers/gpu/drm/radeon/r600_hdmi.c | 44 ++++++++++++++++++++++++++------ 2 files changed, 46 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/radeon/evergreen_reg.h b/drivers/gpu/drm/radeon/evergreen_reg.h index 01cff84..ce4414d 100644 --- a/drivers/gpu/drm/radeon/evergreen_reg.h +++ b/drivers/gpu/drm/radeon/evergreen_reg.h @@ -199,4 +199,14 @@ #define EVERGREEN_DC_GPIO_HPD_EN 0x64b8 #define EVERGREEN_DC_GPIO_HPD_Y 0x64bc
+/* HDMI blocks at 0x7030, 0x7c30, 0x10830, 0x11430, 0x12030, 0x12c30 */ +#define EVERGREEN_HDMI_BLOCK0 0x7030 +#define EVERGREEN_HDMI_BLOCK1 0x7c30 +#define EVERGREEN_HDMI_BLOCK2 0x10830 +#define EVERGREEN_HDMI_BLOCK3 0x11430 +#define EVERGREEN_HDMI_BLOCK4 0x12030 +#define EVERGREEN_HDMI_BLOCK5 0x12c30 + +#define EVERGREEN_HDMI_CONFIG_OFFSET 0xf0 + #endif diff --git a/drivers/gpu/drm/radeon/r600_hdmi.c b/drivers/gpu/drm/radeon/r600_hdmi.c index 06f923e..9612080 100644 --- a/drivers/gpu/drm/radeon/r600_hdmi.c +++ b/drivers/gpu/drm/radeon/r600_hdmi.c @@ -313,7 +313,7 @@ void r600_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mod struct radeon_device *rdev = dev->dev_private; uint32_t offset = to_radeon_encoder(encoder)->hdmi_offset;
- if (ASIC_IS_DCE4(rdev)) + if (ASIC_IS_DCE5(rdev)) return;
if (!offset) @@ -463,7 +463,31 @@ static void r600_hdmi_assign_block(struct drm_encoder *encoder) if (ASIC_IS_DCE5(rdev)) { /* TODO */ } else if (ASIC_IS_DCE4(rdev)) { - /* TODO */ + switch (dig->dig_encoder) { + case 0: + radeon_encoder->hdmi_offset = EVERGREEN_HDMI_BLOCK0; + break; + case 1: + radeon_encoder->hdmi_offset = EVERGREEN_HDMI_BLOCK1; + break; + case 2: + radeon_encoder->hdmi_offset = EVERGREEN_HDMI_BLOCK2; + break; + case 3: + radeon_encoder->hdmi_offset = EVERGREEN_HDMI_BLOCK3; + break; + case 4: + radeon_encoder->hdmi_offset = EVERGREEN_HDMI_BLOCK4; + break; + case 5: + radeon_encoder->hdmi_offset = EVERGREEN_HDMI_BLOCK5; + break; + default: + dev_err(rdev->dev, "Enabling HDMI on unknown dig\n"); + return; + } + radeon_encoder->hdmi_config_offset = radeon_encoder->hdmi_offset + + EVERGREEN_HDMI_CONFIG_OFFSET; } else if (ASIC_IS_DCE3(rdev)) { radeon_encoder->hdmi_offset = dig->dig_encoder ? R600_HDMI_BLOCK3 : R600_HDMI_BLOCK1; @@ -486,7 +510,7 @@ void r600_hdmi_enable(struct drm_encoder *encoder) struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); uint32_t offset;
- if (ASIC_IS_DCE4(rdev)) + if (ASIC_IS_DCE5(rdev)) return;
if (!radeon_encoder->hdmi_offset) { @@ -502,7 +526,10 @@ void r600_hdmi_enable(struct drm_encoder *encoder) if (ASIC_IS_DCE5(rdev)) { /* TODO */ } else if (ASIC_IS_DCE4(rdev)) { - /* TODO */ + /* This -= 0x30 looks a little tricky, but it's just touching + * dig encoder register that lies a little before HDMI block. */ + WREG32_P(radeon_encoder->hdmi_offset - 0x30, 0x1000, ~0x1000); + WREG32_P(radeon_encoder->hdmi_config_offset + 0xc, 0x1, ~0x1); } else if (ASIC_IS_DCE32(rdev)) { WREG32_P(radeon_encoder->hdmi_config_offset + 0x4, 0x1, ~0x1); } else if (ASIC_IS_DCE3(rdev)) { @@ -526,8 +553,8 @@ void r600_hdmi_enable(struct drm_encoder *encoder) if (rdev->irq.installed && rdev->family != CHIP_RS600 && rdev->family != CHIP_RS690 - && rdev->family != CHIP_RS740) { - + && rdev->family != CHIP_RS740 + && !ASIC_IS_DCE4(rdev)) { /* if irq is available use it */ rdev->irq.hdmi[offset == R600_HDMI_BLOCK1 ? 0 : 1] = true; radeon_irq_set(rdev); @@ -552,7 +579,7 @@ void r600_hdmi_disable(struct drm_encoder *encoder) struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); uint32_t offset;
- if (ASIC_IS_DCE4(rdev)) + if (ASIC_IS_DCE5(rdev)) return;
offset = radeon_encoder->hdmi_offset; @@ -574,7 +601,8 @@ void r600_hdmi_disable(struct drm_encoder *encoder) if (ASIC_IS_DCE5(rdev)) { /* TODO */ } else if (ASIC_IS_DCE4(rdev)) { - /* TODO */ + WREG32_P(radeon_encoder->hdmi_offset - 0x30, 0, ~0x1000); + WREG32_P(radeon_encoder->hdmi_config_offset + 0xc, 0, ~0x1); } else if (ASIC_IS_DCE32(rdev)) { WREG32_P(radeon_encoder->hdmi_config_offset + 0x4, 0, ~0x1); } else if (ASIC_IS_DCE3(rdev)) {
2011/12/7 Rafał Miłecki zajec5@gmail.com:
Signed-off-by: Rafał Miłecki zajec5@gmail.com
drivers/gpu/drm/radeon/evergreen_reg.h | 10 +++++++ drivers/gpu/drm/radeon/r600_hdmi.c | 44 ++++++++++++++++++++++++++------ 2 files changed, 46 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/radeon/evergreen_reg.h b/drivers/gpu/drm/radeon/evergreen_reg.h index 01cff84..ce4414d 100644 --- a/drivers/gpu/drm/radeon/evergreen_reg.h +++ b/drivers/gpu/drm/radeon/evergreen_reg.h @@ -199,4 +199,14 @@ #define EVERGREEN_DC_GPIO_HPD_EN 0x64b8 #define EVERGREEN_DC_GPIO_HPD_Y 0x64bc
+/* HDMI blocks at 0x7030, 0x7c30, 0x10830, 0x11430, 0x12030, 0x12c30 */ +#define EVERGREEN_HDMI_BLOCK0 0x7030 +#define EVERGREEN_HDMI_BLOCK1 0x7c30 +#define EVERGREEN_HDMI_BLOCK2 0x10830 +#define EVERGREEN_HDMI_BLOCK3 0x11430 +#define EVERGREEN_HDMI_BLOCK4 0x12030 +#define EVERGREEN_HDMI_BLOCK5 0x12c30
+#define EVERGREEN_HDMI_CONFIG_OFFSET 0xf0
#endif diff --git a/drivers/gpu/drm/radeon/r600_hdmi.c b/drivers/gpu/drm/radeon/r600_hdmi.c index 06f923e..9612080 100644 --- a/drivers/gpu/drm/radeon/r600_hdmi.c +++ b/drivers/gpu/drm/radeon/r600_hdmi.c @@ -313,7 +313,7 @@ void r600_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mod struct radeon_device *rdev = dev->dev_private; uint32_t offset = to_radeon_encoder(encoder)->hdmi_offset;
- if (ASIC_IS_DCE4(rdev))
- if (ASIC_IS_DCE5(rdev))
return;
if (!offset) @@ -463,7 +463,31 @@ static void r600_hdmi_assign_block(struct drm_encoder *encoder) if (ASIC_IS_DCE5(rdev)) { /* TODO */ } else if (ASIC_IS_DCE4(rdev)) {
- /* TODO */
- switch (dig->dig_encoder) {
- case 0:
- radeon_encoder->hdmi_offset = EVERGREEN_HDMI_BLOCK0;
- break;
- case 1:
- radeon_encoder->hdmi_offset = EVERGREEN_HDMI_BLOCK1;
- break;
- case 2:
- radeon_encoder->hdmi_offset = EVERGREEN_HDMI_BLOCK2;
- break;
- case 3:
- radeon_encoder->hdmi_offset = EVERGREEN_HDMI_BLOCK3;
- break;
- case 4:
- radeon_encoder->hdmi_offset = EVERGREEN_HDMI_BLOCK4;
- break;
- case 5:
- radeon_encoder->hdmi_offset = EVERGREEN_HDMI_BLOCK5;
- break;
- default:
- dev_err(rdev->dev, "Enabling HDMI on unknown dig\n");
- return;
- }
- radeon_encoder->hdmi_config_offset = radeon_encoder->hdmi_offset
- + EVERGREEN_HDMI_CONFIG_OFFSET;
} else if (ASIC_IS_DCE3(rdev)) { radeon_encoder->hdmi_offset = dig->dig_encoder ? R600_HDMI_BLOCK3 : R600_HDMI_BLOCK1; @@ -486,7 +510,7 @@ void r600_hdmi_enable(struct drm_encoder *encoder) struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); uint32_t offset;
- if (ASIC_IS_DCE4(rdev))
- if (ASIC_IS_DCE5(rdev))
return;
if (!radeon_encoder->hdmi_offset) { @@ -502,7 +526,10 @@ void r600_hdmi_enable(struct drm_encoder *encoder) if (ASIC_IS_DCE5(rdev)) { /* TODO */ } else if (ASIC_IS_DCE4(rdev)) {
- /* TODO */
- /* This -= 0x30 looks a little tricky, but it's just touching
- * dig encoder register that lies a little before HDMI block. */
- WREG32_P(radeon_encoder->hdmi_offset - 0x30, 0x1000, ~0x1000);
You shouldn't program 0x7000 (DIG_CNTL) here. It's already programmed via the atom atombios_dig_encoder_setup() when action=ATOM_ENCODER_CMD_SETUP based on how you set the ucEncoderMode parameter (DP, LVDS, DVI, HDMI -- set by atombios_get_encoder_mode()). DIG_CNTL.DIG_MODE is a 3 bit field and changing just 1 bit change the encoder type which may cause problems depending on how the dig encoder is set up.
- WREG32_P(radeon_encoder->hdmi_config_offset + 0xc, 0x1, ~0x1);
} else if (ASIC_IS_DCE32(rdev)) { WREG32_P(radeon_encoder->hdmi_config_offset + 0x4, 0x1, ~0x1); } else if (ASIC_IS_DCE3(rdev)) { @@ -526,8 +553,8 @@ void r600_hdmi_enable(struct drm_encoder *encoder) if (rdev->irq.installed && rdev->family != CHIP_RS600 && rdev->family != CHIP_RS690
- && rdev->family != CHIP_RS740) {
- && rdev->family != CHIP_RS740
- && !ASIC_IS_DCE4(rdev)) {
/* if irq is available use it */ rdev->irq.hdmi[offset == R600_HDMI_BLOCK1 ? 0 : 1] = true; radeon_irq_set(rdev); @@ -552,7 +579,7 @@ void r600_hdmi_disable(struct drm_encoder *encoder) struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); uint32_t offset;
- if (ASIC_IS_DCE4(rdev))
- if (ASIC_IS_DCE5(rdev))
return;
offset = radeon_encoder->hdmi_offset; @@ -574,7 +601,8 @@ void r600_hdmi_disable(struct drm_encoder *encoder) if (ASIC_IS_DCE5(rdev)) { /* TODO */ } else if (ASIC_IS_DCE4(rdev)) {
- /* TODO */
- WREG32_P(radeon_encoder->hdmi_offset - 0x30, 0, ~0x1000);
Remove the write to 0x7000 here as well. See my comment above.
- WREG32_P(radeon_encoder->hdmi_config_offset + 0xc, 0, ~0x1);
} else if (ASIC_IS_DCE32(rdev)) { WREG32_P(radeon_encoder->hdmi_config_offset + 0x4, 0, ~0x1); } else if (ASIC_IS_DCE3(rdev)) { -- 1.7.3.4
dri-devel@lists.freedesktop.org
-
Alex Deucher -
Rafał Miłecki