While trying to fix the error message
amdgpu: [powerplay] min_core_set_clock not set
on my carizzo board. I Realized that the structure display_config was never set and therefore a lot of code could be simplified.
Also due to display_config never set, the error message was invalid.
Other people referencing it:
http://www.mikejonesey.co.uk/linux/optimisation/amd-carrizo-powerplay-this-f...
Ricardo Ribalda Delgado (14): amdgpu: powerplay: Remove unused function amdgpu: powerplay: Remove unused function amdgpu: powerplay: cz_hwmgr: Fix invalid error message. amdgpu: powerplay: smu7_hwmgr: Assume display_config is zero amdgpu: powerplay: fiji_smc: Assume display_config is zero amdgpu: powerplay: iceland_smc: Assume display_config is zero amdgpu: powerplay: polaris10_smc: Assume display_config is zero amdgpu: powerplay: tonga_smc: Assume display_config is zero amdgpu: powerplay: rv_hwmgr: Assume display_config is zero amdgpu: powerplay: vega10_hwmgr: Assume display_config is zero amdgpu: ci_dpm: Assume pm_display_cfg is zero amdgpu: powerplay: hwmgr: Remove unused field amdgpu: amdgpu_dpm: Remove unused field amdgpu: powerplay: Remove unused structure
drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h | 1 - drivers/gpu/drm/amd/amdgpu/ci_dpm.c | 6 --- drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 21 ----------- .../gpu/drm/amd/powerplay/eventmgr/eventtasks.c | 1 - drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c | 20 +++------- .../gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c | 25 ------------- drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c | 2 - drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 10 ++--- drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 18 +++------ drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h | 43 ---------------------- .../gpu/drm/amd/powerplay/inc/hardwaremanager.h | 3 -- drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 1 - drivers/gpu/drm/amd/powerplay/smumgr/fiji_smc.c | 5 +-- drivers/gpu/drm/amd/powerplay/smumgr/iceland_smc.c | 3 +- .../gpu/drm/amd/powerplay/smumgr/polaris10_smc.c | 5 +-- drivers/gpu/drm/amd/powerplay/smumgr/tonga_smc.c | 3 +- 16 files changed, 20 insertions(+), 147 deletions(-)
amd_powerplay_display_configuration_change is never called.
Signed-off-by: Ricardo Ribalda Delgado ricardo.ribalda@gmail.com --- drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 21 --------------------- drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h | 3 --- 2 files changed, 24 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c index f73e80c4bf33..1ee7aa5546bf 100644 --- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c +++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c @@ -1237,27 +1237,6 @@ int amd_powerplay_reset(void *handle) return pem_handle_event(eventmgr, AMD_PP_EVENT_COMPLETE_INIT, &event_data); }
-/* export this function to DAL */ - -int amd_powerplay_display_configuration_change(void *handle, - const struct amd_pp_display_configuration *display_config) -{ - struct pp_hwmgr *hwmgr; - struct pp_instance *pp_handle = (struct pp_instance *)handle; - int ret = 0; - - ret = pp_check(pp_handle); - - if (ret != 0) - return ret; - - hwmgr = pp_handle->hwmgr; - mutex_lock(&pp_handle->pp_lock); - phm_store_dal_configuration_data(hwmgr, display_config); - mutex_unlock(&pp_handle->pp_lock); - return 0; -} - int amd_powerplay_get_display_power_level(void *handle, struct amd_pp_simple_clock_info *output) { diff --git a/drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h b/drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h index 07e9c0b5915d..ae49af5cc5d1 100644 --- a/drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h +++ b/drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h @@ -407,9 +407,6 @@ int amd_powerplay_destroy(void *handle);
int amd_powerplay_reset(void *handle);
-int amd_powerplay_display_configuration_change(void *handle, - const struct amd_pp_display_configuration *input); - int amd_powerplay_get_display_power_level(void *handle, struct amd_pp_simple_clock_info *output);
On 2017-07-24 09:35 AM, Ricardo Ribalda Delgado wrote:
amd_powerplay_display_configuration_change is never called.
Signed-off-by: Ricardo Ribalda Delgado ricardo.ribalda@gmail.com
drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 21 --------------------- drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h | 3 --- 2 files changed, 24 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c index f73e80c4bf33..1ee7aa5546bf 100644 --- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c +++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c @@ -1237,27 +1237,6 @@ int amd_powerplay_reset(void *handle) return pem_handle_event(eventmgr, AMD_PP_EVENT_COMPLETE_INIT, &event_data); }
-/* export this function to DAL */
-int amd_powerplay_display_configuration_change(void *handle,
- const struct amd_pp_display_configuration *display_config)
This is used and needed by the DC display driver. See display/amdgpu_dm/amdgpu_dm_services.c:193 in Alex's amd-staging-4.11 tree:
https://cgit.freedesktop.org/~agd5f/linux/tree/drivers/gpu/drm/amd/display/a...
Harry
-{
- struct pp_hwmgr *hwmgr;
- struct pp_instance *pp_handle = (struct pp_instance *)handle;
- int ret = 0;
- ret = pp_check(pp_handle);
- if (ret != 0)
return ret;- hwmgr = pp_handle->hwmgr;
- mutex_lock(&pp_handle->pp_lock);
- phm_store_dal_configuration_data(hwmgr, display_config);
- mutex_unlock(&pp_handle->pp_lock);
- return 0;
-}
int amd_powerplay_get_display_power_level(void *handle, struct amd_pp_simple_clock_info *output) { diff --git a/drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h b/drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h index 07e9c0b5915d..ae49af5cc5d1 100644 --- a/drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h +++ b/drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h @@ -407,9 +407,6 @@ int amd_powerplay_destroy(void *handle);
int amd_powerplay_reset(void *handle);
-int amd_powerplay_display_configuration_change(void *handle,
const struct amd_pp_display_configuration *input);int amd_powerplay_get_display_power_level(void *handle, struct amd_pp_simple_clock_info *output);
Hi Harry On Mon, Jul 24, 2017 at 4:01 PM, Harry Wentland harry.wentland@amd.com wrote:
This is used and needed by the DC display driver. See display/amdgpu_dm/amdgpu_dm_services.c:193 in Alex's amd-staging-4.11 tree:
https://cgit.freedesktop.org/~agd5f/linux/tree/drivers/gpu/drm/amd/display/a...
I could not find any reference to the function in linux-next (>4.12)
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tree/dri...
Is there any plan to merge Alex's amd-stagin tree?
Sorry, I am not very familiar with this subsystem.
Regards!
On 2017-07-24 10:06 AM, Ricardo Ribalda Delgado wrote:
Hi Harry On Mon, Jul 24, 2017 at 4:01 PM, Harry Wentland harry.wentland@amd.com wrote:
This is used and needed by the DC display driver. See display/amdgpu_dm/amdgpu_dm_services.c:193 in Alex's amd-staging-4.11 tree:
https://cgit.freedesktop.org/~agd5f/linux/tree/drivers/gpu/drm/amd/display/a...
I could not find any reference to the function in linux-next (>4.12)
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tree/dri...
Is there any plan to merge Alex's amd-stagin tree?
The plan is to merge/upstream the amd/display portion of Alex's amd-staging tree. We're currently working on the community feedback we received to get it into shape.
Harry
Sorry, I am not very familiar with this subsystem.
Regards!
Hi Harry
On Mon, Jul 24, 2017 at 5:45 PM, Harry Wentland harry.wentland@amd.com wrote:
On 2017-07-24 10:06 AM, Ricardo Ribalda Delgado wrote:
Hi Harry On Mon, Jul 24, 2017 at 4:01 PM, Harry Wentland harry.wentland@amd.com
wrote:
This is used and needed by the DC display driver. See display/amdgpu_dm/amdgpu_dm_services.c:193 in Alex's amd-staging-4.11
tree:
drm/amd/display/amdgpu_dm/amdgpu_dm_services.c?h=amd-staging-4.11
I could not find any reference to the function in linux-next (>4.12)
linux-next.git/tree/drivers/gpu/drm/amd
Is there any plan to merge Alex's amd-stagin tree?
The plan is to merge/upstream the amd/display portion of Alex's amd-staging tree. We're currently working on the community feedback we received to get it into shape.
Is there any timeframe for this?
At least we should remove the pr_info("min_core_set_clock not set\n"); message.
it is (very) misleading right now.
Regards!
Harry
Sorry, I am not very familiar with this subsystem.
Regards!
Hi Harry
On Mon, Jul 24, 2017 at 5:45 PM, Harry Wentland harry.wentland@amd.com wrote:
On 2017-07-24 10:06 AM, Ricardo Ribalda Delgado wrote:
Hi Harry On Mon, Jul 24, 2017 at 4:01 PM, Harry Wentland harry.wentland@amd.com wrote:
This is used and needed by the DC display driver. See display/amdgpu_dm/amdgpu_dm_services.c:193 in Alex's amd-staging-4.11 tree:
https://cgit.freedesktop.org/~agd5f/linux/tree/drivers/gpu/drm/amd/display/a...
I could not find any reference to the function in linux-next (>4.12)
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tree/dri...
Is there any plan to merge Alex's amd-stagin tree?
The plan is to merge/upstream the amd/display portion of Alex's amd-staging tree. We're currently working on the community feedback we received to get it into shape.
Is there any timeframe for this?
At least we should remove the pr_info("min_core_set_clock not set\n"); message.
it is (very) misleading right now.
Regards!
Harry
Sorry, I am not very familiar with this subsystem.
Regards!
On 2017-07-26 09:47 AM, Ricardo Ribalda Delgado wrote:
Hi Harry
On Mon, Jul 24, 2017 at 5:45 PM, Harry Wentland harry.wentland@amd.com wrote:
On 2017-07-24 10:06 AM, Ricardo Ribalda Delgado wrote:
Hi Harry On Mon, Jul 24, 2017 at 4:01 PM, Harry Wentland harry.wentland@amd.com wrote:
This is used and needed by the DC display driver. See display/amdgpu_dm/amdgpu_dm_services.c:193 in Alex's amd-staging-4.11 tree:
https://cgit.freedesktop.org/~agd5f/linux/tree/drivers/gpu/drm/amd/display/a...
I could not find any reference to the function in linux-next (>4.12)
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tree/dri...
Is there any plan to merge Alex's amd-stagin tree?
The plan is to merge/upstream the amd/display portion of Alex's amd-staging tree. We're currently working on the community feedback we received to get it into shape.
Is there any timeframe for this?
We're actively working on this. It depends on cleaning up our codebase a fair bit.
Harry
At least we should remove the pr_info("min_core_set_clock not set\n"); message.> it is (very) misleading right now.
Regards!
Harry
Sorry, I am not very familiar with this subsystem.
Regards!
phm_store_dal_configuration_data is not used anymore.
Remove also reference on comments to the function
Signed-off-by: Ricardo Ribalda Delgado ricardo.ribalda@gmail.com --- .../gpu/drm/amd/powerplay/eventmgr/eventtasks.c | 1 - .../gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c | 25 ---------------------- .../gpu/drm/amd/powerplay/inc/hardwaremanager.h | 3 --- 3 files changed, 29 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/eventmgr/eventtasks.c b/drivers/gpu/drm/amd/powerplay/eventmgr/eventtasks.c index 8c4ebaae1e0c..eeb155036c40 100644 --- a/drivers/gpu/drm/amd/powerplay/eventmgr/eventtasks.c +++ b/drivers/gpu/drm/amd/powerplay/eventmgr/eventtasks.c @@ -193,7 +193,6 @@ int pem_task_store_dal_configuration(struct pp_eventmgr *eventmgr, const struct { /* TODO */ return 0; - /*phm_store_dal_configuration_data(eventmgr->hwmgr, display_config) */ }
int pem_task_notify_hw_mgr_display_configuration_change(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data) diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c b/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c index fcc722ea7649..c747fbd34073 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c @@ -320,31 +320,6 @@ int phm_check_states_equal(struct pp_hwmgr *hwmgr, return hwmgr->hwmgr_func->check_states_equal(hwmgr, pstate1, pstate2, equal); }
-int phm_store_dal_configuration_data(struct pp_hwmgr *hwmgr, - const struct amd_pp_display_configuration *display_config) -{ - PHM_FUNC_CHECK(hwmgr); - - if (display_config == NULL) - return -EINVAL; - - hwmgr->display_config = *display_config; - - if (hwmgr->hwmgr_func->store_cc6_data == NULL) - return -EINVAL; - - /* TODO: pass other display configuration in the future */ - - if (hwmgr->hwmgr_func->store_cc6_data) - hwmgr->hwmgr_func->store_cc6_data(hwmgr, - display_config->cpu_pstate_separation_time, - display_config->cpu_cc6_disable, - display_config->cpu_pstate_disable, - display_config->nb_pstate_switch_disable); - - return 0; -} - int phm_get_dal_power_level(struct pp_hwmgr *hwmgr, struct amd_pp_simple_clock_info *info) { diff --git a/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h b/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h index a1ebe1014492..ebddcdce323c 100644 --- a/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h +++ b/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h @@ -397,9 +397,6 @@ extern int phm_check_states_equal(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *pstate2, bool *equal);
-extern int phm_store_dal_configuration_data(struct pp_hwmgr *hwmgr, - const struct amd_pp_display_configuration *display_config); - extern int phm_get_dal_power_level(struct pp_hwmgr *hwmgr, struct amd_pp_simple_clock_info *info);
display_config is never set, therefore we can assume it is zero.
Without this fix, the user will get the following invalid warning on its dmesg:
amdgpu: [powerplay] min_core_set_clock not set.
Signed-off-by: Ricardo Ribalda Delgado ricardo.ribalda@gmail.com --- drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c | 20 ++++++-------------- 1 file changed, 6 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c index 0b74da3dca8b..418f6bf33bb5 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c @@ -720,12 +720,8 @@ static int cz_tf_update_sclk_limit(struct pp_hwmgr *hwmgr, else cz_hwmgr->sclk_dpm.soft_max_clk = table->entries[table->count - 1].clk;
- clock = hwmgr->display_config.min_core_set_clock; - if (clock == 0) - pr_info("min_core_set_clock not set\n"); - - if (cz_hwmgr->sclk_dpm.hard_min_clk != clock) { - cz_hwmgr->sclk_dpm.hard_min_clk = clock; + if (cz_hwmgr->sclk_dpm.hard_min_clk) { + cz_hwmgr->sclk_dpm.hard_min_clk = 0;
smum_send_msg_to_smc_with_parameter(hwmgr->smumgr, PPSMC_MSG_SetSclkHardMin, @@ -780,15 +776,13 @@ static int cz_tf_set_deep_sleep_sclk_threshold(struct pp_hwmgr *hwmgr, { if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_SclkDeepSleep)) { - uint32_t clks = hwmgr->display_config.min_core_set_clock_in_sr; - if (clks == 0) - clks = CZ_MIN_DEEP_SLEEP_SCLK;
- PP_DBG_LOG("Setting Deep Sleep Clock: %d\n", clks); + PP_DBG_LOG("Setting Deep Sleep Clock: %d\n", + CZ_MIN_DEEP_SLEEP_SCLK);
smum_send_msg_to_smc_with_parameter(hwmgr->smumgr, PPSMC_MSG_SetMinDeepSleepSclk, - clks); + CZ_MIN_DEEP_SLEEP_SCLK); }
return 0; @@ -1120,9 +1114,7 @@ static int cz_apply_state_adjust_rules(struct pp_hwmgr *hwmgr,
cz_hwmgr->battery_state = (PP_StateUILabel_Battery == prequest_ps->classification.ui_label);
- clocks.memoryClock = hwmgr->display_config.min_mem_set_clock != 0 ? - hwmgr->display_config.min_mem_set_clock : - cz_hwmgr->sys_info.nbp_memory_clock[1]; + clocks.memoryClock = cz_hwmgr->sys_info.nbp_memory_clock[1];
cgs_get_active_displays_info(hwmgr->device, &info); num_of_active_displays = info.display_count;
display_config is never set, so we can assume it is zero.
Signed-off-by: Ricardo Ribalda Delgado ricardo.ribalda@gmail.com --- drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 17 +++++++---------- 1 file changed, 7 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c index 1f01020ce3a9..893e6e846284 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c @@ -2727,9 +2727,6 @@ static int smu7_apply_state_adjust_rules(struct pp_hwmgr *hwmgr,
cgs_get_active_displays_info(hwmgr->device, &info);
- minimum_clocks.engineClock = hwmgr->display_config.min_core_set_clock; - minimum_clocks.memoryClock = hwmgr->display_config.min_mem_set_clock; - if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_StablePState)) { max_limits = &(hwmgr->dyn_state.max_clock_voltage_on_ac); @@ -3928,7 +3925,7 @@ smu7_notify_smc_display_config_after_ps_adjustment(struct pp_hwmgr *hwmgr)
num_active_displays = info.display_count;
- if (num_active_displays > 1 && hwmgr->display_config.multi_monitor_in_sync != true) + if (num_active_displays > 1) smu7_notify_smc_display_change(hwmgr, false);
return 0; @@ -4032,12 +4029,12 @@ smu7_check_smc_update_required_for_display_configuration(struct pp_hwmgr *hwmgr) if (data->display_timing.num_existing_displays != info.display_count) is_update_required = true;
- if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_SclkDeepSleep)) { - if (data->display_timing.min_clock_in_sr != hwmgr->display_config.min_core_set_clock_in_sr && - (data->display_timing.min_clock_in_sr >= SMU7_MINIMUM_ENGINE_CLOCK || - hwmgr->display_config.min_core_set_clock_in_sr >= SMU7_MINIMUM_ENGINE_CLOCK)) - is_update_required = true; - } + if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, + PHM_PlatformCaps_SclkDeepSleep) && + data->display_timing.min_clock_in_sr && + data->display_timing.min_clock_in_sr >= SMU7_MINIMUM_ENGINE_CLOCK) + is_update_required = true; + return is_update_required; }
display_config is never set, so we can assume it is zero.
Signed-off-by: Ricardo Ribalda Delgado ricardo.ribalda@gmail.com --- drivers/gpu/drm/amd/powerplay/smumgr/fiji_smc.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smc.c b/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smc.c index 6a320b27aefd..befd5c304636 100644 --- a/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smc.c +++ b/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smc.c @@ -742,11 +742,12 @@ static int fiji_populate_single_graphic_level(struct pp_hwmgr *hwmgr,
threshold = clock * data->fast_watermark_threshold / 100;
- data->display_timing.min_clock_in_sr = hwmgr->display_config.min_core_set_clock_in_sr; + data->display_timing.min_clock_in_sr = 0;
- if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_SclkDeepSleep)) - level->DeepSleepDivId = smu7_get_sleep_divider_id_from_clock(clock, - hwmgr->display_config.min_core_set_clock_in_sr); + if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, + PHM_PlatformCaps_SclkDeepSleep)) + level->DeepSleepDivId = + smu7_get_sleep_divider_id_from_clock(clock, 0);
/* Default to slow, highest DPM level will be
display_config is never set, we can assume it is zero.
Signed-off-by: Ricardo Ribalda Delgado ricardo.ribalda@gmail.com --- drivers/gpu/drm/amd/powerplay/smumgr/iceland_smc.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/iceland_smc.c b/drivers/gpu/drm/amd/powerplay/smumgr/iceland_smc.c index 51adf04ab4b3..dce87fc13e0c 100644 --- a/drivers/gpu/drm/amd/powerplay/smumgr/iceland_smc.c +++ b/drivers/gpu/drm/amd/powerplay/smumgr/iceland_smc.c @@ -780,8 +780,7 @@ static int iceland_populate_single_graphic_level(struct pp_hwmgr *hwmgr, graphic_level->VoltageDownHyst = 0; graphic_level->PowerThrottle = 0;
- data->display_timing.min_clock_in_sr = - hwmgr->display_config.min_core_set_clock_in_sr; + data->display_timing.min_clock_in_sr = 0;
if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_SclkDeepSleep))
display_config is never set, we can assume it is zero.
Signed-off-by: Ricardo Ribalda Delgado ricardo.ribalda@gmail.com --- drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smc.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smc.c b/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smc.c index f68e759e8be2..c889fc930cfc 100644 --- a/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smc.c +++ b/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smc.c @@ -711,11 +711,12 @@ static int polaris10_populate_single_graphic_level(struct pp_hwmgr *hwmgr, level->DownHyst = 0; level->VoltageDownHyst = 0; level->PowerThrottle = 0; - data->display_timing.min_clock_in_sr = hwmgr->display_config.min_core_set_clock_in_sr; + data->display_timing.min_clock_in_sr = 0;
- if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_SclkDeepSleep)) - level->DeepSleepDivId = smu7_get_sleep_divider_id_from_clock(clock, - hwmgr->display_config.min_core_set_clock_in_sr); + if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, + PHM_PlatformCaps_SclkDeepSleep)) + level->DeepSleepDivId = + smu7_get_sleep_divider_id_from_clock(clock, 0);
/* Default to slow, highest DPM level will be * set to PPSMC_DISPLAY_WATERMARK_LOW later.
display_config is never set, we can assume it is zero.
Signed-off-by: Ricardo Ribalda Delgado ricardo.ribalda@gmail.com --- drivers/gpu/drm/amd/powerplay/smumgr/tonga_smc.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smc.c b/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smc.c index 65d3a4893958..341c31c63e5e 100644 --- a/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smc.c +++ b/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smc.c @@ -562,8 +562,7 @@ static int tonga_populate_single_graphic_level(struct pp_hwmgr *hwmgr, graphic_level->VoltageDownHyst = 0; graphic_level->PowerThrottle = 0;
- data->display_timing.min_clock_in_sr = - hwmgr->display_config.min_core_set_clock_in_sr; + data->display_timing.min_clock_in_sr = 0;
if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_SclkDeepSleep))
display_config is never set, so we can assume that it is zero.
Signed-off-by: Ricardo Ribalda Delgado ricardo.ribalda@gmail.com --- drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c | 2 -- 1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c index 4c7f430b36eb..64a3cb66a3a0 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c @@ -241,8 +241,6 @@ static int rv_tf_set_clock_limit(struct pp_hwmgr *hwmgr, void *input, struct PP_Clocks clocks = {0}; struct pp_display_clock_request clock_req;
- clocks.dcefClock = hwmgr->display_config.min_dcef_set_clk; - clocks.dcefClockInSR = hwmgr->display_config.min_dcef_deep_sleep_set_clk; clock_req.clock_type = amd_pp_dcf_clock; clock_req.clock_freq_in_khz = clocks.dcefClock * 10;
display_config is never set, so we can assume that it is zero
Signed-off-by: Ricardo Ribalda Delgado ricardo.ribalda@gmail.com --- drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 19 ++++++------------- 1 file changed, 6 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c index d6f097f44b6c..dd73ab7e5cfe 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c @@ -3044,8 +3044,6 @@ static int vega10_apply_state_adjust_rules(struct pp_hwmgr *hwmgr, cgs_get_active_displays_info(hwmgr->device, &info);
/* result = PHM_CheckVBlankTime(hwmgr, &vblankTooShort);*/ - minimum_clocks.engineClock = hwmgr->display_config.min_core_set_clock; - minimum_clocks.memoryClock = hwmgr->display_config.min_mem_set_clock;
if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_StablePState)) { @@ -4000,10 +3998,6 @@ static int vega10_notify_smc_display_config_after_ps_adjustment( else vega10_notify_smc_display_change(hwmgr, true);
- min_clocks.dcefClock = hwmgr->display_config.min_dcef_set_clk; - min_clocks.dcefClockInSR = hwmgr->display_config.min_dcef_deep_sleep_set_clk; - min_clocks.memoryClock = hwmgr->display_config.min_mem_set_clock; - for (i = 0; i < dpm_table->count; i++) { if (dpm_table->dpm_levels[i].value == min_clocks.dcefClock) break; @@ -4634,20 +4628,19 @@ static bool vega10_check_smc_update_required_for_display_configuration(struct pp_hwmgr *hwmgr) { struct vega10_hwmgr *data = (struct vega10_hwmgr *)(hwmgr->backend); - bool is_update_required = false; struct cgs_display_info info = {0, 0, NULL};
cgs_get_active_displays_info(hwmgr->device, &info);
if (data->display_timing.num_existing_displays != info.display_count) - is_update_required = true; + return true;
- if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_SclkDeepSleep)) { - if (data->display_timing.min_clock_in_sr != hwmgr->display_config.min_core_set_clock_in_sr) - is_update_required = true; - } + if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, + PHM_PlatformCaps_SclkDeepSleep) && + data->display_timing.min_clock_in_sr) + return true;
- return is_update_required; + return false; }
static int vega10_disable_dpm_tasks(struct pp_hwmgr *hwmgr)
pm_display_cfg is never set, so we can assume that it is zero
Signed-off-by: Ricardo Ribalda Delgado ricardo.ribalda@gmail.com --- drivers/gpu/drm/amd/amdgpu/ci_dpm.c | 6 ------ 1 file changed, 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c index cb508a211b2f..8319bca3dc52 100644 --- a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c +++ b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c @@ -972,12 +972,6 @@ static void ci_apply_state_adjust_rules(struct amdgpu_device *adev, sclk = ps->performance_levels[0].sclk; }
- if (adev->pm.pm_display_cfg.min_core_set_clock > sclk) - sclk = adev->pm.pm_display_cfg.min_core_set_clock; - - if (adev->pm.pm_display_cfg.min_mem_set_clock > mclk) - mclk = adev->pm.pm_display_cfg.min_mem_set_clock; - if (rps->vce_active) { if (sclk < adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].sclk) sclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].sclk;
Remove unused field display_config
Signed-off-by: Ricardo Ribalda Delgado ricardo.ribalda@gmail.com --- drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 1 - 1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h index 47e57bd2c36f..220bb8cde530 100644 --- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h +++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h @@ -779,7 +779,6 @@ struct pp_hwmgr { struct pp_power_state *request_ps; struct pp_power_state *boot_ps; struct pp_power_state *uvd_ps; - struct amd_pp_display_configuration display_config; uint32_t feature_mask;
/* power profile */
Remove unused field pm_display_cfg
Signed-off-by: Ricardo Ribalda Delgado ricardo.ribalda@gmail.com --- drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h | 1 - 1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h index 8c96a4caa715..5c740814dba4 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h @@ -488,7 +488,6 @@ struct amdgpu_pm { const struct amdgpu_dpm_funcs *funcs; uint32_t pcie_gen_mask; uint32_t pcie_mlw_mask; - struct amd_pp_display_configuration pm_display_cfg;/* set by DAL */ };
#define R600_SSTU_DFLT 0
Remove unused structure definition amd_pp_display_configuration.
Signed-off-by: Ricardo Ribalda Delgado ricardo.ribalda@gmail.com --- drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h | 40 ----------------------- 1 file changed, 40 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h b/drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h index ae49af5cc5d1..6b6f2f7c8527 100644 --- a/drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h +++ b/drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h @@ -191,46 +191,6 @@ struct single_display_configuration
#define MAX_NUM_DISPLAY 32
-struct amd_pp_display_configuration { - bool nb_pstate_switch_disable;/* controls NB PState switch */ - bool cpu_cc6_disable; /* controls CPU CState switch ( on or off) */ - bool cpu_pstate_disable; - uint32_t cpu_pstate_separation_time; - - uint32_t num_display; /* total number of display*/ - uint32_t num_path_including_non_display; - uint32_t crossfire_display_index; - uint32_t min_mem_set_clock; - uint32_t min_core_set_clock; - /* unit 10KHz x bit*/ - uint32_t min_bus_bandwidth; - /* minimum required stutter sclk, in 10khz uint32_t ulMinCoreSetClk;*/ - uint32_t min_core_set_clock_in_sr; - - struct single_display_configuration displays[MAX_NUM_DISPLAY]; - - uint32_t vrefresh; /* for active display*/ - - uint32_t min_vblank_time; /* for active display*/ - bool multi_monitor_in_sync; - /* Controller Index of primary display - used in MCLK SMC switching hang - * SW Workaround*/ - uint32_t crtc_index; - /* htotal*1000/pixelclk - used in MCLK SMC switching hang SW Workaround*/ - uint32_t line_time_in_us; - bool invalid_vblank_time; - - uint32_t display_clk; - /* - * for given display configuration if multimonitormnsync == false then - * Memory clock DPMS with this latency or below is allowed, DPMS with - * higher latency not allowed. - */ - uint32_t dce_tolerable_mclk_in_active_latency; - uint32_t min_dcef_set_clk; - uint32_t min_dcef_deep_sleep_set_clk; -}; - struct amd_pp_simple_clock_info { uint32_t engine_max_clock; uint32_t memory_max_clock;
dri-devel@lists.freedesktop.org
-
Harry Wentland -
Ricardo Ribalda Delgado