If the panel interface is 24-bit but our primary plane is 16bpp, configure as if the panel was 18-bit. This tricks permits the display of 16bpp data on a 24-bit panel by wiring each color component to the MSBs of the 24-bit interface.
Signed-off-by: Paul Cercueil paul@crapouillou.net --- drivers/gpu/drm/ingenic/ingenic-drm.c | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/ingenic/ingenic-drm.c b/drivers/gpu/drm/ingenic/ingenic-drm.c index 6d47ef7b148c..034961a40e98 100644 --- a/drivers/gpu/drm/ingenic/ingenic-drm.c +++ b/drivers/gpu/drm/ingenic/ingenic-drm.c @@ -400,6 +400,8 @@ static void ingenic_drm_encoder_atomic_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode = &crtc_state->adjusted_mode; struct drm_connector *conn = conn_state->connector; struct drm_display_info *info = &conn->display_info; + struct drm_plane_state *plane_state = crtc_state->crtc->primary->state; + const struct drm_format_info *finfo = NULL; unsigned int cfg;
priv->panel_is_sharp = info->bus_flags & DRM_BUS_FLAG_SHARP_SIGNALS; @@ -435,7 +437,22 @@ static void ingenic_drm_encoder_atomic_mode_set(struct drm_encoder *encoder, cfg |= JZ_LCD_CFG_MODE_GENERIC_18BIT; break; case MEDIA_BUS_FMT_RGB888_1X24: - cfg |= JZ_LCD_CFG_MODE_GENERIC_24BIT; + if (plane_state && plane_state->fb) + finfo = plane_state->fb->format; + + /* + * If the panel interface is 24-bit but our + * primary plane is 16bpp, configure as if the + * panel was 18-bit. This tricks permits the + * display of 16bpp data on a 24-bit panel by + * wiring each color component to the MSBs of + * the 24-bit interface. + */ + if (finfo && + finfo->format != DRM_FORMAT_XRGB8888) + cfg |= JZ_LCD_CFG_MODE_GENERIC_18BIT; + else + cfg |= JZ_LCD_CFG_MODE_GENERIC_24BIT; break; case MEDIA_BUS_FMT_RGB888_3X8: cfg |= JZ_LCD_CFG_MODE_8BIT_SERIAL;
The fbdev emulation is only ever used on Ingenic SoCs to run old SDL1 based games at 16bpp (rgb565). Recent applications generally talk to DRM directly, and can request their favourite pixel format; so we can make everybody happy by switching the emulated fbdev to 16bpp.
Signed-off-by: Paul Cercueil paul@crapouillou.net --- drivers/gpu/drm/ingenic/ingenic-drm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/ingenic/ingenic-drm.c b/drivers/gpu/drm/ingenic/ingenic-drm.c index 034961a40e98..9aa88fabbd2a 100644 --- a/drivers/gpu/drm/ingenic/ingenic-drm.c +++ b/drivers/gpu/drm/ingenic/ingenic-drm.c @@ -808,7 +808,7 @@ static int ingenic_drm_probe(struct platform_device *pdev) goto err_devclk_disable; }
- ret = drm_fbdev_generic_setup(drm, 32); + ret = drm_fbdev_generic_setup(drm, 16); if (ret) dev_warn(dev, "Unable to start fbdev emulation: %i", ret);
On Sun, Feb 16, 2020 at 12:58:10PM -0300, Paul Cercueil wrote:
The fbdev emulation is only ever used on Ingenic SoCs to run old SDL1 based games at 16bpp (rgb565). Recent applications generally talk to DRM directly, and can request their favourite pixel format; so we can make everybody happy by switching the emulated fbdev to 16bpp.
Signed-off-by: Paul Cercueil paul@crapouillou.net
drivers/gpu/drm/ingenic/ingenic-drm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/ingenic/ingenic-drm.c b/drivers/gpu/drm/ingenic/ingenic-drm.c index 034961a40e98..9aa88fabbd2a 100644 --- a/drivers/gpu/drm/ingenic/ingenic-drm.c +++ b/drivers/gpu/drm/ingenic/ingenic-drm.c @@ -808,7 +808,7 @@ static int ingenic_drm_probe(struct platform_device *pdev) goto err_devclk_disable; }
- ret = drm_fbdev_generic_setup(drm, 32);
- ret = drm_fbdev_generic_setup(drm, 16);
If you're really bored, could we make everyone even more happy by exposing format switching in the drm fbdev emulation? Only for the drivers which have a full format list on the primary plane (gets too tricky otherwise). And obviously only formats that have lower bpp than the one we booted with (can't reallocate the framebuffer because fbdev).
Just as an idea, this shouldn't be too horrible amounts of work to wire up. But ofc more than this oneliner :-)
Cheers, Daniel
if (ret) dev_warn(dev, "Unable to start fbdev emulation: %i", ret);
-- 2.25.0
Ingenic SoCs are most notably used in cheap chinese handheld gaming consoles. There, the games and applications generally render in software directly in the emulated framebuffer using SDL1.
Since the emulated framebuffer is mapped as write-combine by default, these applications start to run really slow as soon as alpha-blending is used.
Add a 'cached_gem_buffers' option to the ingenic-drm driver to mmap the GEM buffers as fully cached to address this issue.
Signed-off-by: Paul Cercueil paul@crapouillou.net --- drivers/gpu/drm/ingenic/ingenic-drm.c | 41 +++++++++++++++++++++++++-- 1 file changed, 39 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/ingenic/ingenic-drm.c b/drivers/gpu/drm/ingenic/ingenic-drm.c index 9aa88fabbd2a..31f0346b55f0 100644 --- a/drivers/gpu/drm/ingenic/ingenic-drm.c +++ b/drivers/gpu/drm/ingenic/ingenic-drm.c @@ -6,6 +6,7 @@
#include <linux/clk.h> #include <linux/dma-mapping.h> +#include <linux/io.h> #include <linux/module.h> #include <linux/of_device.h> #include <linux/platform_device.h> @@ -30,6 +31,11 @@ #include <drm/drm_probe_helper.h> #include <drm/drm_vblank.h>
+static bool ingenic_drm_cached_gem_buf; +module_param_named(cached_gem_buffers, ingenic_drm_cached_gem_buf, bool, 0400); +MODULE_PARM_DESC(cached_gem_buffers, + "Enable fully cached GEM buffers [default=false]"); + #define JZ_REG_LCD_CFG 0x00 #define JZ_REG_LCD_VSYNC 0x04 #define JZ_REG_LCD_HSYNC 0x08 @@ -378,16 +384,25 @@ static void ingenic_drm_plane_atomic_update(struct drm_plane *plane, struct ingenic_drm *priv = drm_plane_get_priv(plane); struct drm_plane_state *state = plane->state; unsigned int width, height, cpp; + unsigned long virt_addr; dma_addr_t addr; + uint32_t len;
if (state && state->fb) { addr = drm_fb_cma_get_gem_addr(state->fb, state, 0); + width = state->src_w >> 16; height = state->src_h >> 16; cpp = state->fb->format->cpp[plane->index]; + len = width * height * cpp; + + if (ingenic_drm_cached_gem_buf) { + virt_addr = (unsigned long)phys_to_virt(addr); + dma_cache_wback_inv(virt_addr, len); + }
priv->dma_hwdesc->addr = addr; - priv->dma_hwdesc->cmd = width * height * cpp / 4; + priv->dma_hwdesc->cmd = len / 4; priv->dma_hwdesc->cmd |= JZ_LCD_CMD_EOF_IRQ; } } @@ -533,6 +548,28 @@ static void ingenic_drm_disable_vblank(struct drm_crtc *crtc)
DEFINE_DRM_GEM_CMA_FOPS(ingenic_drm_fops);
+static int ingenic_drm_gem_mmap(struct drm_gem_object *obj, + struct vm_area_struct *vma) +{ + unsigned long start, off; + + if (!ingenic_drm_cached_gem_buf) + return drm_gem_cma_prime_mmap(obj, vma); + + off = vma->vm_pgoff << PAGE_SHIFT; + start = to_drm_gem_cma_obj(obj)->paddr; + + off += start; + + vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); + pgprot_val(vma->vm_page_prot) &= ~_CACHE_MASK; + pgprot_val(vma->vm_page_prot) |= _CACHE_CACHABLE_NONCOHERENT; + + return io_remap_pfn_range(vma, vma->vm_start, off >> PAGE_SHIFT, + vma->vm_end - vma->vm_start, + vma->vm_page_prot); +} + static struct drm_driver ingenic_drm_driver_data = { .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_ATOMIC, .name = "ingenic-drm", @@ -554,7 +591,7 @@ static struct drm_driver ingenic_drm_driver_data = { .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table, .gem_prime_vmap = drm_gem_cma_prime_vmap, .gem_prime_vunmap = drm_gem_cma_prime_vunmap, - .gem_prime_mmap = drm_gem_cma_prime_mmap, + .gem_prime_mmap = ingenic_drm_gem_mmap,
.irq_handler = ingenic_drm_irq_handler, .release = ingenic_drm_release,
dri-devel@lists.freedesktop.org
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Daniel Vetter -
Paul Cercueil