With cmwq, there's no reason for nouveau to use a dedicated workqueue. Drop dev_priv->wq and use system_wq instead.
Because nouveau_irq_uninstall() may be called from unsleepable context, the work items can't be flushed from there. Instead, init and flush from nouveau_load/unload().
Signed-off-by: Tejun Heo tj@kernel.org Cc: David Airlie airlied@linux.ie Cc: dri-devel@lists.freedesktop.org --- Only compile tested. Please feel free to take it into the subsystem tree or simply ack - I'll route it through the wq tree.
Thanks.
drivers/gpu/drm/nouveau/nouveau_drv.h | 1 - drivers/gpu/drm/nouveau/nouveau_irq.c | 9 --------- drivers/gpu/drm/nouveau/nouveau_state.c | 19 ++++++++++--------- drivers/gpu/drm/nouveau/nv50_display.c | 4 ++-- 4 files changed, 12 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h index 1c7db64..2ecf875 100644 --- a/drivers/gpu/drm/nouveau/nouveau_drv.h +++ b/drivers/gpu/drm/nouveau/nouveau_drv.h @@ -580,7 +580,6 @@ struct drm_nouveau_private {
struct nouveau_bo *vga_ram;
- struct workqueue_struct *wq; struct work_struct irq_work; struct work_struct hpd_work;
diff --git a/drivers/gpu/drm/nouveau/nouveau_irq.c b/drivers/gpu/drm/nouveau/nouveau_irq.c index 7bfd9e6..7d05a06 100644 --- a/drivers/gpu/drm/nouveau/nouveau_irq.c +++ b/drivers/gpu/drm/nouveau/nouveau_irq.c @@ -52,17 +52,8 @@ static int nouveau_ratelimit(void) void nouveau_irq_preinstall(struct drm_device *dev) { - struct drm_nouveau_private *dev_priv = dev->dev_private; - /* Master disable */ nv_wr32(dev, NV03_PMC_INTR_EN_0, 0); - - if (dev_priv->card_type >= NV_50) { - INIT_WORK(&dev_priv->irq_work, nv50_display_irq_handler_bh); - INIT_WORK(&dev_priv->hpd_work, nv50_display_irq_hotplug_bh); - spin_lock_init(&dev_priv->hpd_state.lock); - INIT_LIST_HEAD(&dev_priv->vbl_waiting); - } }
int diff --git a/drivers/gpu/drm/nouveau/nouveau_state.c b/drivers/gpu/drm/nouveau/nouveau_state.c index 049f755..2eea6ea 100644 --- a/drivers/gpu/drm/nouveau/nouveau_state.c +++ b/drivers/gpu/drm/nouveau/nouveau_state.c @@ -839,17 +839,17 @@ int nouveau_load(struct drm_device *dev, unsigned long flags) dev->dev_private = dev_priv; dev_priv->dev = dev;
+ /* the followings are used only by >= NV_50 */ + INIT_WORK(&dev_priv->irq_work, nv50_display_irq_handler_bh); + INIT_WORK(&dev_priv->hpd_work, nv50_display_irq_hotplug_bh); + spin_lock_init(&dev_priv->hpd_state.lock); + INIT_LIST_HEAD(&dev_priv->vbl_waiting); + dev_priv->flags = flags & NOUVEAU_FLAGS;
NV_DEBUG(dev, "vendor: 0x%X device: 0x%X class: 0x%X\n", dev->pci_vendor, dev->pci_device, dev->pdev->class);
- dev_priv->wq = create_workqueue("nouveau"); - if (!dev_priv->wq) { - ret = -EINVAL; - goto err_priv; - } - /* resource 0 is mmio regs */ /* resource 1 is linear FB */ /* resource 2 is RAMIN (mmio regs + 0x1000000) */ @@ -862,7 +862,7 @@ int nouveau_load(struct drm_device *dev, unsigned long flags) NV_ERROR(dev, "Unable to initialize the mmio mapping. " "Please report your setup to " DRIVER_EMAIL "\n"); ret = -EINVAL; - goto err_wq; + goto err_priv; } NV_DEBUG(dev, "regs mapped ok at 0x%llx\n", (unsigned long long)mmio_start_offs); @@ -969,8 +969,6 @@ err_ramin: iounmap(dev_priv->ramin); err_mmio: iounmap(dev_priv->mmio); -err_wq: - destroy_workqueue(dev_priv->wq); err_priv: kfree(dev_priv); dev->dev_private = NULL; @@ -992,6 +990,9 @@ int nouveau_unload(struct drm_device *dev) engine->display.destroy(dev); nouveau_card_takedown(dev);
+ flush_work_sync(&dev_priv->irq_work); + flush_work_sync(&dev_priv->hpd_work); + iounmap(dev_priv->mmio); iounmap(dev_priv->ramin);
diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c index f624c61..3d569da 100644 --- a/drivers/gpu/drm/nouveau/nv50_display.c +++ b/drivers/gpu/drm/nouveau/nv50_display.c @@ -1110,7 +1110,7 @@ nv50_display_irq_handler(struct drm_device *dev) dev_priv->hpd_state.hpd1_bits |= hpd1_bits; spin_unlock(&dev_priv->hpd_state.lock);
- queue_work(dev_priv->wq, &dev_priv->hpd_work); + schedule_work(&dev_priv->hpd_work); }
while (nv_rd32(dev, NV50_PMC_INTR_0) & NV50_PMC_INTR_0_DISPLAY) { @@ -1139,7 +1139,7 @@ nv50_display_irq_handler(struct drm_device *dev) if (clock) { nv_wr32(dev, NV03_PMC_INTR_EN_0, 0); if (!work_pending(&dev_priv->irq_work)) - queue_work(dev_priv->wq, &dev_priv->irq_work); + schedule_work(&dev_priv->irq_work); delayed |= clock; intr1 &= ~clock; }
On Mon, 2011-01-03 at 14:49 +0100, Tejun Heo wrote:
With cmwq, there's no reason for nouveau to use a dedicated workqueue. Drop dev_priv->wq and use system_wq instead.
Because nouveau_irq_uninstall() may be called from unsleepable context, the work items can't be flushed from there. Instead, init and flush from nouveau_load/unload().
Ehh, ok, why not! I'll push this through the nouveau tree, and it'll get to Dave from there.
Thanks! Ben.
Signed-off-by: Tejun Heo tj@kernel.org Cc: David Airlie airlied@linux.ie Cc: dri-devel@lists.freedesktop.org
Only compile tested. Please feel free to take it into the subsystem tree or simply ack - I'll route it through the wq tree.
Thanks.
drivers/gpu/drm/nouveau/nouveau_drv.h | 1 - drivers/gpu/drm/nouveau/nouveau_irq.c | 9 --------- drivers/gpu/drm/nouveau/nouveau_state.c | 19 ++++++++++--------- drivers/gpu/drm/nouveau/nv50_display.c | 4 ++-- 4 files changed, 12 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h index 1c7db64..2ecf875 100644 --- a/drivers/gpu/drm/nouveau/nouveau_drv.h +++ b/drivers/gpu/drm/nouveau/nouveau_drv.h @@ -580,7 +580,6 @@ struct drm_nouveau_private {
struct nouveau_bo *vga_ram;
- struct workqueue_struct *wq; struct work_struct irq_work; struct work_struct hpd_work;
diff --git a/drivers/gpu/drm/nouveau/nouveau_irq.c b/drivers/gpu/drm/nouveau/nouveau_irq.c index 7bfd9e6..7d05a06 100644 --- a/drivers/gpu/drm/nouveau/nouveau_irq.c +++ b/drivers/gpu/drm/nouveau/nouveau_irq.c @@ -52,17 +52,8 @@ static int nouveau_ratelimit(void) void nouveau_irq_preinstall(struct drm_device *dev) {
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- /* Master disable */ nv_wr32(dev, NV03_PMC_INTR_EN_0, 0);
- if (dev_priv->card_type >= NV_50) {
INIT_WORK(&dev_priv->irq_work, nv50_display_irq_handler_bh);
INIT_WORK(&dev_priv->hpd_work, nv50_display_irq_hotplug_bh);
spin_lock_init(&dev_priv->hpd_state.lock);
INIT_LIST_HEAD(&dev_priv->vbl_waiting);
- }
}
int diff --git a/drivers/gpu/drm/nouveau/nouveau_state.c b/drivers/gpu/drm/nouveau/nouveau_state.c index 049f755..2eea6ea 100644 --- a/drivers/gpu/drm/nouveau/nouveau_state.c +++ b/drivers/gpu/drm/nouveau/nouveau_state.c @@ -839,17 +839,17 @@ int nouveau_load(struct drm_device *dev, unsigned long flags) dev->dev_private = dev_priv; dev_priv->dev = dev;
/* the followings are used only by >= NV_50 */
INIT_WORK(&dev_priv->irq_work, nv50_display_irq_handler_bh);
INIT_WORK(&dev_priv->hpd_work, nv50_display_irq_hotplug_bh);
spin_lock_init(&dev_priv->hpd_state.lock);
INIT_LIST_HEAD(&dev_priv->vbl_waiting);
dev_priv->flags = flags & NOUVEAU_FLAGS;
NV_DEBUG(dev, "vendor: 0x%X device: 0x%X class: 0x%X\n", dev->pci_vendor, dev->pci_device, dev->pdev->class);
- dev_priv->wq = create_workqueue("nouveau");
- if (!dev_priv->wq) {
ret = -EINVAL;
goto err_priv;
- }
- /* resource 0 is mmio regs */ /* resource 1 is linear FB */ /* resource 2 is RAMIN (mmio regs + 0x1000000) */
@@ -862,7 +862,7 @@ int nouveau_load(struct drm_device *dev, unsigned long flags) NV_ERROR(dev, "Unable to initialize the mmio mapping. " "Please report your setup to " DRIVER_EMAIL "\n"); ret = -EINVAL;
goto err_wq;
} NV_DEBUG(dev, "regs mapped ok at 0x%llx\n", (unsigned long long)mmio_start_offs);goto err_priv;
@@ -969,8 +969,6 @@ err_ramin: iounmap(dev_priv->ramin); err_mmio: iounmap(dev_priv->mmio); -err_wq:
- destroy_workqueue(dev_priv->wq);
err_priv: kfree(dev_priv); dev->dev_private = NULL; @@ -992,6 +990,9 @@ int nouveau_unload(struct drm_device *dev) engine->display.destroy(dev); nouveau_card_takedown(dev);
- flush_work_sync(&dev_priv->irq_work);
- flush_work_sync(&dev_priv->hpd_work);
- iounmap(dev_priv->mmio); iounmap(dev_priv->ramin);
diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c index f624c61..3d569da 100644 --- a/drivers/gpu/drm/nouveau/nv50_display.c +++ b/drivers/gpu/drm/nouveau/nv50_display.c @@ -1110,7 +1110,7 @@ nv50_display_irq_handler(struct drm_device *dev) dev_priv->hpd_state.hpd1_bits |= hpd1_bits; spin_unlock(&dev_priv->hpd_state.lock);
queue_work(dev_priv->wq, &dev_priv->hpd_work);
schedule_work(&dev_priv->hpd_work);
}
while (nv_rd32(dev, NV50_PMC_INTR_0) & NV50_PMC_INTR_0_DISPLAY) {
@@ -1139,7 +1139,7 @@ nv50_display_irq_handler(struct drm_device *dev) if (clock) { nv_wr32(dev, NV03_PMC_INTR_EN_0, 0); if (!work_pending(&dev_priv->irq_work))
queue_work(dev_priv->wq, &dev_priv->irq_work);
}schedule_work(&dev_priv->irq_work); delayed |= clock; intr1 &= ~clock;
On Wed, 2011-01-05 at 11:07 +1000, Ben Skeggs wrote:
On Mon, 2011-01-03 at 14:49 +0100, Tejun Heo wrote:
With cmwq, there's no reason for nouveau to use a dedicated workqueue. Drop dev_priv->wq and use system_wq instead.
Because nouveau_irq_uninstall() may be called from unsleepable context, the work items can't be flushed from there. Instead, init and flush from nouveau_load/unload().
Ehh, ok, why not! I'll push this through the nouveau tree, and it'll get to Dave from there.
On second thoughts, this won't apply on top of current nouveau code that's queued for 2.6.38. Can you rebase on top of Dave's drm-next tree please.
Ben.
Thanks! Ben.
Signed-off-by: Tejun Heo tj@kernel.org Cc: David Airlie airlied@linux.ie Cc: dri-devel@lists.freedesktop.org
Only compile tested. Please feel free to take it into the subsystem tree or simply ack - I'll route it through the wq tree.
Thanks.
drivers/gpu/drm/nouveau/nouveau_drv.h | 1 - drivers/gpu/drm/nouveau/nouveau_irq.c | 9 --------- drivers/gpu/drm/nouveau/nouveau_state.c | 19 ++++++++++--------- drivers/gpu/drm/nouveau/nv50_display.c | 4 ++-- 4 files changed, 12 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h index 1c7db64..2ecf875 100644 --- a/drivers/gpu/drm/nouveau/nouveau_drv.h +++ b/drivers/gpu/drm/nouveau/nouveau_drv.h @@ -580,7 +580,6 @@ struct drm_nouveau_private {
struct nouveau_bo *vga_ram;
- struct workqueue_struct *wq; struct work_struct irq_work; struct work_struct hpd_work;
diff --git a/drivers/gpu/drm/nouveau/nouveau_irq.c b/drivers/gpu/drm/nouveau/nouveau_irq.c index 7bfd9e6..7d05a06 100644 --- a/drivers/gpu/drm/nouveau/nouveau_irq.c +++ b/drivers/gpu/drm/nouveau/nouveau_irq.c @@ -52,17 +52,8 @@ static int nouveau_ratelimit(void) void nouveau_irq_preinstall(struct drm_device *dev) {
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- /* Master disable */ nv_wr32(dev, NV03_PMC_INTR_EN_0, 0);
- if (dev_priv->card_type >= NV_50) {
INIT_WORK(&dev_priv->irq_work, nv50_display_irq_handler_bh);
INIT_WORK(&dev_priv->hpd_work, nv50_display_irq_hotplug_bh);
spin_lock_init(&dev_priv->hpd_state.lock);
INIT_LIST_HEAD(&dev_priv->vbl_waiting);
- }
}
int diff --git a/drivers/gpu/drm/nouveau/nouveau_state.c b/drivers/gpu/drm/nouveau/nouveau_state.c index 049f755..2eea6ea 100644 --- a/drivers/gpu/drm/nouveau/nouveau_state.c +++ b/drivers/gpu/drm/nouveau/nouveau_state.c @@ -839,17 +839,17 @@ int nouveau_load(struct drm_device *dev, unsigned long flags) dev->dev_private = dev_priv; dev_priv->dev = dev;
/* the followings are used only by >= NV_50 */
INIT_WORK(&dev_priv->irq_work, nv50_display_irq_handler_bh);
INIT_WORK(&dev_priv->hpd_work, nv50_display_irq_hotplug_bh);
spin_lock_init(&dev_priv->hpd_state.lock);
INIT_LIST_HEAD(&dev_priv->vbl_waiting);
dev_priv->flags = flags & NOUVEAU_FLAGS;
NV_DEBUG(dev, "vendor: 0x%X device: 0x%X class: 0x%X\n", dev->pci_vendor, dev->pci_device, dev->pdev->class);
- dev_priv->wq = create_workqueue("nouveau");
- if (!dev_priv->wq) {
ret = -EINVAL;
goto err_priv;
- }
- /* resource 0 is mmio regs */ /* resource 1 is linear FB */ /* resource 2 is RAMIN (mmio regs + 0x1000000) */
@@ -862,7 +862,7 @@ int nouveau_load(struct drm_device *dev, unsigned long flags) NV_ERROR(dev, "Unable to initialize the mmio mapping. " "Please report your setup to " DRIVER_EMAIL "\n"); ret = -EINVAL;
goto err_wq;
} NV_DEBUG(dev, "regs mapped ok at 0x%llx\n", (unsigned long long)mmio_start_offs);goto err_priv;
@@ -969,8 +969,6 @@ err_ramin: iounmap(dev_priv->ramin); err_mmio: iounmap(dev_priv->mmio); -err_wq:
- destroy_workqueue(dev_priv->wq);
err_priv: kfree(dev_priv); dev->dev_private = NULL; @@ -992,6 +990,9 @@ int nouveau_unload(struct drm_device *dev) engine->display.destroy(dev); nouveau_card_takedown(dev);
- flush_work_sync(&dev_priv->irq_work);
- flush_work_sync(&dev_priv->hpd_work);
- iounmap(dev_priv->mmio); iounmap(dev_priv->ramin);
diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c index f624c61..3d569da 100644 --- a/drivers/gpu/drm/nouveau/nv50_display.c +++ b/drivers/gpu/drm/nouveau/nv50_display.c @@ -1110,7 +1110,7 @@ nv50_display_irq_handler(struct drm_device *dev) dev_priv->hpd_state.hpd1_bits |= hpd1_bits; spin_unlock(&dev_priv->hpd_state.lock);
queue_work(dev_priv->wq, &dev_priv->hpd_work);
schedule_work(&dev_priv->hpd_work);
}
while (nv_rd32(dev, NV50_PMC_INTR_0) & NV50_PMC_INTR_0_DISPLAY) {
@@ -1139,7 +1139,7 @@ nv50_display_irq_handler(struct drm_device *dev) if (clock) { nv_wr32(dev, NV03_PMC_INTR_EN_0, 0); if (!work_pending(&dev_priv->irq_work))
queue_work(dev_priv->wq, &dev_priv->irq_work);
}schedule_work(&dev_priv->irq_work); delayed |= clock; intr1 &= ~clock;
Hello,
On Wed, Jan 05, 2011 at 11:16:05AM +1000, Ben Skeggs wrote:
On Wed, 2011-01-05 at 11:07 +1000, Ben Skeggs wrote:
On Mon, 2011-01-03 at 14:49 +0100, Tejun Heo wrote:
With cmwq, there's no reason for nouveau to use a dedicated workqueue. Drop dev_priv->wq and use system_wq instead.
Because nouveau_irq_uninstall() may be called from unsleepable context, the work items can't be flushed from there. Instead, init and flush from nouveau_load/unload().
Ehh, ok, why not! I'll push this through the nouveau tree, and it'll get to Dave from there.
On second thoughts, this won't apply on top of current nouveau code that's queued for 2.6.38. Can you rebase on top of Dave's drm-next tree please.
We already missed this merge window, so I'll refresh the patch once the window is closed and resend.
Thank you.
With cmwq, there's no reason for nouveau to use a dedicated workqueue. Drop dev_priv->wq and use system_wq instead. Each work item is sync flushed when the containing structure is unregistered/destroyed.
Note that this change also makes sure that nv50_gpio_handler is not freed while the contained work item is still running.
Signed-off-by: Tejun Heo tj@kernel.org Cc: David Airlie airlied@linux.ie Cc: dri-devel@lists.freedesktop.org --- Here's a patch on top of the current linus#master. It's much simpler than before. The only concern is that it adds flush_work_sync() call which might sleep to unregistration paths. AFAICS, this seems safe, right? If this looks okay to you, please feel free to route it through the drm tree.
Thank you.
drivers/gpu/drm/nouveau/nouveau_drv.h | 1 - drivers/gpu/drm/nouveau/nouveau_state.c | 10 +--------- drivers/gpu/drm/nouveau/nv50_display.c | 5 ++++- drivers/gpu/drm/nouveau/nv50_gpio.c | 11 ++++++++--- 4 files changed, 13 insertions(+), 14 deletions(-)
Index: work/drivers/gpu/drm/nouveau/nouveau_drv.h =================================================================== --- work.orig/drivers/gpu/drm/nouveau/nouveau_drv.h +++ work/drivers/gpu/drm/nouveau/nouveau_drv.h @@ -652,7 +652,6 @@ struct drm_nouveau_private { /* interrupt handling */ void (*irq_handler[32])(struct drm_device *); bool msi_enabled; - struct workqueue_struct *wq; struct work_struct irq_work;
struct list_head vbl_waiting; Index: work/drivers/gpu/drm/nouveau/nouveau_state.c =================================================================== --- work.orig/drivers/gpu/drm/nouveau/nouveau_state.c +++ work/drivers/gpu/drm/nouveau/nouveau_state.c @@ -929,12 +929,6 @@ int nouveau_load(struct drm_device *dev, NV_DEBUG(dev, "vendor: 0x%X device: 0x%X class: 0x%X\n", dev->pci_vendor, dev->pci_device, dev->pdev->class);
- dev_priv->wq = create_workqueue("nouveau"); - if (!dev_priv->wq) { - ret = -EINVAL; - goto err_priv; - } - /* resource 0 is mmio regs */ /* resource 1 is linear FB */ /* resource 2 is RAMIN (mmio regs + 0x1000000) */ @@ -947,7 +941,7 @@ int nouveau_load(struct drm_device *dev, NV_ERROR(dev, "Unable to initialize the mmio mapping. " "Please report your setup to " DRIVER_EMAIL "\n"); ret = -EINVAL; - goto err_wq; + goto err_priv; } NV_DEBUG(dev, "regs mapped ok at 0x%llx\n", (unsigned long long)mmio_start_offs); @@ -1054,8 +1048,6 @@ err_ramin: iounmap(dev_priv->ramin); err_mmio: iounmap(dev_priv->mmio); -err_wq: - destroy_workqueue(dev_priv->wq); err_priv: kfree(dev_priv); dev->dev_private = NULL; Index: work/drivers/gpu/drm/nouveau/nv50_display.c =================================================================== --- work.orig/drivers/gpu/drm/nouveau/nv50_display.c +++ work/drivers/gpu/drm/nouveau/nv50_display.c @@ -345,12 +345,15 @@ int nv50_display_create(struct drm_devic void nv50_display_destroy(struct drm_device *dev) { + struct drm_nouveau_private *dev_priv = dev->dev_private; + NV_DEBUG_KMS(dev, "\n");
drm_mode_config_cleanup(dev);
nv50_display_disable(dev); nouveau_irq_unregister(dev, 26); + flush_work_sync(&dev_priv->irq_work); }
static u16 @@ -836,7 +839,7 @@ nv50_display_isr(struct drm_device *dev) if (clock) { nv_wr32(dev, NV03_PMC_INTR_EN_0, 0); if (!work_pending(&dev_priv->irq_work)) - queue_work(dev_priv->wq, &dev_priv->irq_work); + schedule_work(&dev_priv->irq_work); delayed |= clock; intr1 &= ~clock; } Index: work/drivers/gpu/drm/nouveau/nv50_gpio.c =================================================================== --- work.orig/drivers/gpu/drm/nouveau/nv50_gpio.c +++ work/drivers/gpu/drm/nouveau/nv50_gpio.c @@ -137,6 +137,7 @@ nv50_gpio_irq_unregister(struct drm_devi struct nv50_gpio_priv *priv = pgpio->priv; struct nv50_gpio_handler *gpioh, *tmp; struct dcb_gpio_entry *gpio; + LIST_HEAD(tofree); unsigned long flags;
gpio = nouveau_bios_gpio_entry(dev, tag); @@ -149,10 +150,14 @@ nv50_gpio_irq_unregister(struct drm_devi gpioh->handler != handler || gpioh->data != data) continue; - list_del(&gpioh->head); - kfree(gpioh); + list_move(&gpioh->head, &tofree); } spin_unlock_irqrestore(&priv->lock, flags); + + list_for_each_entry_safe(gpioh, tmp, &tofree, head) { + flush_work_sync(&gpioh->work); + kfree(gpioh); + } }
bool @@ -293,7 +298,7 @@ nv50_gpio_isr(struct drm_device *dev) continue; gpioh->inhibit = true;
- queue_work(dev_priv->wq, &gpioh->work); + schedule_work(&gpioh->work); } spin_unlock(&priv->lock); }
On Wed, Jan 26, 2011 at 05:49:18PM +0100, Tejun Heo wrote:
With cmwq, there's no reason for nouveau to use a dedicated workqueue. Drop dev_priv->wq and use system_wq instead. Each work item is sync flushed when the containing structure is unregistered/destroyed.
Note that this change also makes sure that nv50_gpio_handler is not freed while the contained work item is still running.
Signed-off-by: Tejun Heo tj@kernel.org Cc: David Airlie airlied@linux.ie Cc: dri-devel@lists.freedesktop.org
Ping. Can you please put this through the drm tree?
Thank you.
On Tue, 2011-02-01 at 11:41 +0100, Tejun Heo wrote:
On Wed, Jan 26, 2011 at 05:49:18PM +0100, Tejun Heo wrote:
With cmwq, there's no reason for nouveau to use a dedicated workqueue. Drop dev_priv->wq and use system_wq instead. Each work item is sync flushed when the containing structure is unregistered/destroyed.
Note that this change also makes sure that nv50_gpio_handler is not freed while the contained work item is still running.
Signed-off-by: Tejun Heo tj@kernel.org Cc: David Airlie airlied@linux.ie Cc: dri-devel@lists.freedesktop.org
Ping. Can you please put this through the drm tree?
Hey Tejun,
Thanks for this again. I've just made some changes to the nv50 display bottom half handling that these will conflict with, they'll hit the nouveau tree next week.
I'll push the still-relevant bits of your nouveau patch through the nouveau tree for the 2.6.39-rc1 merge window. That ok?
Thanks, Ben.
Thank you.
Hello,
On Fri, Feb 04, 2011 at 11:53:25AM +1000, Ben Skeggs wrote:
Thanks for this again. I've just made some changes to the nv50 display bottom half handling that these will conflict with, they'll hit the nouveau tree next week.
Eh, so it doesn't apply again? :-)
I'll push the still-relevant bits of your nouveau patch through the nouveau tree for the 2.6.39-rc1 merge window. That ok?
Yeah, sure, but if you tell me against which tree I should generate patch, I can also just redo the patch.
Thanks.
dri-devel@lists.freedesktop.org