On Sat, Jul 26, 2014 at 9:34 AM, Christian König deathsimple@vodafone.de wrote:

Hey Alex,

can you use this version instead of the one you already have in drm-next-3.17-wip? It depends on a change from drm-fixes-3.16, so you need to merge (or rebase) your -next branch to apply it.

Apart from that I also have a couple of more VM changes for 3.17, but those need a merge with the latest 3.16 fixes as well.

Ok. I'll drop the patch for now. I'll send a pull with all the additional patches that depend on fixes once Dave merges it.

Alex

Thanks, Christian.

Am 19.07.2014 um 13:55 schrieb Christian König:

...

From: Christian König christian.koenig@amd.com

v2: rebase on vm_size scale change. Adjust vm_size default to 8, Better handle the default and smaller values.

Signed-off-by: Christian König christian.koenig@amd.com

drivers/gpu/drm/radeon/radeon_device.c | 14 +++++++++++++- drivers/gpu/drm/radeon/radeon_drv.c | 6 +++--- 2 files changed, 16 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c index a8537d7..38e13b0 100644 --- a/drivers/gpu/drm/radeon/radeon_device.c +++ b/drivers/gpu/drm/radeon/radeon_device.c @@ -1077,7 +1077,19 @@ static void radeon_check_arguments(struct radeon_device *rdev) /* defines number of bits in page table versus page directory, * a page is 4KB so we have 12 bits offset, minimum 9 bits in the * page table and the remaining bits are in the page directory */

•   if (radeon_vm_block_size < 9) {
  

•   if (radeon_vm_block_size == -1) {
  

•           /* Total bits covered by PD + PTs */
  

•           unsigned bits = ilog2(radeon_vm_size) + 17;
  

•           /* Make sure the PD is 4K in size up to 8GB address space.
  

•              Above that split equal between PD and PTs */
  

•           if (radeon_vm_size <= 8)
  

•                   radeon_vm_block_size = bits - 9;
  

•           else
  

•                   radeon_vm_block_size = (bits + 3) / 2;
  

•   } else if (radeon_vm_block_size < 9) {
            dev_warn(rdev->dev, "VM page table size (%d) to small\n",
                     radeon_vm_block_size);
            radeon_vm_block_size = 9;
  

diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c index e9e3610..59b74d2 100644 --- a/drivers/gpu/drm/radeon/radeon_drv.c +++ b/drivers/gpu/drm/radeon/radeon_drv.c @@ -173,8 +173,8 @@ int radeon_dpm = -1; int radeon_aspm = -1; int radeon_runtime_pm = -1; int radeon_hard_reset = 0; -int radeon_vm_size = 4; -int radeon_vm_block_size = 9; +int radeon_vm_size = 8; +int radeon_vm_block_size = -1; int radeon_deep_color = 0; MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers"); @@ -246,7 +246,7 @@ module_param_named(hard_reset, radeon_hard_reset, int, 0444); MODULE_PARM_DESC(vm_size, "VM address space size in gigabytes (default 4GB)"); module_param_named(vm_size, radeon_vm_size, int, 0444); -MODULE_PARM_DESC(vm_block_size, "VM page table size in bits (default 9)"); +MODULE_PARM_DESC(vm_block_size, "VM page table size in bits (default depending on vm_size)"); module_param_named(vm_block_size, radeon_vm_block_size, int, 0444); MODULE_PARM_DESC(deep_color, "Deep Color support (1 = enable, 0 = disable (default))");