Upstream DSI driver doesn't support DSC panels yet. Remove the support for compression from DPU for now.

changes in v2: - indents and unrelated change clean up (Sean Paul) - fix compilation dependency in dsi-staging changes in v3: -none changes in v4: -none

Signed-off-by: Jeykumar Sankaran jsanka@codeaurora.org Signed-off-by: Sean Paul seanpaul@chromium.org Signed-off-by: Rajesh Yadav ryadav@codeaurora.org --- drivers/gpu/drm/msm/Makefile | 1 - drivers/gpu/drm/msm/disp/dpu1/dpu_connector.c | 4 - drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 476 +-------------------- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h | 14 - drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 7 +- .../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 1 - .../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 7 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 25 -- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 16 - drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c | 252 ----------- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.h | 100 ----- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h | 17 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 48 --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h | 22 - drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c | 13 - drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.h | 7 - drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 55 --- drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 8 - drivers/gpu/drm/msm/disp/dpu1/dpu_wb.c | 2 - drivers/gpu/drm/msm/dsi-staging/dsi_drm.c | 7 - drivers/gpu/drm/msm/msm_drv.h | 16 - 21 files changed, 5 insertions(+), 1093 deletions(-) delete mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c delete mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.h

diff --git a/drivers/gpu/drm/msm/Makefile b/drivers/gpu/drm/msm/Makefile index a458b36..d947f2a 100644 --- a/drivers/gpu/drm/msm/Makefile +++ b/drivers/gpu/drm/msm/Makefile @@ -64,7 +64,6 @@ msm-y := \ disp/dpu1/dpu_hw_color_processing_v1_7.o \ disp/dpu1/dpu_hw_ctl.o \ disp/dpu1/dpu_hw_ds.o \ - disp/dpu1/dpu_hw_dsc.o \ disp/dpu1/dpu_hw_dspp.o \ disp/dpu1/dpu_hw_interrupts.o \ disp/dpu1/dpu_hw_intf.o \ diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_connector.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_connector.c index a57495f..5f3efe5 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_connector.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_connector.c @@ -36,12 +36,8 @@ static const struct drm_prop_enum_list e_topology_name[] = { {DPU_RM_TOPOLOGY_NONE, "dpu_none"}, {DPU_RM_TOPOLOGY_SINGLEPIPE, "dpu_singlepipe"}, - {DPU_RM_TOPOLOGY_SINGLEPIPE_DSC, "dpu_singlepipe_dsc"}, {DPU_RM_TOPOLOGY_DUALPIPE, "dpu_dualpipe"}, - {DPU_RM_TOPOLOGY_DUALPIPE_DSC, "dpu_dualpipe_dsc"}, {DPU_RM_TOPOLOGY_DUALPIPE_3DMERGE, "dpu_dualpipemerge"}, - {DPU_RM_TOPOLOGY_DUALPIPE_3DMERGE_DSC, "dpu_dualpipemerge_dsc"}, - {DPU_RM_TOPOLOGY_DUALPIPE_DSCMERGE, "dpu_dualpipe_dscmerge"}, {DPU_RM_TOPOLOGY_PPSPLIT, "dpu_ppsplit"}, }; static const struct drm_prop_enum_list e_topology_control[] = { diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index 198c618..151889b 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -32,7 +32,6 @@ #include "dpu_formats.h" #include "dpu_encoder_phys.h" #include "dpu_power_handle.h" -#include "dpu_hw_dsc.h" #include "dpu_crtc.h" #include "dpu_trace.h" #include "dpu_core_irq.h" @@ -152,7 +151,6 @@ enum dpu_enc_rc_states { * Only valid after enable. Cleared as disable. * @hw_pp Handle to the pingpong blocks used for the display. No. * pingpong blocks can be different than num_phys_encs. - * @hw_dsc: Array of DSC block handles used for the display. * @intfs_swapped Whether or not the phys_enc interfaces have been swapped * for partial update right-only cases, such as pingpong * split where virtual pingpong does not generate IRQs @@ -199,7 +197,6 @@ struct dpu_encoder_virt { struct dpu_encoder_phys *phys_encs[MAX_PHYS_ENCODERS_PER_VIRTUAL]; struct dpu_encoder_phys *cur_master; struct dpu_hw_pingpong *hw_pp[MAX_CHANNELS_PER_ENC]; - struct dpu_hw_dsc *hw_dsc[MAX_CHANNELS_PER_ENC];

bool intfs_swapped;

@@ -234,21 +231,6 @@ struct dpu_encoder_virt {

#define to_dpu_encoder_virt(x) container_of(x, struct dpu_encoder_virt, base)

-bool dpu_encoder_is_dsc_enabled(struct drm_encoder *drm_enc) - -{ - struct dpu_encoder_virt *dpu_enc; - struct msm_compression_info *comp_info; - - if (!drm_enc) - return false; - - dpu_enc = to_dpu_encoder_virt(drm_enc); - comp_info = &dpu_enc->mode_info.comp_info; - - return (comp_info->comp_type == MSM_DISPLAY_COMPRESSION_DSC); -} - void dpu_encoder_set_idle_timeout(struct drm_encoder *drm_enc, u32 idle_timeout) { struct dpu_encoder_virt *dpu_enc; @@ -260,30 +242,6 @@ void dpu_encoder_set_idle_timeout(struct drm_encoder *drm_enc, u32 idle_timeout) dpu_enc->idle_timeout = idle_timeout; }

-bool dpu_encoder_is_dsc_merge(struct drm_encoder *drm_enc) -{ - enum dpu_rm_topology_name topology; - struct dpu_encoder_virt *dpu_enc; - struct drm_connector *drm_conn; - - if (!drm_enc) - return false; - - dpu_enc = to_dpu_encoder_virt(drm_enc); - if (!dpu_enc->cur_master) - return false; - - drm_conn = dpu_enc->cur_master->connector; - if (!drm_conn) - return false; - - topology = dpu_connector_get_topology_name(drm_conn); - if (topology == DPU_RM_TOPOLOGY_DUALPIPE_DSCMERGE) - return true; - - return false; -} - static inline int _dpu_encoder_power_enable(struct dpu_encoder_virt *dpu_enc, bool enable) { @@ -745,312 +703,6 @@ static int dpu_encoder_virt_atomic_check( return ret; }

-static int _dpu_encoder_dsc_update_pic_dim(struct msm_display_dsc_info *dsc, - int pic_width, int pic_height) -{ - if (!dsc || !pic_width || !pic_height) { - DPU_ERROR("invalid input: pic_width=%d pic_height=%d\n", - pic_width, pic_height); - return -EINVAL; - } - - if ((pic_width % dsc->slice_width) || - (pic_height % dsc->slice_height)) { - DPU_ERROR("pic_dim=%dx%d has to be multiple of slice=%dx%d\n", - pic_width, pic_height, - dsc->slice_width, dsc->slice_height); - return -EINVAL; - } - - dsc->pic_width = pic_width; - dsc->pic_height = pic_height; - - return 0; -} - -static void _dpu_encoder_dsc_pclk_param_calc(struct msm_display_dsc_info *dsc, - int intf_width) -{ - int slice_per_pkt, slice_per_intf; - int bytes_in_slice, total_bytes_per_intf; - - if (!dsc || !dsc->slice_width || !dsc->slice_per_pkt || - (intf_width < dsc->slice_width)) { - DPU_ERROR("invalid input: intf_width=%d slice_width=%d\n", - intf_width, dsc ? dsc->slice_width : -1); - return; - } - - slice_per_pkt = dsc->slice_per_pkt; - slice_per_intf = DIV_ROUND_UP(intf_width, dsc->slice_width); - - /* - * If slice_per_pkt is greater than slice_per_intf then default to 1. - * This can happen during partial update. - */ - if (slice_per_pkt > slice_per_intf) - slice_per_pkt = 1; - - bytes_in_slice = DIV_ROUND_UP(dsc->slice_width * dsc->bpp, 8); - total_bytes_per_intf = bytes_in_slice * slice_per_intf; - - dsc->eol_byte_num = total_bytes_per_intf % 3; - dsc->pclk_per_line = DIV_ROUND_UP(total_bytes_per_intf, 3); - dsc->bytes_in_slice = bytes_in_slice; - dsc->bytes_per_pkt = bytes_in_slice * slice_per_pkt; - dsc->pkt_per_line = slice_per_intf / slice_per_pkt; -} - -static int _dpu_encoder_dsc_initial_line_calc(struct msm_display_dsc_info *dsc, - int enc_ip_width) -{ - int ssm_delay, total_pixels, soft_slice_per_enc; - - soft_slice_per_enc = enc_ip_width / dsc->slice_width; - - /* - * minimum number of initial line pixels is a sum of: - * 1. sub-stream multiplexer delay (83 groups for 8bpc, - * 91 for 10 bpc) * 3 - * 2. for two soft slice cases, add extra sub-stream multiplexer * 3 - * 3. the initial xmit delay - * 4. total pipeline delay through the "lock step" of encoder (47) - * 5. 6 additional pixels as the output of the rate buffer is - * 48 bits wide - */ - ssm_delay = ((dsc->bpc < 10) ? 84 : 92); - total_pixels = ssm_delay * 3 + dsc->initial_xmit_delay + 47; - if (soft_slice_per_enc > 1) - total_pixels += (ssm_delay * 3); - dsc->initial_lines = DIV_ROUND_UP(total_pixels, dsc->slice_width); - return 0; -} - -static bool _dpu_encoder_dsc_ich_reset_override_needed(bool pu_en, - struct msm_display_dsc_info *dsc) -{ - /* - * As per the DSC spec, ICH_RESET can be either end of the slice line - * or at the end of the slice. HW internally generates ich_reset at - * end of the slice line if DSC_MERGE is used or encoder has two - * soft slices. However, if encoder has only 1 soft slice and DSC_MERGE - * is not used then it will generate ich_reset at the end of slice. - * - * Now as per the spec, during one PPS session, position where - * ich_reset is generated should not change. Now if full-screen frame - * has more than 1 soft slice then HW will automatically generate - * ich_reset at the end of slice_line. But for the same panel, if - * partial frame is enabled and only 1 encoder is used with 1 slice, - * then HW will generate ich_reset at end of the slice. This is a - * mismatch. Prevent this by overriding HW's decision. - */ - return pu_en && dsc && (dsc->full_frame_slices > 1) && - (dsc->slice_width == dsc->pic_width); -} - -static void _dpu_encoder_dsc_pipe_cfg(struct dpu_hw_dsc *hw_dsc, - struct dpu_hw_pingpong *hw_pp, struct msm_display_dsc_info *dsc, - u32 common_mode, bool ich_reset) -{ - if (hw_dsc->ops.dsc_config) - hw_dsc->ops.dsc_config(hw_dsc, dsc, common_mode, ich_reset); - - if (hw_dsc->ops.dsc_config_thresh) - hw_dsc->ops.dsc_config_thresh(hw_dsc, dsc); - - if (hw_pp->ops.setup_dsc) - hw_pp->ops.setup_dsc(hw_pp); - - if (hw_pp->ops.enable_dsc) - hw_pp->ops.enable_dsc(hw_pp); -} - -static int _dpu_encoder_dsc_n_lm_1_enc_1_intf(struct dpu_encoder_virt *dpu_enc) -{ - int this_frame_slices; - int intf_ip_w, enc_ip_w; - int ich_res, dsc_common_mode = 0; - int rc = 0; - - struct dpu_hw_pingpong *hw_pp = dpu_enc->hw_pp[0]; - struct dpu_hw_dsc *hw_dsc = dpu_enc->hw_dsc[0]; - struct dpu_encoder_phys *enc_master = dpu_enc->cur_master; - struct msm_display_dsc_info *dsc = - &dpu_enc->mode_info.comp_info.dsc_info; - - rc = _dpu_encoder_dsc_update_pic_dim(dsc, dsc->pic_width, - dsc->pic_height); - if (rc) { - DPU_ERROR_ENC(dpu_enc, "failed to update DSC pic dim\n"); - return rc; - } - - this_frame_slices = dsc->pic_width / dsc->slice_width; - intf_ip_w = this_frame_slices * dsc->slice_width; - _dpu_encoder_dsc_pclk_param_calc(dsc, intf_ip_w); - - enc_ip_w = intf_ip_w; - _dpu_encoder_dsc_initial_line_calc(dsc, enc_ip_w); - - ich_res = _dpu_encoder_dsc_ich_reset_override_needed(false, dsc); - - if (enc_master->intf_mode == INTF_MODE_VIDEO) - dsc_common_mode = DSC_MODE_VIDEO; - - DPU_DEBUG_ENC(dpu_enc, "pic_w: %d pic_h: %d mode:%d\n", - dsc->pic_width, dsc->pic_height, dsc_common_mode); - DPU_EVT32(DRMID(&dpu_enc->base), dsc->pic_width, dsc->pic_height, - dsc_common_mode); - - _dpu_encoder_dsc_pipe_cfg(hw_dsc, hw_pp, dsc, dsc_common_mode, - ich_res); - - return 0; -} -static int _dpu_encoder_dsc_2_lm_2_enc_2_intf(struct dpu_encoder_virt *dpu_enc) -{ - int this_frame_slices; - int intf_ip_w, enc_ip_w; - int ich_res, dsc_common_mode; - int rc = 0; - - struct dpu_encoder_phys *enc_master = dpu_enc->cur_master; - struct dpu_hw_dsc *l_hw_dsc = dpu_enc->hw_dsc[0]; - struct dpu_hw_dsc *r_hw_dsc = dpu_enc->hw_dsc[1]; - struct dpu_hw_pingpong *l_hw_pp = dpu_enc->hw_pp[0]; - struct dpu_hw_pingpong *r_hw_pp = dpu_enc->hw_pp[1]; - struct msm_display_dsc_info *dsc = - &dpu_enc->mode_info.comp_info.dsc_info; - - rc = _dpu_encoder_dsc_update_pic_dim(dsc, - dsc->pic_width * dpu_enc->display_num_of_h_tiles, - dsc->pic_height); - if (rc) { - DPU_ERROR_ENC(dpu_enc, "failed to update DSC pic dim\n"); - return rc; - } - - - this_frame_slices = dsc->pic_width / dsc->slice_width; - intf_ip_w = this_frame_slices * dsc->slice_width; - - intf_ip_w /= 2; - _dpu_encoder_dsc_pclk_param_calc(dsc, intf_ip_w); - - enc_ip_w = intf_ip_w; - _dpu_encoder_dsc_initial_line_calc(dsc, enc_ip_w); - - ich_res = _dpu_encoder_dsc_ich_reset_override_needed(false, dsc); - - dsc_common_mode = DSC_MODE_SPLIT_PANEL; - if (enc_master->intf_mode == INTF_MODE_VIDEO) - dsc_common_mode |= DSC_MODE_VIDEO; - - DPU_DEBUG_ENC(dpu_enc, "pic_w: %d pic_h: %d mode:%d\n", - dsc->pic_width, dsc->pic_height, dsc_common_mode); - DPU_EVT32(DRMID(&dpu_enc->base), dsc->pic_width, dsc->pic_height, - dsc_common_mode); - - _dpu_encoder_dsc_pipe_cfg(l_hw_dsc, l_hw_pp, dsc, dsc_common_mode, - ich_res); - _dpu_encoder_dsc_pipe_cfg(r_hw_dsc, r_hw_pp, dsc, dsc_common_mode, - ich_res); - - return 0; -} - -static int _dpu_encoder_dsc_2_lm_2_enc_1_intf(struct dpu_encoder_virt *dpu_enc) -{ - int this_frame_slices; - int intf_ip_w, enc_ip_w; - int ich_res, dsc_common_mode; - int rc = 0; - - struct dpu_encoder_phys *enc_master = dpu_enc->cur_master; - struct dpu_hw_dsc *l_hw_dsc = dpu_enc->hw_dsc[0]; - struct dpu_hw_dsc *r_hw_dsc = dpu_enc->hw_dsc[1]; - struct dpu_hw_pingpong *l_hw_pp = dpu_enc->hw_pp[0]; - struct dpu_hw_pingpong *r_hw_pp = dpu_enc->hw_pp[1]; - struct msm_display_dsc_info *dsc = - &dpu_enc->mode_info.comp_info.dsc_info; - - rc = _dpu_encoder_dsc_update_pic_dim(dsc, dsc->pic_width, - dsc->pic_height); - if (rc) { - DPU_ERROR_ENC(dpu_enc, "failed to update DSC pic dim\n"); - return rc; - } - - this_frame_slices = dsc->pic_width / dsc->slice_width; - intf_ip_w = this_frame_slices * dsc->slice_width; - _dpu_encoder_dsc_pclk_param_calc(dsc, intf_ip_w); - - /* - * when using 2 encoders for the same stream, no. of slices - * need to be same on both the encoders. - */ - enc_ip_w = intf_ip_w / 2; - _dpu_encoder_dsc_initial_line_calc(dsc, enc_ip_w); - - ich_res = _dpu_encoder_dsc_ich_reset_override_needed(false, dsc); - - dsc_common_mode = DSC_MODE_MULTIPLEX | DSC_MODE_SPLIT_PANEL; - if (enc_master->intf_mode == INTF_MODE_VIDEO) - dsc_common_mode |= DSC_MODE_VIDEO; - - DPU_DEBUG_ENC(dpu_enc, "pic_w: %d pic_h: %d mode:%d\n", - dsc->pic_width, dsc->pic_height, dsc_common_mode); - DPU_EVT32(DRMID(&dpu_enc->base), dsc->pic_width, dsc->pic_height, - dsc_common_mode); - - _dpu_encoder_dsc_pipe_cfg(l_hw_dsc, l_hw_pp, dsc, dsc_common_mode, - ich_res); - _dpu_encoder_dsc_pipe_cfg(r_hw_dsc, r_hw_pp, dsc, dsc_common_mode, - ich_res); - - return 0; -} - -static int _dpu_encoder_dsc_setup(struct dpu_encoder_virt *dpu_enc) -{ - enum dpu_rm_topology_name topology; - struct drm_connector *drm_conn; - int ret = 0; - - if (!dpu_enc) - return -EINVAL; - - drm_conn = dpu_enc->phys_encs[0]->connector; - - topology = dpu_connector_get_topology_name(drm_conn); - if (topology == DPU_RM_TOPOLOGY_NONE) { - DPU_ERROR_ENC(dpu_enc, "topology not set yet\n"); - return -EINVAL; - } - - DPU_DEBUG_ENC(dpu_enc, "topology:%d\n", topology); - DPU_EVT32(DRMID(&dpu_enc->base)); - - switch (topology) { - case DPU_RM_TOPOLOGY_SINGLEPIPE_DSC: - case DPU_RM_TOPOLOGY_DUALPIPE_3DMERGE_DSC: - ret = _dpu_encoder_dsc_n_lm_1_enc_1_intf(dpu_enc); - break; - case DPU_RM_TOPOLOGY_DUALPIPE_DSCMERGE: - ret = _dpu_encoder_dsc_2_lm_2_enc_1_intf(dpu_enc); - break; - case DPU_RM_TOPOLOGY_DUALPIPE_DSC: - ret = _dpu_encoder_dsc_2_lm_2_enc_2_intf(dpu_enc); - break; - default: - DPU_ERROR_ENC(dpu_enc, "No DSC support for topology %d", - topology); - return -EINVAL; - }; - - return ret; -} - static void _dpu_encoder_update_vsync_source(struct dpu_encoder_virt *dpu_enc, struct msm_display_info *disp_info) { @@ -1111,102 +763,6 @@ static void _dpu_encoder_update_vsync_source(struct dpu_encoder_virt *dpu_enc, } }

-static int _dpu_encoder_dsc_disable(struct dpu_encoder_virt *dpu_enc) -{ - enum dpu_rm_topology_name topology; - struct drm_connector *drm_conn; - int i, ret = 0; - struct dpu_hw_pingpong *hw_pp[MAX_CHANNELS_PER_ENC]; - struct dpu_hw_dsc *hw_dsc[MAX_CHANNELS_PER_ENC] = {NULL}; - int pp_count = 0; - int dsc_count = 0; - - if (!dpu_enc || !dpu_enc->phys_encs[0] || - !dpu_enc->phys_encs[0]->connector) { - DPU_ERROR("invalid params %d %d\n", - !dpu_enc, dpu_enc ? !dpu_enc->phys_encs[0] : -1); - return -EINVAL; - } - - drm_conn = dpu_enc->phys_encs[0]->connector; - - topology = dpu_connector_get_topology_name(drm_conn); - if (topology == DPU_RM_TOPOLOGY_NONE) { - DPU_ERROR_ENC(dpu_enc, "topology not set yet\n"); - return -EINVAL; - } - - switch (topology) { - case DPU_RM_TOPOLOGY_SINGLEPIPE: - case DPU_RM_TOPOLOGY_SINGLEPIPE_DSC: - /* single PP */ - hw_pp[0] = dpu_enc->hw_pp[0]; - hw_dsc[0] = dpu_enc->hw_dsc[0]; - pp_count = 1; - dsc_count = 1; - break; - case DPU_RM_TOPOLOGY_DUALPIPE_DSC: - case DPU_RM_TOPOLOGY_DUALPIPE_3DMERGE_DSC: - case DPU_RM_TOPOLOGY_DUALPIPE_DSCMERGE: - /* dual dsc */ - for (i = 0; i < MAX_CHANNELS_PER_ENC; i++) { - hw_dsc[i] = dpu_enc->hw_dsc[i]; - if (hw_dsc[i]) - dsc_count++; - } - /* fall through */ - case DPU_RM_TOPOLOGY_DUALPIPE: - case DPU_RM_TOPOLOGY_DUALPIPE_3DMERGE: - /* dual pp */ - for (i = 0; i < MAX_CHANNELS_PER_ENC; i++) { - hw_pp[i] = dpu_enc->hw_pp[i]; - if (hw_pp[i]) - pp_count++; - } - break; - default: - DPU_DEBUG_ENC(dpu_enc, "Unexpected topology:%d\n", topology); - return -EINVAL; - }; - - DPU_EVT32(DRMID(&dpu_enc->base), topology, pp_count, dsc_count); - - if (pp_count > MAX_CHANNELS_PER_ENC || - dsc_count > MAX_CHANNELS_PER_ENC) { - DPU_ERROR_ENC(dpu_enc, "Wrong count pp:%d dsc:%d top:%d\n", - pp_count, dsc_count, topology); - return -EINVAL; - } - - /* Disable DSC for all the pp's present in this topology */ - for (i = 0; i < pp_count; i++) { - - if (!hw_pp[i]) { - DPU_ERROR_ENC(dpu_enc, "null pp:%d top:%d cnt:%d\n", - i, topology, pp_count); - return -EINVAL; - } - - if (hw_pp[i]->ops.disable_dsc) - hw_pp[i]->ops.disable_dsc(hw_pp[i]); - } - - /* Disable DSC HW */ - for (i = 0; i < dsc_count; i++) { - - if (!hw_dsc[i]) { - DPU_ERROR_ENC(dpu_enc, "null dsc:%d top:%d cnt:%d\n", - i, topology, dsc_count); - return -EINVAL; - } - - if (hw_dsc[i]->ops.dsc_disable) - hw_dsc[i]->ops.dsc_disable(hw_dsc[i]); - } - - return ret; -} - static void _dpu_encoder_irq_control(struct drm_encoder *drm_enc, bool enable) { struct dpu_encoder_virt *dpu_enc; @@ -1607,7 +1163,7 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc, struct list_head *connector_list; struct drm_connector *conn = NULL, *conn_iter; struct dpu_connector *dpu_conn = NULL; - struct dpu_rm_hw_iter dsc_iter, pp_iter; + struct dpu_rm_hw_iter pp_iter; int i = 0, ret;

if (!drm_enc) { @@ -1658,12 +1214,6 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc, ret); return; } - - /* - * Disable dsc before switch the mode and after pre_modeset, - * to guarantee that previous kickoff finished. - */ - _dpu_encoder_dsc_disable(dpu_enc); }

/* Reserve dynamic resources now. Indicating non-AtomicTest phase */ @@ -1683,14 +1233,6 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc, dpu_enc->hw_pp[i] = (struct dpu_hw_pingpong *) pp_iter.hw; }

- dpu_rm_init_hw_iter(&dsc_iter, drm_enc->base.id, DPU_HW_BLK_DSC); - for (i = 0; i < MAX_CHANNELS_PER_ENC; i++) { - dpu_enc->hw_dsc[i] = NULL; - if (!dpu_rm_get_hw(&dpu_kms->rm, &dsc_iter)) - break; - dpu_enc->hw_dsc[i] = (struct dpu_hw_dsc *) dsc_iter.hw; - } - for (i = 0; i < dpu_enc->num_phys_encs; i++) { struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];

@@ -1782,7 +1324,6 @@ static void dpu_encoder_virt_enable(struct drm_encoder *drm_enc) { struct dpu_encoder_virt *dpu_enc = NULL; int i, ret = 0; - struct msm_compression_info *comp_info = NULL; struct drm_display_mode *cur_mode = NULL;

if (!drm_enc) { @@ -1790,7 +1331,6 @@ static void dpu_encoder_virt_enable(struct drm_encoder *drm_enc) return; } dpu_enc = to_dpu_encoder_virt(drm_enc); - comp_info = &dpu_enc->mode_info.comp_info; cur_mode = &dpu_enc->base.crtc->state->adjusted_mode;

DPU_DEBUG_ENC(dpu_enc, "\n"); @@ -1825,7 +1365,6 @@ static void dpu_encoder_virt_enable(struct drm_encoder *drm_enc) if (!phys) continue;

- phys->comp_type = comp_info->comp_type; if (phys != dpu_enc->cur_master) { /** * on DMS request, the encoder will be enabled @@ -1900,13 +1439,6 @@ static void dpu_encoder_virt_disable(struct drm_encoder *drm_enc) phys->ops.disable(phys); }

- /* - * disable dsc after the transfer is complete (for command mode) - * and after physical encoder is disabled, to make sure timing - * engine is already disabled (for video mode). - */ - _dpu_encoder_dsc_disable(dpu_enc); - /* after phys waits for frame-done, should be no more frames pending */ if (atomic_xchg(&dpu_enc->frame_done_timeout, 0)) { DPU_ERROR("enc%d timeout pending\n", drm_enc->base.id); @@ -2742,12 +2274,6 @@ void dpu_encoder_prepare_for_kickoff(struct drm_encoder *drm_enc, dpu_enc->cur_master->connector->base.id, rc); } - - if (dpu_encoder_is_dsc_enabled(drm_enc)) { - rc = _dpu_encoder_dsc_setup(dpu_enc); - if (rc) - DPU_ERROR_ENC(dpu_enc, "failed to setup DSC: %d\n", rc); - } }

void dpu_encoder_kickoff(struct drm_encoder *drm_enc) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h index e85e5a4..b25619d 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h @@ -145,20 +145,6 @@ int dpu_encoder_wait_for_event(struct drm_encoder *drm_encoder, void dpu_encoder_virt_restore(struct drm_encoder *encoder);

/** - * dpu_encoder_is_dsc_enabled - check if encoder is in DSC mode - * @drm_enc: Pointer to drm encoder object - * @Return: true if encoder is in DSC mode - */ -bool dpu_encoder_is_dsc_enabled(struct drm_encoder *drm_enc); - -/** - * dpu_encoder_is_dsc_merge - check if encoder is in DSC merge mode - * @drm_enc: Pointer to drm encoder object - * @Return: true if encoder is in DSC merge mode - */ -bool dpu_encoder_is_dsc_merge(struct drm_encoder *drm_enc); - -/** * dpu_encoder_check_mode - check if given mode is supported or not * @drm_enc: Pointer to drm encoder object * @mode: Mode to be checked diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h index 9bbf339b..b57f619 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h @@ -232,7 +232,6 @@ struct dpu_encoder_irq { * @split_role: Role to play in a split-panel configuration * @intf_mode: Interface mode * @intf_idx: Interface index on dpu hardware - * @comp_type: Type of compression supported * @enc_spinlock: Virtual-Encoder-Wide Spin Lock for IRQ purposes * @enable_state: Enable state tracking * @vblank_refcount: Reference count of vblank request @@ -262,7 +261,6 @@ struct dpu_encoder_phys { enum dpu_enc_split_role split_role; enum dpu_intf_mode intf_mode; enum dpu_intf intf_idx; - enum msm_display_compression_type comp_type; spinlock_t *enc_spinlock; enum dpu_enc_enable_state enable_state; atomic_t vblank_refcount; @@ -384,7 +382,6 @@ struct dpu_encoder_phys_wb { * @split_role: Role to play in a split-panel configuration * @intf_idx: Interface index this phys_enc will control * @wb_idx: Writeback index this phys_enc will control - * @comp_type: Type of compression supported * @enc_spinlock: Virtual-Encoder-Wide Spin Lock for IRQ purposes */ struct dpu_enc_phys_init_params { @@ -394,7 +391,6 @@ struct dpu_enc_phys_init_params { enum dpu_enc_split_role split_role; enum dpu_intf intf_idx; enum dpu_wb wb_idx; - enum msm_display_compression_type comp_type; spinlock_t *enc_spinlock; };

@@ -479,8 +475,7 @@ static inline enum dpu_3d_blend_mode dpu_encoder_helper_get_3d_blend_mode(

topology = dpu_connector_get_topology_name(phys_enc->connector); if (phys_enc->split_role == ENC_ROLE_SOLO && - (topology == DPU_RM_TOPOLOGY_DUALPIPE_3DMERGE || - topology == DPU_RM_TOPOLOGY_DUALPIPE_3DMERGE_DSC)) + topology == DPU_RM_TOPOLOGY_DUALPIPE_3DMERGE) return BLEND_3D_H_ROW_INT;

return BLEND_3D_NONE; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c index 6ccf378..71e2e5a 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c @@ -1237,7 +1237,6 @@ struct dpu_encoder_phys *dpu_encoder_phys_cmd_init( phys_enc->enc_spinlock = p->enc_spinlock; cmd_enc->stream_sel = 0; phys_enc->enable_state = DPU_ENC_DISABLED; - phys_enc->comp_type = p->comp_type; for (i = 0; i < INTR_IDX_MAX; i++) { irq = &phys_enc->irq[i]; INIT_LIST_HEAD(&irq->cb.list); diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c index 27ea2b1..d6b72a3 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c @@ -77,9 +77,6 @@ static void drm_mode_to_intf_timing_params( * <---------------------------- [hv]total -------------> */ timing->width = mode->hdisplay; /* active width */ - if (vid_enc->base.comp_type == MSM_DISPLAY_COMPRESSION_DSC) - timing->width = DIV_ROUND_UP(timing->width, 3); - timing->height = mode->vdisplay; /* active height */ timing->xres = timing->width; timing->yres = timing->height; @@ -379,8 +376,7 @@ static bool _dpu_encoder_phys_is_dual_ctl(struct dpu_encoder_phys *phys_enc) return false;

topology = dpu_connector_get_topology_name(phys_enc->connector); - if ((topology == DPU_RM_TOPOLOGY_DUALPIPE_DSC) || - (topology == DPU_RM_TOPOLOGY_DUALPIPE)) + if (topology == DPU_RM_TOPOLOGY_DUALPIPE) return true;

return false; @@ -915,7 +911,6 @@ struct dpu_encoder_phys *dpu_encoder_phys_vid_init( phys_enc->split_role = p->split_role; phys_enc->intf_mode = INTF_MODE_VIDEO; phys_enc->enc_spinlock = p->enc_spinlock; - phys_enc->comp_type = p->comp_type; for (i = 0; i < INTR_IDX_MAX; i++) { irq = &phys_enc->irq[i]; INIT_LIST_HEAD(&irq->cb.list); diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c index df73148..14e66ca 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c @@ -380,29 +380,6 @@ };

/************************************************************* - * DSC sub blocks config - *************************************************************/ - -static struct dpu_dsc_cfg sdm845_dsc[] = { - { - .name = "dsc_0", .id = DSC_0, - .base = 0x81000, .len = 0x140 - }, - { - .name = "dsc_1", .id = DSC_1, - .base = 0x81400, .len = 0x140 - }, - { - .name = "dsc_2", .id = DSC_2, - .base = 0x81800, .len = 0x140 - }, - { - .name = "dsc_3", .id = DSC_3, - .base = 0x81c00, .len = 0x140 - }, -}; - -/************************************************************* * INTF sub blocks config *************************************************************/ #define INTF_BLK(_name, _id, _base, _type, _ctrl_id) \ @@ -591,8 +568,6 @@ void sdm845_cfg_init(struct dpu_mdss_cfg *dpu_cfg) .ds = sdm845_ds, .pingpong_count = ARRAY_SIZE(sdm845_pp), .pingpong = sdm845_pp, - .dsc_count = ARRAY_SIZE(sdm845_dsc), - .dsc = sdm845_dsc, .cdm_count = ARRAY_SIZE(sdm845_cdm), .cdm = sdm845_cdm, .intf_count = ARRAY_SIZE(sdm845_intf), diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h index 40d90c3..ceff3b7 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h @@ -199,7 +199,6 @@ enum { * @DPU_PINGPONG_TE2 Additional tear check block for split pipes * @DPU_PINGPONG_SPLIT PP block supports split fifo * @DPU_PINGPONG_SLAVE PP block is a suitable slave for split fifo - * @DPU_PINGPONG_DSC, Display stream compression blocks * @DPU_PINGPONG_DITHER, Dither blocks * @DPU_PINGPONG_MAX */ @@ -208,7 +207,6 @@ enum { DPU_PINGPONG_TE2, DPU_PINGPONG_SPLIT, DPU_PINGPONG_SLAVE, - DPU_PINGPONG_DSC, DPU_PINGPONG_DITHER, DPU_PINGPONG_MAX }; @@ -489,7 +487,6 @@ struct dpu_dspp_sub_blks { struct dpu_pingpong_sub_blks { struct dpu_pp_blk te; struct dpu_pp_blk te2; - struct dpu_pp_blk dsc; struct dpu_pp_blk dither; };

@@ -671,16 +668,6 @@ struct dpu_pingpong_cfg { };

/** - * struct dpu_dsc_cfg - information of DSC blocks - * @id enum identifying this block - * @base register offset of this block - * @features bit mask identifying sub-blocks/features - */ -struct dpu_dsc_cfg { - DPU_HW_BLK_INFO; -}; - -/** * struct dpu_cdm_cfg - information of chroma down blocks * @id enum identifying this block * @base register offset of this block @@ -916,9 +903,6 @@ struct dpu_mdss_cfg { u32 pingpong_count; struct dpu_pingpong_cfg *pingpong;

- u32 dsc_count; - struct dpu_dsc_cfg *dsc; - u32 cdm_count; struct dpu_cdm_cfg *cdm;

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c deleted file mode 100644 index fc3c30e..0000000 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c +++ /dev/null @@ -1,252 +0,0 @@ -/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include "dpu_hw_mdss.h" -#include "dpu_hwio.h" -#include "dpu_hw_catalog.h" -#include "dpu_hw_dsc.h" -#include "dpu_hw_pingpong.h" -#include "dpu_dbg.h" -#include "dpu_kms.h" - -#define DSC_COMMON_MODE 0x000 -#define DSC_ENC 0X004 -#define DSC_PICTURE 0x008 -#define DSC_SLICE 0x00C -#define DSC_CHUNK_SIZE 0x010 -#define DSC_DELAY 0x014 -#define DSC_SCALE_INITIAL 0x018 -#define DSC_SCALE_DEC_INTERVAL 0x01C -#define DSC_SCALE_INC_INTERVAL 0x020 -#define DSC_FIRST_LINE_BPG_OFFSET 0x024 -#define DSC_BPG_OFFSET 0x028 -#define DSC_DSC_OFFSET 0x02C -#define DSC_FLATNESS 0x030 -#define DSC_RC_MODEL_SIZE 0x034 -#define DSC_RC 0x038 -#define DSC_RC_BUF_THRESH 0x03C -#define DSC_RANGE_MIN_QP 0x074 -#define DSC_RANGE_MAX_QP 0x0B0 -#define DSC_RANGE_BPG_OFFSET 0x0EC - -static void dpu_hw_dsc_disable(struct dpu_hw_dsc *dsc) -{ - struct dpu_hw_blk_reg_map *dsc_c = &dsc->hw; - - DPU_REG_WRITE(dsc_c, DSC_COMMON_MODE, 0); -} - -static void dpu_hw_dsc_config(struct dpu_hw_dsc *hw_dsc, - struct msm_display_dsc_info *dsc, u32 mode, - bool ich_reset_override) -{ - u32 data; - int bpp, lsb; - u32 initial_lines = dsc->initial_lines; - bool is_cmd_mode = !(mode & BIT(2)); - struct dpu_hw_blk_reg_map *dsc_c = &hw_dsc->hw; - - DPU_REG_WRITE(dsc_c, DSC_COMMON_MODE, mode); - - data = 0; - if (ich_reset_override) - data = 3 << 28; - - if (is_cmd_mode) - initial_lines += 1; - - data |= (initial_lines << 20); - data |= ((dsc->slice_last_group_size - 1) << 18); - /* bpp is 6.4 format, 4 LSBs bits are for fractional part */ - lsb = dsc->bpp % 4; - bpp = dsc->bpp / 4; - bpp *= 4; /* either 8 or 12 */ - bpp <<= 4; - bpp |= lsb; - data |= (bpp << 8); - data |= (dsc->block_pred_enable << 7); - data |= (dsc->line_buf_depth << 3); - data |= (dsc->enable_422 << 2); - data |= (dsc->convert_rgb << 1); - data |= dsc->input_10_bits; - - DPU_REG_WRITE(dsc_c, DSC_ENC, data); - - data = dsc->pic_width << 16; - data |= dsc->pic_height; - DPU_REG_WRITE(dsc_c, DSC_PICTURE, data); - - data = dsc->slice_width << 16; - data |= dsc->slice_height; - DPU_REG_WRITE(dsc_c, DSC_SLICE, data); - - data = dsc->chunk_size << 16; - DPU_REG_WRITE(dsc_c, DSC_CHUNK_SIZE, data); - - data = dsc->initial_dec_delay << 16; - data |= dsc->initial_xmit_delay; - DPU_REG_WRITE(dsc_c, DSC_DELAY, data); - - data = dsc->initial_scale_value; - DPU_REG_WRITE(dsc_c, DSC_SCALE_INITIAL, data); - - data = dsc->scale_decrement_interval; - DPU_REG_WRITE(dsc_c, DSC_SCALE_DEC_INTERVAL, data); - - data = dsc->scale_increment_interval; - DPU_REG_WRITE(dsc_c, DSC_SCALE_INC_INTERVAL, data); - - data = dsc->first_line_bpg_offset; - DPU_REG_WRITE(dsc_c, DSC_FIRST_LINE_BPG_OFFSET, data); - - data = dsc->nfl_bpg_offset << 16; - data |= dsc->slice_bpg_offset; - DPU_REG_WRITE(dsc_c, DSC_BPG_OFFSET, data); - - data = dsc->initial_offset << 16; - data |= dsc->final_offset; - DPU_REG_WRITE(dsc_c, DSC_DSC_OFFSET, data); - - data = dsc->det_thresh_flatness << 10; - data |= dsc->max_qp_flatness << 5; - data |= dsc->min_qp_flatness; - DPU_REG_WRITE(dsc_c, DSC_FLATNESS, data); - - data = dsc->rc_model_size; - DPU_REG_WRITE(dsc_c, DSC_RC_MODEL_SIZE, data); - - data = dsc->tgt_offset_lo << 18; - data |= dsc->tgt_offset_hi << 14; - data |= dsc->quant_incr_limit1 << 9; - data |= dsc->quant_incr_limit0 << 4; - data |= dsc->edge_factor; - DPU_REG_WRITE(dsc_c, DSC_RC, data); -} - -static void dpu_hw_dsc_config_thresh(struct dpu_hw_dsc *hw_dsc, - struct msm_display_dsc_info *dsc) -{ - u32 *lp; - char *cp; - int i; - - struct dpu_hw_blk_reg_map *dsc_c = &hw_dsc->hw; - u32 off = 0x0; - - lp = dsc->buf_thresh; - off = DSC_RC_BUF_THRESH; - for (i = 0; i < 14; i++) { - DPU_REG_WRITE(dsc_c, off, *lp++); - off += 4; - } - - cp = dsc->range_min_qp; - off = DSC_RANGE_MIN_QP; - for (i = 0; i < 15; i++) { - DPU_REG_WRITE(dsc_c, off, *cp++); - off += 4; - } - - cp = dsc->range_max_qp; - off = DSC_RANGE_MAX_QP; - for (i = 0; i < 15; i++) { - DPU_REG_WRITE(dsc_c, off, *cp++); - off += 4; - } - - cp = dsc->range_bpg_offset; - off = DSC_RANGE_BPG_OFFSET; - for (i = 0; i < 15; i++) { - DPU_REG_WRITE(dsc_c, off, *cp++); - off += 4; - } -} - -static struct dpu_dsc_cfg *_dsc_offset(enum dpu_dsc dsc, - struct dpu_mdss_cfg *m, - void __iomem *addr, - struct dpu_hw_blk_reg_map *b) -{ - int i; - - for (i = 0; i < m->dsc_count; i++) { - if (dsc == m->dsc[i].id) { - b->base_off = addr; - b->blk_off = m->dsc[i].base; - b->length = m->dsc[i].len; - b->hwversion = m->hwversion; - b->log_mask = DPU_DBG_MASK_DSC; - return &m->dsc[i]; - } - } - - return NULL; -} - -static void _setup_dsc_ops(struct dpu_hw_dsc_ops *ops, - unsigned long cap) -{ - ops->dsc_disable = dpu_hw_dsc_disable; - ops->dsc_config = dpu_hw_dsc_config; - ops->dsc_config_thresh = dpu_hw_dsc_config_thresh; -}; - -static struct dpu_hw_blk_ops dpu_hw_ops = { - .start = NULL, - .stop = NULL, -}; - -struct dpu_hw_dsc *dpu_hw_dsc_init(enum dpu_dsc idx, - void __iomem *addr, - struct dpu_mdss_cfg *m) -{ - struct dpu_hw_dsc *c; - struct dpu_dsc_cfg *cfg; - int rc; - - c = kzalloc(sizeof(*c), GFP_KERNEL); - if (!c) - return ERR_PTR(-ENOMEM); - - cfg = _dsc_offset(idx, m, addr, &c->hw); - if (IS_ERR_OR_NULL(cfg)) { - kfree(c); - return ERR_PTR(-EINVAL); - } - - c->idx = idx; - c->caps = cfg; - _setup_dsc_ops(&c->ops, c->caps->features); - - rc = dpu_hw_blk_init(&c->base, DPU_HW_BLK_DSC, idx, &dpu_hw_ops); - if (rc) { - DPU_ERROR("failed to init hw blk %d\n", rc); - goto blk_init_error; - } - - dpu_dbg_reg_register_dump_range(DPU_DBG_NAME, cfg->name, c->hw.blk_off, - c->hw.blk_off + c->hw.length, c->hw.xin_id); - - return c; - -blk_init_error: - kzfree(c); - - return ERR_PTR(rc); -} - -void dpu_hw_dsc_destroy(struct dpu_hw_dsc *dsc) -{ - if (dsc) - dpu_hw_blk_destroy(&dsc->base); - kfree(dsc); -} diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.h deleted file mode 100644 index ebab920..0000000 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.h +++ /dev/null @@ -1,100 +0,0 @@ -/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef _DPU_HW_DSC_H -#define _DPU_HW_DSC_H - -#include "dpu_hw_catalog.h" -#include "dpu_hw_mdss.h" -#include "dpu_hw_util.h" -#include "dpu_hw_blk.h" - -struct dpu_hw_dsc; -struct msm_display_dsc_info; - -#define DSC_MODE_SPLIT_PANEL BIT(0) -#define DSC_MODE_MULTIPLEX BIT(1) -#define DSC_MODE_VIDEO BIT(2) - -/** - * struct dpu_hw_dsc_ops - interface to the dsc hardware driver functions - * Assumption is these functions will be called after clocks are enabled - */ -struct dpu_hw_dsc_ops { - /** - * dsc_disable - disable dsc - * @hw_dsc: Pointer to dsc context - */ - void (*dsc_disable)(struct dpu_hw_dsc *hw_dsc); - - /** - * dsc_config - configures dsc encoder - * @hw_dsc: Pointer to dsc context - * @dsc: panel dsc parameters - * @mode: dsc topology mode to be set - * @ich_reset_override: option to reset ich - */ - void (*dsc_config)(struct dpu_hw_dsc *hw_dsc, - struct msm_display_dsc_info *dsc, - u32 mode, bool ich_reset_override); - - /** - * dsc_config_thresh - programs panel thresholds - * @hw_dsc: Pointer to dsc context - * @dsc: panel dsc parameters - */ - void (*dsc_config_thresh)(struct dpu_hw_dsc *hw_dsc, - struct msm_display_dsc_info *dsc); -}; - -struct dpu_hw_dsc { - struct dpu_hw_blk base; - struct dpu_hw_blk_reg_map hw; - - /* dsc */ - enum dpu_dsc idx; - const struct dpu_dsc_cfg *caps; - - /* ops */ - struct dpu_hw_dsc_ops ops; -}; - -/** - * dpu_hw_dsc - convert base object dpu_hw_base to container - * @hw: Pointer to base hardware block - * return: Pointer to hardware block container - */ -static inline struct dpu_hw_dsc *to_dpu_hw_dsc(struct dpu_hw_blk *hw) -{ - return container_of(hw, struct dpu_hw_dsc, base); -} - -/** - * dpu_hw_dsc_init - initializes the dsc block for the passed - * dsc idx. - * @idx: DSC index for which driver object is required - * @addr: Mapped register io address of MDP - * @m: Pointer to mdss catalog data - * Returns: Error code or allocated dpu_hw_dsc context - */ -struct dpu_hw_dsc *dpu_hw_dsc_init(enum dpu_dsc idx, - void __iomem *addr, - struct dpu_mdss_cfg *m); - -/** - * dpu_hw_dsc_destroy - destroys dsc driver context - * should be called to free the context - * @dsc: Pointer to dsc driver context returned by dpu_hw_dsc_init - */ -void dpu_hw_dsc_destroy(struct dpu_hw_dsc *dsc); - -#endif /*_DPU_HW_DSC_H */ diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h index 5ede2b5..70d57c9 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h @@ -106,7 +106,6 @@ enum dpu_hw_blk_type { DPU_HW_BLK_PINGPONG, DPU_HW_BLK_INTF, DPU_HW_BLK_WB, - DPU_HW_BLK_DSC, DPU_HW_BLK_MAX, };

@@ -208,17 +207,6 @@ enum dpu_pingpong { PINGPONG_MAX };

-enum dpu_dsc { - DSC_NONE = 0, - DSC_0, - DSC_1, - DSC_2, - DSC_3, - DSC_4, - DSC_5, - DSC_MAX -}; - enum dpu_intf { INTF_0 = 1, INTF_1, @@ -482,9 +470,8 @@ struct dpu_mdss_color { #define DPU_DBG_MASK_WB (1 << 8) #define DPU_DBG_MASK_TOP (1 << 9) #define DPU_DBG_MASK_VBIF (1 << 10) -#define DPU_DBG_MASK_DSC (1 << 11) -#define DPU_DBG_MASK_ROT (1 << 12) -#define DPU_DBG_MASK_DS (1 << 13) +#define DPU_DBG_MASK_ROT (1 << 11) +#define DPU_DBG_MASK_DS (1 << 12)

/** * struct dpu_hw_cp_cfg: hardware dspp/lm feature payload. diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c index e293d6e..9308f5c 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c @@ -36,9 +36,6 @@ #define PP_FBC_MODE 0x034 #define PP_FBC_BUDGET_CTL 0x038 #define PP_FBC_LOSSY_MODE 0x03C -#define PP_DSC_MODE 0x0a0 -#define PP_DCE_DATA_IN_SWAP 0x0ac -#define PP_DCE_DATA_OUT_SWAP 0x0c8

#define DITHER_DEPTH_MAP_INDEX 9 static u32 dither_depth_map[DITHER_DEPTH_MAP_INDEX] = { @@ -151,48 +148,6 @@ static int dpu_hw_pp_poll_timeout_wr_ptr(struct dpu_hw_pingpong *pp, return rc; }

-static void dpu_hw_pp_dsc_enable(struct dpu_hw_pingpong *pp) -{ - struct dpu_hw_blk_reg_map *c; - - if (!pp) - return; - c = &pp->hw; - - DPU_REG_WRITE(c, PP_DSC_MODE, 1); -} - -static void dpu_hw_pp_dsc_disable(struct dpu_hw_pingpong *pp) -{ - struct dpu_hw_blk_reg_map *c; - u32 data; - - if (!pp) - return; - c = &pp->hw; - - data = DPU_REG_READ(c, PP_DCE_DATA_OUT_SWAP); - data &= ~BIT(18); /* disable endian flip */ - DPU_REG_WRITE(c, PP_DCE_DATA_OUT_SWAP, data); - - DPU_REG_WRITE(c, PP_DSC_MODE, 0); -} - -static int dpu_hw_pp_setup_dsc(struct dpu_hw_pingpong *pp) -{ - struct dpu_hw_blk_reg_map *c; - int data; - - if (!pp) - return -EINVAL; - c = &pp->hw; - - data = DPU_REG_READ(c, PP_DCE_DATA_OUT_SWAP); - data |= BIT(18); /* endian flip */ - DPU_REG_WRITE(c, PP_DCE_DATA_OUT_SWAP, data); - return 0; -} - static int dpu_hw_pp_setup_dither_v1(struct dpu_hw_pingpong *pp, void *cfg, size_t len) { @@ -339,9 +294,6 @@ static void _setup_pingpong_ops(struct dpu_hw_pingpong_ops *ops, ops->connect_external_te = dpu_hw_pp_connect_external_te; ops->get_vsync_info = dpu_hw_pp_get_vsync_info; ops->setup_autorefresh = dpu_hw_pp_setup_autorefresh_config; - ops->setup_dsc = dpu_hw_pp_setup_dsc; - ops->enable_dsc = dpu_hw_pp_dsc_enable; - ops->disable_dsc = dpu_hw_pp_dsc_disable; ops->get_autorefresh = dpu_hw_pp_get_autorefresh_config; ops->poll_timeout_wr_ptr = dpu_hw_pp_poll_timeout_wr_ptr; ops->get_line_count = dpu_hw_pp_get_line_count; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h index 7987ee6..93d03cce 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h @@ -48,10 +48,6 @@ struct dpu_hw_pp_vsync_info { u32 wr_ptr_line_count; /* current line within pp fifo (wr ptr) */ };

-struct dpu_hw_dsc_cfg { - u8 enable; -}; - /** * * struct dpu_hw_pingpong_ops : Interface to the pingpong Hw driver functions @@ -60,9 +56,6 @@ struct dpu_hw_dsc_cfg { * @enable_tearcheck : enables tear check * @get_vsync_info : retries timing info of the panel * @setup_autorefresh : program auto refresh - * @setup_dsc : program DSC block with encoding details - * @enable_dsc : enables DSC encoder - * @disable_dsc : disables DSC encoder * @setup_dither : function to program the dither hw block * @get_line_count: obtain current vertical line counter */ @@ -113,21 +106,6 @@ struct dpu_hw_pingpong_ops { int (*poll_timeout_wr_ptr)(struct dpu_hw_pingpong *pp, u32 timeout_us);

/** - * Program the dsc compression block - */ - int (*setup_dsc)(struct dpu_hw_pingpong *pp); - - /** - * Enables DSC encoder - */ - void (*enable_dsc)(struct dpu_hw_pingpong *pp); - - /** - * Disables DSC encoder - */ - void (*disable_dsc)(struct dpu_hw_pingpong *pp); - - /** * Program the dither hw block */ int (*setup_dither)(struct dpu_hw_pingpong *pp, void *cfg, size_t len); diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c index 68163a1..60e4bef 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c @@ -317,18 +317,6 @@ static void dpu_hw_get_safe_status(struct dpu_hw_mdp *mdp, status->wb[WB_3] = 0; }

-static void dpu_hw_setup_dce(struct dpu_hw_mdp *mdp, u32 dce_sel) -{ - struct dpu_hw_blk_reg_map *c; - - if (!mdp) - return; - - c = &mdp->hw; - - DPU_REG_WRITE(c, DCE_SEL, dce_sel); -} - void dpu_hw_reset_ubwc(struct dpu_hw_mdp *mdp, struct dpu_mdss_cfg *m) { struct dpu_hw_blk_reg_map c; @@ -367,7 +355,6 @@ static void _setup_mdp_ops(struct dpu_hw_mdp_ops *ops, ops->get_danger_status = dpu_hw_get_danger_status; ops->setup_vsync_source = dpu_hw_setup_vsync_source; ops->get_safe_status = dpu_hw_get_safe_status; - ops->setup_dce = dpu_hw_setup_dce; ops->reset_ubwc = dpu_hw_reset_ubwc; ops->intf_audio_select = dpu_hw_intf_audio_select; } diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.h index 375cb7c..1470d0f 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.h @@ -143,13 +143,6 @@ struct dpu_hw_mdp_ops { enum dpu_clk_ctrl_type clk_ctrl, bool enable);

/** - * setup_dce - set DCE mux for DSC ctrl path - * @mdp: mdp top context driver - * @dce_sel: dce_mux value - */ - void (*setup_dce)(struct dpu_hw_mdp *mdp, u32 dce_sel); - - /** * get_danger_status - get danger status * @mdp: mdp top context driver * @status: Pointer to danger safe status diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c index 1d81b1b..13efbeb 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c @@ -24,7 +24,6 @@ #include "dpu_hw_wb.h" #include "dpu_encoder.h" #include "dpu_connector.h" -#include "dpu_hw_dsc.h"

#define RESERVED_BY_OTHER(h, r) \ ((h)->rsvp && ((h)->rsvp->enc_id != (r)->enc_id)) @@ -49,12 +48,8 @@ struct dpu_rm_topology_def { static const struct dpu_rm_topology_def g_top_table[] = { { DPU_RM_TOPOLOGY_NONE, 0, 0, 0, 0, false }, { DPU_RM_TOPOLOGY_SINGLEPIPE, 1, 0, 1, 1, false }, - { DPU_RM_TOPOLOGY_SINGLEPIPE_DSC, 1, 1, 1, 1, false }, { DPU_RM_TOPOLOGY_DUALPIPE, 2, 0, 2, 2, true }, - { DPU_RM_TOPOLOGY_DUALPIPE_DSC, 2, 2, 2, 2, true }, { DPU_RM_TOPOLOGY_DUALPIPE_3DMERGE, 2, 0, 1, 1, false }, - { DPU_RM_TOPOLOGY_DUALPIPE_3DMERGE_DSC, 2, 1, 1, 1, false }, - { DPU_RM_TOPOLOGY_DUALPIPE_DSCMERGE, 2, 2, 1, 1, false }, { DPU_RM_TOPOLOGY_PPSPLIT, 1, 0, 2, 1, true }, };

@@ -253,9 +248,6 @@ static void _dpu_rm_hw_destroy(enum dpu_hw_blk_type type, void *hw) case DPU_HW_BLK_WB: dpu_hw_wb_destroy(hw); break; - case DPU_HW_BLK_DSC: - dpu_hw_dsc_destroy(hw); - break; case DPU_HW_BLK_SSPP: /* SSPPs are not managed by the resource manager */ case DPU_HW_BLK_TOP: @@ -341,9 +333,6 @@ static int _dpu_rm_hw_blk_create( case DPU_HW_BLK_WB: hw = dpu_hw_wb_init(id, mmio, cat, hw_mdp); break; - case DPU_HW_BLK_DSC: - hw = dpu_hw_dsc_init(id, mmio, cat); - break; case DPU_HW_BLK_SSPP: /* SSPPs are not managed by the resource manager */ case DPU_HW_BLK_TOP: @@ -465,15 +454,6 @@ int dpu_rm_init(struct dpu_rm *rm, } }

- for (i = 0; i < cat->dsc_count; i++) { - rc = _dpu_rm_hw_blk_create(rm, cat, mmio, DPU_HW_BLK_DSC, - cat->dsc[i].id, &cat->dsc[i]); - if (rc) { - DPU_ERROR("failed: dsc hw not available\n"); - goto fail; - } - } - for (i = 0; i < cat->intf_count; i++) { if (cat->intf[i].type == INTF_NONE) { DPU_DEBUG("skip intf %d with type none\n", i); @@ -834,37 +814,6 @@ static int _dpu_rm_reserve_ctls( return 0; }

-static int _dpu_rm_reserve_dsc( - struct dpu_rm *rm, - struct dpu_rm_rsvp *rsvp, - const struct dpu_rm_topology_def *top) -{ - struct dpu_rm_hw_iter iter; - int alloc_count = 0; - int num_dsc_enc = top->num_lm; - - if (!top->num_comp_enc) - return 0; - - dpu_rm_init_hw_iter(&iter, 0, DPU_HW_BLK_DSC); - - while (_dpu_rm_get_hw_locked(rm, &iter)) { - if (RESERVED_BY_OTHER(iter.blk, rsvp)) - continue; - - iter.blk->rsvp_nxt = rsvp; - DPU_EVT32(iter.blk->type, rsvp->enc_id, iter.blk->id); - - if (++alloc_count == num_dsc_enc) - return 0; - } - - DPU_ERROR("couldn't reserve %d dsc blocks for enc id %d\n", - num_dsc_enc, rsvp->enc_id); - - return -ENAVAIL; -} - static int _dpu_rm_reserve_cdm( struct dpu_rm *rm, struct dpu_rm_rsvp *rsvp, @@ -1032,10 +981,6 @@ static int _dpu_rm_make_next_rsvp( if (ret) return ret;

- ret = _dpu_rm_reserve_dsc(rm, rsvp, reqs->topology); - if (ret) - return ret; - return ret; }

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h index 22a681c..3db61b5 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h @@ -24,23 +24,15 @@ * enum dpu_rm_topology_name - HW resource use case in use by connector * @DPU_RM_TOPOLOGY_NONE: No topology in use currently * @DPU_RM_TOPOLOGY_SINGLEPIPE: 1 LM, 1 PP, 1 INTF/WB - * @DPU_RM_TOPOLOGY_SINGLEPIPE_DSC: 1 LM, 1 DSC, 1 PP, 1 INTF/WB * @DPU_RM_TOPOLOGY_DUALPIPE: 2 LM, 2 PP, 2 INTF/WB - * @DPU_RM_TOPOLOGY_DUALPIPE_DSC: 2 LM, 2 DSC, 2 PP, 2 INTF/WB * @DPU_RM_TOPOLOGY_DUALPIPE_3DMERGE: 2 LM, 2 PP, 3DMux, 1 INTF/WB - * @DPU_RM_TOPOLOGY_DUALPIPE_3DMERGE_DSC: 2 LM, 2 PP, 3DMux, 1 DSC, 1 INTF/WB - * @DPU_RM_TOPOLOGY_DUALPIPE_DSCMERGE: 2 LM, 2 PP, 2 DSC Merge, 1 INTF/WB * @DPU_RM_TOPOLOGY_PPSPLIT: 1 LM, 2 PPs, 2 INTF/WB */ enum dpu_rm_topology_name { DPU_RM_TOPOLOGY_NONE = 0, DPU_RM_TOPOLOGY_SINGLEPIPE, - DPU_RM_TOPOLOGY_SINGLEPIPE_DSC, DPU_RM_TOPOLOGY_DUALPIPE, - DPU_RM_TOPOLOGY_DUALPIPE_DSC, DPU_RM_TOPOLOGY_DUALPIPE_3DMERGE, - DPU_RM_TOPOLOGY_DUALPIPE_3DMERGE_DSC, - DPU_RM_TOPOLOGY_DUALPIPE_DSCMERGE, DPU_RM_TOPOLOGY_PPSPLIT, DPU_RM_TOPOLOGY_MAX, }; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_wb.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_wb.c index 0bb07ee..cc78786 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_wb.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_wb.c @@ -307,8 +307,6 @@ int dpu_wb_get_mode_info(const struct drm_display_mode *drm_mode, topology->num_enc = no_enc; topology->num_intf = single_intf;

- mode_info->comp_info.comp_type = MSM_DISPLAY_COMPRESSION_NONE; - return 0; }

diff --git a/drivers/gpu/drm/msm/dsi-staging/dsi_drm.c b/drivers/gpu/drm/msm/dsi-staging/dsi_drm.c index 017f881..2e742a3 100644 --- a/drivers/gpu/drm/msm/dsi-staging/dsi_drm.c +++ b/drivers/gpu/drm/msm/dsi-staging/dsi_drm.c @@ -322,13 +322,6 @@ int dsi_conn_get_mode_info(const struct drm_display_mode *drm_mode, memcpy(&mode_info->topology, &dsi_mode.priv_info->topology, sizeof(struct msm_display_topology));

- mode_info->comp_info.comp_type = MSM_DISPLAY_COMPRESSION_NONE; - if (dsi_mode.priv_info->dsc_enabled) { - mode_info->comp_info.comp_type = MSM_DISPLAY_COMPRESSION_DSC; - memcpy(&mode_info->comp_info.dsc_info, &dsi_mode.priv_info->dsc, - sizeof(dsi_mode.priv_info->dsc)); - } - return 0; }

diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h index 9e13c01..eaf2b6a 100644 --- a/drivers/gpu/drm/msm/msm_drv.h +++ b/drivers/gpu/drm/msm/msm_drv.h @@ -319,20 +319,6 @@ struct msm_display_dsc_info { };

/** - * struct msm_compression_info - defined panel compression - * @comp_type: type of compression supported - * @dsc_info: dsc configuration if the compression - * supported is DSC - */ -struct msm_compression_info { - enum msm_display_compression_type comp_type; - - union{ - struct msm_display_dsc_info dsc_info; - }; -}; - -/** * struct msm_display_topology - defines a display topology pipeline * @num_lm: number of layer mixers used * @num_enc: number of compression encoder blocks used @@ -352,7 +338,6 @@ struct msm_display_topology { * @jitter_numer: display panel jitter numerator configuration * @jitter_denom: display panel jitter denominator configuration * @topology: supported topology for the mode - * @comp_info: compression info supported */ struct msm_mode_info { uint32_t frame_rate; @@ -361,7 +346,6 @@ struct msm_mode_info { uint32_t jitter_numer; uint32_t jitter_denom; struct msm_display_topology topology; - struct msm_compression_info comp_info; };

/**

Remove autorefresh support for smart panels in SDM845 for now. It needs more discussion to figure out the user space communication to set preference for the feature.

changes in v2: - none changes in v3: - none changes in v4: - none

Reviewed-by: Sean Paul seanpaul@chromium.org Signed-off-by: Jeykumar Sankaran jsanka@codeaurora.org Signed-off-by: Sean Paul seanpaul@chromium.org Signed-off-by: Rajesh Yadav ryadav@codeaurora.org --- drivers/gpu/drm/msm/disp/dpu1/dpu_connector.c | 7 - drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 37 +-- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 20 -- .../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 298 +-------------------- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 41 --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h | 18 -- 6 files changed, 11 insertions(+), 410 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_connector.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_connector.c index a89392e..969919f 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_connector.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_connector.c @@ -24,9 +24,6 @@

#define BL_NODE_NAME_SIZE 32

-/* Autorefresh will occur after FRAME_CNT frames. Large values are unlikely */ -#define AUTOREFRESH_MAX_FRAME_CNT 6 - #define DPU_DEBUG_CONN(c, fmt, ...) DPU_DEBUG("conn%d " fmt,\ (c) ? (c)->base.base.id : -1, ##__VA_ARGS__)

@@ -1127,10 +1124,6 @@ struct drm_connector *dpu_connector_init(struct drm_device *dev, CONNECTOR_PROP_AD_BL_SCALE); #endif

- msm_property_install_range(&c_conn->property_info, "autorefresh", - 0x0, 0, AUTOREFRESH_MAX_FRAME_CNT, 0, - CONNECTOR_PROP_AUTOREFRESH); - /* enum/bitmask properties */ msm_property_install_enum(&c_conn->property_info, "topology_name", DRM_MODE_PROP_IMMUTABLE, 0, e_topology_name, diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index d04095b..3854410 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -813,7 +813,6 @@ static void _dpu_encoder_resource_control_helper(struct drm_encoder *drm_enc, static int dpu_encoder_resource_control(struct drm_encoder *drm_enc, u32 sw_event) { - bool autorefresh_enabled = false; unsigned int lp, idle_timeout; struct dpu_encoder_virt *dpu_enc; struct msm_drm_private *priv; @@ -920,13 +919,6 @@ static int dpu_encoder_resource_control(struct drm_encoder *drm_enc, return 0; }

- /* schedule delayed off work if autorefresh is disabled */ - if (dpu_enc->cur_master && - dpu_enc->cur_master->ops.is_autorefresh_enabled) - autorefresh_enabled = - dpu_enc->cur_master->ops.is_autorefresh_enabled( - dpu_enc->cur_master); - /* set idle timeout based on master connector's lp value */ if (dpu_enc->cur_master) lp = dpu_connector_get_lp( @@ -939,13 +931,12 @@ static int dpu_encoder_resource_control(struct drm_encoder *drm_enc, else idle_timeout = dpu_enc->idle_timeout;

- if (!autorefresh_enabled) - kthread_queue_delayed_work( - &disp_thread->worker, - &dpu_enc->delayed_off_work, - msecs_to_jiffies(idle_timeout)); + kthread_queue_delayed_work( + &disp_thread->worker, + &dpu_enc->delayed_off_work, + msecs_to_jiffies(idle_timeout)); + DPU_EVT32(DRMID(drm_enc), sw_event, dpu_enc->rc_state, - autorefresh_enabled, idle_timeout, DPU_EVTLOG_FUNC_CASE2); DPU_DEBUG_ENC(dpu_enc, "sw_event:%d, work scheduled\n", sw_event); @@ -1988,7 +1979,6 @@ static void dpu_encoder_vsync_event_handler(struct timer_list *t) struct drm_encoder *drm_enc = &dpu_enc->base; struct msm_drm_private *priv; struct msm_drm_thread *event_thread; - bool autorefresh_enabled = false;

if (!drm_enc->dev || !drm_enc->dev->dev_private || !drm_enc->crtc) { @@ -2009,22 +1999,7 @@ static void dpu_encoder_vsync_event_handler(struct timer_list *t) return; }

- if (dpu_enc->cur_master && - dpu_enc->cur_master->ops.is_autorefresh_enabled) - autorefresh_enabled = - dpu_enc->cur_master->ops.is_autorefresh_enabled( - dpu_enc->cur_master); - - /* - * Queue work to update the vsync event timer - * if autorefresh is enabled. - */ - DPU_EVT32_VERBOSE(autorefresh_enabled); - if (autorefresh_enabled) - kthread_queue_work(&event_thread->worker, - &dpu_enc->vsync_event_work); - else - del_timer(&dpu_enc->vsync_event_timer); + del_timer(&dpu_enc->vsync_event_timer); }

static void dpu_encoder_vsync_event_work_handler(struct kthread_work *work) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h index 911ac6d..576c475 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h @@ -124,8 +124,6 @@ struct dpu_encoder_virt_ops { * @prepare_idle_pc: phys encoder can update the vsync_enable status * on idle power collapse prepare * @restore: Restore all the encoder configs. - * @is_autorefresh_enabled: provides the autorefresh current - * enable/disable state. * @get_line_count: Obtain current vertical line count */

@@ -166,7 +164,6 @@ struct dpu_encoder_phys_ops { void (*irq_control)(struct dpu_encoder_phys *phys, bool enable); void (*prepare_idle_pc)(struct dpu_encoder_phys *phys_enc); void (*restore)(struct dpu_encoder_phys *phys); - bool (*is_autorefresh_enabled)(struct dpu_encoder_phys *phys); int (*get_line_count)(struct dpu_encoder_phys *phys); };

@@ -176,8 +173,6 @@ struct dpu_encoder_phys_ops { * @INTR_IDX_PINGPONG: Pingpong done unterrupt for cmd mode panel * @INTR_IDX_UNDERRUN: Underrun unterrupt for video and cmd mode panel * @INTR_IDX_RDPTR: Readpointer done unterrupt for cmd mode panel - * @INTR_IDX_AUTOREFRESH_DONE: Autorefresh done for cmd mode panel meaning - * autorefresh has triggered a double buffer flip */ enum dpu_intr_idx { INTR_IDX_VSYNC, @@ -185,7 +180,6 @@ enum dpu_intr_idx { INTR_IDX_UNDERRUN, INTR_IDX_CTL_START, INTR_IDX_RDPTR, - INTR_IDX_AUTOREFRESH_DONE, INTR_IDX_MAX, };

@@ -287,18 +281,6 @@ struct dpu_encoder_phys_vid { };

/** - * struct dpu_encoder_phys_cmd_autorefresh - autorefresh state tracking - * @cfg: current active autorefresh configuration - * @kickoff_cnt: atomic count tracking autorefresh done irq kickoffs pending - * @kickoff_wq: wait queue for waiting on autorefresh done irq - */ -struct dpu_encoder_phys_cmd_autorefresh { - struct dpu_hw_autorefresh cfg; - atomic_t kickoff_cnt; - wait_queue_head_t kickoff_wq; -}; - -/** * struct dpu_encoder_phys_cmd - sub-class of dpu_encoder_phys to handle command * mode specific operations * @base: Baseclass physical encoder structure @@ -307,7 +289,6 @@ struct dpu_encoder_phys_cmd_autorefresh { * @serialize_wait4pp: serialize wait4pp feature waits for pp_done interrupt * after ctl_start instead of before next frame kickoff * @pp_timeout_report_cnt: number of pingpong done irq timeout errors - * @autorefresh: autorefresh feature state * @pending_vblank_cnt: Atomic counter tracking pending wait for VBLANK * @pending_vblank_wq: Wait queue for blocking until VBLANK received */ @@ -316,7 +297,6 @@ struct dpu_encoder_phys_cmd { int stream_sel; bool serialize_wait4pp; int pp_timeout_report_cnt; - struct dpu_encoder_phys_cmd_autorefresh autorefresh; atomic_t pending_vblank_cnt; wait_queue_head_t pending_vblank_wq; }; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c index 3436788..072939c 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c @@ -47,9 +47,7 @@ static inline int _dpu_encoder_phys_cmd_get_idle_timeout( struct dpu_encoder_phys_cmd *cmd_enc) { - return cmd_enc->autorefresh.cfg.frame_count ? - cmd_enc->autorefresh.cfg.frame_count * - KICKOFF_TIMEOUT_MS : KICKOFF_TIMEOUT_MS; + return KICKOFF_TIMEOUT_MS; }

static inline bool dpu_encoder_phys_cmd_is_master( @@ -68,52 +66,6 @@ static bool dpu_encoder_phys_cmd_mode_fixup( return true; }

-static uint64_t _dpu_encoder_phys_cmd_get_autorefresh_property( - struct dpu_encoder_phys *phys_enc) -{ - struct drm_connector *conn = phys_enc->connector; - - if (!conn || !conn->state) - return 0; - - return dpu_connector_get_property(conn->state, - CONNECTOR_PROP_AUTOREFRESH); -} - -static void _dpu_encoder_phys_cmd_config_autorefresh( - struct dpu_encoder_phys *phys_enc, - u32 new_frame_count) -{ - struct dpu_encoder_phys_cmd *cmd_enc = - to_dpu_encoder_phys_cmd(phys_enc); - struct dpu_hw_pingpong *hw_pp = phys_enc->hw_pp; - struct drm_connector *conn = phys_enc->connector; - struct dpu_hw_autorefresh *cfg_cur, cfg_nxt; - - if (!conn || !conn->state || !hw_pp) - return; - - cfg_cur = &cmd_enc->autorefresh.cfg; - - /* autorefresh property value should be validated already */ - memset(&cfg_nxt, 0, sizeof(cfg_nxt)); - cfg_nxt.frame_count = new_frame_count; - cfg_nxt.enable = (cfg_nxt.frame_count != 0); - - DPU_DEBUG_CMDENC(cmd_enc, "autorefresh state %d->%d framecount %d\n", - cfg_cur->enable, cfg_nxt.enable, cfg_nxt.frame_count); - DPU_EVT32(DRMID(phys_enc->parent), hw_pp->idx, cfg_cur->enable, - cfg_nxt.enable, cfg_nxt.frame_count); - - /* only proceed on state changes */ - if (cfg_nxt.enable == cfg_cur->enable) - return; - - memcpy(cfg_cur, &cfg_nxt, sizeof(*cfg_cur)); - if (hw_pp->ops.setup_autorefresh) - hw_pp->ops.setup_autorefresh(hw_pp, cfg_cur); -} - static void _dpu_encoder_phys_cmd_update_intf_cfg( struct dpu_encoder_phys *phys_enc) { @@ -164,29 +116,6 @@ static void dpu_encoder_phys_cmd_pp_tx_done_irq(void *arg, int irq_idx) DPU_ATRACE_END("pp_done_irq"); }

-static void dpu_encoder_phys_cmd_autorefresh_done_irq(void *arg, int irq_idx) -{ - struct dpu_encoder_phys *phys_enc = arg; - struct dpu_encoder_phys_cmd *cmd_enc = - to_dpu_encoder_phys_cmd(phys_enc); - unsigned long lock_flags; - int new_cnt; - - if (!cmd_enc) - return; - - phys_enc = &cmd_enc->base; - spin_lock_irqsave(phys_enc->enc_spinlock, lock_flags); - new_cnt = atomic_add_unless(&cmd_enc->autorefresh.kickoff_cnt, -1, 0); - spin_unlock_irqrestore(phys_enc->enc_spinlock, lock_flags); - - DPU_EVT32_IRQ(DRMID(phys_enc->parent), - phys_enc->hw_pp->idx - PINGPONG_0, new_cnt); - - /* Signal any waiting atomic commit thread */ - wake_up_all(&cmd_enc->autorefresh.kickoff_wq); -} - static void dpu_encoder_phys_cmd_pp_rd_ptr_irq(void *arg, int irq_idx) { struct dpu_encoder_phys *phys_enc = arg; @@ -257,10 +186,6 @@ static void _dpu_encoder_phys_cmd_setup_irq_hw_idx( irq = &phys_enc->irq[INTR_IDX_UNDERRUN]; irq->hw_idx = phys_enc->intf_idx; irq->irq_idx = -EINVAL; - - irq = &phys_enc->irq[INTR_IDX_AUTOREFRESH_DONE]; - irq->hw_idx = phys_enc->hw_pp->idx; - irq->irq_idx = -EINVAL; }

static void dpu_encoder_phys_cmd_mode_set( @@ -352,73 +277,6 @@ static int _dpu_encoder_phys_cmd_handle_ppdone_timeout( return -ETIMEDOUT; }

-static int _dpu_encoder_phys_cmd_poll_write_pointer_started( - struct dpu_encoder_phys *phys_enc) -{ - struct dpu_encoder_phys_cmd *cmd_enc = - to_dpu_encoder_phys_cmd(phys_enc); - struct dpu_hw_pingpong *hw_pp = phys_enc->hw_pp; - struct dpu_hw_pp_vsync_info info; - u32 timeout_us = DPU_ENC_WR_PTR_START_TIMEOUT_US; - int ret; - - if (!hw_pp || !hw_pp->ops.get_vsync_info || - !hw_pp->ops.poll_timeout_wr_ptr) - return 0; - - ret = hw_pp->ops.get_vsync_info(hw_pp, &info); - if (ret) - return ret; - - DPU_DEBUG_CMDENC(cmd_enc, - "pp:%d rd_ptr %d wr_ptr %d\n", - phys_enc->hw_pp->idx - PINGPONG_0, - info.rd_ptr_line_count, - info.wr_ptr_line_count); - DPU_EVT32_VERBOSE(DRMID(phys_enc->parent), - phys_enc->hw_pp->idx - PINGPONG_0, - info.wr_ptr_line_count); - - ret = hw_pp->ops.poll_timeout_wr_ptr(hw_pp, timeout_us); - if (ret) { - DPU_EVT32(DRMID(phys_enc->parent), - phys_enc->hw_pp->idx - PINGPONG_0, - timeout_us, - ret); - DPU_DBG_DUMP("all", "dbg_bus", "vbif_dbg_bus", "panic"); - } - - return ret; -} - -static bool _dpu_encoder_phys_cmd_is_ongoing_pptx( - struct dpu_encoder_phys *phys_enc) -{ - struct dpu_hw_pingpong *hw_pp; - struct dpu_hw_pp_vsync_info info; - - if (!phys_enc) - return false; - - hw_pp = phys_enc->hw_pp; - if (!hw_pp || !hw_pp->ops.get_vsync_info) - return false; - - hw_pp->ops.get_vsync_info(hw_pp, &info); - - DPU_EVT32(DRMID(phys_enc->parent), - phys_enc->hw_pp->idx - PINGPONG_0, - atomic_read(&phys_enc->pending_kickoff_cnt), - info.wr_ptr_line_count, - phys_enc->cached_mode.vdisplay); - - if (info.wr_ptr_line_count > 0 && info.wr_ptr_line_count < - phys_enc->cached_mode.vdisplay) - return true; - - return false; -} - static int _dpu_encoder_phys_cmd_wait_for_idle( struct dpu_encoder_phys *phys_enc) { @@ -446,42 +304,6 @@ static int _dpu_encoder_phys_cmd_wait_for_idle( return ret; }

-static int _dpu_encoder_phys_cmd_wait_for_autorefresh_done( - struct dpu_encoder_phys *phys_enc) -{ - struct dpu_encoder_phys_cmd *cmd_enc = - to_dpu_encoder_phys_cmd(phys_enc); - struct dpu_encoder_wait_info wait_info; - int ret = 0; - - if (!phys_enc) { - DPU_ERROR("invalid encoder\n"); - return -EINVAL; - } - - /* only master deals with autorefresh */ - if (!dpu_encoder_phys_cmd_is_master(phys_enc)) - return 0; - - wait_info.wq = &cmd_enc->autorefresh.kickoff_wq; - wait_info.atomic_cnt = &cmd_enc->autorefresh.kickoff_cnt; - wait_info.timeout_ms = _dpu_encoder_phys_cmd_get_idle_timeout(cmd_enc); - - /* wait for autorefresh kickoff to start */ - ret = dpu_encoder_helper_wait_for_irq(phys_enc, - INTR_IDX_AUTOREFRESH_DONE, &wait_info); - - /* double check that kickoff has started by reading write ptr reg */ - if (!ret) - ret = _dpu_encoder_phys_cmd_poll_write_pointer_started( - phys_enc); - else - dpu_encoder_helper_report_irq_timeout(phys_enc, - INTR_IDX_AUTOREFRESH_DONE); - - return ret; -} - static int dpu_encoder_phys_cmd_control_vblank_irq( struct dpu_encoder_phys *phys_enc, bool enable) @@ -550,20 +372,13 @@ void dpu_encoder_phys_cmd_irq_control(struct dpu_encoder_phys *phys_enc, dpu_encoder_helper_register_irq(phys_enc, INTR_IDX_UNDERRUN); dpu_encoder_phys_cmd_control_vblank_irq(phys_enc, true);

- if (dpu_encoder_phys_cmd_is_master(phys_enc)) { + if (dpu_encoder_phys_cmd_is_master(phys_enc)) dpu_encoder_helper_register_irq(phys_enc, INTR_IDX_CTL_START); - dpu_encoder_helper_register_irq(phys_enc, - INTR_IDX_AUTOREFRESH_DONE); - } - } else { - if (dpu_encoder_phys_cmd_is_master(phys_enc)) { + if (dpu_encoder_phys_cmd_is_master(phys_enc)) dpu_encoder_helper_unregister_irq(phys_enc, INTR_IDX_CTL_START); - dpu_encoder_helper_unregister_irq(phys_enc, - INTR_IDX_AUTOREFRESH_DONE); - }

dpu_encoder_helper_unregister_irq(phys_enc, INTR_IDX_UNDERRUN); dpu_encoder_phys_cmd_control_vblank_irq(phys_enc, false); @@ -736,30 +551,6 @@ static void dpu_encoder_phys_cmd_enable(struct dpu_encoder_phys *phys_enc) phys_enc->enable_state = DPU_ENC_ENABLED; }

-static bool dpu_encoder_phys_cmd_is_autorefresh_enabled( - struct dpu_encoder_phys *phys_enc) -{ - struct dpu_hw_pingpong *hw_pp; - struct dpu_hw_autorefresh cfg; - int ret; - - if (!phys_enc || !phys_enc->hw_pp) - return 0; - - if (!dpu_encoder_phys_cmd_is_master(phys_enc)) - return 0; - - hw_pp = phys_enc->hw_pp; - if (!hw_pp->ops.get_autorefresh) - return 0; - - ret = hw_pp->ops.get_autorefresh(hw_pp, &cfg); - if (ret) - return 0; - - return cfg.enable; -} - static void _dpu_encoder_phys_cmd_connect_te( struct dpu_encoder_phys *phys_enc, bool enable) { @@ -869,8 +660,7 @@ static void dpu_encoder_phys_cmd_prepare_for_kickoff( DPU_DEBUG_CMDENC(cmd_enc, "pp %d\n", phys_enc->hw_pp->idx - PINGPONG_0);

DPU_EVT32(DRMID(phys_enc->parent), phys_enc->hw_pp->idx - PINGPONG_0, - atomic_read(&phys_enc->pending_kickoff_cnt), - atomic_read(&cmd_enc->autorefresh.kickoff_cnt)); + atomic_read(&phys_enc->pending_kickoff_cnt));

/* * Mark kickoff request as outstanding. If there are more than one, @@ -954,10 +744,6 @@ static int dpu_encoder_phys_cmd_wait_for_commit_done( if (dpu_encoder_phys_cmd_is_master(phys_enc)) rc = _dpu_encoder_phys_cmd_wait_for_ctl_start(phys_enc);

- if (!rc && dpu_encoder_phys_cmd_is_master(phys_enc) && - cmd_enc->autorefresh.cfg.enable) - rc = _dpu_encoder_phys_cmd_wait_for_autorefresh_done(phys_enc); - /* required for both controllers */ if (!rc && cmd_enc->serialize_wait4pp) dpu_encoder_phys_cmd_prepare_for_kickoff(phys_enc, NULL); @@ -993,58 +779,6 @@ static int dpu_encoder_phys_cmd_wait_for_vblank( return rc; }

-static void dpu_encoder_phys_cmd_prepare_commit( - struct dpu_encoder_phys *phys_enc) -{ - struct dpu_encoder_phys_cmd *cmd_enc = - to_dpu_encoder_phys_cmd(phys_enc); - unsigned long lock_flags; - - if (!phys_enc) - return; - - if (!dpu_encoder_phys_cmd_is_master(phys_enc)) - return; - - DPU_EVT32(DRMID(phys_enc->parent), phys_enc->intf_idx - INTF_0, - cmd_enc->autorefresh.cfg.enable); - - if (!dpu_encoder_phys_cmd_is_autorefresh_enabled(phys_enc)) - return; - - /** - * Autorefresh must be disabled carefully: - * - Autorefresh must be disabled between pp_done and te - * signal prior to sdm845 targets. All targets after sdm845 - * supports autorefresh disable without turning off the - * hardware TE and pp_done wait. - * - * - Wait for TX to Complete - * Wait for PPDone confirms the last frame transfer is complete. - * - * - Leave Autorefresh Disabled - * - Assume disable of Autorefresh since it is now safe - * - Can now safely Disable Encoder, do debug printing, etc. - * without worrying that Autorefresh will kickoff - */ - - spin_lock_irqsave(phys_enc->enc_spinlock, lock_flags); - - _dpu_encoder_phys_cmd_config_autorefresh(phys_enc, 0); - - /* check for outstanding TX */ - if (_dpu_encoder_phys_cmd_is_ongoing_pptx(phys_enc)) - atomic_add_unless(&phys_enc->pending_kickoff_cnt, 1, 1); - spin_unlock_irqrestore(phys_enc->enc_spinlock, lock_flags); - - /* wait for ppdone if necessary due to catching ongoing TX */ - if (_dpu_encoder_phys_cmd_wait_for_idle(phys_enc)) - DPU_ERROR_CMDENC(cmd_enc, "pp:%d kickoff timed out\n", - phys_enc->hw_pp->idx - PINGPONG_0); - - DPU_DEBUG_CMDENC(cmd_enc, "disabled autorefresh\n"); -} - static void dpu_encoder_phys_cmd_handle_post_kickoff( struct dpu_encoder_phys *phys_enc) { @@ -1061,27 +795,15 @@ static void dpu_encoder_phys_cmd_handle_post_kickoff( static void dpu_encoder_phys_cmd_trigger_start( struct dpu_encoder_phys *phys_enc) { - struct dpu_encoder_phys_cmd *cmd_enc = - to_dpu_encoder_phys_cmd(phys_enc); - u32 frame_cnt; - if (!phys_enc) return;

- /* we don't issue CTL_START when using autorefresh */ - frame_cnt = _dpu_encoder_phys_cmd_get_autorefresh_property(phys_enc); - if (frame_cnt) { - _dpu_encoder_phys_cmd_config_autorefresh(phys_enc, frame_cnt); - atomic_inc(&cmd_enc->autorefresh.kickoff_cnt); - } else { - dpu_encoder_helper_trigger_start(phys_enc); - } + dpu_encoder_helper_trigger_start(phys_enc); }

static void dpu_encoder_phys_cmd_init_ops( struct dpu_encoder_phys_ops *ops) { - ops->prepare_commit = dpu_encoder_phys_cmd_prepare_commit; ops->is_master = dpu_encoder_phys_cmd_is_master; ops->mode_set = dpu_encoder_phys_cmd_mode_set; ops->mode_fixup = dpu_encoder_phys_cmd_mode_fixup; @@ -1100,8 +822,6 @@ static void dpu_encoder_phys_cmd_init_ops( ops->irq_control = dpu_encoder_phys_cmd_irq_control; ops->restore = dpu_encoder_phys_cmd_enable_helper; ops->prepare_idle_pc = dpu_encoder_phys_cmd_prepare_idle_pc; - ops->is_autorefresh_enabled = - dpu_encoder_phys_cmd_is_autorefresh_enabled; ops->handle_post_kickoff = dpu_encoder_phys_cmd_handle_post_kickoff; ops->get_line_count = dpu_encoder_phys_cmd_get_line_count; } @@ -1175,20 +895,12 @@ struct dpu_encoder_phys *dpu_encoder_phys_cmd_init( irq->intr_idx = INTR_IDX_UNDERRUN; irq->cb.func = dpu_encoder_phys_cmd_underrun_irq;

- irq = &phys_enc->irq[INTR_IDX_AUTOREFRESH_DONE]; - irq->name = "autorefresh_done"; - irq->intr_type = DPU_IRQ_TYPE_PING_PONG_AUTO_REF; - irq->intr_idx = INTR_IDX_AUTOREFRESH_DONE; - irq->cb.func = dpu_encoder_phys_cmd_autorefresh_done_irq; - atomic_set(&phys_enc->vblank_refcount, 0); atomic_set(&phys_enc->pending_kickoff_cnt, 0); atomic_set(&phys_enc->pending_ctlstart_cnt, 0); atomic_set(&cmd_enc->pending_vblank_cnt, 0); init_waitqueue_head(&phys_enc->pending_kickoff_wq); init_waitqueue_head(&cmd_enc->pending_vblank_wq); - atomic_set(&cmd_enc->autorefresh.kickoff_cnt, 0); - init_waitqueue_head(&cmd_enc->autorefresh.kickoff_wq);

DPU_DEBUG_CMDENC(cmd_enc, "created\n");

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c index 9308f5c..0bfb511 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c @@ -31,7 +31,6 @@ #define PP_WR_PTR_IRQ 0x024 #define PP_OUT_LINE_COUNT 0x028 #define PP_LINE_COUNT 0x02C -#define PP_AUTOREFRESH_CONFIG 0x030

#define PP_FBC_MODE 0x034 #define PP_FBC_BUDGET_CTL 0x038 @@ -93,44 +92,6 @@ static int dpu_hw_pp_setup_te_config(struct dpu_hw_pingpong *pp, return 0; }

-static int dpu_hw_pp_setup_autorefresh_config(struct dpu_hw_pingpong *pp, - struct dpu_hw_autorefresh *cfg) -{ - struct dpu_hw_blk_reg_map *c; - u32 refresh_cfg; - - if (!pp || !cfg) - return -EINVAL; - c = &pp->hw; - - if (cfg->enable) - refresh_cfg = BIT(31) | cfg->frame_count; - else - refresh_cfg = 0; - - DPU_REG_WRITE(c, PP_AUTOREFRESH_CONFIG, refresh_cfg); - DPU_EVT32(pp->idx - PINGPONG_0, refresh_cfg); - - return 0; -} - -static int dpu_hw_pp_get_autorefresh_config(struct dpu_hw_pingpong *pp, - struct dpu_hw_autorefresh *cfg) -{ - struct dpu_hw_blk_reg_map *c; - u32 val; - - if (!pp || !cfg) - return -EINVAL; - - c = &pp->hw; - val = DPU_REG_READ(c, PP_AUTOREFRESH_CONFIG); - cfg->enable = (val & BIT(31)) >> 31; - cfg->frame_count = val & 0xffff; - - return 0; -} - static int dpu_hw_pp_poll_timeout_wr_ptr(struct dpu_hw_pingpong *pp, u32 timeout_us) { @@ -293,8 +254,6 @@ static void _setup_pingpong_ops(struct dpu_hw_pingpong_ops *ops, ops->enable_tearcheck = dpu_hw_pp_enable_te; ops->connect_external_te = dpu_hw_pp_connect_external_te; ops->get_vsync_info = dpu_hw_pp_get_vsync_info; - ops->setup_autorefresh = dpu_hw_pp_setup_autorefresh_config; - ops->get_autorefresh = dpu_hw_pp_get_autorefresh_config; ops->poll_timeout_wr_ptr = dpu_hw_pp_poll_timeout_wr_ptr; ops->get_line_count = dpu_hw_pp_get_line_count;

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h index 93d03cce..7dbfcae 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h @@ -36,11 +36,6 @@ struct dpu_hw_tear_check { u8 hw_vsync_mode; };

-struct dpu_hw_autorefresh { - bool enable; - u32 frame_count; -}; - struct dpu_hw_pp_vsync_info { u32 rd_ptr_init_val; /* value of rd pointer at vsync edge */ u32 rd_ptr_frame_count; /* num frames sent since enabling interface */ @@ -55,7 +50,6 @@ struct dpu_hw_pp_vsync_info { * @setup_tearcheck : program tear check values * @enable_tearcheck : enables tear check * @get_vsync_info : retries timing info of the panel - * @setup_autorefresh : program auto refresh * @setup_dither : function to program the dither hw block * @get_line_count: obtain current vertical line counter */ @@ -88,18 +82,6 @@ struct dpu_hw_pingpong_ops { struct dpu_hw_pp_vsync_info *info);

/** - * configure and enable the autorefresh config - */ - int (*setup_autorefresh)(struct dpu_hw_pingpong *pp, - struct dpu_hw_autorefresh *cfg); - - /** - * retrieve autorefresh config from hardware - */ - int (*get_autorefresh)(struct dpu_hw_pingpong *pp, - struct dpu_hw_autorefresh *cfg); - - /** * poll until write pointer transmission starts * @Return: 0 on success, -ETIMEDOUT on timeout */

Switch DPU from dsi-staging to upstream dsi driver. To make the switch atomic, this change includes: - remove dpu connector layers - clean up dpu connector dependencies in encoder/crtc - compile out writeback and display port drivers - compile out dsi-staging driver (separate patch submitted to remove the driver) - adapt upstream device hierarchy

changes in v2: - remove files not applicable upstream (Sean Paul) - remove compiled out non-dsi display init (Sean Paul) - split unrelated changes into separate patch set (Sean Paul) changes in v3: - fix compilation warning - compile out dsi staging changes in v4: - remove top_ctrl check in rm release

Signed-off-by: Jeykumar Sankaran jsanka@codeaurora.org Signed-off-by: Sean Paul seanpaul@chromium.org Signed-off-by: Rajesh Yadav ryadav@codeaurora.org --- drivers/gpu/drm/msm/Makefile | 22 - drivers/gpu/drm/msm/disp/dpu1/dpu_connector.c | 1185 -------------------- drivers/gpu/drm/msm/disp/dpu1/dpu_connector.h | 555 --------- drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 9 - drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 179 +-- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h | 10 +- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 8 +- .../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 6 +- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 488 +------- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 6 - drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 65 +- drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 11 + drivers/gpu/drm/msm/dpu_dbg.c | 3 - drivers/gpu/drm/msm/msm_drv.c | 47 +- drivers/gpu/drm/msm/msm_drv.h | 39 - 15 files changed, 159 insertions(+), 2474 deletions(-) delete mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_connector.c delete mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_connector.h

diff --git a/drivers/gpu/drm/msm/Makefile b/drivers/gpu/drm/msm/Makefile index d947f2a..d7558ed 100644 --- a/drivers/gpu/drm/msm/Makefile +++ b/drivers/gpu/drm/msm/Makefile @@ -1,7 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 ccflags-y := -Idrivers/gpu/drm/msm ccflags-y += -Idrivers/gpu/drm/msm/disp/dpu1 -ccflags-y += -Idrivers/gpu/drm/msm/dsi-staging ccflags-$(CONFIG_DRM_MSM_DSI) += -Idrivers/gpu/drm/msm/dsi

msm-y := \ @@ -48,7 +47,6 @@ msm-y := \ disp/mdp5/mdp5_plane.o \ disp/mdp5/mdp5_smp.o \ disp/dpu1/dpu_color_processing.o \ - disp/dpu1/dpu_connector.o \ disp/dpu1/dpu_core_irq.o \ disp/dpu1/dpu_core_perf.o \ disp/dpu1/dpu_crtc.o \ @@ -141,26 +139,6 @@ msm-$(CONFIG_DRM_MSM_DSI) += dsi/dsi.o \ dsi/phy/dsi_phy.o \ disp/mdp5/mdp5_cmd_encoder.o

-msm-$(CONFIG_DRM_MSM_DSI_STAGING) += dsi-staging/dsi_phy.o \ - dsi-staging/dsi_pwr.o \ - dsi-staging/dsi_phy.o \ - dsi-staging/dsi_phy_hw_v2_0.o \ - dsi-staging/dsi_phy_hw_v3_0.o \ - dsi-staging/dsi_phy_timing_calc.o \ - dsi-staging/dsi_phy_timing_v2_0.o \ - dsi-staging/dsi_phy_timing_v3_0.o \ - dsi-staging/dsi_ctrl_hw_cmn.o \ - dsi-staging/dsi_ctrl_hw_1_4.o \ - dsi-staging/dsi_ctrl_hw_2_0.o \ - dsi-staging/dsi_ctrl_hw_2_2.o \ - dsi-staging/dsi_ctrl.o \ - dsi-staging/dsi_catalog.o \ - dsi-staging/dsi_drm.o \ - dsi-staging/dsi_display.o \ - dsi-staging/dsi_panel.o \ - dsi-staging/dsi_clk_manager.o \ - dsi-staging/dsi_display_test.o - msm-$(CONFIG_DRM_MSM_DSI_28NM_PHY) += dsi/phy/dsi_phy_28nm.o msm-$(CONFIG_DRM_MSM_DSI_20NM_PHY) += dsi/phy/dsi_phy_20nm.o msm-$(CONFIG_DRM_MSM_DSI_28NM_8960_PHY) += dsi/phy/dsi_phy_28nm_8960.o diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_connector.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_connector.c deleted file mode 100644 index 969919f..0000000 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_connector.c +++ /dev/null @@ -1,1185 +0,0 @@ -/* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#define pr_fmt(fmt) "[drm:%s:%d] " fmt, __func__, __LINE__ -#include "msm_drv.h" -#include "dpu_dbg.h" - -#include "dpu_kms.h" -#include "dpu_connector.h" -#ifdef CONFIG_DRM_MSM_DSI_STAGING -#include <linux/backlight.h> -#include "dsi_drm.h" -#include "dsi_display.h" -#endif - -#define BL_NODE_NAME_SIZE 32 - -#define DPU_DEBUG_CONN(c, fmt, ...) DPU_DEBUG("conn%d " fmt,\ - (c) ? (c)->base.base.id : -1, ##__VA_ARGS__) - -#define DPU_ERROR_CONN(c, fmt, ...) DPU_ERROR("conn%d " fmt,\ - (c) ? (c)->base.base.id : -1, ##__VA_ARGS__) - -static const struct drm_prop_enum_list e_topology_name[] = { - {DPU_RM_TOPOLOGY_NONE, "dpu_none"}, - {DPU_RM_TOPOLOGY_SINGLEPIPE, "dpu_singlepipe"}, - {DPU_RM_TOPOLOGY_DUALPIPE, "dpu_dualpipe"}, - {DPU_RM_TOPOLOGY_DUALPIPE_3DMERGE, "dpu_dualpipemerge"}, -}; - -static const struct drm_prop_enum_list e_topology_control[] = { - {DPU_RM_TOPCTL_RESERVE_LOCK, "reserve_lock"}, - {DPU_RM_TOPCTL_RESERVE_CLEAR, "reserve_clear"}, - {DPU_RM_TOPCTL_DSPP, "dspp"}, -}; -static const struct drm_prop_enum_list e_power_mode[] = { - {DPU_MODE_DPMS_ON, "ON"}, - {DPU_MODE_DPMS_LP1, "LP1"}, - {DPU_MODE_DPMS_LP2, "LP2"}, - {DPU_MODE_DPMS_OFF, "OFF"}, -}; - -#ifdef CONFIG_DRM_MSM_DSI_STAGING -static int dpu_backlight_device_update_status(struct backlight_device *bd) -{ - int brightness; - struct dsi_display *display; - struct dpu_connector *c_conn; - int bl_lvl; - struct drm_event event; - - brightness = bd->props.brightness; - - if ((bd->props.power != FB_BLANK_UNBLANK) || - (bd->props.state & BL_CORE_FBBLANK) || - (bd->props.state & BL_CORE_SUSPENDED)) - brightness = 0; - - c_conn = bl_get_data(bd); - display = (struct dsi_display *) c_conn->display; - if (brightness > display->panel->bl_config.bl_max_level) - brightness = display->panel->bl_config.bl_max_level; - - /* map UI brightness into driver backlight level with rounding */ - bl_lvl = mult_frac(brightness, display->panel->bl_config.bl_max_level, - display->panel->bl_config.brightness_max_level); - - if (!bl_lvl && brightness) - bl_lvl = 1; - - if (c_conn->ops.set_backlight) { - event.type = DRM_EVENT_SYS_BACKLIGHT; - event.length = sizeof(u32); - msm_mode_object_event_notify(&c_conn->base.base, - c_conn->base.dev, &event, (u8 *)&brightness); - c_conn->ops.set_backlight(c_conn->display, bl_lvl); - } - - return 0; -} - -static int dpu_backlight_device_get_brightness(struct backlight_device *bd) -{ - return 0; -} - -static const struct backlight_ops dpu_backlight_device_ops = { - .update_status = dpu_backlight_device_update_status, - .get_brightness = dpu_backlight_device_get_brightness, -}; - -static int dpu_backlight_setup(struct dpu_connector *c_conn, - struct drm_device *dev) -{ - struct backlight_properties props; - struct dsi_display *display; - struct dsi_backlight_config *bl_config; - static int display_count; - char bl_node_name[BL_NODE_NAME_SIZE]; - - if (!c_conn || !dev || !dev->dev) { - DPU_ERROR("invalid param\n"); - return -EINVAL; - } else if (c_conn->connector_type != DRM_MODE_CONNECTOR_DSI) { - return 0; - } - - memset(&props, 0, sizeof(props)); - props.type = BACKLIGHT_RAW; - props.power = FB_BLANK_UNBLANK; - - display = (struct dsi_display *) c_conn->display; - bl_config = &display->panel->bl_config; - props.max_brightness = bl_config->brightness_max_level; - props.brightness = bl_config->brightness_max_level; - snprintf(bl_node_name, BL_NODE_NAME_SIZE, "panel%u-backlight", - display_count); - c_conn->bl_device = backlight_device_register(bl_node_name, dev->dev, - c_conn, &dpu_backlight_device_ops, &props); - if (IS_ERR_OR_NULL(c_conn->bl_device)) { - DPU_ERROR("Failed to register backlight: %ld\n", - PTR_ERR(c_conn->bl_device)); - c_conn->bl_device = NULL; - return -ENODEV; - } - display_count++; - - return 0; -} -#endif - -int dpu_connector_trigger_event(void *drm_connector, - uint32_t event_idx, uint32_t instance_idx, - uint32_t data0, uint32_t data1, - uint32_t data2, uint32_t data3) -{ - struct dpu_connector *c_conn; - unsigned long irq_flags; - void (*cb_func)(uint32_t event_idx, - uint32_t instance_idx, void *usr, - uint32_t data0, uint32_t data1, - uint32_t data2, uint32_t data3); - void *usr; - int rc = 0; - - /* - * This function may potentially be called from an ISR context, so - * avoid excessive logging/etc. - */ - if (!drm_connector) - return -EINVAL; - else if (event_idx >= DPU_CONN_EVENT_COUNT) - return -EINVAL; - c_conn = to_dpu_connector(drm_connector); - - spin_lock_irqsave(&c_conn->event_lock, irq_flags); - cb_func = c_conn->event_table[event_idx].cb_func; - usr = c_conn->event_table[event_idx].usr; - spin_unlock_irqrestore(&c_conn->event_lock, irq_flags); - - if (cb_func) - cb_func(event_idx, instance_idx, usr, - data0, data1, data2, data3); - else - rc = -EAGAIN; - - return rc; -} - -int dpu_connector_register_event(struct drm_connector *connector, - uint32_t event_idx, - void (*cb_func)(uint32_t event_idx, - uint32_t instance_idx, void *usr, - uint32_t data0, uint32_t data1, - uint32_t data2, uint32_t data3), - void *usr) -{ - struct dpu_connector *c_conn; - unsigned long irq_flags; - - if (!connector) { - DPU_ERROR("invalid connector\n"); - return -EINVAL; - } else if (event_idx >= DPU_CONN_EVENT_COUNT) { - DPU_ERROR("conn%d, invalid event %d\n", - connector->base.id, event_idx); - return -EINVAL; - } - c_conn = to_dpu_connector(connector); - - spin_lock_irqsave(&c_conn->event_lock, irq_flags); - c_conn->event_table[event_idx].cb_func = cb_func; - c_conn->event_table[event_idx].usr = usr; - spin_unlock_irqrestore(&c_conn->event_lock, irq_flags); - - /* optionally notify display of event registration */ - if (c_conn->ops.enable_event && c_conn->display) - c_conn->ops.enable_event(connector, event_idx, - cb_func != NULL, c_conn->display); - return 0; -} - -void dpu_connector_unregister_event(struct drm_connector *connector, - uint32_t event_idx) -{ - (void)dpu_connector_register_event(connector, event_idx, 0, 0); -} - -#ifdef CONFIG_DRM_MSM_DSI_STAGING -static u32 dither_matrix[DITHER_MATRIX_SZ] = { - 15, 7, 13, 5, 3, 11, 1, 9, 12, 4, 14, 6, 0, 8, 2, 10 -}; - -static int _dpu_connector_get_default_dither_cfg_v1( - struct dpu_connector *c_conn, void *cfg) -{ - struct drm_msm_dither *dither_cfg = (struct drm_msm_dither *)cfg; - enum dsi_pixel_format dst_format = DSI_PIXEL_FORMAT_MAX; - - if (!c_conn || !cfg) { - DPU_ERROR("invalid argument(s), c_conn %pK, cfg %pK\n", - c_conn, cfg); - return -EINVAL; - } - - if (!c_conn->ops.get_dst_format) { - DPU_DEBUG("get_dst_format is unavailable\n"); - return 0; - } - - dst_format = c_conn->ops.get_dst_format(c_conn->display); - switch (dst_format) { - case DSI_PIXEL_FORMAT_RGB888: - dither_cfg->c0_bitdepth = 8; - dither_cfg->c1_bitdepth = 8; - dither_cfg->c2_bitdepth = 8; - dither_cfg->c3_bitdepth = 8; - break; - case DSI_PIXEL_FORMAT_RGB666: - case DSI_PIXEL_FORMAT_RGB666_LOOSE: - dither_cfg->c0_bitdepth = 6; - dither_cfg->c1_bitdepth = 6; - dither_cfg->c2_bitdepth = 6; - dither_cfg->c3_bitdepth = 6; - break; - default: - DPU_DEBUG("no default dither config for dst_format %d\n", - dst_format); - return -ENODATA; - } - - memcpy(&dither_cfg->matrix, dither_matrix, - sizeof(u32) * DITHER_MATRIX_SZ); - dither_cfg->temporal_en = 0; - return 0; -} - -static void _dpu_connector_install_dither_property(struct drm_device *dev, - struct dpu_kms *dpu_kms, struct dpu_connector *c_conn) -{ - char prop_name[DRM_PROP_NAME_LEN]; - struct dpu_mdss_cfg *catalog = NULL; - struct drm_property_blob *blob_ptr; - void *cfg; - int ret = 0; - u32 version = 0, len = 0; - bool defalut_dither_needed = false; - - if (!dev || !dpu_kms || !c_conn) { - DPU_ERROR("invld args (s), dev %pK, dpu_kms %pK, c_conn %pK\n", - dev, dpu_kms, c_conn); - return; - } - - catalog = dpu_kms->catalog; - version = DPU_COLOR_PROCESS_MAJOR( - catalog->pingpong[0].sblk->dither.version); - snprintf(prop_name, ARRAY_SIZE(prop_name), "%s%d", - "DPU_PP_DITHER_V", version); - switch (version) { - case 1: - msm_property_install_blob(&c_conn->property_info, prop_name, - DRM_MODE_PROP_BLOB, - CONNECTOR_PROP_PP_DITHER); - len = sizeof(struct drm_msm_dither); - cfg = kzalloc(len, GFP_KERNEL); - if (!cfg) - return; - - ret = _dpu_connector_get_default_dither_cfg_v1(c_conn, cfg); - if (!ret) - defalut_dither_needed = true; - break; - default: - DPU_ERROR("unsupported dither version %d\n", version); - return; - } - - if (defalut_dither_needed) { - blob_ptr = drm_property_create_blob(dev, len, cfg); - if (IS_ERR_OR_NULL(blob_ptr)) - goto exit; - c_conn->blob_dither = blob_ptr; - } -exit: - kfree(cfg); -} -#endif - -int dpu_connector_get_dither_cfg(struct drm_connector *conn, - struct drm_connector_state *state, void **cfg, - size_t *len) -{ - struct dpu_connector *c_conn = NULL; - struct dpu_connector_state *c_state = NULL; - size_t dither_sz = 0; - - if (!conn || !state || !(*cfg)) - return -EINVAL; - - c_conn = to_dpu_connector(conn); - c_state = to_dpu_connector_state(state); - - /* try to get user config data first */ - *cfg = msm_property_get_blob(&c_conn->property_info, - &c_state->property_state, - &dither_sz, - CONNECTOR_PROP_PP_DITHER); - /* if user config data doesn't exist, use default dither blob */ - if (*cfg == NULL && c_conn->blob_dither) { - *cfg = &c_conn->blob_dither->data; - dither_sz = c_conn->blob_dither->length; - } - *len = dither_sz; - return 0; -} - -int dpu_connector_get_info(struct drm_connector *connector, - struct msm_display_info *info) -{ - struct dpu_connector *c_conn; - - if (!connector || !info) { - DPU_ERROR("invalid argument(s), conn %pK, info %pK\n", - connector, info); - return -EINVAL; - } - - c_conn = to_dpu_connector(connector); - - if (!c_conn->display || !c_conn->ops.get_info) { - DPU_ERROR("display info not supported for %pK\n", - c_conn->display); - return -EINVAL; - } - - return c_conn->ops.get_info(info, c_conn->display); -} - -static int _dpu_connector_update_power_locked(struct dpu_connector *c_conn) -{ - struct drm_connector *connector; - void *display; - int (*set_power)(struct drm_connector *, int, void *); - int mode, rc = 0; - - if (!c_conn) - return -EINVAL; - connector = &c_conn->base; - - switch (c_conn->dpms_mode) { - case DRM_MODE_DPMS_ON: - mode = c_conn->lp_mode; - break; - case DRM_MODE_DPMS_STANDBY: - mode = DPU_MODE_DPMS_STANDBY; - break; - case DRM_MODE_DPMS_SUSPEND: - mode = DPU_MODE_DPMS_SUSPEND; - break; - case DRM_MODE_DPMS_OFF: - mode = DPU_MODE_DPMS_OFF; - break; - default: - mode = c_conn->lp_mode; - DPU_ERROR("conn %d dpms set to unrecognized mode %d\n", - connector->base.id, mode); - break; - } - - DPU_EVT32(connector->base.id, c_conn->dpms_mode, c_conn->lp_mode, mode); - DPU_DEBUG("conn %d - dpms %d, lp %d, panel %d\n", connector->base.id, - c_conn->dpms_mode, c_conn->lp_mode, mode); - - if (mode != c_conn->last_panel_power_mode && c_conn->ops.set_power) { - display = c_conn->display; - set_power = c_conn->ops.set_power; - - mutex_unlock(&c_conn->lock); - rc = set_power(connector, mode, display); - mutex_lock(&c_conn->lock); - } - c_conn->last_panel_power_mode = mode; - - return rc; -} - -int dpu_connector_pre_kickoff(struct drm_connector *connector) -{ - struct dpu_connector *c_conn; - struct dpu_connector_state *c_state; - int idx, rc = 0; - - if (!connector) { - DPU_ERROR("invalid argument\n"); - return -EINVAL; - } - - c_conn = to_dpu_connector(connector); - c_state = to_dpu_connector_state(connector->state); - - if (!c_conn->display) { - DPU_ERROR("invalid argument\n"); - return -EINVAL; - } -#ifdef CONFIG_DRM_MSM_DSI_STAGING - if (c_conn->ops.set_backlight) { - DPU_DEBUG("conn%d: Set backlight to 255\n", connector->base.id); - c_conn->ops.set_backlight(c_conn->display, 255); - } -#endif - - while ((idx = msm_property_pop_dirty(&c_conn->property_info, - &c_state->property_state)) >= 0) { - switch (idx) { - case CONNECTOR_PROP_LP: - mutex_lock(&c_conn->lock); - c_conn->lp_mode = dpu_connector_get_property( - connector->state, CONNECTOR_PROP_LP); - _dpu_connector_update_power_locked(c_conn); - mutex_unlock(&c_conn->lock); - break; - default: - /* nothing to do for most properties */ - break; - } - } - - DPU_EVT32_VERBOSE(connector->base.id); - - return rc; -} - -void dpu_connector_clk_ctrl(struct drm_connector *connector, bool enable) -{ -#ifdef CONFIG_DRM_MSM_DSI_STAGING - struct dpu_connector *c_conn; - struct dsi_display *display; - u32 state = enable ? DSI_CLK_ON : DSI_CLK_OFF; - - if (!connector) { - DPU_ERROR("invalid connector\n"); - return; - } - - c_conn = to_dpu_connector(connector); - display = (struct dsi_display *) c_conn->display; - - if (display && c_conn->ops.clk_ctrl) - c_conn->ops.clk_ctrl(display->mdp_clk_handle, - DSI_ALL_CLKS, state); -#endif -} - -static void dpu_connector_destroy(struct drm_connector *connector) -{ - struct dpu_connector *c_conn; - - if (!connector) { - DPU_ERROR("invalid connector\n"); - return; - } - - c_conn = to_dpu_connector(connector); - - if (c_conn->ops.put_modes) - c_conn->ops.put_modes(connector, c_conn->display); - - if (c_conn->blob_caps) - drm_property_blob_put(c_conn->blob_caps); - if (c_conn->blob_hdr) - drm_property_blob_put(c_conn->blob_hdr); - if (c_conn->blob_dither) - drm_property_blob_put(c_conn->blob_dither); - msm_property_destroy(&c_conn->property_info); - - if (c_conn->bl_device) - backlight_device_unregister(c_conn->bl_device); - drm_connector_unregister(connector); - mutex_destroy(&c_conn->lock); - drm_connector_cleanup(connector); - kfree(c_conn); -} - -/** - * _dpu_connector_destroy_fb - clean up connector state's out_fb buffer - * @c_conn: Pointer to dpu connector structure - * @c_state: Pointer to dpu connector state structure - */ -static void _dpu_connector_destroy_fb(struct dpu_connector *c_conn, - struct dpu_connector_state *c_state) -{ - if (!c_state || !c_state->out_fb) { - DPU_ERROR("invalid state %pK\n", c_state); - return; - } - - drm_framebuffer_put(c_state->out_fb); - c_state->out_fb = NULL; - - if (c_conn) - c_state->property_values[CONNECTOR_PROP_OUT_FB].value = - msm_property_get_default(&c_conn->property_info, - CONNECTOR_PROP_OUT_FB); - else - c_state->property_values[CONNECTOR_PROP_OUT_FB].value = ~0; -} - -static void dpu_connector_atomic_destroy_state(struct drm_connector *connector, - struct drm_connector_state *state) -{ - struct dpu_connector *c_conn = NULL; - struct dpu_connector_state *c_state = NULL; - - if (!state) { - DPU_ERROR("invalid state\n"); - return; - } - - /* - * The base DRM framework currently always passes in a NULL - * connector pointer. This is not correct, but attempt to - * handle that case as much as possible. - */ - if (connector) - c_conn = to_dpu_connector(connector); - c_state = to_dpu_connector_state(state); - - if (c_state->out_fb) - _dpu_connector_destroy_fb(c_conn, c_state); - - if (!c_conn) { - kfree(c_state); - } else { - /* destroy value helper */ - msm_property_destroy_state(&c_conn->property_info, c_state, - &c_state->property_state); - } -} - -static void dpu_connector_atomic_reset(struct drm_connector *connector) -{ - struct dpu_connector *c_conn; - struct dpu_connector_state *c_state; - - if (!connector) { - DPU_ERROR("invalid connector\n"); - return; - } - - c_conn = to_dpu_connector(connector); - - if (connector->state) { - dpu_connector_atomic_destroy_state(connector, connector->state); - connector->state = 0; - } - - c_state = msm_property_alloc_state(&c_conn->property_info); - if (!c_state) { - DPU_ERROR("state alloc failed\n"); - return; - } - - /* reset value helper, zero out state structure and reset properties */ - msm_property_reset_state(&c_conn->property_info, c_state, - &c_state->property_state, - c_state->property_values); - - c_state->base.connector = connector; - connector->state = &c_state->base; -} - -static struct drm_connector_state * -dpu_connector_atomic_duplicate_state(struct drm_connector *connector) -{ - struct dpu_connector *c_conn; - struct dpu_connector_state *c_state, *c_oldstate; - - if (!connector || !connector->state) { - DPU_ERROR("invalid connector %pK\n", connector); - return NULL; - } - - c_conn = to_dpu_connector(connector); - c_oldstate = to_dpu_connector_state(connector->state); - c_state = msm_property_alloc_state(&c_conn->property_info); - if (!c_state) { - DPU_ERROR("state alloc failed\n"); - return NULL; - } - - /* duplicate value helper */ - msm_property_duplicate_state(&c_conn->property_info, - c_oldstate, c_state, - &c_state->property_state, c_state->property_values); - - /* additional handling for drm framebuffer objects */ - if (c_state->out_fb) - drm_framebuffer_get(c_state->out_fb); - - return &c_state->base; -} - -static int _dpu_connector_update_bl_scale(struct dpu_connector *c_conn, - int idx, - uint64_t value) -{ -#ifdef CONFIG_DRM_MSM_DSI_STAGING - struct dsi_display *dsi_display = c_conn->display; - struct dsi_backlight_config *bl_config; - int rc = 0; - - if (!dsi_display || !dsi_display->panel) { - pr_err("Invalid params(s) dsi_display %pK, panel %pK\n", - dsi_display, - ((dsi_display) ? dsi_display->panel : NULL)); - return -EINVAL; - } - - bl_config = &dsi_display->panel->bl_config; - if (idx == CONNECTOR_PROP_BL_SCALE) { - bl_config->bl_scale = value; - if (value > MAX_BL_SCALE_LEVEL) - bl_config->bl_scale = MAX_BL_SCALE_LEVEL; - DPU_DEBUG("set to panel: bl_scale = %u, bl_level = %u\n", - bl_config->bl_scale, bl_config->bl_level); - rc = c_conn->ops.set_backlight(dsi_display, - bl_config->bl_level); - } else if (idx == CONNECTOR_PROP_AD_BL_SCALE) { - bl_config->bl_scale_ad = value; - if (value > MAX_AD_BL_SCALE_LEVEL) - bl_config->bl_scale_ad = MAX_AD_BL_SCALE_LEVEL; - DPU_DEBUG("set to panel: bl_scale_ad = %u, bl_level = %u\n", - bl_config->bl_scale_ad, bl_config->bl_level); - rc = c_conn->ops.set_backlight(dsi_display, - bl_config->bl_level); - } - return rc; -#else - return 0; -#endif -} - -static int dpu_connector_atomic_set_property(struct drm_connector *connector, - struct drm_connector_state *state, - struct drm_property *property, - uint64_t val) -{ - struct dpu_connector *c_conn; - struct dpu_connector_state *c_state; - int idx, rc; - - if (!connector || !state || !property) { - DPU_ERROR("invalid argument(s), conn %pK, state %pK, prp %pK\n", - connector, state, property); - return -EINVAL; - } - - c_conn = to_dpu_connector(connector); - c_state = to_dpu_connector_state(state); - - /* generic property handling */ - rc = msm_property_atomic_set(&c_conn->property_info, - &c_state->property_state, property, val); - if (rc) - goto end; - - /* connector-specific property handling */ - idx = msm_property_index(&c_conn->property_info, property); - switch (idx) { - case CONNECTOR_PROP_OUT_FB: - /* clear old fb, if present */ - if (c_state->out_fb) - _dpu_connector_destroy_fb(c_conn, c_state); - - /* convert fb val to drm framebuffer and prepare it */ - c_state->out_fb = - drm_framebuffer_lookup(connector->dev, NULL, val); - if (!c_state->out_fb && val) { - DPU_ERROR("failed to look up fb %lld\n", val); - rc = -EFAULT; - } else if (!c_state->out_fb && !val) { - DPU_DEBUG("cleared fb_id\n"); - rc = 0; - } - break; - case CONNECTOR_PROP_BL_SCALE: - case CONNECTOR_PROP_AD_BL_SCALE: - rc = _dpu_connector_update_bl_scale(c_conn, idx, val); - break; - default: - break; - } - - /* check for custom property handling */ - if (!rc && c_conn->ops.set_property) { - rc = c_conn->ops.set_property(connector, - state, - idx, - val, - c_conn->display); - - /* potentially clean up out_fb if rc != 0 */ - if ((idx == CONNECTOR_PROP_OUT_FB) && rc) - _dpu_connector_destroy_fb(c_conn, c_state); - } -end: - return rc; -} - -static int dpu_connector_set_property(struct drm_connector *connector, - struct drm_property *property, - uint64_t val) -{ - if (!connector) { - DPU_ERROR("invalid connector\n"); - return -EINVAL; - } - - return dpu_connector_atomic_set_property(connector, - connector->state, property, val); -} - -static int dpu_connector_atomic_get_property(struct drm_connector *connector, - const struct drm_connector_state *state, - struct drm_property *property, - uint64_t *val) -{ - struct dpu_connector *c_conn; - struct dpu_connector_state *c_state; - int idx, rc = -EINVAL; - - if (!connector || !state) { - DPU_ERROR("invalid argument(s), conn %pK, state %pK\n", - connector, state); - return -EINVAL; - } - - c_conn = to_dpu_connector(connector); - c_state = to_dpu_connector_state(state); - - idx = msm_property_index(&c_conn->property_info, property); - /* get cached property value */ - rc = msm_property_atomic_get(&c_conn->property_info, - &c_state->property_state, property, val); - - /* allow for custom override */ - if (c_conn->ops.get_property) - rc = c_conn->ops.get_property(connector, - (struct drm_connector_state *)state, - idx, - val, - c_conn->display); - return rc; -} - -static enum drm_connector_status -dpu_connector_detect(struct drm_connector *connector, bool force) -{ - enum drm_connector_status status = connector_status_unknown; - struct dpu_connector *c_conn; - - if (!connector) { - DPU_ERROR("invalid connector\n"); - return status; - } - - c_conn = to_dpu_connector(connector); - - if (c_conn->ops.detect) - status = c_conn->ops.detect(connector, - force, - c_conn->display); - - return status; -} - -int dpu_connector_get_dpms(struct drm_connector *connector) -{ - struct dpu_connector *c_conn; - int rc; - - if (!connector) { - DPU_DEBUG("invalid connector\n"); - return DRM_MODE_DPMS_OFF; - } - - c_conn = to_dpu_connector(connector); - - mutex_lock(&c_conn->lock); - rc = c_conn->dpms_mode; - mutex_unlock(&c_conn->lock); - - return rc; -} - -int dpu_connector_set_property_for_commit(struct drm_connector *connector, - struct drm_atomic_state *atomic_state, - uint32_t property_idx, uint64_t value) -{ - struct drm_connector_state *state; - struct drm_property *property; - struct dpu_connector *c_conn; - - if (!connector || !atomic_state) { - DPU_ERROR("invalid argument(s), conn %d, state %d\n", - connector != NULL, atomic_state != NULL); - return -EINVAL; - } - - c_conn = to_dpu_connector(connector); - property = msm_property_index_to_drm_property( - &c_conn->property_info, property_idx); - if (!property) { - DPU_ERROR("invalid property index %d\n", property_idx); - return -EINVAL; - } - - state = drm_atomic_get_connector_state(atomic_state, connector); - if (IS_ERR_OR_NULL(state)) { - DPU_ERROR("failed to get conn %d state\n", - connector->base.id); - return -EINVAL; - } - - return dpu_connector_atomic_set_property( - connector, state, property, value); -} - -#ifdef CONFIG_DEBUG_FS -/** - * dpu_connector_init_debugfs - initialize connector debugfs - * @connector: Pointer to drm connector - */ -static int dpu_connector_init_debugfs(struct drm_connector *connector) -{ - struct dpu_connector *dpu_connector; - - if (!connector || !connector->debugfs_entry) { - DPU_ERROR("invalid connector\n"); - return -EINVAL; - } - - dpu_connector = to_dpu_connector(connector); - - if (!debugfs_create_bool("fb_kmap", 0600, connector->debugfs_entry, - &dpu_connector->fb_kmap)) { - DPU_ERROR("failed to create connector fb_kmap\n"); - return -ENOMEM; - } - - return 0; -} -#else -static int dpu_connector_init_debugfs(struct drm_connector *connector) -{ - return 0; -} -#endif - -static int dpu_connector_late_register(struct drm_connector *connector) -{ - return dpu_connector_init_debugfs(connector); -} - -static void dpu_connector_early_unregister(struct drm_connector *connector) -{ - /* debugfs under connector->debugfs are deleted by drm_debugfs */ -} - -static const struct drm_connector_funcs dpu_connector_ops = { - .reset = dpu_connector_atomic_reset, - .detect = dpu_connector_detect, - .destroy = dpu_connector_destroy, - .fill_modes = drm_helper_probe_single_connector_modes, - .atomic_duplicate_state = dpu_connector_atomic_duplicate_state, - .atomic_destroy_state = dpu_connector_atomic_destroy_state, - .atomic_set_property = dpu_connector_atomic_set_property, - .atomic_get_property = dpu_connector_atomic_get_property, - .set_property = dpu_connector_set_property, - .late_register = dpu_connector_late_register, - .early_unregister = dpu_connector_early_unregister, -}; - -static int dpu_connector_get_modes(struct drm_connector *connector) -{ - struct dpu_connector *c_conn; - - if (!connector) { - DPU_ERROR("invalid connector\n"); - return 0; - } - - c_conn = to_dpu_connector(connector); - if (!c_conn->ops.get_modes) { - DPU_DEBUG("missing get_modes callback\n"); - return 0; - } - - return c_conn->ops.get_modes(connector, c_conn->display); -} - -static enum drm_mode_status -dpu_connector_mode_valid(struct drm_connector *connector, - struct drm_display_mode *mode) -{ - struct dpu_connector *c_conn; - - if (!connector || !mode) { - DPU_ERROR("invalid argument(s), conn %pK, mode %pK\n", - connector, mode); - return MODE_ERROR; - } - - c_conn = to_dpu_connector(connector); - - if (c_conn->ops.mode_valid) - return c_conn->ops.mode_valid(connector, mode, c_conn->display); - - /* assume all modes okay by default */ - return MODE_OK; -} - -static struct drm_encoder * -dpu_connector_best_encoder(struct drm_connector *connector) -{ - struct dpu_connector *c_conn = to_dpu_connector(connector); - - if (!connector) { - DPU_ERROR("invalid connector\n"); - return NULL; - } - - /* - * This is true for now, revisit this code when multiple encoders are - * supported. - */ - return c_conn->encoder; -} - -static const struct drm_connector_helper_funcs dpu_connector_helper_ops = { - .get_modes = dpu_connector_get_modes, - .mode_valid = dpu_connector_mode_valid, - .best_encoder = dpu_connector_best_encoder, -}; - -struct drm_connector *dpu_connector_init(struct drm_device *dev, - struct drm_encoder *encoder, - struct drm_panel *panel, - void *display, - const struct dpu_connector_ops *ops, - int connector_poll, - int connector_type) -{ - struct msm_drm_private *priv; - struct dpu_kms *dpu_kms; - struct dpu_kms_info *info; - struct dpu_connector *c_conn = NULL; - struct msm_display_info display_info; - int rc; - - if (!dev || !dev->dev_private || !encoder) { - DPU_ERROR("invalid argument(s), dev %pK, enc %pK\n", - dev, encoder); - return ERR_PTR(-EINVAL); - } - - priv = dev->dev_private; - if (!priv->kms) { - DPU_ERROR("invalid kms reference\n"); - return ERR_PTR(-EINVAL); - } - - c_conn = kzalloc(sizeof(*c_conn), GFP_KERNEL); - if (!c_conn) { - DPU_ERROR("failed to alloc dpu connector\n"); - return ERR_PTR(-ENOMEM); - } - - memset(&display_info, 0, sizeof(display_info)); - - rc = drm_connector_init(dev, - &c_conn->base, - &dpu_connector_ops, - connector_type); - if (rc) - goto error_free_conn; - - spin_lock_init(&c_conn->event_lock); - - c_conn->connector_type = connector_type; - c_conn->encoder = encoder; - c_conn->panel = panel; - c_conn->display = display; - - c_conn->dpms_mode = DRM_MODE_DPMS_ON; - c_conn->lp_mode = 0; - c_conn->last_panel_power_mode = DPU_MODE_DPMS_ON; - - dpu_kms = to_dpu_kms(priv->kms); - - if (ops) - c_conn->ops = *ops; - - c_conn->base.helper_private = &dpu_connector_helper_ops; - c_conn->base.polled = connector_poll; - c_conn->base.interlace_allowed = 0; - c_conn->base.doublescan_allowed = 0; - - snprintf(c_conn->name, - DPU_CONNECTOR_NAME_SIZE, - "conn%u", - c_conn->base.base.id); - - mutex_init(&c_conn->lock); - - rc = drm_mode_connector_attach_encoder(&c_conn->base, encoder); - if (rc) { - DPU_ERROR("failed to attach encoder to connector, %d\n", rc); - goto error_cleanup_conn; - } - -#ifdef CONFIG_DRM_MSM_DSI_STAGING - rc = dpu_backlight_setup(c_conn, dev); - if (rc) { - DPU_ERROR("failed to setup backlight, rc=%d\n", rc); - goto error_cleanup_conn; - } -#endif - - /* create properties */ - msm_property_init(&c_conn->property_info, &c_conn->base.base, dev, - priv->conn_property, c_conn->property_data, - CONNECTOR_PROP_COUNT, CONNECTOR_PROP_BLOBCOUNT, - sizeof(struct dpu_connector_state)); - - if (c_conn->ops.post_init) { - info = kmalloc(sizeof(*info), GFP_KERNEL); - if (!info) { - DPU_ERROR("failed to allocate info buffer\n"); - rc = -ENOMEM; - goto error_cleanup_conn; - } - - dpu_kms_info_reset(info); - rc = c_conn->ops.post_init(&c_conn->base, info, display); - if (rc) { - DPU_ERROR("post-init failed, %d\n", rc); - kfree(info); - goto error_cleanup_conn; - } - - msm_property_install_blob(&c_conn->property_info, - "capabilities", - DRM_MODE_PROP_IMMUTABLE, - CONNECTOR_PROP_DPU_INFO); - - msm_property_set_blob(&c_conn->property_info, - &c_conn->blob_caps, - DPU_KMS_INFO_DATA(info), - DPU_KMS_INFO_DATALEN(info), - CONNECTOR_PROP_DPU_INFO); - kfree(info); - } - -#ifdef CONFIG_DRM_MSM_DSI_STAGING - if (connector_type == DRM_MODE_CONNECTOR_DSI) { - struct dsi_display *dsi_display; - - dsi_display = (struct dsi_display *)(display); - if (dsi_display && dsi_display->panel && - dsi_display->panel->hdr_props.hdr_enabled == true) { - msm_property_install_blob(&c_conn->property_info, - "hdr_properties", - DRM_MODE_PROP_IMMUTABLE, - CONNECTOR_PROP_HDR_INFO); - - msm_property_set_blob(&c_conn->property_info, - &c_conn->blob_hdr, - &dsi_display->panel->hdr_props, - sizeof(dsi_display->panel->hdr_props), - CONNECTOR_PROP_HDR_INFO); - } - } - - /* install PP_DITHER properties */ - _dpu_connector_install_dither_property(dev, dpu_kms, c_conn); - - msm_property_install_range(&c_conn->property_info, "bl_scale", - 0x0, 0, MAX_BL_SCALE_LEVEL, MAX_BL_SCALE_LEVEL, - CONNECTOR_PROP_BL_SCALE); - - msm_property_install_range(&c_conn->property_info, "ad_bl_scale", - 0x0, 0, MAX_AD_BL_SCALE_LEVEL, MAX_AD_BL_SCALE_LEVEL, - CONNECTOR_PROP_AD_BL_SCALE); -#endif - - /* enum/bitmask properties */ - msm_property_install_enum(&c_conn->property_info, "topology_name", - DRM_MODE_PROP_IMMUTABLE, 0, e_topology_name, - ARRAY_SIZE(e_topology_name), - CONNECTOR_PROP_TOPOLOGY_NAME); - msm_property_install_enum(&c_conn->property_info, "topology_control", - 0, 1, e_topology_control, - ARRAY_SIZE(e_topology_control), - CONNECTOR_PROP_TOPOLOGY_CONTROL); - msm_property_install_enum(&c_conn->property_info, "LP", - 0, 0, e_power_mode, - ARRAY_SIZE(e_power_mode), - CONNECTOR_PROP_LP); - - rc = msm_property_install_get_status(&c_conn->property_info); - if (rc) { - DPU_ERROR("failed to create one or more properties\n"); - goto error_destroy_property; - } - - DPU_DEBUG("connector %d attach encoder %d\n", - c_conn->base.base.id, encoder->base.id); - - priv->connectors[priv->num_connectors++] = &c_conn->base; - - return &c_conn->base; - -error_destroy_property: - if (c_conn->blob_caps) - drm_property_blob_put(c_conn->blob_caps); - if (c_conn->blob_hdr) - drm_property_blob_put(c_conn->blob_hdr); - if (c_conn->blob_dither) - drm_property_blob_put(c_conn->blob_dither); - - msm_property_destroy(&c_conn->property_info); -error_cleanup_conn: - mutex_destroy(&c_conn->lock); - drm_connector_cleanup(&c_conn->base); -error_free_conn: - kfree(c_conn); - - return ERR_PTR(rc); -} - -int dpu_connector_register_custom_event(struct dpu_kms *kms, - struct drm_connector *conn_drm, u32 event, bool val) -{ - int ret = -EINVAL; - - switch (event) { - case DRM_EVENT_SYS_BACKLIGHT: - ret = 0; - break; - default: - break; - } - return ret; -} diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_connector.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_connector.h deleted file mode 100644 index ed516fb..0000000 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_connector.h +++ /dev/null @@ -1,555 +0,0 @@ -/* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef _DPU_CONNECTOR_H_ -#define _DPU_CONNECTOR_H_ - -#include <uapi/drm/msm_drm_pp.h> -#include <drm/drmP.h> -#include <drm/drm_atomic.h> -#include <drm/drm_panel.h> - -#include "msm_drv.h" -#include "msm_prop.h" -#include "dpu_kms.h" - -#define DPU_CONNECTOR_NAME_SIZE 16 - -struct dpu_connector; -struct dpu_connector_state; - -/** - * struct dpu_connector_ops - callback functions for generic dpu connector - * Individual callbacks documented below. - */ -struct dpu_connector_ops { - /** - * post_init - perform additional initialization steps - * @connector: Pointer to drm connector structure - * @info: Pointer to dpu connector info structure - * @display: Pointer to private display handle - * Returns: Zero on success - */ - int (*post_init)(struct drm_connector *connector, - void *info, - void *display); - - /** - * detect - determine if connector is connected - * @connector: Pointer to drm connector structure - * @force: Force detect setting from drm framework - * @display: Pointer to private display handle - * Returns: Connector 'is connected' status - */ - enum drm_connector_status (*detect)(struct drm_connector *connector, - bool force, - void *display); - - /** - * get_modes - add drm modes via drm_mode_probed_add() - * @connector: Pointer to drm connector structure - * @display: Pointer to private display handle - * Returns: Number of modes added - */ - int (*get_modes)(struct drm_connector *connector, - void *display); - - /** - * put_modes - free up drm modes of the connector - * @connector: Pointer to drm connector structure - * @display: Pointer to private display handle - */ - void (*put_modes)(struct drm_connector *connector, - void *display); - - /** - * update_pps - update pps command for the display panel - * @pps_cmd: Pointer to pps command - * @display: Pointer to private display handle - * Returns: Zero on success - */ - int (*update_pps)(char *pps_cmd, void *display); - - /** - * mode_valid - determine if specified mode is valid - * @connector: Pointer to drm connector structure - * @mode: Pointer to drm mode structure - * @display: Pointer to private display handle - * Returns: Validity status for specified mode - */ - enum drm_mode_status (*mode_valid)(struct drm_connector *connector, - struct drm_display_mode *mode, - void *display); - - /** - * set_property - set property value - * @connector: Pointer to drm connector structure - * @state: Pointer to drm connector state structure - * @property_index: DRM property index - * @value: Incoming property value - * @display: Pointer to private display structure - * Returns: Zero on success - */ - int (*set_property)(struct drm_connector *connector, - struct drm_connector_state *state, - int property_index, - uint64_t value, - void *display); - - /** - * get_property - get property value - * @connector: Pointer to drm connector structure - * @state: Pointer to drm connector state structure - * @property_index: DRM property index - * @value: Pointer to variable for accepting property value - * @display: Pointer to private display structure - * Returns: Zero on success - */ - int (*get_property)(struct drm_connector *connector, - struct drm_connector_state *state, - int property_index, - uint64_t *value, - void *display); - - /** - * get_info - get display information - * @info: Pointer to msm display info structure - * @display: Pointer to private display structure - * Returns: Zero on success - */ - int (*get_info)(struct msm_display_info *info, void *display); - - /** - * get_mode_info - retrieve mode information - * @drm_mode: Display mode set for the display - * @mode_info: Out parameter. information of the display mode - * @max_mixer_width: max width supported by HW layer mixer - * Returns: Zero on success - */ - int (*get_mode_info)(const struct drm_display_mode *drm_mode, - struct msm_mode_info *mode_info, - u32 max_mixer_width); - - /** - * enable_event - notify display of event registration/unregistration - * @connector: Pointer to drm connector structure - * @event_idx: DPU connector event index - * @enable: Whether the event is being enabled/disabled - * @display: Pointer to private display structure - */ - void (*enable_event)(struct drm_connector *connector, - uint32_t event_idx, bool enable, void *display); - - int (*set_backlight)(void *display, u32 bl_lvl); - - /** - * soft_reset - perform a soft reset on the connector - * @display: Pointer to private display structure - * Return: Zero on success, -ERROR otherwise - */ - int (*soft_reset)(void *display); - - /** - * pre_kickoff - trigger display to program kickoff-time features - * @connector: Pointer to drm connector structure - * @display: Pointer to private display structure - * Returns: Zero on success - */ - int (*pre_kickoff)(struct drm_connector *connector, - void *display); - - /** - * clk_ctrl - perform clk enable/disable on the connector - * @handle: Pointer to clk handle - * @type: Type of clks - * @enable: State of clks - */ - int (*clk_ctrl)(void *handle, u32 type, u32 state); - - /** - * set_power - update dpms setting - * @connector: Pointer to drm connector structure - * @power_mode: One of the following, - * DPU_MODE_DPMS_ON - * DPU_MODE_DPMS_LP1 - * DPU_MODE_DPMS_LP2 - * DPU_MODE_DPMS_OFF - * @display: Pointer to private display structure - * Returns: Zero on success - */ - int (*set_power)(struct drm_connector *connector, - int power_mode, void *display); - - /** - * get_dst_format - get dst_format from display - * @display: Pointer to private display handle - * Returns: dst_format of display - */ - enum dsi_pixel_format (*get_dst_format)(void *display); - - /** - * post_kickoff - display to program post kickoff-time features - * @connector: Pointer to drm connector structure - * Returns: Zero on success - */ - int (*post_kickoff)(struct drm_connector *connector); - - /** - * send_hpd_event - send HPD uevent notification to userspace - * @display: Pointer to private display structure - */ - void (*send_hpd_event)(void *display); -}; - -/** - * enum dpu_connector_events - list of recognized connector events - */ -enum dpu_connector_events { - DPU_CONN_EVENT_VID_DONE, /* video mode frame done */ - DPU_CONN_EVENT_CMD_DONE, /* command mode frame done */ - DPU_CONN_EVENT_COUNT, -}; - -/** - * struct dpu_connector_evt - local event registration entry structure - * @cb_func: Pointer to desired callback function - * @usr: User pointer to pass to callback on event trigger - */ -struct dpu_connector_evt { - void (*cb_func)(uint32_t event_idx, - uint32_t instance_idx, void *usr, - uint32_t data0, uint32_t data1, - uint32_t data2, uint32_t data3); - void *usr; -}; - -/** - * struct dpu_connector - local dpu connector structure - * @base: Base drm connector structure - * @connector_type: Set to one of DRM_MODE_CONNECTOR_ types - * @encoder: Pointer to preferred drm encoder - * @panel: Pointer to drm panel, if present - * @display: Pointer to private display data structure - * @mmu_secure: MMU id for secure buffers - * @mmu_unsecure: MMU id for unsecure buffers - * @name: ASCII name of connector - * @lock: Mutex lock object for this structure - * @ops: Local callback function pointer table - * @dpms_mode: DPMS property setting from user space - * @lp_mode: LP property setting from user space - * @last_panel_power_mode: Last consolidated dpms/lp mode setting - * @property_info: Private structure for generic property handling - * @property_data: Array of private data for generic property handling - * @blob_caps: Pointer to blob structure for 'capabilities' property - * @blob_hdr: Pointer to blob structure for 'hdr_properties' property - * @blob_dither: Pointer to blob structure for default dither config - * @fb_kmap: true if kernel mapping of framebuffer is requested - * @event_table: Array of registered events - * @event_lock: Lock object for event_table - * @bl_device: backlight device node - */ -struct dpu_connector { - struct drm_connector base; - - int connector_type; - - struct drm_encoder *encoder; - struct drm_panel *panel; - void *display; - - struct msm_gem_address_space *aspace[DPU_IOMMU_DOMAIN_MAX]; - - char name[DPU_CONNECTOR_NAME_SIZE]; - - struct mutex lock; - struct dpu_connector_ops ops; - int dpms_mode; - int lp_mode; - int last_panel_power_mode; - - struct msm_property_info property_info; - struct msm_property_data property_data[CONNECTOR_PROP_COUNT]; - struct drm_property_blob *blob_caps; - struct drm_property_blob *blob_hdr; - struct drm_property_blob *blob_dither; - - bool fb_kmap; - struct dpu_connector_evt event_table[DPU_CONN_EVENT_COUNT]; - spinlock_t event_lock; - - struct backlight_device *bl_device; -}; - -/** - * to_dpu_connector - convert drm_connector pointer to dpu connector pointer - * @X: Pointer to drm_connector structure - * Returns: Pointer to dpu_connector structure - */ -#define to_dpu_connector(x) container_of((x), struct dpu_connector, base) - -/** - * dpu_connector_get_display - get dpu connector's private display pointer - * @C: Pointer to drm connector structure - * Returns: Pointer to associated private display structure - */ -#define dpu_connector_get_display(C) \ - ((C) ? to_dpu_connector((C))->display : 0) - -/** - * dpu_connector_get_panel - get dpu connector's private panel pointer - * @C: Pointer to drm connector structure - * Returns: Pointer to associated private display structure - */ -#define dpu_connector_get_panel(C) \ - ((C) ? to_dpu_connector((C))->panel : NULL) - -/** - * dpu_connector_get_encoder - get dpu connector's private encoder pointer - * @C: Pointer to drm connector structure - * Returns: Pointer to associated private encoder structure - */ -#define dpu_connector_get_encoder(C) \ - ((C) ? to_dpu_connector((C))->encoder : 0) - -/** - * dpu_connector_get_propinfo - get dpu connector's property info pointer - * @C: Pointer to drm connector structure - * Returns: Pointer to associated private property info structure - */ -#define dpu_connector_get_propinfo(C) \ - ((C) ? &to_dpu_connector((C))->property_info : 0) - -/** - * struct dpu_connector_state - private connector status structure - * @base: Base drm connector structure - * @out_fb: Pointer to output frame buffer, if applicable - * @property_state: Local storage for msm_prop properties - * @property_values: Local cache of current connector property values - * @property_blobs: blob properties - */ -struct dpu_connector_state { - struct drm_connector_state base; - struct drm_framebuffer *out_fb; - struct msm_property_state property_state; - struct msm_property_value property_values[CONNECTOR_PROP_COUNT]; - - struct drm_property_blob *property_blobs[CONNECTOR_PROP_BLOBCOUNT]; -}; - -/** - * to_dpu_connector_state - convert drm_connector_state pointer to - * dpu connector state pointer - * @X: Pointer to drm_connector_state structure - * Returns: Pointer to dpu_connector_state structure - */ -#define to_dpu_connector_state(x) \ - container_of((x), struct dpu_connector_state, base) - -/** - * dpu_connector_get_property - query integer value of connector property - * @S: Pointer to drm connector state - * @X: Property index, from enum msm_mdp_connector_property - * Returns: Integer value of requested property - */ -#define dpu_connector_get_property(S, X) \ - ((S) && ((X) < CONNECTOR_PROP_COUNT) ? \ - (to_dpu_connector_state((S))->property_values[(X)].value) : 0) - -/** - * dpu_connector_get_property_state - retrieve property state cache - * @S: Pointer to drm connector state - * Returns: Pointer to local property state structure - */ -#define dpu_connector_get_property_state(S) \ - ((S) ? (&to_dpu_connector_state((S))->property_state) : NULL) - -/** - * dpu_connector_get_out_fb - query out_fb value from dpu connector state - * @S: Pointer to drm connector state - * Returns: Output fb associated with specified connector state - */ -#define dpu_connector_get_out_fb(S) \ - ((S) ? to_dpu_connector_state((S))->out_fb : 0) - -/** - * dpu_connector_get_topology_name - helper accessor to retrieve topology_name - * @connector: pointer to drm connector - * Returns: value of the CONNECTOR_PROP_TOPOLOGY_NAME property or 0 - */ -static inline uint64_t dpu_connector_get_topology_name( - struct drm_connector *connector) -{ - if (!connector || !connector->state) - return 0; - return dpu_connector_get_property(connector->state, - CONNECTOR_PROP_TOPOLOGY_NAME); -} - -/** - * dpu_connector_get_lp - helper accessor to retrieve LP state - * @connector: pointer to drm connector - * Returns: value of the CONNECTOR_PROP_LP property or 0 - */ -static inline uint64_t dpu_connector_get_lp( - struct drm_connector *connector) -{ - if (!connector || !connector->state) - return 0; - return dpu_connector_get_property(connector->state, - CONNECTOR_PROP_LP); -} - -/** - * dpu_connector_set_property_for_commit - add property set to atomic state - * Add a connector state property update for the specified property index - * to the atomic state in preparation for a drm_atomic_commit. - * @connector: Pointer to drm connector - * @atomic_state: Pointer to DRM atomic state structure for commit - * @property_idx: Connector property index - * @value: Updated property value - * Returns: Zero on success - */ -int dpu_connector_set_property_for_commit(struct drm_connector *connector, - struct drm_atomic_state *atomic_state, - uint32_t property_idx, uint64_t value); - -/** - * dpu_connector_init - create drm connector object for a given display - * @dev: Pointer to drm device struct - * @encoder: Pointer to associated encoder - * @panel: Pointer to associated panel, can be NULL - * @display: Pointer to associated display object - * @ops: Pointer to callback operations function table - * @connector_poll: Set to appropriate DRM_CONNECTOR_POLL_ setting - * @connector_type: Set to appropriate DRM_MODE_CONNECTOR_ type - * Returns: Pointer to newly created drm connector struct - */ -struct drm_connector *dpu_connector_init(struct drm_device *dev, - struct drm_encoder *encoder, - struct drm_panel *panel, - void *display, - const struct dpu_connector_ops *ops, - int connector_poll, - int connector_type); - -/** - * dpu_connector_get_info - query display specific information - * @connector: Pointer to drm connector object - * @info: Pointer to msm display information structure - * Returns: Zero on success - */ -int dpu_connector_get_info(struct drm_connector *connector, - struct msm_display_info *info); - -/** - * dpu_connector_clk_ctrl - enables/disables the connector clks - * @connector: Pointer to drm connector object - * @enable: true/false to enable/disable - */ -void dpu_connector_clk_ctrl(struct drm_connector *connector, bool enable); - -/** - * dpu_connector_get_dpms - query dpms setting - * @connector: Pointer to drm connector structure - * Returns: Current DPMS setting for connector - */ -int dpu_connector_get_dpms(struct drm_connector *connector); - -/** - * dpu_connector_trigger_event - indicate that an event has occurred - * Any callbacks that have been registered against this event will - * be called from the same thread context. - * @connector: Pointer to drm connector structure - * @event_idx: Index of event to trigger - * @instance_idx: Event-specific "instance index" to pass to callback - * @data0: Event-specific "data" to pass to callback - * @data1: Event-specific "data" to pass to callback - * @data2: Event-specific "data" to pass to callback - * @data3: Event-specific "data" to pass to callback - * Returns: Zero on success - */ -int dpu_connector_trigger_event(void *drm_connector, - uint32_t event_idx, uint32_t instance_idx, - uint32_t data0, uint32_t data1, - uint32_t data2, uint32_t data3); - -/** - * dpu_connector_register_event - register a callback function for an event - * @connector: Pointer to drm connector structure - * @event_idx: Index of event to register - * @cb_func: Pointer to desired callback function - * @usr: User pointer to pass to callback on event trigger - * Returns: Zero on success - */ -int dpu_connector_register_event(struct drm_connector *connector, - uint32_t event_idx, - void (*cb_func)(uint32_t event_idx, - uint32_t instance_idx, void *usr, - uint32_t data0, uint32_t data1, - uint32_t data2, uint32_t data3), - void *usr); - -/** - * dpu_connector_unregister_event - unregister all callbacks for an event - * @connector: Pointer to drm connector structure - * @event_idx: Index of event to register - */ -void dpu_connector_unregister_event(struct drm_connector *connector, - uint32_t event_idx); - -/** - * dpu_connector_register_custom_event - register for async events - * @kms: Pointer to dpu_kms - * @conn_drm: Pointer to drm connector object - * @event: Event for which request is being sent - * @en: Flag to enable/disable the event - * Returns: Zero on success - */ -int dpu_connector_register_custom_event(struct dpu_kms *kms, - struct drm_connector *conn_drm, u32 event, bool en); - -/** - * dpu_connector_pre_kickoff - trigger kickoff time feature programming - * @connector: Pointer to drm connector object - * Returns: Zero on success - */ -int dpu_connector_pre_kickoff(struct drm_connector *connector); - -/** - * dpu_connector_needs_offset - adjust the output fence offset based on - * display type - * @connector: Pointer to drm connector object - * Returns: true if offset is required, false for all other cases. - */ -static inline bool dpu_connector_needs_offset(struct drm_connector *connector) -{ - struct dpu_connector *c_conn; - - if (!connector) - return false; - - c_conn = to_dpu_connector(connector); - return (c_conn->connector_type != DRM_MODE_CONNECTOR_VIRTUAL); -} - -/** - * dpu_connector_get_dither_cfg - get dither property data - * @conn: Pointer to drm_connector struct - * @state: Pointer to drm_connector_state struct - * @cfg: Pointer to pointer to dither cfg - * @len: length of the dither data - * Returns: Zero on success - */ -int dpu_connector_get_dither_cfg(struct drm_connector *conn, - struct drm_connector_state *state, void **cfg, size_t *len); - -#endif /* _DPU_CONNECTOR_H_ */ diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c index c0e8035..48920b05 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c @@ -33,7 +33,6 @@ #include "dpu_plane.h" #include "dpu_color_processing.h" #include "dpu_encoder.h" -#include "dpu_connector.h" #include "dpu_vbif.h" #include "dpu_power_handle.h" #include "dpu_core_perf.h" @@ -3347,7 +3346,6 @@ static int dpu_crtc_atomic_get_property(struct drm_crtc *crtc, struct dpu_crtc_state *cstate; struct drm_encoder *encoder; int i, ret = -EINVAL; - bool conn_offset = 0; bool is_cmd = true;

if (!crtc || !state) { @@ -3356,13 +3354,6 @@ static int dpu_crtc_atomic_get_property(struct drm_crtc *crtc, dpu_crtc = to_dpu_crtc(crtc); cstate = to_dpu_crtc_state(state);

- for (i = 0; i < cstate->num_connectors; ++i) { - conn_offset = dpu_connector_needs_offset( - cstate->connectors[i]); - if (conn_offset) - break; - } - /** * set the cmd flag only when all the encoders attached * to the crtc are in cmd mode. Consider all other cases diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index 3854410..4386360 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -70,6 +70,8 @@

#define IDLE_SHORT_TIMEOUT 1

+#define MAX_VDISPLAY_SPLIT 1080 + /** * enum dpu_enc_rc_events - events for resource control state machine * @DPU_ENC_RC_EVENT_KICKOFF: @@ -172,7 +174,6 @@ enum dpu_enc_rc_states { * @frame_done_timer: watchdog timer for frame done event * @vsync_event_timer: vsync timer * @disp_info: local copy of msm_display_info struct - * @mode_info: local copy of msm_mode_info struct * @misr_enable: misr enable/disable status * @misr_frame_count: misr frame count before start capturing the data * @idle_pc_supported: indicate if idle power collaps is supported @@ -214,7 +215,6 @@ struct dpu_encoder_virt { struct timer_list vsync_event_timer;

struct msm_display_info disp_info; - struct msm_mode_info mode_info; bool misr_enable; u32 misr_frame_count;

@@ -497,8 +497,6 @@ void dpu_encoder_get_hw_resources(struct drm_encoder *drm_enc, if (phys && phys->ops.get_hw_resources) phys->ops.get_hw_resources(phys, hw_res, conn_state); } - - hw_res->topology = dpu_enc->mode_info.topology; }

void dpu_encoder_destroy(struct drm_encoder *drm_enc) @@ -605,6 +603,25 @@ static void _dpu_encoder_adjust_mode(struct drm_connector *connector, } }

+static struct msm_display_topology dpu_encoder_get_topology( + struct dpu_encoder_virt *dpu_enc, + struct dpu_kms *dpu_kms, + struct drm_display_mode *mode) +{ + struct msm_display_topology topology; + int i, intf_count = 0; + + for (i = 0; i < MAX_PHYS_ENCODERS_PER_VIRTUAL; i++) + if (dpu_enc->phys_encs[i]) + intf_count++; + + /* User split topology for width > 1080 */ + topology.num_lm = (mode->vdisplay > MAX_VDISPLAY_SPLIT) ? 2 : 1; + topology.num_enc = 0; + topology.num_intf = intf_count; + + return topology; +} static int dpu_encoder_virt_atomic_check( struct drm_encoder *drm_enc, struct drm_crtc_state *crtc_state, @@ -615,6 +632,7 @@ static int dpu_encoder_virt_atomic_check( struct dpu_kms *dpu_kms; const struct drm_display_mode *mode; struct drm_display_mode *adj_mode; + struct msm_display_topology topology; int i = 0; int ret = 0;

@@ -660,6 +678,8 @@ static int dpu_encoder_virt_atomic_check( } }

+ topology = dpu_encoder_get_topology(dpu_enc, dpu_kms, adj_mode); + /* Reserve dynamic resources now. Indicating AtomicTest phase */ if (!ret) { /* @@ -669,7 +689,7 @@ static int dpu_encoder_virt_atomic_check( if (drm_atomic_crtc_needs_modeset(crtc_state) && dpu_enc->mode_set_complete) { ret = dpu_rm_reserve(&dpu_kms->rm, drm_enc, crtc_state, - conn_state, true); + conn_state, topology, true); dpu_enc->mode_set_complete = false; } } @@ -690,7 +710,6 @@ static void _dpu_encoder_update_vsync_source(struct dpu_encoder_virt *dpu_enc, struct dpu_kms *dpu_kms; struct dpu_hw_mdp *hw_mdptop; struct drm_encoder *drm_enc; - struct msm_mode_info *mode_info; int i;

if (!dpu_enc || !disp_info) { @@ -720,19 +739,12 @@ static void _dpu_encoder_update_vsync_source(struct dpu_encoder_virt *dpu_enc, return; }

- mode_info = &dpu_enc->mode_info; - if (!mode_info) { - DPU_ERROR("invalid mode info\n"); - return; - } - if (hw_mdptop->ops.setup_vsync_source && disp_info->capabilities & MSM_DISPLAY_CAP_CMD_MODE) { for (i = 0; i < dpu_enc->num_phys_encs; i++) vsync_cfg.ppnumber[i] = dpu_enc->hw_pp[i]->idx;

vsync_cfg.pp_count = dpu_enc->num_phys_encs; - vsync_cfg.frame_rate = mode_info->frame_rate; if (disp_info->is_te_using_watchdog_timer) vsync_cfg.vsync_source = DPU_VSYNC_SOURCE_WD_TIMER_0; else @@ -789,9 +801,6 @@ static void _dpu_encoder_resource_control_helper(struct drm_encoder *drm_enc, dpu_power_resource_enable(&priv->phandle, dpu_kms->core_client, true);

- /* enable DSI clks */ - dpu_connector_clk_ctrl(dpu_enc->cur_master->connector, true); - /* enable all the irq */ _dpu_encoder_irq_control(drm_enc, true);

@@ -799,9 +808,6 @@ static void _dpu_encoder_resource_control_helper(struct drm_encoder *drm_enc, /* disable all the irq */ _dpu_encoder_irq_control(drm_enc, false);

- /* disable DSI clks */ - dpu_connector_clk_ctrl(dpu_enc->cur_master->connector, false); - /* disable DPU core clks */ dpu_power_resource_enable(&priv->phandle, dpu_kms->core_client, false); @@ -813,7 +819,6 @@ static void _dpu_encoder_resource_control_helper(struct drm_encoder *drm_enc, static int dpu_encoder_resource_control(struct drm_encoder *drm_enc, u32 sw_event) { - unsigned int lp, idle_timeout; struct dpu_encoder_virt *dpu_enc; struct msm_drm_private *priv; struct msm_drm_thread *disp_thread; @@ -919,25 +924,13 @@ static int dpu_encoder_resource_control(struct drm_encoder *drm_enc, return 0; }

- /* set idle timeout based on master connector's lp value */ - if (dpu_enc->cur_master) - lp = dpu_connector_get_lp( - dpu_enc->cur_master->connector); - else - lp = DPU_MODE_DPMS_ON; - - if (lp == DPU_MODE_DPMS_LP2) - idle_timeout = IDLE_SHORT_TIMEOUT; - else - idle_timeout = dpu_enc->idle_timeout; - kthread_queue_delayed_work( &disp_thread->worker, &dpu_enc->delayed_off_work, - msecs_to_jiffies(idle_timeout)); + msecs_to_jiffies(dpu_enc->idle_timeout));

DPU_EVT32(DRMID(drm_enc), sw_event, dpu_enc->rc_state, - idle_timeout, DPU_EVTLOG_FUNC_CASE2); + dpu_enc->idle_timeout, DPU_EVTLOG_FUNC_CASE2); DPU_DEBUG_ENC(dpu_enc, "sw_event:%d, work scheduled\n", sw_event); break; @@ -1132,8 +1125,9 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc, struct dpu_kms *dpu_kms; struct list_head *connector_list; struct drm_connector *conn = NULL, *conn_iter; - struct dpu_connector *dpu_conn = NULL; struct dpu_rm_hw_iter pp_iter; + struct msm_display_topology topology; + enum dpu_rm_topology_name topology_name; int i = 0, ret;

if (!drm_enc) { @@ -1162,33 +1156,11 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc, return; }

- dpu_conn = to_dpu_connector(conn); - if (dpu_conn) { - ret = dpu_conn->ops.get_mode_info(adj_mode, &dpu_enc->mode_info, - dpu_kms->catalog->caps->max_mixer_width); - if (ret) { - DPU_ERROR_ENC(dpu_enc, - "invalid topology for the mode\n"); - return; - } - } - - /* release resources before seamless mode change */ - if (msm_is_mode_seamless_dms(adj_mode)) { - /* restore resource state before releasing them */ - ret = dpu_encoder_resource_control(drm_enc, - DPU_ENC_RC_EVENT_PRE_MODESET); - if (ret) { - DPU_ERROR_ENC(dpu_enc, - "dpu resource control failed: %d\n", - ret); - return; - } - } + topology = dpu_encoder_get_topology(dpu_enc, dpu_kms, adj_mode);

/* Reserve dynamic resources now. Indicating non-AtomicTest phase */ ret = dpu_rm_reserve(&dpu_kms->rm, drm_enc, drm_enc->crtc->state, - conn->state, false); + conn->state, topology, false); if (ret) { DPU_ERROR_ENC(dpu_enc, "failed to reserve hw resources, %d\n", ret); @@ -1203,6 +1175,7 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc, dpu_enc->hw_pp[i] = (struct dpu_hw_pingpong *) pp_iter.hw; }

+ topology_name = dpu_rm_get_topology_name(topology); for (i = 0; i < dpu_enc->num_phys_encs; i++) { struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];

@@ -1214,6 +1187,7 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc, } phys->hw_pp = dpu_enc->hw_pp[i]; phys->connector = conn->state->connector; + phys->topology_name = topology_name; if (phys->ops.mode_set) phys->ops.mode_set(phys, mode, adj_mode); } @@ -1711,8 +1685,6 @@ int dpu_encoder_helper_wait_event_timeout( void dpu_encoder_helper_hw_reset(struct dpu_encoder_phys *phys_enc) { struct dpu_encoder_virt *dpu_enc; - struct dpu_connector *dpu_con; - void *dpu_con_disp; struct dpu_hw_ctl *ctl; int rc;

@@ -1729,22 +1701,6 @@ void dpu_encoder_helper_hw_reset(struct dpu_encoder_phys *phys_enc) DPU_DEBUG_ENC(dpu_enc, "ctl %d reset\n", ctl->idx); DPU_EVT32(DRMID(phys_enc->parent), ctl->idx);

- if (phys_enc->ops.is_master && phys_enc->ops.is_master(phys_enc) && - phys_enc->connector) { - dpu_con = to_dpu_connector(phys_enc->connector); - dpu_con_disp = dpu_connector_get_display(phys_enc->connector); - - if (dpu_con->ops.soft_reset) { - rc = dpu_con->ops.soft_reset(dpu_con_disp); - if (rc) { - DPU_ERROR_ENC(dpu_enc, - "connector soft reset failure\n"); - DPU_DBG_DUMP("all", "dbg_bus", "vbif_dbg_bus", - "panic"); - } - } - } - rc = ctl->ops.reset(ctl); if (rc) { DPU_ERROR_ENC(dpu_enc, "ctl %d reset failure\n", ctl->idx); @@ -1862,22 +1818,6 @@ void dpu_encoder_trigger_kickoff_pending(struct drm_encoder *drm_enc) } }

-static void _dpu_encoder_setup_dither(struct dpu_encoder_phys *phys) -{ - void *dither_cfg; - int ret = 0; - size_t len = 0; - - if (!phys || !phys->connector || !phys->hw_pp || - !phys->hw_pp->ops.setup_dither) - return; - - ret = dpu_connector_get_dither_cfg(phys->connector, - phys->connector->state, &dither_cfg, &len); - if (!ret) - phys->hw_pp->ops.setup_dither(phys->hw_pp, dither_cfg, len); -} - static u32 _dpu_encoder_calculate_linetime(struct dpu_encoder_virt *dpu_enc, struct drm_display_mode *mode) { @@ -2028,7 +1968,6 @@ void dpu_encoder_prepare_for_kickoff(struct drm_encoder *drm_enc, struct dpu_encoder_phys *phys; bool needs_hw_reset = false; unsigned int i; - int rc;

if (!drm_enc || !params) { DPU_ERROR("invalid args\n"); @@ -2048,7 +1987,6 @@ void dpu_encoder_prepare_for_kickoff(struct drm_encoder *drm_enc, phys->ops.prepare_for_kickoff(phys, params); if (phys->enable_state == DPU_ENC_ERR_NEEDS_HW_RESET) needs_hw_reset = true; - _dpu_encoder_setup_dither(phys); } } DPU_ATRACE_END("enc_prepare_for_kickoff"); @@ -2064,14 +2002,6 @@ void dpu_encoder_prepare_for_kickoff(struct drm_encoder *drm_enc, phys->ops.hw_reset(phys); } } - - if (dpu_enc->cur_master && dpu_enc->cur_master->connector) { - rc = dpu_connector_pre_kickoff(dpu_enc->cur_master->connector); - if (rc) - DPU_ERROR_ENC(dpu_enc, "kickoff conn%d failed rc %d\n", - dpu_enc->cur_master->connector->base.id, - rc); - } }

void dpu_encoder_kickoff(struct drm_encoder *drm_enc) @@ -2704,8 +2634,7 @@ static void dpu_encoder_frame_done_timeout(struct timer_list *t) .early_unregister = dpu_encoder_early_unregister, };

-struct drm_encoder *dpu_encoder_init( - struct drm_device *dev, +int dpu_encoder_setup(struct drm_device *dev, struct drm_encoder *enc, struct msm_display_info *disp_info) { struct msm_drm_private *priv = dev->dev_private; @@ -2715,11 +2644,7 @@ struct drm_encoder *dpu_encoder_init( int drm_enc_mode = DRM_MODE_ENCODER_NONE; int ret = 0;

- dpu_enc = kzalloc(sizeof(*dpu_enc), GFP_KERNEL); - if (!dpu_enc) { - ret = -ENOMEM; - goto fail; - } + dpu_enc = to_dpu_encoder_virt(enc);

mutex_init(&dpu_enc->enc_lock); ret = dpu_encoder_setup_display(dpu_enc, dpu_kms, disp_info, @@ -2729,16 +2654,12 @@ struct drm_encoder *dpu_encoder_init(

dpu_enc->cur_master = NULL; spin_lock_init(&dpu_enc->enc_spinlock); - drm_enc = &dpu_enc->base; - drm_encoder_init(dev, drm_enc, &dpu_encoder_funcs, drm_enc_mode, NULL); - drm_encoder_helper_add(drm_enc, &dpu_encoder_helper_funcs);

atomic_set(&dpu_enc->frame_done_timeout, 0); timer_setup(&dpu_enc->frame_done_timer, dpu_encoder_frame_done_timeout, 0);

- if ((disp_info->intf_type == DRM_MODE_CONNECTOR_DSI) && - disp_info->is_primary) + if (disp_info->intf_type == DRM_MODE_CONNECTOR_DSI) timer_setup(&dpu_enc->vsync_event_timer, dpu_encoder_vsync_event_handler, 0); @@ -2756,14 +2677,38 @@ struct drm_encoder *dpu_encoder_init(

DPU_DEBUG_ENC(dpu_enc, "created\n");

- return drm_enc; + return ret;

fail: DPU_ERROR("failed to create encoder\n"); if (drm_enc) dpu_encoder_destroy(drm_enc);

- return ERR_PTR(ret); + return ret; + + +} + +struct drm_encoder *dpu_encoder_init(struct drm_device *dev, + int drm_enc_mode) +{ + struct dpu_encoder_virt *dpu_enc = NULL; + int rc = 0; + + dpu_enc = devm_kzalloc(dev->dev, sizeof(*dpu_enc), GFP_KERNEL); + if (!dpu_enc) + return ERR_PTR(ENOMEM); + + rc = drm_encoder_init(dev, &dpu_enc->base, &dpu_encoder_funcs, + drm_enc_mode, NULL); + if (rc) { + devm_kfree(dev->dev, dpu_enc); + return ERR_PTR(rc); + } + + drm_encoder_helper_add(&dpu_enc->base, &dpu_encoder_helper_funcs); + + return &dpu_enc->base; }

int dpu_encoder_wait_for_event(struct drm_encoder *drm_enc, diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h index b25619d..d853ad9 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h @@ -45,7 +45,6 @@ struct dpu_encoder_hw_resources { enum dpu_intf_mode wbs[WB_MAX]; bool needs_cdm; u32 display_num_of_h_tiles; - struct msm_display_topology topology; };

/** @@ -160,6 +159,15 @@ int dpu_encoder_wait_for_event(struct drm_encoder *drm_encoder, */ struct drm_encoder *dpu_encoder_init( struct drm_device *dev, + int drm_enc_mode); + +/** + * dpu_encoder_setup - setup dpu_encoder for the display probed + * @dev: Pointer to drm device structure + * @enc: Pointer to the drm_encoder + * @disp_info: Pointer to the display info + */ +int dpu_encoder_setup(struct drm_device *dev, struct drm_encoder *enc, struct msm_display_info *disp_info);

/** diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h index 576c475..35beefa 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h @@ -25,7 +25,6 @@ #include "dpu_hw_wb.h" #include "dpu_hw_cdm.h" #include "dpu_encoder.h" -#include "dpu_connector.h"

#define DPU_ENCODER_NAME_MAX 16

@@ -221,6 +220,7 @@ struct dpu_encoder_irq { * @split_role: Role to play in a split-panel configuration * @intf_mode: Interface mode * @intf_idx: Interface index on dpu hardware + * @topology_name: topology selected for the display * @enc_spinlock: Virtual-Encoder-Wide Spin Lock for IRQ purposes * @enable_state: Enable state tracking * @vblank_refcount: Reference count of vblank request @@ -250,6 +250,7 @@ struct dpu_encoder_phys { enum dpu_enc_split_role split_role; enum dpu_intf_mode intf_mode; enum dpu_intf intf_idx; + enum dpu_rm_topology_name topology_name; spinlock_t *enc_spinlock; enum dpu_enc_enable_state enable_state; atomic_t vblank_refcount; @@ -443,14 +444,11 @@ int dpu_encoder_helper_wait_event_timeout( static inline enum dpu_3d_blend_mode dpu_encoder_helper_get_3d_blend_mode( struct dpu_encoder_phys *phys_enc) { - enum dpu_rm_topology_name topology; - if (!phys_enc || phys_enc->enable_state == DPU_ENC_DISABLING) return BLEND_3D_NONE;

- topology = dpu_connector_get_topology_name(phys_enc->connector); if (phys_enc->split_role == ENC_ROLE_SOLO && - topology == DPU_RM_TOPOLOGY_DUALPIPE_3DMERGE) + phys_enc->topology_name == DPU_RM_TOPOLOGY_DUALPIPE_3DMERGE) return BLEND_3D_H_ROW_INT;

return BLEND_3D_NONE; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c index b680718..73e5938 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c @@ -15,7 +15,6 @@ #include "dpu_hw_interrupts.h" #include "dpu_core_irq.h" #include "dpu_formats.h" -#include "dsi_display.h" #include "dpu_trace.h"

#define DPU_DEBUG_VIDENC(e, fmt, ...) DPU_DEBUG("enc%d intf%d " fmt, \ @@ -356,13 +355,10 @@ static void dpu_encoder_phys_vid_underrun_irq(void *arg, int irq_idx)

static bool _dpu_encoder_phys_is_dual_ctl(struct dpu_encoder_phys *phys_enc) { - enum dpu_rm_topology_name topology; - if (!phys_enc) return false;

- topology = dpu_connector_get_topology_name(phys_enc->connector); - if (topology == DPU_RM_TOPOLOGY_DUALPIPE) + if (phys_enc->topology_name == DPU_RM_TOPOLOGY_DUALPIPE) return true;

return false; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c index 0fbeb75..37c7c66 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c @@ -27,18 +27,6 @@ #include "msm_mmu.h" #include "msm_gem.h"

-#ifdef CONFIG_DRM_MSM_DSI_STAGING -#include "dsi_display.h" -#include "dsi_drm.h" -#endif -#ifdef CONFIG_DRM_MSM_WRITEBACK -#include "dpu_wb.h" -#endif -#ifdef CONFIG_DRM_MSM_DISPLAYPORT -#include "dp/dp_display.h" -#include "dp_drm.h" -#endif -#include "dpu_connector.h" #include "dpu_kms.h" #include "dpu_core_irq.h" #include "dpu_formats.h" @@ -473,9 +461,7 @@ static void dpu_kms_complete_commit(struct msm_kms *kms, struct msm_drm_private *priv; struct drm_crtc *crtc; struct drm_crtc_state *old_crtc_state; - struct drm_connector *conn; - struct drm_connector_state *old_conn_state; - int i, rc = 0; + int i;

if (!kms || !old_state) return; @@ -488,19 +474,6 @@ static void dpu_kms_complete_commit(struct msm_kms *kms, for_each_old_crtc_in_state(old_state, crtc, old_crtc_state, i) dpu_crtc_complete_commit(crtc, old_crtc_state);

- for_each_old_connector_in_state(old_state, conn, old_conn_state, i) { - struct dpu_connector *c_conn; - - c_conn = to_dpu_connector(conn); - if (!c_conn->ops.post_kickoff) - continue; - rc = c_conn->ops.post_kickoff(conn); - if (rc) { - pr_err("Connector Post kickoff failed rc=%d\n", - rc); - } - } - dpu_power_resource_enable(&priv->phandle, dpu_kms->core_client, false); pm_runtime_put_sync(dpu_kms->dev->dev);

@@ -553,317 +526,36 @@ static void dpu_kms_wait_for_commit_done(struct msm_kms *kms, drm_crtc_vblank_put(crtc); }

-/** - * _dpu_kms_get_displays - query for underlying display handles and cache them - * @dpu_kms: Pointer to dpu kms structure - * Returns: Zero on success - */ -static int _dpu_kms_get_displays(struct dpu_kms *dpu_kms) -{ - int rc = -ENOMEM; - - if (!dpu_kms) { - DPU_ERROR("invalid dpu kms\n"); - return -EINVAL; - } - -#ifdef CONFIG_DRM_MSM_DSI_STAGING - /* dsi */ - dpu_kms->dsi_displays = NULL; - dpu_kms->dsi_display_count = dsi_display_get_num_of_displays(); - if (dpu_kms->dsi_display_count) { - dpu_kms->dsi_displays = kcalloc(dpu_kms->dsi_display_count, - sizeof(void *), - GFP_KERNEL); - if (!dpu_kms->dsi_displays) { - DPU_ERROR("failed to allocate dsi displays\n"); - goto exit_deinit_dsi; - } - dpu_kms->dsi_display_count = - dsi_display_get_active_displays(dpu_kms->dsi_displays, - dpu_kms->dsi_display_count); - } -#endif - -#ifdef CONFIG_DRM_MSM_WRITEBACK - /* wb */ - dpu_kms->wb_displays = NULL; - dpu_kms->wb_display_count = dpu_wb_get_num_of_displays(); - if (dpu_kms->wb_display_count) { - dpu_kms->wb_displays = kcalloc(dpu_kms->wb_display_count, - sizeof(void *), - GFP_KERNEL); - if (!dpu_kms->wb_displays) { - DPU_ERROR("failed to allocate wb displays\n"); - goto exit_deinit_wb; - } - dpu_kms->wb_display_count = - wb_display_get_displays(dpu_kms->wb_displays, - dpu_kms->wb_display_count); - } -#endif - -#ifdef CONFIG_DRM_MSM_DISPLAYPORT - /* dp */ - dpu_kms->dp_displays = NULL; - dpu_kms->dp_display_count = dp_display_get_num_of_displays(); - if (dpu_kms->dp_display_count) { - dpu_kms->dp_displays = kcalloc(dpu_kms->dp_display_count, - sizeof(void *), GFP_KERNEL); - if (!dpu_kms->dp_displays) { - DPU_ERROR("failed to allocate dp displays\n"); - goto exit_deinit_dp; - } - dpu_kms->dp_display_count = - dp_display_get_displays(dpu_kms->dp_displays, - dpu_kms->dp_display_count); - } -#endif - - return 0; - -#ifdef CONFIG_DRM_MSM_DISPLAYPORT -exit_deinit_dp: - kfree(dpu_kms->dp_displays); - dpu_kms->dp_display_count = 0; - dpu_kms->dp_displays = NULL; -#endif -#ifdef CONFIG_DRM_MSM_WRITEBACK -exit_deinit_wb: - kfree(dpu_kms->wb_displays); - dpu_kms->wb_display_count = 0; - dpu_kms->wb_displays = NULL; -#endif -#ifdef CONFIG_DRM_MSM_DSI_STAGING -exit_deinit_dsi: - kfree(dpu_kms->dsi_displays); - dpu_kms->dsi_display_count = 0; - dpu_kms->dsi_displays = NULL; - return rc; -#else - return rc; -#endif -} - -/** - * _dpu_kms_release_displays - release cache of underlying display handles - * @dpu_kms: Pointer to dpu kms structure - */ -static void _dpu_kms_release_displays(struct dpu_kms *dpu_kms) -{ - if (!dpu_kms) { - DPU_ERROR("invalid dpu kms\n"); - return; - } - - kfree(dpu_kms->wb_displays); - dpu_kms->wb_displays = NULL; - dpu_kms->wb_display_count = 0; - - kfree(dpu_kms->dsi_displays); - dpu_kms->dsi_displays = NULL; - dpu_kms->dsi_display_count = 0; -} - -#ifdef CONFIG_DRM_MSM_DSI_STAGING static void _dpu_kms_initialize_dsi(struct drm_device *dev, struct msm_drm_private *priv, - struct dpu_kms *dpu_kms, - unsigned max_encoders) -{ - static const struct dpu_connector_ops dsi_ops = { - .post_init = dsi_conn_post_init, - .detect = dsi_conn_detect, - .get_modes = dsi_connector_get_modes, - .put_modes = dsi_connector_put_modes, - .mode_valid = dsi_conn_mode_valid, - .get_info = dsi_display_get_info, - .set_backlight = dsi_display_set_backlight, - .soft_reset = dsi_display_soft_reset, - .pre_kickoff = dsi_conn_pre_kickoff, - .clk_ctrl = dsi_display_clk_ctrl, - .set_power = dsi_display_set_power, - .get_mode_info = dsi_conn_get_mode_info, - .get_dst_format = dsi_display_get_dst_format, - .post_kickoff = dsi_conn_post_kickoff - }; - struct msm_display_info info; - struct drm_encoder *encoder; - void *display, *connector; - int i, rc; - - /* dsi */ - for (i = 0; i < dpu_kms->dsi_display_count && - priv->num_encoders < max_encoders; ++i) { - display = dpu_kms->dsi_displays[i]; - encoder = NULL; - - memset(&info, 0x0, sizeof(info)); - rc = dsi_display_get_info(&info, display); - if (rc) { - DPU_ERROR("dsi get_info %d failed\n", i); - continue; - } - - encoder = dpu_encoder_init(dev, &info); - if (IS_ERR_OR_NULL(encoder)) { - DPU_ERROR("encoder init failed for dsi %d\n", i); - continue; - } - - rc = dsi_display_drm_bridge_init(display, encoder); - if (rc) { - DPU_ERROR("dsi bridge %d init failed, %d\n", i, rc); - dpu_encoder_destroy(encoder); - continue; - } - - connector = dpu_connector_init(dev, - encoder, - 0, - display, - &dsi_ops, - DRM_CONNECTOR_POLL_HPD, - DRM_MODE_CONNECTOR_DSI); - if (connector) { - priv->encoders[priv->num_encoders++] = encoder; - } else { - DPU_ERROR("dsi %d connector init failed\n", i); - dsi_display_drm_bridge_deinit(display); - dpu_encoder_destroy(encoder); - } - } -} -#endif - -#ifdef CONFIG_DRM_MSM_WRITEBACK -static void _dpu_kms_initialize_wb(struct drm_device *dev, - struct msm_drm_private *priv, - struct dpu_kms *dpu_kms, - unsigned max_encoders) + struct dpu_kms *dpu_kms) { - static const struct dpu_connector_ops wb_ops = { - .post_init = dpu_wb_connector_post_init, - .detect = dpu_wb_connector_detect, - .get_modes = dpu_wb_connector_get_modes, - .set_property = dpu_wb_connector_set_property, - .get_info = dpu_wb_get_info, - .soft_reset = NULL, - .get_mode_info = dpu_wb_get_mode_info, - .get_dst_format = NULL - }; - struct msm_display_info info; - struct drm_encoder *encoder; - void *display, *connector; + struct drm_encoder *encoder = NULL; int i, rc;

- /* wb */ - for (i = 0; i < dpu_kms->wb_display_count && - priv->num_encoders < max_encoders; ++i) { - display = dpu_kms->wb_displays[i]; - encoder = NULL; - - memset(&info, 0x0, sizeof(info)); - rc = dpu_wb_get_info(&info, display); - if (rc) { - DPU_ERROR("wb get_info %d failed\n", i); - continue; - } - - encoder = dpu_encoder_init(dev, &info); - if (IS_ERR_OR_NULL(encoder)) { - DPU_ERROR("encoder init failed for wb %d\n", i); - continue; - } - - rc = dpu_wb_drm_init(display, encoder); - if (rc) { - DPU_ERROR("wb bridge %d init failed, %d\n", i, rc); - dpu_encoder_destroy(encoder); - continue; - } - - connector = dpu_connector_init(dev, - encoder, - 0, - display, - &wb_ops, - DRM_CONNECTOR_POLL_HPD, - DRM_MODE_CONNECTOR_VIRTUAL); - if (connector) { - priv->encoders[priv->num_encoders++] = encoder; - } else { - DPU_ERROR("wb %d connector init failed\n", i); - dpu_wb_drm_deinit(display); - dpu_encoder_destroy(encoder); - } + /*TODO: Support two independent DSI connectors */ + encoder = dpu_encoder_init(dev, DRM_MODE_CONNECTOR_DSI); + if (IS_ERR_OR_NULL(encoder)) { + DPU_ERROR("encoder init failed for dsi display\n"); + return; } -} -#endif - -#ifdef CONFIG_DRM_MSM_DISPLAYPORT -static void _dpu_kms_initialize_dp(struct drm_device *dev, - struct msm_drm_private *priv, - struct dpu_kms *dpu_kms, - unsigned max_encoders) -{ - static const struct dpu_connector_ops dp_ops = { - .post_init = dp_connector_post_init, - .detect = dp_connector_detect, - .get_modes = dp_connector_get_modes, - .mode_valid = dp_connector_mode_valid, - .get_info = dp_connector_get_info, - .get_mode_info = dp_connector_get_mode_info, - .send_hpd_event = dp_connector_send_hpd_event, - }; - struct msm_display_info info; - struct drm_encoder *encoder; - void *display, *connector; - int i, rc;

- /* dp */ - for (i = 0; i < dpu_kms->dp_display_count && - priv->num_encoders < max_encoders; ++i) { - display = dpu_kms->dp_displays[i]; - encoder = NULL; + priv->encoders[priv->num_encoders++] = encoder;

- memset(&info, 0x0, sizeof(info)); - rc = dp_connector_get_info(&info, display); - if (rc) { - DPU_ERROR("dp get_info %d failed\n", i); - continue; + for (i = 0; i < ARRAY_SIZE(priv->dsi); i++) { + if (!priv->dsi[i]) { + DPU_DEBUG("invalid msm_dsi for ctrl %d\n", i); + return; }

- encoder = dpu_encoder_init(dev, &info); - if (IS_ERR_OR_NULL(encoder)) { - DPU_ERROR("dp encoder init failed %d\n", i); - continue; - } - - rc = dp_drm_bridge_init(display, encoder); + rc = msm_dsi_modeset_init(priv->dsi[i], dev, encoder); if (rc) { - DPU_ERROR("dp bridge %d init failed, %d\n", i, rc); - dpu_encoder_destroy(encoder); + DPU_ERROR("modeset_init failed for dsi[%d], rc = %d\n", + i, rc); continue; } - - connector = dpu_connector_init(dev, - encoder, - NULL, - display, - &dp_ops, - DRM_CONNECTOR_POLL_HPD, - DRM_MODE_CONNECTOR_DisplayPort); - if (connector) { - priv->encoders[priv->num_encoders++] = encoder; - } else { - DPU_ERROR("dp %d connector init failed\n", i); - dp_drm_bridge_deinit(display); - dpu_encoder_destroy(encoder); - } } } -#endif

/** * _dpu_kms_setup_displays - create encoders, bridges and connectors @@ -877,26 +569,12 @@ static void _dpu_kms_setup_displays(struct drm_device *dev, struct msm_drm_private *priv, struct dpu_kms *dpu_kms) { - unsigned max_encoders; - - max_encoders = dpu_kms->dsi_display_count + dpu_kms->wb_display_count + - dpu_kms->dp_display_count; - if (max_encoders > ARRAY_SIZE(priv->encoders)) { - max_encoders = ARRAY_SIZE(priv->encoders); - DPU_ERROR("capping number of displays to %d", max_encoders); - } - -#ifdef CONFIG_DRM_MSM_DSI_STAGING - _dpu_kms_initialize_dsi(dev, priv, dpu_kms, max_encoders); -#endif + _dpu_kms_initialize_dsi(dev, priv, dpu_kms);

-#ifdef CONFIG_DRM_MSM_WRITEBACK - _dpu_kms_initialize_wb(dev, priv, dpu_kms, max_encoders); -#endif - -#ifdef CONFIG_DRM_MSM_DISPLAYPORT - _dpu_kms_initialize_dp(dev, priv, dpu_kms, max_encoders); -#endif + /** + * Extend this function to initialize other + * types of displays + */ }

static void _dpu_kms_drm_obj_destroy(struct dpu_kms *dpu_kms) @@ -931,8 +609,6 @@ static void _dpu_kms_drm_obj_destroy(struct dpu_kms *dpu_kms) for (i = 0; i < priv->num_encoders; i++) priv->encoders[i]->funcs->destroy(priv->encoders[i]); priv->num_encoders = 0; - - _dpu_kms_release_displays(dpu_kms); }

static int _dpu_kms_drm_obj_init(struct dpu_kms *dpu_kms) @@ -963,12 +639,12 @@ static int _dpu_kms_drm_obj_init(struct dpu_kms *dpu_kms) ret = dpu_core_irq_domain_add(dpu_kms); if (ret) goto fail_irq; + /* - * Query for underlying display drivers, and create connectors, - * bridges and encoders for them. + * Create encoder and query display drivers to create + * bridges and connectors */ - if (!_dpu_kms_get_displays(dpu_kms)) - (void)_dpu_kms_setup_displays(dev, priv, dpu_kms); + _dpu_kms_setup_displays(dev, priv, dpu_kms);

max_crtc_count = min(catalog->mixer_count, priv->num_encoders);

@@ -1386,8 +1062,6 @@ static void _dpu_kms_hw_destroy(struct dpu_kms *dpu_kms, dpu_power_handle_unregister_event( &priv->phandle, dpu_kms->power_event);

- _dpu_kms_release_displays(dpu_kms); - /* safe to call these more than once during shutdown */ _dpu_debugfs_destroy(dpu_kms); _dpu_kms_mmu_destroy(dpu_kms); @@ -1590,53 +1264,10 @@ static int dpu_kms_atomic_check(struct msm_kms *kms, dpu_kms->aspace[domain] : NULL; }

-static void _dpu_kms_post_open(struct msm_kms *kms, struct drm_file *file) -{ - struct drm_device *dev = NULL; - struct dpu_kms *dpu_kms = NULL; - struct drm_connector *connector = NULL; - struct drm_connector_list_iter conn_iter; - struct dpu_connector *dpu_conn = NULL; - - if (!kms) { - DPU_ERROR("invalid kms\n"); - return; - } - - dpu_kms = to_dpu_kms(kms); - dev = dpu_kms->dev; - - if (!dev) { - DPU_ERROR("invalid device\n"); - return; - } - - if (!dev->mode_config.poll_enabled) - return; - - mutex_lock(&dev->mode_config.mutex); - drm_connector_list_iter_begin(dev, &conn_iter); - drm_for_each_connector_iter(connector, &conn_iter) { - /* Only handle HPD capable connectors. */ - if (!(connector->polled & DRM_CONNECTOR_POLL_HPD)) - continue; - - dpu_conn = to_dpu_connector(connector); - - if (dpu_conn->ops.send_hpd_event) - dpu_conn->ops.send_hpd_event(dpu_conn->display); - } - drm_connector_list_iter_end(&conn_iter); - mutex_unlock(&dev->mode_config.mutex); - -} - static int dpu_kms_pm_suspend(struct device *dev) { struct drm_device *ddev; struct drm_modeset_acquire_ctx ctx; - struct drm_connector *conn; - struct drm_connector_list_iter conn_iter; struct drm_atomic_state *state; struct dpu_kms *dpu_kms; int ret = 0, num_crtcs = 0; @@ -1680,45 +1311,6 @@ static int dpu_kms_pm_suspend(struct device *dev) }

state->acquire_ctx = &ctx; - drm_connector_list_iter_begin(ddev, &conn_iter); - drm_for_each_connector_iter(conn, &conn_iter) { - struct drm_crtc_state *crtc_state; - uint64_t lp; - - if (!conn->state || !conn->state->crtc || - conn->dpms != DRM_MODE_DPMS_ON) - continue; - - lp = dpu_connector_get_lp(conn); - if (lp == DPU_MODE_DPMS_LP1) { - /* transition LP1->LP2 on pm suspend */ - ret = dpu_connector_set_property_for_commit(conn, state, - CONNECTOR_PROP_LP, DPU_MODE_DPMS_LP2); - if (ret) { - DRM_ERROR("failed to set lp2 for conn %d\n", - conn->base.id); - drm_atomic_state_put(state); - goto unlock; - } - } - - if (lp != DPU_MODE_DPMS_LP2) { - /* force CRTC to be inactive */ - crtc_state = drm_atomic_get_crtc_state(state, - conn->state->crtc); - if (IS_ERR_OR_NULL(crtc_state)) { - DRM_ERROR("failed to get crtc %d state\n", - conn->state->crtc->base.id); - drm_atomic_state_put(state); - goto unlock; - } - - if (lp != DPU_MODE_DPMS_LP1) - crtc_state->active = false; - ++num_crtcs; - } - } - drm_connector_list_iter_end(&conn_iter);

/* check for nothing to do */ if (num_crtcs == 0) { @@ -1790,6 +1382,34 @@ static int dpu_kms_pm_resume(struct device *dev) return 0; }

+void _dpu_kms_set_encoder_mode(struct msm_kms *kms, + struct drm_encoder *encoder, + bool cmd_mode) +{ + struct msm_display_info info; + struct msm_drm_private *priv = encoder->dev->dev_private; + int i, rc = 0; + + memset(&info, 0, sizeof(info)); + + info.intf_type = encoder->encoder_type; + info.capabilities = cmd_mode ? MSM_DISPLAY_CAP_CMD_MODE : + MSM_DISPLAY_CAP_VID_MODE; + + /* TODO: No support for DSI swap */ + for (i = 0; i < ARRAY_SIZE(priv->dsi); i++) { + if (priv->dsi[i]) { + info.h_tile_instance[info.num_of_h_tiles] = i; + info.num_of_h_tiles++; + } + } + + rc = dpu_encoder_setup(encoder->dev, encoder, &info); + if (rc) + DPU_ERROR("failed to setup DPU encoder %d: rc:%d\n", + encoder->base.id, rc); +} + static const struct msm_kms_funcs kms_funcs = { .hw_init = dpu_kms_hw_init, .postinit = dpu_kms_postinit, @@ -1813,7 +1433,7 @@ static int dpu_kms_pm_resume(struct device *dev) .pm_resume = dpu_kms_pm_resume, .destroy = dpu_kms_destroy, .get_address_space = _dpu_kms_get_address_space, - .postopen = _dpu_kms_post_open, + .set_encoder_mode = _dpu_kms_set_encoder_mode, };

/* the caller api needs to turn on clock before calling it */ diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h index 3711daf8..5b0c081 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h @@ -200,12 +200,6 @@ struct dpu_kms {

struct dpu_hw_vbif *hw_vbif[VBIF_MAX]; struct dpu_hw_mdp *hw_mdp; - int dsi_display_count; - void **dsi_displays; - int wb_display_count; - void **wb_displays; - int dp_display_count; - void **dp_displays;

bool has_danger_ctrl; }; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c index c8c12d3..dc740ca 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c @@ -23,7 +23,6 @@ #include "dpu_hw_intf.h" #include "dpu_hw_wb.h" #include "dpu_encoder.h" -#include "dpu_connector.h"

#define RESERVED_BY_OTHER(h, r) \ ((h)->rsvp && ((h)->rsvp->enc_id != (r)->enc_id)) @@ -158,6 +157,18 @@ struct dpu_hw_mdp *dpu_rm_get_mdp(struct dpu_rm *rm) return rm->hw_mdp; }

+enum dpu_rm_topology_name +dpu_rm_get_topology_name(struct msm_display_topology topology) +{ + int i; + + for (i = 0; i < DPU_RM_TOPOLOGY_MAX; i++) + if (RM_IS_TOPOLOGY_MATCH(g_top_table[i], topology)) + return g_top_table[i].top_name; + + return DPU_RM_TOPOLOGY_NONE; +} + void dpu_rm_init_hw_iter( struct dpu_rm_hw_iter *iter, uint32_t enc_id, @@ -954,20 +965,19 @@ static int _dpu_rm_populate_requirements( struct drm_encoder *enc, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state, - struct dpu_rm_requirements *reqs) + struct dpu_rm_requirements *reqs, + struct msm_display_topology req_topology) { const struct drm_display_mode *mode = &crtc_state->mode; int i;

memset(reqs, 0, sizeof(*reqs));

- reqs->top_ctrl = dpu_connector_get_property(conn_state, - CONNECTOR_PROP_TOPOLOGY_CONTROL); dpu_encoder_get_hw_resources(enc, &reqs->hw_res, conn_state);

for (i = 0; i < DPU_RM_TOPOLOGY_MAX; i++) { if (RM_IS_TOPOLOGY_MATCH(g_top_table[i], - reqs->hw_res.topology)) { + req_topology)) { reqs->topology = &g_top_table[i]; break; } @@ -978,10 +988,6 @@ static int _dpu_rm_populate_requirements( return -EINVAL; }

- /* DSC blocks are hardwired for control path 0 and 1 */ - if (reqs->topology->num_comp_enc) - reqs->top_ctrl |= BIT(DPU_RM_TOPCTL_DSPP); - /** * Set the requirement based on caps if not set from user space * This will ensure to select LM tied with DS blocks @@ -1089,7 +1095,6 @@ void dpu_rm_release(struct dpu_rm *rm, struct drm_encoder *enc) { struct dpu_rm_rsvp *rsvp; struct drm_connector *conn; - uint64_t top_ctrl;

if (!rm || !enc) { DPU_ERROR("invalid params\n"); @@ -1110,24 +1115,7 @@ void dpu_rm_release(struct dpu_rm *rm, struct drm_encoder *enc) goto end; }

- top_ctrl = dpu_connector_get_property(conn->state, - CONNECTOR_PROP_TOPOLOGY_CONTROL); - - if (top_ctrl & BIT(DPU_RM_TOPCTL_RESERVE_LOCK)) { - DPU_DEBUG("rsvp[s%de%d] not releasing locked resources\n", - rsvp->seq, rsvp->enc_id); - } else { - DPU_DEBUG("release rsvp[s%de%d]\n", rsvp->seq, - rsvp->enc_id); - _dpu_rm_release_rsvp(rm, rsvp, conn); - - (void) msm_property_set_property( - dpu_connector_get_propinfo(conn), - dpu_connector_get_property_state(conn->state), - CONNECTOR_PROP_TOPOLOGY_NAME, - DPU_RM_TOPOLOGY_NONE); - } - + _dpu_rm_release_rsvp(rm, rsvp, conn); end: mutex_unlock(&rm->rm_lock); } @@ -1141,18 +1129,6 @@ static int _dpu_rm_commit_rsvp( enum dpu_hw_blk_type type; int ret = 0;

- ret = msm_property_set_property( - dpu_connector_get_propinfo(conn_state->connector), - dpu_connector_get_property_state(conn_state), - CONNECTOR_PROP_TOPOLOGY_NAME, - rsvp->topology); - if (ret) { - DPU_ERROR("failed to set topology name property, ret %d\n", - ret); - _dpu_rm_release_rsvp(rm, rsvp, conn_state->connector); - return ret; - } - /* Swap next rsvp to be the active */ for (type = 0; type < DPU_HW_BLK_MAX; type++) { list_for_each_entry(blk, &rm->hw_blks[type], list) { @@ -1177,6 +1153,7 @@ int dpu_rm_reserve( struct drm_encoder *enc, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state, + struct msm_display_topology topology, bool test_only) { struct dpu_rm_rsvp *rsvp_cur, *rsvp_nxt; @@ -1202,7 +1179,7 @@ int dpu_rm_reserve( _dpu_rm_print_rsvps(rm, DPU_RM_STAGE_BEGIN);

ret = _dpu_rm_populate_requirements(rm, enc, crtc_state, - conn_state, &reqs); + conn_state, &reqs, topology); if (ret) { DPU_ERROR("failed to populate hw requirements\n"); goto end; @@ -1237,12 +1214,6 @@ int dpu_rm_reserve( _dpu_rm_release_rsvp(rm, rsvp_cur, conn_state->connector); rsvp_cur = NULL; _dpu_rm_print_rsvps(rm, DPU_RM_STAGE_AFTER_CLEAR); - (void) msm_property_set_property( - dpu_connector_get_propinfo( - conn_state->connector), - dpu_connector_get_property_state(conn_state), - CONNECTOR_PROP_TOPOLOGY_NAME, - DPU_RM_TOPOLOGY_NONE); }

/* Check the proposed reservation, store it in hw's "next" field */ diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h index 8a6cbcf..4c77874 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h @@ -128,6 +128,7 @@ int dpu_rm_init(struct dpu_rm *rm, * @drm_enc: DRM Encoder handle * @crtc_state: Proposed Atomic DRM CRTC State handle * @conn_state: Proposed Atomic DRM Connector State handle + * @topology: Pointer to topology info for the display * @test_only: Atomic-Test phase, discard results (unless property overrides) * @Return: 0 on Success otherwise -ERROR */ @@ -135,6 +136,7 @@ int dpu_rm_reserve(struct dpu_rm *rm, struct drm_encoder *drm_enc, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state, + struct msm_display_topology topology, bool test_only);

/** @@ -187,4 +189,13 @@ void dpu_rm_init_hw_iter( */ int dpu_rm_check_property_topctl(uint64_t val);

+/** + * dpu_rm_get_topology_name - returns the name of the the given topology + * definition + * @topology: topology definition + * @Return: name of the topology + */ +enum dpu_rm_topology_name +dpu_rm_get_topology_name(struct msm_display_topology topology); + #endif /* __DPU_RM_H__ */ diff --git a/drivers/gpu/drm/msm/dpu_dbg.c b/drivers/gpu/drm/msm/dpu_dbg.c index 54ea631..4a39b82 100644 --- a/drivers/gpu/drm/msm/dpu_dbg.c +++ b/drivers/gpu/drm/msm/dpu_dbg.c @@ -2547,9 +2547,6 @@ static void _dpu_dump_array(struct dpu_dbg_reg_base *blk_arr[], if (dump_dbgbus_vbif_rt) _dpu_dbg_dump_vbif_dbg_bus(&dpu_dbg_base.dbgbus_vbif_rt);

- if (dpu_dbg_base.dsi_dbg_bus || dump_all) - dsi_ctrl_debug_dump(); - if (do_panic && dpu_dbg_base.panic_on_err) panic(name); } diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c index a6fe3a1..ebc40a9 100644 --- a/drivers/gpu/drm/msm/msm_drv.c +++ b/drivers/gpu/drm/msm/msm_drv.c @@ -47,12 +47,6 @@ #include "msm_fence.h" #include "msm_gpu.h" #include "msm_kms.h" -#ifdef CONFIG_DRM_MSM_WRITEBACK -#include "dpu_wb.h" -#endif -#ifdef CONFIG_DRM_MSM_DSI_STAGING -#include "dsi_display.h" -#endif #ifdef CONFIG_DRM_MSM_DPU #include "dpu_dbg.h" #endif @@ -1297,9 +1291,6 @@ int msm_ioctl_rmfb2(struct drm_device *dev, void *data, DRM_IOCTL_DEF_DRV(MSM_GEM_MADVISE, msm_ioctl_gem_madvise, DRM_AUTH|DRM_RENDER_ALLOW), DRM_IOCTL_DEF_DRV(MSM_SUBMITQUEUE_NEW, msm_ioctl_submitqueue_new, DRM_AUTH|DRM_RENDER_ALLOW), DRM_IOCTL_DEF_DRV(MSM_SUBMITQUEUE_CLOSE, msm_ioctl_submitqueue_close, DRM_AUTH|DRM_RENDER_ALLOW), -#ifdef CONFIG_DRM_MSM_WRITEBACK - DRM_IOCTL_DEF_DRV(DPU_WB_CONFIG, dpu_wb_config, DRM_UNLOCKED|DRM_AUTH), -#endif DRM_IOCTL_DEF_DRV(MSM_RMFB2, msm_ioctl_rmfb2, DRM_CONTROL_ALLOW|DRM_UNLOCKED), }; @@ -1541,42 +1532,6 @@ static int add_display_components(struct device *dev, struct device *mdp_dev = NULL; int ret;

-#ifdef CONFIG_DRM_MSM_DPU - struct device_node *node; - const char *name; - - if (of_device_is_compatible(dev->of_node, "qcom,dpu-kms")) { - struct device_node *np = dev->of_node; - unsigned int i; - bool found = false; - -#ifdef CONFIG_DRM_MSM_DSI_STAGING - for (i = 0; i < MAX_DSI_ACTIVE_DISPLAY; i++) { - node = dsi_display_get_boot_display(i); - - if (node != NULL) { - name = of_get_property(node, "label", NULL); - component_match_add(dev, matchptr, compare_of, - node); - pr_debug("Added component = %s\n", name); - found = true; - } - } - if (!found) - return -EPROBE_DEFER; -#endif - - for (i = 0; ; i++) { - node = of_parse_phandle(np, "connectors", i); - if (!node) - break; - - component_match_add(dev, matchptr, compare_of, node); - } - return 0; - } -#endif - /* * MDP5 based devices don't have a flat hierarchy. There is a top level * parent: MDSS, and children: MDP5, DSI, HDMI, eDP etc. Populate the @@ -1600,7 +1555,7 @@ static int add_display_components(struct device *dev, put_device(mdp_dev);

/* add the MDP component itself */ - component_match_add(dev, matchptr, compare_of, + drm_of_component_match_add(dev, matchptr, compare_of, mdp_dev->of_node); } else { /* MDP4 */ diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h index eaf2b6a..90a2521 100644 --- a/drivers/gpu/drm/msm/msm_drv.h +++ b/drivers/gpu/drm/msm/msm_drv.h @@ -159,8 +159,6 @@ enum msm_mdp_conn_property { CONNECTOR_PROP_AD_BL_SCALE,

/* enum/bitmask properties */ - CONNECTOR_PROP_TOPOLOGY_NAME, - CONNECTOR_PROP_TOPOLOGY_CONTROL, CONNECTOR_PROP_AUTOREFRESH, CONNECTOR_PROP_LP,

@@ -331,57 +329,20 @@ struct msm_display_topology { };

/** - * struct msm_mode_info - defines all msm custom mode info - * @frame_rate: frame_rate of the mode - * @vtotal: vtotal calculated for the mode - * @prefill_lines: prefill lines based on porches. - * @jitter_numer: display panel jitter numerator configuration - * @jitter_denom: display panel jitter denominator configuration - * @topology: supported topology for the mode - */ -struct msm_mode_info { - uint32_t frame_rate; - uint32_t vtotal; - uint32_t prefill_lines; - uint32_t jitter_numer; - uint32_t jitter_denom; - struct msm_display_topology topology; -}; - -/** * struct msm_display_info - defines display properties * @intf_type: DRM_MODE_CONNECTOR_ display type * @capabilities: Bitmask of display flags * @num_of_h_tiles: Number of horizontal tiles in case of split interface * @h_tile_instance: Controller instance used per tile. Number of elements is * based on num_of_h_tiles - * @is_connected: Set to true if display is connected - * @width_mm: Physical width - * @height_mm: Physical height - * @max_width: Max width of display. In case of hot pluggable display - * this is max width supported by controller - * @max_height: Max height of display. In case of hot pluggable display - * this is max height supported by controller - * @is_primary: Set to true if display is primary display * @is_te_using_watchdog_timer: Boolean to indicate watchdog TE is * used instead of panel TE in cmd mode panels */ struct msm_display_info { int intf_type; uint32_t capabilities; - uint32_t num_of_h_tiles; uint32_t h_tile_instance[MAX_H_TILES_PER_DISPLAY]; - - bool is_connected; - - unsigned int width_mm; - unsigned int height_mm; - - uint32_t max_width; - uint32_t max_height; - - bool is_primary; bool is_te_using_watchdog_timer; };