Hi Algea,

Thank you for the patch.

On Wed, Aug 12, 2020 at 04:34:33PM +0800, Algea Cao wrote:

Introduce dw_hdmi_connector_atomic_begin() and dw_hdmi_connector_atomic_flush() to implement connector atomic_begin/atomic_flush. When enc_out_bus_format or enc_in_bus_format changed, dw_hdmi_setup is called.

To avoid screen flash when updating bus format, it's need to send AVMUTE flag to make screen black, and clear flag after bus format updated.

Signed-off-by: Algea Cao algea.cao@rock-chips.com

drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 65 +++++++++++++++++++++++ drivers/gpu/drm/bridge/synopsys/dw-hdmi.h | 4 ++ 2 files changed, 69 insertions(+)

diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c index 6148a022569a..a1a81fc768c2 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c @@ -108,6 +108,8 @@ struct hdmi_vmode { };

struct hdmi_data_info {

• unsigned int prev_enc_in_bus_format;
• unsigned int prev_enc_out_bus_format; unsigned int enc_in_bus_format; unsigned int enc_out_bus_format; unsigned int enc_in_encoding;

@@ -116,6 +118,7 @@ struct hdmi_data_info { unsigned int hdcp_enable; struct hdmi_vmode video_mode; bool rgb_limited_range;

• bool update;

};

struct dw_hdmi_i2c { @@ -2401,6 +2404,60 @@ static int dw_hdmi_connector_get_modes(struct drm_connector *connector) return ret; }

+static void +dw_hdmi_connector_atomic_begin(struct drm_connector *connector,

• 	       struct drm_connector_state *conn_state)
  

+{

• struct dw_hdmi *hdmi = container_of(connector, struct dw_hdmi,

• 			    connector);
  

• unsigned int enc_in_bus_fmt = hdmi->hdmi_data.enc_in_bus_format;
• unsigned int enc_out_bus_fmt = hdmi->hdmi_data.enc_out_bus_format;
• unsigned int prev_enc_in_bus_fmt =

• hdmi->hdmi_data.prev_enc_in_bus_format;
  

• unsigned int prev_enc_out_bus_fmt =

• hdmi->hdmi_data.prev_enc_out_bus_format;
  

• if (!conn_state->crtc)

• return;
  

• if (!hdmi->hdmi_data.video_mode.mpixelclock)

• return;
  

• if (enc_in_bus_fmt != prev_enc_in_bus_fmt ||

•    enc_out_bus_fmt != prev_enc_out_bus_fmt) {
  

• hdmi->hdmi_data.update = true;
  

• hdmi_writeb(hdmi, HDMI_FC_GCP_SET_AVMUTE, HDMI_FC_GCP);
  

• /* Add delay to make av mute work on sink*/
  

• msleep(50);
  

• } else {

• hdmi->hdmi_data.update = false;
  

• }

+}

+static void +dw_hdmi_connector_atomic_flush(struct drm_connector *connector,

• 	       struct drm_connector_state *conn_state)
  

+{

• struct dw_hdmi *hdmi = container_of(connector, struct dw_hdmi,

• 			     connector);
  

• if (!conn_state->crtc)

• return;
  

• DRM_DEBUG("%s\n", __func__);
• if (hdmi->hdmi_data.update) {

• dw_hdmi_setup(hdmi, hdmi->curr_conn, &hdmi->previous_mode);
  

• /*
  

•  * Before clear AVMUTE, delay is needed to
  

•  * prevent display flash.
  

•  */
  

• msleep(50);
  

• hdmi_writeb(hdmi, HDMI_FC_GCP_CLEAR_AVMUTE, HDMI_FC_GCP);
  

• hdmi->hdmi_data.update = false;
  

• }

+}

static bool hdr_metadata_equal(const struct drm_connector_state *old_state, const struct drm_connector_state *new_state) { @@ -2465,6 +2522,8 @@ static const struct drm_connector_funcs dw_hdmi_connector_funcs = { static const struct drm_connector_helper_funcs dw_hdmi_connector_helper_funcs = { .get_modes = dw_hdmi_connector_get_modes, .atomic_check = dw_hdmi_connector_atomic_check,

• .atomic_begin = dw_hdmi_connector_atomic_begin,
• .atomic_flush = dw_hdmi_connector_atomic_flush,

};

static int dw_hdmi_connector_create(struct dw_hdmi *hdmi) @@ -2778,6 +2837,12 @@ static int dw_hdmi_bridge_atomic_check(struct drm_bridge *bridge, { struct dw_hdmi *hdmi = bridge->driver_private;

• hdmi->hdmi_data.prev_enc_out_bus_format =

• 	hdmi->hdmi_data.enc_out_bus_format;
  

• hdmi->hdmi_data.prev_enc_in_bus_format =

• 	hdmi->hdmi_data.enc_in_bus_format;
  

• hdmi->hdmi_data.enc_out_bus_format = bridge_state->output_bus_cfg.format;

.atomic_check() isn't allowed to change the device state, neither the hardware state, nor the software state stored in struct dw_hdmi. You essentially need to treat the drm_bridge and dw_hdmi as const in the .atomic_check() operation.

diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.h b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.h index 1999db05bc3b..05182418efbb 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.h +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.h @@ -842,6 +842,10 @@ enum { HDMI_FC_AVICONF3_QUANT_RANGE_LIMITED = 0x00, HDMI_FC_AVICONF3_QUANT_RANGE_FULL = 0x04,

+/* HDMI_FC_GCP */

• HDMI_FC_GCP_SET_AVMUTE = 0x2,
• HDMI_FC_GCP_CLEAR_AVMUTE = 0x1,

/* FC_DBGFORCE field values */ HDMI_FC_DBGFORCE_FORCEAUDIO = 0x10, HDMI_FC_DBGFORCE_FORCEVIDEO = 0x1,

On 12/08/2020 10:34, Algea Cao wrote:

Introduce previous_pixelclock/previous_tmdsclock to determine whether PHY needs initialization. If phy is power off, or mpixelclock/mtmdsclock is different to previous value, phy is neet to be reinitialized.

Signed-off-by: Algea Cao algea.cao@rock-chips.com

drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 50 +++++++++++++++++++---- 1 file changed, 43 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c index a1a81fc768c2..1eb4736b9b59 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c @@ -101,6 +101,8 @@ static const u16 csc_coeff_rgb_full_to_rgb_limited[3][4] = { struct hdmi_vmode { bool mdataenablepolarity;

• unsigned int previous_pixelclock;
• unsigned int previous_tmdsclock; unsigned int mpixelclock; unsigned int mpixelrepetitioninput; unsigned int mpixelrepetitionoutput;

@@ -890,6 +892,32 @@ static int hdmi_bus_fmt_color_depth(unsigned int bus_format) } }

+static unsigned int +hdmi_get_tmdsclock(struct dw_hdmi *hdmi, unsigned long mpixelclock) +{

• unsigned int tmdsclock = mpixelclock;
• unsigned int depth =

• hdmi_bus_fmt_color_depth(hdmi->hdmi_data.enc_out_bus_format);
  

• if (!hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format)) {

• switch (depth) {
  

• case 16:
  

• 	tmdsclock = mpixelclock * 2;
  

• 	break;
  

• case 12:
  

• 	tmdsclock = mpixelclock * 3 / 2;
  

• 	break;
  

• case 10:
  

• 	tmdsclock = mpixelclock * 5 / 4;
  

• 	break;
  

• default:
  

• 	break;
  

• }
  

• }

Where does this come from ? Please introduce this on another patch.

Neil

• return tmdsclock;

+}

/*

• this submodule is responsible for the video data synchronization.
• for example, for RGB 4:4:4 input, the data map is defined as

@@ -1861,11 +1889,13 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi, int hblank, vblank, h_de_hs, v_de_vs, hsync_len, vsync_len; unsigned int vdisplay, hdisplay;

• vmode->previous_pixelclock = vmode->mpixelclock; vmode->mpixelclock = mode->clock * 1000;

  dev_dbg(hdmi->dev, "final pixclk = %d\n", vmode->mpixelclock);

• vmode->mtmdsclock = vmode->mpixelclock;

• vmode->previous_tmdsclock = vmode->mtmdsclock;

• vmode->mtmdsclock = hdmi_get_tmdsclock(hdmi, vmode->mpixelclock);

  if (!hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format)) { switch (hdmi_bus_fmt_color_depth(

@@ -2172,12 +2202,18 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi, hdmi_av_composer(hdmi, &connector->display_info, mode);

/* HDMI Initializateion Step B.2 */

• ret = hdmi->phy.ops->init(hdmi, hdmi->phy.data,

• 		  &connector->display_info,
  

• 		  &hdmi->previous_mode);
  

• if (ret)

• return ret;
  

• hdmi->phy.enabled = true;

• if (!hdmi->phy.enabled ||

•    hdmi->hdmi_data.video_mode.previous_pixelclock !=
  

•    hdmi->hdmi_data.video_mode.mpixelclock ||
  

•    hdmi->hdmi_data.video_mode.previous_tmdsclock !=
  

•    hdmi->hdmi_data.video_mode.mtmdsclock) {
  

• ret = hdmi->phy.ops->init(hdmi, hdmi->phy.data,
  

• 			  &connector->display_info,
  

• 			  &hdmi->previous_mode);
  

• if (ret)
  

• 	return ret;
  

• hdmi->phy.enabled = true;
  

• }

  /* HDMI Initialization Step B.3 */ dw_hdmi_enable_video_path(hdmi);

Hi Algea,

Thank you for the patch.

On Wed, Aug 12, 2020 at 04:35:43PM +0800, Algea Cao wrote:

Introduce struct dw_hdmi_property_ops in plat_data to support vendor hdmi property.

Implement hdmi vendor properties color_depth_property and hdmi_output_property to config hdmi output color depth and color format.

The property "hdmi_output_format", the possible value could be: - RGB - YCBCR 444 - YCBCR 422 - YCBCR 420

Default value of the property is set to 0 = RGB, so no changes if you don't set the property.

The property "hdmi_output_depth" possible value could be - Automatic This indicates prefer highest color depth, it is 30bit on rockcip platform. - 24bit - 30bit The default value of property is 24bit.

Signed-off-by: Algea Cao algea.cao@rock-chips.com

drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 174 ++++++++++++++++++++ include/drm/bridge/dw_hdmi.h | 22 +++ 2 files changed, 196 insertions(+)

diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c index 23de359a1dec..8f22d9a566db 100644 --- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c @@ -52,6 +52,27 @@

#define HIWORD_UPDATE(val, mask) (val | (mask) << 16)

+/* HDMI output pixel format */ +enum drm_hdmi_output_type {

• DRM_HDMI_OUTPUT_DEFAULT_RGB, /* default RGB */
• DRM_HDMI_OUTPUT_YCBCR444, /* YCBCR 444 */
• DRM_HDMI_OUTPUT_YCBCR422, /* YCBCR 422 */
• DRM_HDMI_OUTPUT_YCBCR420, /* YCBCR 420 */
• DRM_HDMI_OUTPUT_YCBCR_HQ, /* Highest subsampled YUV */
• DRM_HDMI_OUTPUT_YCBCR_LQ, /* Lowest subsampled YUV */
• DRM_HDMI_OUTPUT_INVALID, /* Guess what ? */

+};

Vendor-specific properties shouldn't use names starting with drm_ or DRM_, that's for the DRM core. But this doesn't seem specific to Rockchip at all, it should be a standard property. Additionally, new properties need to come with a userspace implementation showing their usage, in X.org, Weston, the Android DRM/KMS HW composer, or another relevant upstream project (a test tool is usually not enough).

+enum dw_hdmi_rockchip_color_depth {

• ROCKCHIP_HDMI_DEPTH_8,
• ROCKCHIP_HDMI_DEPTH_10,
• ROCKCHIP_HDMI_DEPTH_12,
• ROCKCHIP_HDMI_DEPTH_16,
• ROCKCHIP_HDMI_DEPTH_420_10,
• ROCKCHIP_HDMI_DEPTH_420_12,
• ROCKCHIP_HDMI_DEPTH_420_16

+};

/**

• struct rockchip_hdmi_chip_data - splite the grf setting of kind of chips
• @lcdsel_grf_reg: grf register offset of lcdc select

@@ -73,6 +94,12 @@ struct rockchip_hdmi { struct clk *grf_clk; struct dw_hdmi *hdmi; struct phy *phy;

• struct drm_property *color_depth_property;
• struct drm_property *hdmi_output_property;
• unsigned int colordepth;
• enum drm_hdmi_output_type hdmi_output;

};

#define to_rockchip_hdmi(x) container_of(x, struct rockchip_hdmi, x) @@ -327,6 +354,150 @@ static void dw_hdmi_rockchip_genphy_disable(struct dw_hdmi *dw_hdmi, void *data) phy_power_off(hdmi->phy); }

+static const struct drm_prop_enum_list color_depth_enum_list[] = {

• { 0, "Automatic" }, /* Prefer highest color depth */
• { 8, "24bit" },
• { 10, "30bit" },

+};

+static const struct drm_prop_enum_list drm_hdmi_output_enum_list[] = {

• { DRM_HDMI_OUTPUT_DEFAULT_RGB, "output_rgb" },
• { DRM_HDMI_OUTPUT_YCBCR444, "output_ycbcr444" },
• { DRM_HDMI_OUTPUT_YCBCR422, "output_ycbcr422" },
• { DRM_HDMI_OUTPUT_YCBCR420, "output_ycbcr420" },
• { DRM_HDMI_OUTPUT_YCBCR_HQ, "output_ycbcr_high_subsampling" },
• { DRM_HDMI_OUTPUT_YCBCR_LQ, "output_ycbcr_low_subsampling" },
• { DRM_HDMI_OUTPUT_INVALID, "invalid_output" },

+};

+static void +dw_hdmi_rockchip_attach_properties(struct drm_connector *connector,

• 		   unsigned int color, int version,
  

• 		   void *data)
  

+{

• struct rockchip_hdmi *hdmi = (struct rockchip_hdmi *)data;
• struct drm_property *prop;
• switch (color) {
• case MEDIA_BUS_FMT_RGB101010_1X30:

• hdmi->hdmi_output = DRM_HDMI_OUTPUT_DEFAULT_RGB;
  

• hdmi->colordepth = 10;
  

• break;
  

• case MEDIA_BUS_FMT_YUV8_1X24:

• hdmi->hdmi_output = DRM_HDMI_OUTPUT_YCBCR444;
  

• hdmi->colordepth = 8;
  

• break;
  

• case MEDIA_BUS_FMT_YUV10_1X30:

• hdmi->hdmi_output = DRM_HDMI_OUTPUT_YCBCR444;
  

• hdmi->colordepth = 10;
  

• break;
  

• case MEDIA_BUS_FMT_UYVY10_1X20:

• hdmi->hdmi_output = DRM_HDMI_OUTPUT_YCBCR422;
  

• hdmi->colordepth = 10;
  

• break;
  

• case MEDIA_BUS_FMT_UYVY8_1X16:

• hdmi->hdmi_output = DRM_HDMI_OUTPUT_YCBCR422;
  

• hdmi->colordepth = 8;
  

• break;
  

• case MEDIA_BUS_FMT_UYYVYY8_0_5X24:

• hdmi->hdmi_output = DRM_HDMI_OUTPUT_YCBCR420;
  

• hdmi->colordepth = 8;
  

• break;
  

• case MEDIA_BUS_FMT_UYYVYY10_0_5X30:

• hdmi->hdmi_output = DRM_HDMI_OUTPUT_YCBCR420;
  

• hdmi->colordepth = 10;
  

• break;
  

• default:

• hdmi->hdmi_output = DRM_HDMI_OUTPUT_DEFAULT_RGB;
  

• hdmi->colordepth = 8;
  

• }
• prop = drm_property_create_enum(connector->dev, 0,

• 			"hdmi_output_depth",
  

• 			color_depth_enum_list,
  

• 			ARRAY_SIZE(color_depth_enum_list));
  

• if (prop) {

• hdmi->color_depth_property = prop;
  

• drm_object_attach_property(&connector->base, prop, 0);
  

• }
• prop = drm_property_create_enum(connector->dev, 0, "hdmi_output_format",

• 			drm_hdmi_output_enum_list,
  

• 			ARRAY_SIZE(drm_hdmi_output_enum_list));
  

• if (prop) {

• hdmi->hdmi_output_property = prop;
  

• drm_object_attach_property(&connector->base, prop, 0);
  

• }

+}

+static void +dw_hdmi_rockchip_destroy_properties(struct drm_connector *connector,

• 		    void *data)
  

+{

• struct rockchip_hdmi *hdmi = (struct rockchip_hdmi *)data;
• if (hdmi->color_depth_property) {

• drm_property_destroy(connector->dev,
  

• 		     hdmi->color_depth_property);
  

• hdmi->color_depth_property = NULL;
  

• }
• if (hdmi->hdmi_output_property) {

• drm_property_destroy(connector->dev,
  

• 		     hdmi->hdmi_output_property);
  

• hdmi->hdmi_output_property = NULL;
  

• }

+}

+static int +dw_hdmi_rockchip_set_property(struct drm_connector *connector,

• 	      struct drm_connector_state *state,
  

• 	      struct drm_property *property,
  

• 	      u64 val,
  

• 	      void *data)
  

+{

• struct rockchip_hdmi *hdmi = (struct rockchip_hdmi *)data;
• if (property == hdmi->color_depth_property) {

• hdmi->colordepth = val;
  

• return 0;
  

• } else if (property == hdmi->hdmi_output_property) {

• hdmi->hdmi_output = val;
  

• return 0;
  

• }
• DRM_ERROR("failed to set rockchip hdmi connector property\n");
• return -EINVAL;

+}

+static int +dw_hdmi_rockchip_get_property(struct drm_connector *connector,

• 	      const struct drm_connector_state *state,
  

• 	      struct drm_property *property,
  

• 	      u64 *val,
  

• 	      void *data)
  

+{

• struct rockchip_hdmi *hdmi = (struct rockchip_hdmi *)data;
• if (property == hdmi->color_depth_property) {

• *val = hdmi->colordepth;
  

• return 0;
  

• } else if (property == hdmi->hdmi_output_property) {

• *val = hdmi->hdmi_output;
  

• return 0;
  

• }
• DRM_ERROR("failed to get rockchip hdmi connector property\n");
• return -EINVAL;

+}

+static const struct dw_hdmi_property_ops dw_hdmi_rockchip_property_ops = {

• .attach_properties = dw_hdmi_rockchip_attach_properties,
• .destroy_properties = dw_hdmi_rockchip_destroy_properties,
• .set_property = dw_hdmi_rockchip_set_property,
• .get_property = dw_hdmi_rockchip_get_property,

+};

static void dw_hdmi_rk3228_setup_hpd(struct dw_hdmi *dw_hdmi, void *data) { struct rockchip_hdmi *hdmi = (struct rockchip_hdmi *)data; @@ -511,6 +682,9 @@ static int dw_hdmi_rockchip_bind(struct device *dev, struct device *master, hdmi->dev = &pdev->dev; hdmi->chip_data = plat_data->phy_data; plat_data->phy_data = hdmi;

• plat_data->property_ops = &dw_hdmi_rockchip_property_ops;

• encoder = &hdmi->encoder;

  encoder->possible_crtcs = drm_of_find_possible_crtcs(drm, dev->of_node);

diff --git a/include/drm/bridge/dw_hdmi.h b/include/drm/bridge/dw_hdmi.h index ea34ca146b82..dc561ebe7a9b 100644 --- a/include/drm/bridge/dw_hdmi.h +++ b/include/drm/bridge/dw_hdmi.h @@ -6,6 +6,7 @@ #ifndef __DW_HDMI__ #define __DW_HDMI__

+#include <drm/drm_property.h> #include <sound/hdmi-codec.h>

struct drm_display_info; @@ -123,6 +124,24 @@ struct dw_hdmi_phy_ops { void (*setup_hpd)(struct dw_hdmi *hdmi, void *data); };

+struct dw_hdmi_property_ops {

• void (*attach_properties)(struct drm_connector *connector,

• 		  unsigned int color, int version,
  

• 		  void *data);
  

• void (*destroy_properties)(struct drm_connector *connector,

• 		   void *data);
  

• int (*set_property)(struct drm_connector *connector,

• 	    struct drm_connector_state *state,
  

• 	    struct drm_property *property,
  

• 	    u64 val,
  

• 	    void *data);
  

• int (*get_property)(struct drm_connector *connector,

• 	    const struct drm_connector_state *state,
  

• 	    struct drm_property *property,
  

• 	    u64 *val,
  

• 	    void *data);
  

+};

struct dw_hdmi_plat_data { struct regmap *regm;

@@ -141,6 +160,9 @@ struct dw_hdmi_plat_data { const struct drm_display_info *info, const struct drm_display_mode *mode);

• /* Vendor Property support */
• const struct dw_hdmi_property_ops *property_ops;
• /* Vendor PHY support */ const struct dw_hdmi_phy_ops *phy_ops; const char *phy_name;

Hi Algea,

On Wed, Aug 12, 2020 at 07:08:10PM +0800, crj wrote:

在 2020/8/12 17:33, Laurent Pinchart 写道:

...

On Wed, Aug 12, 2020 at 04:35:43PM +0800, Algea Cao wrote:

...

Introduce struct dw_hdmi_property_ops in plat_data to support vendor hdmi property.

Implement hdmi vendor properties color_depth_property and hdmi_output_property to config hdmi output color depth and color format.

The property "hdmi_output_format", the possible value could be: - RGB - YCBCR 444 - YCBCR 422 - YCBCR 420

Default value of the property is set to 0 = RGB, so no changes if you don't set the property.

The property "hdmi_output_depth" possible value could be - Automatic This indicates prefer highest color depth, it is 30bit on rockcip platform. - 24bit - 30bit The default value of property is 24bit.

Signed-off-by: Algea Cao algea.cao@rock-chips.com

drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 174 ++++++++++++++++++++ include/drm/bridge/dw_hdmi.h | 22 +++ 2 files changed, 196 insertions(+)

diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c index 23de359a1dec..8f22d9a566db 100644 --- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c @@ -52,6 +52,27 @@

#define HIWORD_UPDATE(val, mask) (val | (mask) << 16)

+/* HDMI output pixel format */ +enum drm_hdmi_output_type {

• DRM_HDMI_OUTPUT_DEFAULT_RGB, /* default RGB */
• DRM_HDMI_OUTPUT_YCBCR444, /* YCBCR 444 */
• DRM_HDMI_OUTPUT_YCBCR422, /* YCBCR 422 */
• DRM_HDMI_OUTPUT_YCBCR420, /* YCBCR 420 */
• DRM_HDMI_OUTPUT_YCBCR_HQ, /* Highest subsampled YUV */
• DRM_HDMI_OUTPUT_YCBCR_LQ, /* Lowest subsampled YUV */
• DRM_HDMI_OUTPUT_INVALID, /* Guess what ? */

+};

Vendor-specific properties shouldn't use names starting with drm_ or DRM_, that's for the DRM core. But this doesn't seem specific to Rockchip at all, it should be a standard property. Additionally, new properties need to come with a userspace implementation showing their usage, in X.org, Weston, the Android DRM/KMS HW composer, or another relevant upstream project (a test tool is usually not enough).

We use these properties only in Android HW composer, But we can't upstream

our HW composer code right now.  Can we use this properties as private property

and do not upstream HW composer for the time being?

It's not my decision, it's a policy of the DRM subsystem to require an open implementation in userspace to validate all API additions.

In any case, I think selection of the output format should be done through a standard API (very likely a standard DRM property), possibly related to drm_mode_create_hdmi_colorspace_property(). There's nothing Rockchip-specific here.

...

...

+enum dw_hdmi_rockchip_color_depth {

• ROCKCHIP_HDMI_DEPTH_8,
• ROCKCHIP_HDMI_DEPTH_10,
• ROCKCHIP_HDMI_DEPTH_12,
• ROCKCHIP_HDMI_DEPTH_16,
• ROCKCHIP_HDMI_DEPTH_420_10,
• ROCKCHIP_HDMI_DEPTH_420_12,
• ROCKCHIP_HDMI_DEPTH_420_16

+};

• /**
  • struct rockchip_hdmi_chip_data - splite the grf setting of kind of chips
  • @lcdsel_grf_reg: grf register offset of lcdc select

@@ -73,6 +94,12 @@ struct rockchip_hdmi { struct clk *grf_clk; struct dw_hdmi *hdmi; struct phy *phy;

• struct drm_property *color_depth_property;

• struct drm_property *hdmi_output_property;

• unsigned int colordepth;

• enum drm_hdmi_output_type hdmi_output; };

  #define to_rockchip_hdmi(x) container_of(x, struct rockchip_hdmi, x)

@@ -327,6 +354,150 @@ static void dw_hdmi_rockchip_genphy_disable(struct dw_hdmi *dw_hdmi, void *data) phy_power_off(hdmi->phy); }

+static const struct drm_prop_enum_list color_depth_enum_list[] = {

• { 0, "Automatic" }, /* Prefer highest color depth */
• { 8, "24bit" },
• { 10, "30bit" },

+};

+static const struct drm_prop_enum_list drm_hdmi_output_enum_list[] = {

• { DRM_HDMI_OUTPUT_DEFAULT_RGB, "output_rgb" },
• { DRM_HDMI_OUTPUT_YCBCR444, "output_ycbcr444" },
• { DRM_HDMI_OUTPUT_YCBCR422, "output_ycbcr422" },
• { DRM_HDMI_OUTPUT_YCBCR420, "output_ycbcr420" },
• { DRM_HDMI_OUTPUT_YCBCR_HQ, "output_ycbcr_high_subsampling" },
• { DRM_HDMI_OUTPUT_YCBCR_LQ, "output_ycbcr_low_subsampling" },
• { DRM_HDMI_OUTPUT_INVALID, "invalid_output" },

+};

+static void +dw_hdmi_rockchip_attach_properties(struct drm_connector *connector,

• 		   unsigned int color, int version,
  

• 		   void *data)
  

+{

• struct rockchip_hdmi *hdmi = (struct rockchip_hdmi *)data;
• struct drm_property *prop;
• switch (color) {
• case MEDIA_BUS_FMT_RGB101010_1X30:

• hdmi->hdmi_output = DRM_HDMI_OUTPUT_DEFAULT_RGB;
  

• hdmi->colordepth = 10;
  

• break;
  

• case MEDIA_BUS_FMT_YUV8_1X24:

• hdmi->hdmi_output = DRM_HDMI_OUTPUT_YCBCR444;
  

• hdmi->colordepth = 8;
  

• break;
  

• case MEDIA_BUS_FMT_YUV10_1X30:

• hdmi->hdmi_output = DRM_HDMI_OUTPUT_YCBCR444;
  

• hdmi->colordepth = 10;
  

• break;
  

• case MEDIA_BUS_FMT_UYVY10_1X20:

• hdmi->hdmi_output = DRM_HDMI_OUTPUT_YCBCR422;
  

• hdmi->colordepth = 10;
  

• break;
  

• case MEDIA_BUS_FMT_UYVY8_1X16:

• hdmi->hdmi_output = DRM_HDMI_OUTPUT_YCBCR422;
  

• hdmi->colordepth = 8;
  

• break;
  

• case MEDIA_BUS_FMT_UYYVYY8_0_5X24:

• hdmi->hdmi_output = DRM_HDMI_OUTPUT_YCBCR420;
  

• hdmi->colordepth = 8;
  

• break;
  

• case MEDIA_BUS_FMT_UYYVYY10_0_5X30:

• hdmi->hdmi_output = DRM_HDMI_OUTPUT_YCBCR420;
  

• hdmi->colordepth = 10;
  

• break;
  

• default:

• hdmi->hdmi_output = DRM_HDMI_OUTPUT_DEFAULT_RGB;
  

• hdmi->colordepth = 8;
  

• }
• prop = drm_property_create_enum(connector->dev, 0,

• 			"hdmi_output_depth",
  

• 			color_depth_enum_list,
  

• 			ARRAY_SIZE(color_depth_enum_list));
  

• if (prop) {

• hdmi->color_depth_property = prop;
  

• drm_object_attach_property(&connector->base, prop, 0);
  

• }
• prop = drm_property_create_enum(connector->dev, 0, "hdmi_output_format",

• 			drm_hdmi_output_enum_list,
  

• 			ARRAY_SIZE(drm_hdmi_output_enum_list));
  

• if (prop) {

• hdmi->hdmi_output_property = prop;
  

• drm_object_attach_property(&connector->base, prop, 0);
  

• }

+}

+static void +dw_hdmi_rockchip_destroy_properties(struct drm_connector *connector,

• 		    void *data)
  

+{

• struct rockchip_hdmi *hdmi = (struct rockchip_hdmi *)data;
• if (hdmi->color_depth_property) {

• drm_property_destroy(connector->dev,
  

• 		     hdmi->color_depth_property);
  

• hdmi->color_depth_property = NULL;
  

• }
• if (hdmi->hdmi_output_property) {

• drm_property_destroy(connector->dev,
  

• 		     hdmi->hdmi_output_property);
  

• hdmi->hdmi_output_property = NULL;
  

• }

+}

+static int +dw_hdmi_rockchip_set_property(struct drm_connector *connector,

• 	      struct drm_connector_state *state,
  

• 	      struct drm_property *property,
  

• 	      u64 val,
  

• 	      void *data)
  

+{

• struct rockchip_hdmi *hdmi = (struct rockchip_hdmi *)data;
• if (property == hdmi->color_depth_property) {

• hdmi->colordepth = val;
  

• return 0;
  

• } else if (property == hdmi->hdmi_output_property) {

• hdmi->hdmi_output = val;
  

• return 0;
  

• }
• DRM_ERROR("failed to set rockchip hdmi connector property\n");
• return -EINVAL;

+}

+static int +dw_hdmi_rockchip_get_property(struct drm_connector *connector,

• 	      const struct drm_connector_state *state,
  

• 	      struct drm_property *property,
  

• 	      u64 *val,
  

• 	      void *data)
  

+{

• struct rockchip_hdmi *hdmi = (struct rockchip_hdmi *)data;
• if (property == hdmi->color_depth_property) {

• *val = hdmi->colordepth;
  

• return 0;
  

• } else if (property == hdmi->hdmi_output_property) {

• *val = hdmi->hdmi_output;
  

• return 0;
  

• }
• DRM_ERROR("failed to get rockchip hdmi connector property\n");
• return -EINVAL;

+}

+static const struct dw_hdmi_property_ops dw_hdmi_rockchip_property_ops = {

• .attach_properties = dw_hdmi_rockchip_attach_properties,
• .destroy_properties = dw_hdmi_rockchip_destroy_properties,
• .set_property = dw_hdmi_rockchip_set_property,
• .get_property = dw_hdmi_rockchip_get_property,

+};

• static void dw_hdmi_rk3228_setup_hpd(struct dw_hdmi *dw_hdmi, void *data) { struct rockchip_hdmi *hdmi = (struct rockchip_hdmi *)data;

@@ -511,6 +682,9 @@ static int dw_hdmi_rockchip_bind(struct device *dev, struct device *master, hdmi->dev = &pdev->dev; hdmi->chip_data = plat_data->phy_data; plat_data->phy_data = hdmi;

• plat_data->property_ops = &dw_hdmi_rockchip_property_ops;

• encoder = &hdmi->encoder;

  encoder->possible_crtcs = drm_of_find_possible_crtcs(drm, dev->of_node);

diff --git a/include/drm/bridge/dw_hdmi.h b/include/drm/bridge/dw_hdmi.h index ea34ca146b82..dc561ebe7a9b 100644 --- a/include/drm/bridge/dw_hdmi.h +++ b/include/drm/bridge/dw_hdmi.h @@ -6,6 +6,7 @@ #ifndef __DW_HDMI__ #define __DW_HDMI__

+#include <drm/drm_property.h> #include <sound/hdmi-codec.h>

struct drm_display_info; @@ -123,6 +124,24 @@ struct dw_hdmi_phy_ops { void (*setup_hpd)(struct dw_hdmi *hdmi, void *data); };

+struct dw_hdmi_property_ops {

• void (*attach_properties)(struct drm_connector *connector,

• 		  unsigned int color, int version,
  

• 		  void *data);
  

• void (*destroy_properties)(struct drm_connector *connector,

• 		   void *data);
  

• int (*set_property)(struct drm_connector *connector,

• 	    struct drm_connector_state *state,
  

• 	    struct drm_property *property,
  

• 	    u64 val,
  

• 	    void *data);
  

• int (*get_property)(struct drm_connector *connector,

• 	    const struct drm_connector_state *state,
  

• 	    struct drm_property *property,
  

• 	    u64 *val,
  

• 	    void *data);
  

+};

• struct dw_hdmi_plat_data { struct regmap *regm;

@@ -141,6 +160,9 @@ struct dw_hdmi_plat_data { const struct drm_display_info *info, const struct drm_display_mode *mode);

• /* Vendor Property support */
• const struct dw_hdmi_property_ops *property_ops;
• /* Vendor PHY support */ const struct dw_hdmi_phy_ops *phy_ops; const char *phy_name;

On Thu, Aug 13, 2020 at 10:42:28AM +0300, Pekka Paalanen wrote:

On Wed, 12 Aug 2020 16:30:17 +0300 Laurent Pinchart wrote:

...

On Wed, Aug 12, 2020 at 07:08:10PM +0800, crj wrote:

...

在 2020/8/12 17:33, Laurent Pinchart 写道:

...

On Wed, Aug 12, 2020 at 04:35:43PM +0800, Algea Cao wrote:

...

Introduce struct dw_hdmi_property_ops in plat_data to support vendor hdmi property.

Implement hdmi vendor properties color_depth_property and hdmi_output_property to config hdmi output color depth and color format.

The property "hdmi_output_format", the possible value could be: - RGB - YCBCR 444 - YCBCR 422 - YCBCR 420

Default value of the property is set to 0 = RGB, so no changes if you don't set the property.

The property "hdmi_output_depth" possible value could be - Automatic This indicates prefer highest color depth, it is 30bit on rockcip platform. - 24bit - 30bit The default value of property is 24bit.

Signed-off-by: Algea Cao algea.cao@rock-chips.com

drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 174 ++++++++++++++++++++ include/drm/bridge/dw_hdmi.h | 22 +++ 2 files changed, 196 insertions(+)

diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c index 23de359a1dec..8f22d9a566db 100644 --- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c @@ -52,6 +52,27 @@

#define HIWORD_UPDATE(val, mask) (val | (mask) << 16)

+/* HDMI output pixel format */ +enum drm_hdmi_output_type {

• DRM_HDMI_OUTPUT_DEFAULT_RGB, /* default RGB */
• DRM_HDMI_OUTPUT_YCBCR444, /* YCBCR 444 */
• DRM_HDMI_OUTPUT_YCBCR422, /* YCBCR 422 */
• DRM_HDMI_OUTPUT_YCBCR420, /* YCBCR 420 */
• DRM_HDMI_OUTPUT_YCBCR_HQ, /* Highest subsampled YUV */
• DRM_HDMI_OUTPUT_YCBCR_LQ, /* Lowest subsampled YUV */
• DRM_HDMI_OUTPUT_INVALID, /* Guess what ? */

+};

Vendor-specific properties shouldn't use names starting with drm_ or DRM_, that's for the DRM core. But this doesn't seem specific to Rockchip at all, it should be a standard property. Additionally, new properties need to come with a userspace implementation showing their usage, in X.org, Weston, the Android DRM/KMS HW composer, or another relevant upstream project (a test tool is usually not enough).

We use these properties only in Android HW composer, But we can't upstream

our HW composer code right now.  Can we use this properties as private property

and do not upstream HW composer for the time being?

It's not my decision, it's a policy of the DRM subsystem to require an open implementation in userspace to validate all API additions.

Also read https://www.kernel.org/doc/html/latest/gpu/drm-uapi.html#open-source-userspa... very carefully: it calls for a FOSS userspace project's proper upstream to have reviewed and accepted the patches to use the new UAPI, but those patches must NOT be MERGED at that time yet.

Correct. Many userspace projects wouldn't merge a patch before the kernel API is merged, so that would create a chicken and egg problem :-)

Hi,

On 12/08/2020 10:36, Algea Cao wrote:

If plat_data->get_output_bus_format() is exist, we can use it to get hdmi output bus format when dw-hdmi is the only bridge. The hdmi output bus format can be set by vendor properties.

Signed-off-by: Algea Cao algea.cao@rock-chips.com

drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c index 1eb4736b9b59..878e9e506963 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c @@ -2644,6 +2644,8 @@ static u32 *dw_hdmi_bridge_atomic_get_output_bus_fmts(struct drm_bridge *bridge, unsigned int *num_output_fmts) { struct drm_connector *conn = conn_state->connector;

• struct dw_hdmi *hdmi = bridge->driver_private;
• void *data = hdmi->plat_data->phy_data; struct drm_display_info *info = &conn->display_info; struct drm_display_mode *mode = &crtc_state->mode; u8 max_bpc = conn_state->max_requested_bpc;

@@ -2662,7 +2664,11 @@ static u32 *dw_hdmi_bridge_atomic_get_output_bus_fmts(struct drm_bridge *bridge, /* If dw-hdmi is the only bridge, avoid negociating with ourselves */ if (list_is_singular(&bridge->encoder->bridge_chain)) { *num_output_fmts = 1;

• output_fmts[0] = MEDIA_BUS_FMT_FIXED;
  

• if (hdmi->plat_data->get_output_bus_format)
  

• 	output_fmts[0] =
  

• 		hdmi->plat_data->get_output_bus_format(data);
  

The whole bus format negociation was introduced to actually avoid using such get_output_bus_format() callback, please implement proper bus format negociation.

Neil

• else
  

• 	output_fmts[0] = MEDIA_BUS_FMT_FIXED;
  
  

  return output_fmts; }