Hi!
This is just a rebase of the v11, untested (but it seems like Neil Armstrong recently tested it), with small changes in binding and dts. v11 cover follows:
Follow-up on the v5 [1], things have gotten significantly better in the last year, thanks to the efforts on Bifrost support by the Collabora team (and probably others I'm not aware of).
I've been testing this series on a MT8183/kukui device, with a chromeos-5.10 kernel [2], and got basic Chromium OS UI up with mesa 20.3.2 (lots of artifacts though).
devfreq is currently not supported, as we'll need: - Clock core support for switching the GPU core clock (see 2/4). - Platform-specific handling of the 2-regulator (see 3/4).
Since the latter is easy to detect, patch 3/4 just disables devfreq if the more than one regulator is specified in the compatible matching table.
[1] https://patchwork.kernel.org/project/linux-mediatek/cover/20200306041345.259... [2] https://crrev.com/c/2608070
Changes in v12: - binding: Fix min/maxItems logic (Rob Herring) - Add gpu node to mt8183-pumpkin.dts as well (Neil Armstrong).
Changes in v11: - binding: power-domain-names not power-domainS-names - mt8183*.dts: remove incorrect supply-names
Changes in v10: - Fix the binding to make sure sram-supply property can be provided.
Changes in v9: - Explain why devfreq needs to be disabled for GPUs with >1 regulators.
Changes in v8: - Use DRM_DEV_INFO instead of ERROR
Changes in v7: - Fix GPU ID in commit message - Fix GPU ID in commit message
Changes in v6: - Rebased, actually tested with recent mesa driver. - Add gpu regulators to kukui dtsi as well. - Power domains are now attached to spm, not scpsys - Drop R-B. - devfreq: New change - Context conflicts, reflow the code. - Use ARRAY_SIZE for power domains too.
Changes in v5: - Rename "2d" power domain to "core2" - Rename "2d" power domain to "core2" (keep R-B again). - Change power domain name from 2d to core2.
Changes in v4: - Add power-domain-names description (kept Alyssa's reviewed-by as the change is minor) - Add power-domain-names to describe the 3 domains. (kept Alyssa's reviewed-by as the change is minor) - Add power domain names.
Changes in v3: - Match mt8183-mali instead of bifrost, as we require special handling for the 2 regulators and 3 power domains.
Changes in v2: - Use sram instead of mali_sram as SRAM supply name. - Rename mali@ to gpu@.
Nicolas Boichat (4): dt-bindings: gpu: mali-bifrost: Add Mediatek MT8183 arm64: dts: mt8183: Add node for the Mali GPU drm/panfrost: devfreq: Disable devfreq when num_supplies > 1 drm/panfrost: Add mt8183-mali compatible string
.../bindings/gpu/arm,mali-bifrost.yaml | 30 ++++- arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 5 + .../arm64/boot/dts/mediatek/mt8183-kukui.dtsi | 5 + .../boot/dts/mediatek/mt8183-pumpkin.dts | 5 + arch/arm64/boot/dts/mediatek/mt8183.dtsi | 105 ++++++++++++++++++ drivers/gpu/drm/panfrost/panfrost_devfreq.c | 16 ++- drivers/gpu/drm/panfrost/panfrost_drv.c | 10 ++ 7 files changed, 172 insertions(+), 4 deletions(-)
Define a compatible string for the Mali Bifrost GPU found in Mediatek's MT8183 SoCs.
Signed-off-by: Nicolas Boichat drinkcat@chromium.org ---
Changes in v12: - binding: Fix min/maxItems logic (Rob Herring)
Changes in v11: - binding: power-domain-names not power-domainS-names
Changes in v10: - Fix the binding to make sure sram-supply property can be provided.
Changes in v6: - Rebased, actually tested with recent mesa driver.
Changes in v5: - Rename "2d" power domain to "core2"
Changes in v4: - Add power-domain-names description (kept Alyssa's reviewed-by as the change is minor)
.../bindings/gpu/arm,mali-bifrost.yaml | 30 ++++++++++++++++++- 1 file changed, 29 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml index 184492162e7e..b22cd8f1b015 100644 --- a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml +++ b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml @@ -17,6 +17,7 @@ properties: items: - enum: - amlogic,meson-g12a-mali + - mediatek,mt8183-mali - realtek,rtd1619-mali - rockchip,px30-mali - const: arm,mali-bifrost # Mali Bifrost GPU model/revision is fully discoverable @@ -41,10 +42,13 @@ properties:
mali-supply: true
+ sram-supply: true + operating-points-v2: true
power-domains: - maxItems: 1 + minItems: 1 + maxItems: 3
resets: maxItems: 2 @@ -87,6 +91,30 @@ allOf: then: required: - resets + - if: + properties: + compatible: + contains: + const: mediatek,mt8183-mali + then: + properties: + power-domains: + minItems: 3 + power-domain-names: + items: + - const: core0 + - const: core1 + - const: core2 + + required: + - sram-supply + - power-domains + - power-domain-names + else: + properties: + power-domains: + maxItems: 1 + sram-supply: false
examples: - |
GPUs with more than a single regulator (e.g. G72 on MT8183) will require platform-specific handling for devfreq, for 2 reasons: 1. The opp core (drivers/opp/core.c:_generic_set_opp_regulator) does not support multiple regulators, so we'll need custom handlers. 2. Generally, platforms with 2 regulators have platform-specific constraints on how the voltages should be set (e.g. minimum/maximum voltage difference between them), so we should not just create generic handlers that simply change the voltages without taking care of those constraints.
Disable devfreq for now on those GPUs.
Signed-off-by: Nicolas Boichat drinkcat@chromium.org Reviewed-by: Tomeu Vizoso tomeu.vizoso@collabora.com Reviewed-by: Steven Price steven.price@arm.com ---
(no changes since v9)
Changes in v9: - Explain why devfreq needs to be disabled for GPUs with >1 regulators.
Changes in v8: - Use DRM_DEV_INFO instead of ERROR
Changes in v7: - Fix GPU ID in commit message
Changes in v6: - devfreq: New change
drivers/gpu/drm/panfrost/panfrost_devfreq.c | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/panfrost/panfrost_devfreq.c b/drivers/gpu/drm/panfrost/panfrost_devfreq.c index 47d27e54a34f..aca3bb9a12e4 100644 --- a/drivers/gpu/drm/panfrost/panfrost_devfreq.c +++ b/drivers/gpu/drm/panfrost/panfrost_devfreq.c @@ -92,9 +92,19 @@ int panfrost_devfreq_init(struct panfrost_device *pfdev) struct thermal_cooling_device *cooling; struct panfrost_devfreq *pfdevfreq = &pfdev->pfdevfreq;
- ret = devm_pm_opp_set_regulators(dev, pfdev->comp->supply_names, - pfdev->comp->num_supplies); - if (ret) { + if (pfdev->comp->num_supplies > 1) { + /* + * GPUs with more than 1 supply require platform-specific handling: + * continue without devfreq + */ + DRM_DEV_INFO(dev, "More than 1 supply is not supported yet\n"); + return 0; + } + + opp_table = dev_pm_opp_set_regulators(dev, pfdev->comp->supply_names, + pfdev->comp->num_supplies); + if (IS_ERR(opp_table)) { + ret = PTR_ERR(opp_table); /* Continue if the optional regulator is missing */ if (ret != -ENODEV) { DRM_DEV_ERROR(dev, "Couldn't set OPP regulators\n");
Argh sorry I messed up the rebase and this doesn't even build...
I'll send v13.
On Wed, Apr 21, 2021 at 8:19 AM Nicolas Boichat drinkcat@chromium.org wrote:
GPUs with more than a single regulator (e.g. G72 on MT8183) will require platform-specific handling for devfreq, for 2 reasons:
- The opp core (drivers/opp/core.c:_generic_set_opp_regulator) does not support multiple regulators, so we'll need custom handlers.
- Generally, platforms with 2 regulators have platform-specific constraints on how the voltages should be set (e.g. minimum/maximum voltage difference between them), so we should not just create generic handlers that simply change the voltages without taking care of those constraints.
Disable devfreq for now on those GPUs.
Signed-off-by: Nicolas Boichat drinkcat@chromium.org Reviewed-by: Tomeu Vizoso tomeu.vizoso@collabora.com Reviewed-by: Steven Price steven.price@arm.com
(no changes since v9)
Changes in v9:
- Explain why devfreq needs to be disabled for GPUs with >1 regulators.
Changes in v8:
- Use DRM_DEV_INFO instead of ERROR
Changes in v7:
- Fix GPU ID in commit message
Changes in v6:
- devfreq: New change
drivers/gpu/drm/panfrost/panfrost_devfreq.c | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/panfrost/panfrost_devfreq.c b/drivers/gpu/drm/panfrost/panfrost_devfreq.c index 47d27e54a34f..aca3bb9a12e4 100644 --- a/drivers/gpu/drm/panfrost/panfrost_devfreq.c +++ b/drivers/gpu/drm/panfrost/panfrost_devfreq.c @@ -92,9 +92,19 @@ int panfrost_devfreq_init(struct panfrost_device *pfdev) struct thermal_cooling_device *cooling; struct panfrost_devfreq *pfdevfreq = &pfdev->pfdevfreq;
ret = devm_pm_opp_set_regulators(dev, pfdev->comp->supply_names,pfdev->comp->num_supplies);if (ret) {
if (pfdev->comp->num_supplies > 1) {/** GPUs with more than 1 supply require platform-specific handling:* continue without devfreq*/DRM_DEV_INFO(dev, "More than 1 supply is not supported yet\n");return 0;}opp_table = dev_pm_opp_set_regulators(dev, pfdev->comp->supply_names,pfdev->comp->num_supplies);if (IS_ERR(opp_table)) {ret = PTR_ERR(opp_table); /* Continue if the optional regulator is missing */ if (ret != -ENODEV) { DRM_DEV_ERROR(dev, "Couldn't set OPP regulators\n");-- 2.31.1.368.gbe11c130af-goog
Add support for MT8183's G72 Bifrost.
Signed-off-by: Nicolas Boichat drinkcat@chromium.org Reviewed-by: Tomeu Vizoso tomeu.vizoso@collabora.com Reviewed-by: Steven Price steven.price@arm.com ---
(no changes since v7)
Changes in v7: - Fix GPU ID in commit message
Changes in v6: - Context conflicts, reflow the code. - Use ARRAY_SIZE for power domains too.
Changes in v5: - Change power domain name from 2d to core2.
Changes in v4: - Add power domain names.
Changes in v3: - Match mt8183-mali instead of bifrost, as we require special handling for the 2 regulators and 3 power domains.
drivers/gpu/drm/panfrost/panfrost_drv.c | 10 ++++++++++ 1 file changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panfrost/panfrost_drv.c index 83a461bdeea8..ca07098a6141 100644 --- a/drivers/gpu/drm/panfrost/panfrost_drv.c +++ b/drivers/gpu/drm/panfrost/panfrost_drv.c @@ -665,6 +665,15 @@ static const struct panfrost_compatible amlogic_data = { .vendor_quirk = panfrost_gpu_amlogic_quirk, };
+const char * const mediatek_mt8183_supplies[] = { "mali", "sram" }; +const char * const mediatek_mt8183_pm_domains[] = { "core0", "core1", "core2" }; +static const struct panfrost_compatible mediatek_mt8183_data = { + .num_supplies = ARRAY_SIZE(mediatek_mt8183_supplies), + .supply_names = mediatek_mt8183_supplies, + .num_pm_domains = ARRAY_SIZE(mediatek_mt8183_pm_domains), + .pm_domain_names = mediatek_mt8183_pm_domains, +}; + static const struct of_device_id dt_match[] = { /* Set first to probe before the generic compatibles */ { .compatible = "amlogic,meson-gxm-mali", @@ -681,6 +690,7 @@ static const struct of_device_id dt_match[] = { { .compatible = "arm,mali-t860", .data = &default_data, }, { .compatible = "arm,mali-t880", .data = &default_data, }, { .compatible = "arm,mali-bifrost", .data = &default_data, }, + { .compatible = "mediatek,mt8183-mali", .data = &mediatek_mt8183_data }, {} }; MODULE_DEVICE_TABLE(of, dt_match);
dri-devel@lists.freedesktop.org
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Nicolas Boichat