v6: Remove some unnecessary reset patch. Refine patch format. Add detail explain of SOC display reset bits.
v5: Add lost reset define.
v4: Add necessary reset control for ast2600. Add chip caps for futher use. These code are test on AST2500 and AST2600 by below steps.
1. Add below config to turn VT and LOGO on.
CONFIG_TTY=y CONFIG_VT=y CONFIG_CONSOLE_TRANSLATIONS=y CONFIG_VT_CONSOLE=y CONFIG_VT_CONSOLE_SLEEP=y CONFIG_HW_CONSOLE=y CONFIG_VT_HW_CONSOLE_BINDING=y CONFIG_UNIX98_PTYS=y CONFIG_LDISC_AUTOLOAD=y CONFIG_DEVMEM=y CONFIG_DUMMY_CONSOLE=y CONFIG_FRAMEBUFFER_CONSOLE=y CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y CONFIG_LOGO=y CONFIG_LOGO_LINUX_CLUT224=y
2. The Linux logo will be shown on the screen, when the BMC boot in Linux.
v3: Refine the patch for clear separate purpose. Skip to send devicetree patch
v2: Remove some unnecessary patch. Refine for reviwer request.
v1: First add patch.
Joel Stanley (2): ARM: dts: aspeed: Add GFX node to AST2600 ARM: dts: aspeed: ast2600-evb: Enable GFX device
Tommy Haung (3): drm/aspeed: Update INTR_STS handling drm/aspeed: Add AST2600 chip support ARM: dtsi: aspeed: Modified gfx reset control
arch/arm/boot/dts/aspeed-ast2600-evb.dts | 18 ++++++++++++++++++ arch/arm/boot/dts/aspeed-g6.dtsi | 11 +++++++++++ drivers/gpu/drm/aspeed/aspeed_gfx.h | 1 + drivers/gpu/drm/aspeed/aspeed_gfx_drv.c | 15 ++++++++++++++- 4 files changed, 44 insertions(+), 1 deletion(-)
From: Joel Stanley joel@jms.id.au
The GFX device is present in the AST2600 SoC.
Signed-off-by: Joel Stanley joel@jms.id.au Signed-off-by: Tommy Haung tommy_huang@aspeedtech.com --- arch/arm/boot/dts/aspeed-g6.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi index 1b47be1704f8..e38c3742761b 100644 --- a/arch/arm/boot/dts/aspeed-g6.dtsi +++ b/arch/arm/boot/dts/aspeed-g6.dtsi @@ -351,6 +351,17 @@ quality = <100>; };
+ gfx: display@1e6e6000 { + compatible = "aspeed,ast2600-gfx", "aspeed,ast2500-gfx", "syscon"; + reg = <0x1e6e6000 0x1000>; + reg-io-width = <4>; + clocks = <&syscon ASPEED_CLK_GATE_D1CLK>; + resets = <&syscon ASPEED_RESET_GRAPHICS>; + syscon = <&syscon>; + status = "disabled"; + interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; + }; + xdma: xdma@1e6e7000 { compatible = "aspeed,ast2600-xdma"; reg = <0x1e6e7000 0x100>;
From: Joel Stanley joel@jms.id.au
Enable the GFX device with a framebuffer memory region.
Signed-off-by: Joel Stanley joel@jms.id.au Signed-off-by: Tommy Haung tommy_huang@aspeedtech.com --- arch/arm/boot/dts/aspeed-ast2600-evb.dts | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-ast2600-evb.dts b/arch/arm/boot/dts/aspeed-ast2600-evb.dts index b7eb552640cb..e223dad2abd0 100644 --- a/arch/arm/boot/dts/aspeed-ast2600-evb.dts +++ b/arch/arm/boot/dts/aspeed-ast2600-evb.dts @@ -23,6 +23,19 @@ reg = <0x80000000 0x80000000>; };
+ reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + gfx_memory: framebuffer { + size = <0x01000000>; + alignment = <0x01000000>; + compatible = "shared-dma-pool"; + reusable; + }; + }; + vcc_sdhci0: regulator-vcc-sdhci0 { compatible = "regulator-fixed"; regulator-name = "SDHCI0 Vcc"; @@ -300,3 +313,8 @@ vqmmc-supply = <&vccq_sdhci1>; clk-phase-sd-hs = <7>, <200>; }; + +&gfx { + status = "okay"; + memory-region = <&gfx_memory>; +};
Add interrupt clear register define for further chip support.
Signed-off-by: Tommy Haung tommy_huang@aspeedtech.com --- drivers/gpu/drm/aspeed/aspeed_gfx.h | 1 + drivers/gpu/drm/aspeed/aspeed_gfx_drv.c | 6 +++++- 2 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/aspeed/aspeed_gfx.h b/drivers/gpu/drm/aspeed/aspeed_gfx.h index 96501152bafa..4e6a442c3886 100644 --- a/drivers/gpu/drm/aspeed/aspeed_gfx.h +++ b/drivers/gpu/drm/aspeed/aspeed_gfx.h @@ -12,6 +12,7 @@ struct aspeed_gfx { struct regmap *scu;
u32 dac_reg; + u32 int_clr_reg; u32 vga_scratch_reg; u32 throd_val; u32 scan_line_max; diff --git a/drivers/gpu/drm/aspeed/aspeed_gfx_drv.c b/drivers/gpu/drm/aspeed/aspeed_gfx_drv.c index b53fee6f1c17..d4b56b3c7597 100644 --- a/drivers/gpu/drm/aspeed/aspeed_gfx_drv.c +++ b/drivers/gpu/drm/aspeed/aspeed_gfx_drv.c @@ -60,6 +60,7 @@
struct aspeed_gfx_config { u32 dac_reg; /* DAC register in SCU */ + u32 int_clear_reg; /* Interrupt clear register */ u32 vga_scratch_reg; /* VGA scratch register in SCU */ u32 throd_val; /* Default Threshold Seting */ u32 scan_line_max; /* Max memory size of one scan line */ @@ -67,6 +68,7 @@ struct aspeed_gfx_config {
static const struct aspeed_gfx_config ast2400_config = { .dac_reg = 0x2c, + .int_clear_reg = 0x60, .vga_scratch_reg = 0x50, .throd_val = CRT_THROD_LOW(0x1e) | CRT_THROD_HIGH(0x12), .scan_line_max = 64, @@ -74,6 +76,7 @@ static const struct aspeed_gfx_config ast2400_config = {
static const struct aspeed_gfx_config ast2500_config = { .dac_reg = 0x2c, + .int_clear_reg = 0x60, .vga_scratch_reg = 0x50, .throd_val = CRT_THROD_LOW(0x24) | CRT_THROD_HIGH(0x3c), .scan_line_max = 128, @@ -119,7 +122,7 @@ static irqreturn_t aspeed_gfx_irq_handler(int irq, void *data)
if (reg & CRT_CTRL_VERTICAL_INTR_STS) { drm_crtc_handle_vblank(&priv->pipe.crtc); - writel(reg, priv->base + CRT_CTRL1); + writel(reg, priv->base + priv->int_clr_reg); return IRQ_HANDLED; }
@@ -147,6 +150,7 @@ static int aspeed_gfx_load(struct drm_device *drm) config = match->data;
priv->dac_reg = config->dac_reg; + priv->int_clr_reg = config->int_clear_reg; priv->vga_scratch_reg = config->vga_scratch_reg; priv->throd_val = config->throd_val; priv->scan_line_max = config->scan_line_max;
Add AST2600 chip support and setting.
Signed-off-by: Tommy Haung tommy_huang@aspeedtech.com --- drivers/gpu/drm/aspeed/aspeed_gfx_drv.c | 9 +++++++++ 1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/aspeed/aspeed_gfx_drv.c b/drivers/gpu/drm/aspeed/aspeed_gfx_drv.c index d4b56b3c7597..d10246b1d1c2 100644 --- a/drivers/gpu/drm/aspeed/aspeed_gfx_drv.c +++ b/drivers/gpu/drm/aspeed/aspeed_gfx_drv.c @@ -82,9 +82,18 @@ static const struct aspeed_gfx_config ast2500_config = { .scan_line_max = 128, };
+static const struct aspeed_gfx_config ast2600_config = { + .dac_reg = 0xc0, + .int_clear_reg = 0x68, + .vga_scratch_reg = 0x50, + .throd_val = CRT_THROD_LOW(0x50) | CRT_THROD_HIGH(0x70), + .scan_line_max = 128, +}; + static const struct of_device_id aspeed_gfx_match[] = { { .compatible = "aspeed,ast2400-gfx", .data = &ast2400_config }, { .compatible = "aspeed,ast2500-gfx", .data = &ast2500_config }, + { .compatible = "aspeed,ast2600-gfx", .data = &ast2600_config }, { }, }; MODULE_DEVICE_TABLE(of, aspeed_gfx_match);
Remove the ast2500-gfx from aspeed-g6.dtsi. In the AST2600, the ASPEED_RESET_CRT1 is replaced by ASPEED_RESET_GRAPHICS. This is no differnce between these two reset behavior but reigster location is changed. The HW controller states and FW programming resgiter will be reset by CRT reset controller bit (SCU040[13]). And another part HW controller will be reset by Graphics controller bit (SCU040[26]). These two reset bit need be de-assert then the SOC display will be active.
Signed-off-by: Tommy Haung tommy_huang@aspeedtech.com --- arch/arm/boot/dts/aspeed-g6.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi index e38c3742761b..7cc99bc68558 100644 --- a/arch/arm/boot/dts/aspeed-g6.dtsi +++ b/arch/arm/boot/dts/aspeed-g6.dtsi @@ -352,7 +352,7 @@ };
gfx: display@1e6e6000 { - compatible = "aspeed,ast2600-gfx", "aspeed,ast2500-gfx", "syscon"; + compatible = "aspeed,ast2600-gfx", "syscon"; reg = <0x1e6e6000 0x1000>; reg-io-width = <4>; clocks = <&syscon ASPEED_CLK_GATE_D1CLK>;
On Wed, 2 Mar 2022 at 02:50, Tommy Haung tommy_huang@aspeedtech.com wrote:
Remove the ast2500-gfx from aspeed-g6.dtsi. In the AST2600, the ASPEED_RESET_CRT1 is replaced by ASPEED_RESET_GRAPHICS. This is no differnce between these two reset behavior but reigster location is changed. The HW controller states and FW programming resgiter will be reset by CRT reset controller bit (SCU040[13]). And another part HW controller will be reset by Graphics controller bit (SCU040[26]). These two reset bit need be de-assert then the SOC display will be active.
Signed-off-by: Tommy Haung tommy_huang@aspeedtech.com
You don't need this patch; the change should be part of the patch that introduces the node. I'll fix that up when applying.
arch/arm/boot/dts/aspeed-g6.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi index e38c3742761b..7cc99bc68558 100644 --- a/arch/arm/boot/dts/aspeed-g6.dtsi +++ b/arch/arm/boot/dts/aspeed-g6.dtsi @@ -352,7 +352,7 @@ };
gfx: display@1e6e6000 {
compatible = "aspeed,ast2600-gfx", "aspeed,ast2500-gfx", "syscon";
compatible = "aspeed,ast2600-gfx", "syscon"; reg = <0x1e6e6000 0x1000>; reg-io-width = <4>; clocks = <&syscon ASPEED_CLK_GATE_D1CLK>;-- 2.17.1
On Wed, 2 Mar 2022 at 02:49, Tommy Haung tommy_huang@aspeedtech.com wrote:
v6: Remove some unnecessary reset patch. Refine patch format. Add detail explain of SOC display reset bits.
v5: Add lost reset define.
v4: Add necessary reset control for ast2600. Add chip caps for futher use. These code are test on AST2500 and AST2600 by below steps.
Add below config to turn VT and LOGO on.
CONFIG_TTY=y CONFIG_VT=y CONFIG_CONSOLE_TRANSLATIONS=y CONFIG_VT_CONSOLE=y CONFIG_VT_CONSOLE_SLEEP=y CONFIG_HW_CONSOLE=y CONFIG_VT_HW_CONSOLE_BINDING=y CONFIG_UNIX98_PTYS=y CONFIG_LDISC_AUTOLOAD=y CONFIG_DEVMEM=y CONFIG_DUMMY_CONSOLE=y CONFIG_FRAMEBUFFER_CONSOLE=y CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y CONFIG_LOGO=y CONFIG_LOGO_LINUX_CLUT224=y
The Linux logo will be shown on the screen, when the BMC boot in Linux.
v3: Refine the patch for clear separate purpose. Skip to send devicetree patch
Looks good! Thanks Tommy.
Reviewed-by: Joel Stanley joel@jms.id.au
I'll apply this once I've tested it on hardware.
v2: Remove some unnecessary patch. Refine for reviwer request.
v1: First add patch.
Joel Stanley (2): ARM: dts: aspeed: Add GFX node to AST2600 ARM: dts: aspeed: ast2600-evb: Enable GFX device
Tommy Haung (3): drm/aspeed: Update INTR_STS handling drm/aspeed: Add AST2600 chip support ARM: dtsi: aspeed: Modified gfx reset control
arch/arm/boot/dts/aspeed-ast2600-evb.dts | 18 ++++++++++++++++++ arch/arm/boot/dts/aspeed-g6.dtsi | 11 +++++++++++ drivers/gpu/drm/aspeed/aspeed_gfx.h | 1 + drivers/gpu/drm/aspeed/aspeed_gfx_drv.c | 15 ++++++++++++++- 4 files changed, 44 insertions(+), 1 deletion(-)
-- 2.17.1
dri-devel@lists.freedesktop.org
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