Commit 72a7cf0aec0c ("drm/amd/display: Keep linebuffer pixel depth at 30bpp for DCE-11.0.") doesn't seems to have fixed 10bit 4K rendering over DisplayPort for CIK GPUs. On my machine with a HAWAII GPU I get a broken image that looks like it has an effective resolution of 1920x1080 but scaled up in an irregular way. Reverting the commit or applying this patch fixes the problem on v5.14-rc1.
Fixes: 72a7cf0aec0c ("drm/amd/display: Keep linebuffer pixel depth at 30bpp for DCE-11.0.") Signed-off-by: Liviu Dudau liviu@dudau.co.uk --- drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c index a6a67244a322e..1596f6b7fed7c 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c @@ -1062,7 +1062,7 @@ bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx) * so use only 30 bpp on DCE_VERSION_11_0. Testing with DCE 11.2 and 8.3 * did not show such problems, so this seems to be the exception. */ - if (plane_state->ctx->dce_version != DCE_VERSION_11_0) + if (plane_state->ctx->dce_version > DCE_VERSION_11_0) pipe_ctx->plane_res.scl_data.lb_params.depth = LB_PIXEL_DEPTH_36BPP; else pipe_ctx->plane_res.scl_data.lb_params.depth = LB_PIXEL_DEPTH_30BPP;
On Wed, Jul 14, 2021 at 4:15 AM Liviu Dudau liviu@dudau.co.uk wrote:
Commit 72a7cf0aec0c ("drm/amd/display: Keep linebuffer pixel depth at 30bpp for DCE-11.0.") doesn't seems to have fixed 10bit 4K rendering over DisplayPort for CIK GPUs. On my machine with a HAWAII GPU I get a broken image that looks like it has an effective resolution of 1920x1080 but scaled up in an irregular way. Reverting the commit or applying this patch fixes the problem on v5.14-rc1.
Fixes: 72a7cf0aec0c ("drm/amd/display: Keep linebuffer pixel depth at 30bpp for DCE-11.0.") Signed-off-by: Liviu Dudau liviu@dudau.co.uk
Harry or Mario any ideas? Maybe we need finer grained DCE version checking? I don't remember all of the caveats of this stuff. DCE11 and older is getting to be pretty old at this point. I can just apply this if you don't have any insights.
Alex
drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c index a6a67244a322e..1596f6b7fed7c 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c @@ -1062,7 +1062,7 @@ bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx) * so use only 30 bpp on DCE_VERSION_11_0. Testing with DCE 11.2 and 8.3 * did not show such problems, so this seems to be the exception. */
if (plane_state->ctx->dce_version != DCE_VERSION_11_0)
if (plane_state->ctx->dce_version > DCE_VERSION_11_0) pipe_ctx->plane_res.scl_data.lb_params.depth = LB_PIXEL_DEPTH_36BPP; else pipe_ctx->plane_res.scl_data.lb_params.depth = LB_PIXEL_DEPTH_30BPP;-- 2.32.0
amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
On Thu, Jul 15, 2021 at 6:10 PM Alex Deucher alexdeucher@gmail.com wrote:
On Wed, Jul 14, 2021 at 4:15 AM Liviu Dudau liviu@dudau.co.uk wrote:
Commit 72a7cf0aec0c ("drm/amd/display: Keep linebuffer pixel depth at 30bpp for DCE-11.0.") doesn't seems to have fixed 10bit 4K rendering over DisplayPort for CIK GPUs. On my machine with a HAWAII GPU I get a broken image that looks like it has an effective resolution of 1920x1080 but scaled up in an irregular way. Reverting the commit or applying this patch fixes the problem on v5.14-rc1.
Fixes: 72a7cf0aec0c ("drm/amd/display: Keep linebuffer pixel depth at 30bpp for DCE-11.0.") Signed-off-by: Liviu Dudau liviu@dudau.co.uk
Harry or Mario any ideas? Maybe we need finer grained DCE version checking? I don't remember all of the caveats of this stuff. DCE11 and older is getting to be pretty old at this point. I can just apply this if you don't have any insights.
Alex
Hi Alex
I'd be fine with applying this. As my original commit says, photometer measurements showed that increasing the line buffer depth was only needed for my DCN-1 RavenRidge, not for my DCE-11.2 Polaris11 or a DCE-8.3 cik, so this should probably not cause harm to the increased precision modes.
Note that given the hardware and USB-C/DP-HDMI adapters i have, I only tested this on a 2560x1440@144 Hz DP monitor with DCN-1, DCE-11.2, and a 2560x1440@100 Hz HDMI monitor iirc with DCN-1, DCE-8.3, and i think on a 2880x1800@60 Hz MBP Retina eDP panel with DCE-11.2. These are the highest resolution/framerate monitors I have atm.I don't have access to any 4k monitors, so maybe the problem is somehow specific to such high resolutions? Maybe somewhere else in the code something would need to be adapted? Lacking actual hw docs, my coding here is by pattern matching against existing DC code, guessing and testing on my limited hw samples.
Acked-by: Mario Kleiner mario.kleiner.de@gmail.com
-mario
drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c index a6a67244a322e..1596f6b7fed7c 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c @@ -1062,7 +1062,7 @@ bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx) * so use only 30 bpp on DCE_VERSION_11_0. Testing with DCE 11.2 and 8.3 * did not show such problems, so this seems to be the exception. */
if (plane_state->ctx->dce_version != DCE_VERSION_11_0)
if (plane_state->ctx->dce_version > DCE_VERSION_11_0) pipe_ctx->plane_res.scl_data.lb_params.depth = LB_PIXEL_DEPTH_36BPP; else pipe_ctx->plane_res.scl_data.lb_params.depth = LB_PIXEL_DEPTH_30BPP;-- 2.32.0
amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
On 2021-07-15 3:19 p.m., Mario Kleiner wrote:
On Thu, Jul 15, 2021 at 6:10 PM Alex Deucher alexdeucher@gmail.com wrote:
On Wed, Jul 14, 2021 at 4:15 AM Liviu Dudau liviu@dudau.co.uk wrote:
Commit 72a7cf0aec0c ("drm/amd/display: Keep linebuffer pixel depth at 30bpp for DCE-11.0.") doesn't seems to have fixed 10bit 4K rendering over DisplayPort for CIK GPUs. On my machine with a HAWAII GPU I get a broken image that looks like it has an effective resolution of 1920x1080 but scaled up in an irregular way. Reverting the commit or applying this patch fixes the problem on v5.14-rc1.
Fixes: 72a7cf0aec0c ("drm/amd/display: Keep linebuffer pixel depth at 30bpp for DCE-11.0.") Signed-off-by: Liviu Dudau liviu@dudau.co.uk
Harry or Mario any ideas? Maybe we need finer grained DCE version checking? I don't remember all of the caveats of this stuff. DCE11 and older is getting to be pretty old at this point. I can just apply this if you don't have any insights.
Alex
Hi Alex
I'd be fine with applying this. As my original commit says, photometer measurements showed that increasing the line buffer depth was only needed for my DCN-1 RavenRidge, not for my DCE-11.2 Polaris11 or a DCE-8.3 cik, so this should probably not cause harm to the increased precision modes.
Note that given the hardware and USB-C/DP-HDMI adapters i have, I only tested this on a 2560x1440@144 Hz DP monitor with DCN-1, DCE-11.2, and a 2560x1440@100 Hz HDMI monitor iirc with DCN-1, DCE-8.3, and i think on a 2880x1800@60 Hz MBP Retina eDP panel with DCE-11.2. These are the highest resolution/framerate monitors I have atm.I don't have access to any 4k monitors, so maybe the problem is somehow specific to such high resolutions? Maybe somewhere else in the code something would need to be adapted? Lacking actual hw docs, my coding here is by pattern matching against existing DC code, guessing and testing on my limited hw samples.
Acked-by: Mario Kleiner mario.kleiner.de@gmail.com
Makes sense.
Reviewed-by: Harry Wentland harry.wentland@amd.com
Harry
-mario
drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c index a6a67244a322e..1596f6b7fed7c 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c @@ -1062,7 +1062,7 @@ bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx) * so use only 30 bpp on DCE_VERSION_11_0. Testing with DCE 11.2 and 8.3 * did not show such problems, so this seems to be the exception. */
if (plane_state->ctx->dce_version != DCE_VERSION_11_0)
if (plane_state->ctx->dce_version > DCE_VERSION_11_0) pipe_ctx->plane_res.scl_data.lb_params.depth = LB_PIXEL_DEPTH_36BPP; else pipe_ctx->plane_res.scl_data.lb_params.depth = LB_PIXEL_DEPTH_30BPP;-- 2.32.0
amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx%3E
Applied. Thanks!
Alex
On Thu, Jul 15, 2021 at 3:40 PM Harry Wentland harry.wentland@amd.com wrote:
On 2021-07-15 3:19 p.m., Mario Kleiner wrote:
On Thu, Jul 15, 2021 at 6:10 PM Alex Deucher alexdeucher@gmail.com wrote:
On Wed, Jul 14, 2021 at 4:15 AM Liviu Dudau liviu@dudau.co.uk wrote:
Commit 72a7cf0aec0c ("drm/amd/display: Keep linebuffer pixel depth at 30bpp for DCE-11.0.") doesn't seems to have fixed 10bit 4K rendering over DisplayPort for CIK GPUs. On my machine with a HAWAII GPU I get a broken image that looks like it has an effective resolution of 1920x1080 but scaled up in an irregular way. Reverting the commit or applying this patch fixes the problem on v5.14-rc1.
Fixes: 72a7cf0aec0c ("drm/amd/display: Keep linebuffer pixel depth at 30bpp for DCE-11.0.") Signed-off-by: Liviu Dudau liviu@dudau.co.uk
Harry or Mario any ideas? Maybe we need finer grained DCE version checking? I don't remember all of the caveats of this stuff. DCE11 and older is getting to be pretty old at this point. I can just apply this if you don't have any insights.
Alex
Hi Alex
I'd be fine with applying this. As my original commit says, photometer measurements showed that increasing the line buffer depth was only needed for my DCN-1 RavenRidge, not for my DCE-11.2 Polaris11 or a DCE-8.3 cik, so this should probably not cause harm to the increased precision modes.
Note that given the hardware and USB-C/DP-HDMI adapters i have, I only tested this on a 2560x1440@144 Hz DP monitor with DCN-1, DCE-11.2, and a 2560x1440@100 Hz HDMI monitor iirc with DCN-1, DCE-8.3, and i think on a 2880x1800@60 Hz MBP Retina eDP panel with DCE-11.2. These are the highest resolution/framerate monitors I have atm.I don't have access to any 4k monitors, so maybe the problem is somehow specific to such high resolutions? Maybe somewhere else in the code something would need to be adapted? Lacking actual hw docs, my coding here is by pattern matching against existing DC code, guessing and testing on my limited hw samples.
Acked-by: Mario Kleiner mario.kleiner.de@gmail.com
Makes sense.
Reviewed-by: Harry Wentland harry.wentland@amd.com
Harry
-mario
drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c index a6a67244a322e..1596f6b7fed7c 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c @@ -1062,7 +1062,7 @@ bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx) * so use only 30 bpp on DCE_VERSION_11_0. Testing with DCE 11.2 and 8.3 * did not show such problems, so this seems to be the exception. */
if (plane_state->ctx->dce_version != DCE_VERSION_11_0)
if (plane_state->ctx->dce_version > DCE_VERSION_11_0) pipe_ctx->plane_res.scl_data.lb_params.depth = LB_PIXEL_DEPTH_36BPP; else pipe_ctx->plane_res.scl_data.lb_params.depth = LB_PIXEL_DEPTH_30BPP;-- 2.32.0
amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx%3E
dri-devel@lists.freedesktop.org
-
Alex Deucher -
Harry Wentland -
Liviu Dudau -
Mario Kleiner