[PATCH v2 00/11] drm/edid: constify EDID parsing, with some fixes

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Jani Nikula

28 Mar 2022 28 Mar '22

9:17 a.m.

v2 of https://patchwork.freedesktop.org/series/101787/ addressing some review comments from Ville.

Jani Nikula (11): drm/edid: don't modify EDID while parsing drm/edid: fix reduced blanking support check drm/edid: slightly restructure timing and non-timing descriptor structs drm/edid: pass a timing pointer to is_display_descriptor() drm/edid: use struct detailed_timing member access in is_rb() drm/edid: use struct detailed_data_monitor_range member access in gtf2 functions drm/edid: constify struct detailed_timing in lower level parsing drm/edid: constify struct detailed_timing in parsing callbacks drm/edid: constify struct edid passed to detailed blocks drm/edid: constify struct edid passed around in callbacks and closure drm/edid: add more general struct edid constness in the interfaces

.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 6 +- drivers/gpu/drm/drm_edid.c | 287 ++++++++++-------- include/drm/drm_edid.h | 19 +- 3 files changed, 174 insertions(+), 138 deletions(-)

-- 2.30.2

Show replies by date

Jani Nikula

28 Mar 28 Mar

9:17 a.m.

New subject: [PATCH v2 01/11] drm/edid: don't modify EDID while parsing

We'll want to keep the EDID immutable while parsing. Stop modifying the EDID because of the quirks.

In theory, this does have userspace implications, but the userspace is supposed to use the modes exposed via KMS API, not by parsing the EDID directly.

Cc: Ville Syrjälä ville.syrjala@linux.intel.com Signed-off-by: Jani Nikula jani.nikula@intel.com Reviewed-by: Ville Syrjälä ville.syrjala@linux.intel.com --- drivers/gpu/drm/drm_edid.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index cc7bd58369df..1b552fe54f38 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -2740,9 +2740,9 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev, return NULL;

if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH) - timing->pixel_clock = cpu_to_le16(1088); - - mode->clock = le16_to_cpu(timing->pixel_clock) * 10; + mode->clock = 1088 * 10; + else + mode->clock = le16_to_cpu(timing->pixel_clock) * 10;

mode->hdisplay = hactive; mode->hsync_start = mode->hdisplay + hsync_offset; @@ -2763,14 +2763,14 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev, drm_mode_do_interlace_quirk(mode, pt);

if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) { - pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE; + mode->flags |= DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC; + } else { + mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? + DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; + mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? + DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; }

- mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? - DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; - mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? - DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; - set_size: mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4; mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;

-- 2.30.2

Jani Nikula

9:17 a.m.

New subject: [PATCH v2 02/11] drm/edid: fix reduced blanking support check

The reduced blanking bit is valid only for CVT, indicated by display range limits flags 0x04.

Signed-off-by: Jani Nikula jani.nikula@intel.com --- drivers/gpu/drm/drm_edid.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index 1b552fe54f38..13d05062d68c 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -2408,7 +2408,7 @@ is_rb(struct detailed_timing *t, void *data) if (!is_display_descriptor(r, EDID_DETAIL_MONITOR_RANGE)) return;

- if (r[15] & 0x10) + if (r[10] == DRM_EDID_CVT_SUPPORT_FLAG && r[15] & 0x10) *(bool *)data = true; }

-- 2.30.2

Ville Syrjälä

4:31 p.m.

New subject: [PATCH v2 02/11] drm/edid: fix reduced blanking support check

On Mon, Mar 28, 2022 at 12:17:16PM +0300, Jani Nikula wrote:

...

Reviewed-by: Ville Syrjälä ville.syrjala@linux.intel.com

...

-- Ville Syrjälä Intel

Jani Nikula

9:17 a.m.

New subject: [PATCH v2 03/11] drm/edid: slightly restructure timing and non-timing descriptor structs

The pixel clock is conceptually part of the detailed timings, while it's just zero padding for display descriptors. Modify the structures to reflect this. Rename struct detailed_non_pixel to edid_display_descriptor to better reflect spec while at it. (Further struct renames are left for follow-up work.)

Suggested-by: Ville Syrjälä ville.syrjala@linux.intel.com Signed-off-by: Jani Nikula jani.nikula@intel.com --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 6 +++--- drivers/gpu/drm/drm_edid.c | 12 ++++++------ include/drm/drm_edid.h | 9 +++++---- 3 files changed, 14 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index b30656959fd8..e477f4b42b6b 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -11537,7 +11537,7 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector, { int i = 0; struct detailed_timing *timing; - struct detailed_non_pixel *data; + struct edid_display_descriptor *data; struct detailed_data_monitor_range *range; struct amdgpu_dm_connector *amdgpu_dm_connector = to_amdgpu_dm_connector(connector); @@ -11592,7 +11592,7 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector, for (i = 0; i < 4; i++) {

timing = &edid->detailed_timings[i]; - data = &timing->data.other_data; + data = &timing->data.descriptor; range = &data->data.range; /* * Check if monitor has continuous frequency mode @@ -11629,7 +11629,7 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector, i = parse_hdmi_amd_vsdb(amdgpu_dm_connector, edid, &vsdb_info); if (i >= 0 && vsdb_info.freesync_supported) { timing = &edid->detailed_timings[i]; - data = &timing->data.other_data; + data = &timing->data.descriptor;

amdgpu_dm_connector->min_vfreq = vsdb_info.min_refresh_rate_hz; amdgpu_dm_connector->max_vfreq = vsdb_info.max_refresh_rate_hz; diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index 13d05062d68c..ac80681d64f6 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -2742,7 +2742,7 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev, if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH) mode->clock = 1088 * 10; else - mode->clock = le16_to_cpu(timing->pixel_clock) * 10; + mode->clock = le16_to_cpu(pt->pixel_clock) * 10;

mode->hdisplay = hactive; mode->hsync_start = mode->hdisplay + hsync_offset; @@ -2984,7 +2984,7 @@ static void do_inferred_modes(struct detailed_timing *timing, void *c) { struct detailed_mode_closure *closure = c; - struct detailed_non_pixel *data = &timing->data.other_data; + struct edid_display_descriptor *data = &timing->data.descriptor; struct detailed_data_monitor_range *range = &data->data.range;

if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_MONITOR_RANGE)) @@ -3117,7 +3117,7 @@ static void do_standard_modes(struct detailed_timing *timing, void *c) { struct detailed_mode_closure *closure = c; - struct detailed_non_pixel *data = &timing->data.other_data; + struct edid_display_descriptor *data = &timing->data.descriptor; struct drm_connector *connector = closure->connector; struct edid *edid = closure->edid; int i; @@ -3187,7 +3187,7 @@ static int drm_cvt_modes(struct drm_connector *connector, for (i = 0; i < 4; i++) { int width, height;

- cvt = &(timing->data.other_data.data.cvt[i]); + cvt = &(timing->data.descriptor.data.cvt[i]);

if (!memcmp(cvt->code, empty, 3)) continue; @@ -4494,7 +4494,7 @@ monitor_name(struct detailed_timing *t, void *data) if (!is_display_descriptor((const u8 *)t, EDID_DETAIL_MONITOR_NAME)) return;

- *(u8 **)data = t->data.other_data.data.str.str; + *(u8 **)data = t->data.descriptor.data.str.str; }

static int get_monitor_name(struct edid *edid, char name[13]) @@ -5223,7 +5223,7 @@ void get_monitor_range(struct detailed_timing *timing, void *info_monitor_range) { struct drm_monitor_range_info *monitor_range = info_monitor_range; - const struct detailed_non_pixel *data = &timing->data.other_data; + const struct edid_display_descriptor *data = &timing->data.descriptor; const struct detailed_data_monitor_range *range = &data->data.range;

if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_MONITOR_RANGE)) diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h index 144c495b99c4..8e322ef173a8 100644 --- a/include/drm/drm_edid.h +++ b/include/drm/drm_edid.h @@ -68,6 +68,7 @@ struct std_timing {

/* If detailed data is pixel timing */ struct detailed_pixel_timing { + __le16 pixel_clock; /* non-zero, need to multiply by 10 KHz */ u8 hactive_lo; u8 hblank_lo; u8 hactive_hblank_hi; @@ -142,8 +143,9 @@ struct cvt_timing { u8 code[3]; } __attribute__((packed));

-struct detailed_non_pixel { - u8 pad1; +struct edid_display_descriptor { + u16 pad0; /* 0 for Display Descriptor */ + u8 pad1; /* 0 for Display Descriptor */ u8 type; /* ff=serial, fe=string, fd=monitor range, fc=monitor name fb=color point data, fa=standard timing data, f9=undefined, f8=mfg. reserved */ @@ -168,10 +170,9 @@ struct detailed_non_pixel { #define EDID_DETAIL_MONITOR_SERIAL 0xff

struct detailed_timing { - __le16 pixel_clock; /* need to multiply by 10 KHz */ union { struct detailed_pixel_timing pixel_data; - struct detailed_non_pixel other_data; + struct edid_display_descriptor descriptor; } data; } __attribute__((packed));

-- 2.30.2

Jani Nikula

9:44 a.m.

New subject: [PATCH v2 03/11] drm/edid: slightly restructure timing and non-timing descriptor structs

On Mon, 28 Mar 2022, Jani Nikula jani.nikula@intel.com wrote:

...

This one's missing:

Cc: Harry Wentland harry.wentland@amd.com Cc: Leo Li sunpeng.li@amd.com Cc: Rodrigo Siqueira Rodrigo.Siqueira@amd.com Cc: amd-gfx@lists.freedesktop.org

...

-- Jani Nikula, Intel Open Source Graphics Center

kernel test robot

11:45 a.m.

New subject: [Intel-gfx] [PATCH v2 03/11] drm/edid: slightly restructure timing and non-timing descriptor structs

Hi Jani,

I love your patch! Perhaps something to improve:

[auto build test WARNING on drm/drm-next] [also build test WARNING on drm-intel/for-linux-next drm-tip/drm-tip v5.17 next-20220328] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch]

url: https://github.com/intel-lab-lkp/linux/commits/Jani-Nikula/drm-edid-constify... base: git://anongit.freedesktop.org/drm/drm drm-next config: x86_64-randconfig-a003-20220328 (https://download.01.org/0day-ci/archive/20220328/202203281926.AthxJpnK-lkp@i...) compiler: gcc-9 (Ubuntu 9.4.0-1ubuntu1~20.04.1) 9.4.0 reproduce (this is a W=1 build): # https://github.com/intel-lab-lkp/linux/commit/f538c9296c54ce8f878432153584a6... git remote add linux-review https://github.com/intel-lab-lkp/linux git fetch --no-tags linux-review Jani-Nikula/drm-edid-constify-EDID-parsing-with-some-fixes/20220328-171858 git checkout f538c9296c54ce8f878432153584a68939ffc111 # save the config file to linux build tree mkdir build_dir make W=1 O=build_dir ARCH=x86_64 SHELL=/bin/bash drivers/gpu/drm/tiny/

If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot lkp@intel.com

All warnings (new ones prefixed by >>):

drivers/gpu/drm/tiny/gm12u320.c:478:4: error: 'struct detailed_timing' has no member named 'pixel_clock' 478 | .pixel_clock = 3383, | ^~~~~~~~~~~

...

464 | static struct edid gm12u320_edid = { | ^ ...... 478 | .pixel_clock = 3383, | {{ }} 479 | /* hactive = 848, hblank = 256 */ 480 | .data.pixel_data.hactive_lo = 0x50, | }} 481 | .data.pixel_data.hblank_lo = 0x00, | }} 482 | .data.pixel_data.hactive_hblank_hi = 0x31, | }} 483 | /* vactive = 480, vblank = 28 */ 484 | .data.pixel_data.vactive_lo = 0xe0, | }} 485 | .data.pixel_data.vblank_lo = 0x1c, | }} 486 | .data.pixel_data.vactive_vblank_hi = 0x10, | }} 487 | /* hsync offset 40 pw 128, vsync offset 1 pw 4 */ 488 | .data.pixel_data.hsync_offset_lo = 0x28, | }} 489 | .data.pixel_data.hsync_pulse_width_lo = 0x80, | }} 490 | .data.pixel_data.vsync_offset_pulse_width_lo = 0x14, | }} 491 | .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00, | }} ...... 494 | }, { | }} drivers/gpu/drm/tiny/gm12u320.c:495:4: error: 'struct detailed_timing' has no member named 'pixel_clock' 495 | .pixel_clock = 0, | ^~~~~~~~~~~ drivers/gpu/drm/tiny/gm12u320.c:496:9: error: 'union <anonymous>' has no member named 'other_data' 496 | .data.other_data.type = 0xfd, /* Monitor ranges */ | ^~~~~~~~~~ drivers/gpu/drm/tiny/gm12u320.c:496:27: warning: initialized field overwritten [-Woverride-init] 496 | .data.other_data.type = 0xfd, /* Monitor ranges */ | ^~~~ drivers/gpu/drm/tiny/gm12u320.c:496:27: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock') drivers/gpu/drm/tiny/gm12u320.c:497:9: error: 'union <anonymous>' has no member named 'other_data' 497 | .data.other_data.data.range.min_vfreq = 59, | ^~~~~~~~~~ drivers/gpu/drm/tiny/gm12u320.c:497:43: warning: initialized field overwritten [-Woverride-init] 497 | .data.other_data.data.range.min_vfreq = 59, | ^~ drivers/gpu/drm/tiny/gm12u320.c:497:43: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock') drivers/gpu/drm/tiny/gm12u320.c:498:9: error: 'union <anonymous>' has no member named 'other_data' 498 | .data.other_data.data.range.max_vfreq = 61, | ^~~~~~~~~~ drivers/gpu/drm/tiny/gm12u320.c:498:43: warning: initialized field overwritten [-Woverride-init] 498 | .data.other_data.data.range.max_vfreq = 61, | ^~ drivers/gpu/drm/tiny/gm12u320.c:498:43: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock') drivers/gpu/drm/tiny/gm12u320.c:499:9: error: 'union <anonymous>' has no member named 'other_data' 499 | .data.other_data.data.range.min_hfreq_khz = 29, | ^~~~~~~~~~ drivers/gpu/drm/tiny/gm12u320.c:499:47: warning: initialized field overwritten [-Woverride-init] 499 | .data.other_data.data.range.min_hfreq_khz = 29, | ^~ drivers/gpu/drm/tiny/gm12u320.c:499:47: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock') drivers/gpu/drm/tiny/gm12u320.c:500:9: error: 'union <anonymous>' has no member named 'other_data' 500 | .data.other_data.data.range.max_hfreq_khz = 32, | ^~~~~~~~~~ drivers/gpu/drm/tiny/gm12u320.c:500:47: warning: initialized field overwritten [-Woverride-init] 500 | .data.other_data.data.range.max_hfreq_khz = 32, | ^~ drivers/gpu/drm/tiny/gm12u320.c:500:47: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock') drivers/gpu/drm/tiny/gm12u320.c:501:9: error: 'union <anonymous>' has no member named 'other_data' 501 | .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */ | ^~~~~~~~~~ drivers/gpu/drm/tiny/gm12u320.c:501:49: warning: initialized field overwritten [-Woverride-init] 501 | .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */ | ^ drivers/gpu/drm/tiny/gm12u320.c:501:49: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock') drivers/gpu/drm/tiny/gm12u320.c:502:9: error: 'union <anonymous>' has no member named 'other_data' 502 | .data.other_data.data.range.flags = 0, | ^~~~~~~~~~ drivers/gpu/drm/tiny/gm12u320.c:502:39: warning: initialized field overwritten [-Woverride-init] 502 | .data.other_data.data.range.flags = 0, | ^ drivers/gpu/drm/tiny/gm12u320.c:502:39: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock') drivers/gpu/drm/tiny/gm12u320.c:503:9: error: 'union <anonymous>' has no member named 'other_data' 503 | .data.other_data.data.range.formula.cvt = { | ^~~~~~~~~~

vim +464 drivers/gpu/drm/tiny/gm12u320.c

e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 457 e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 458 /* e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 459 * We use fake EDID info so that userspace know that it is dealing with e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 460 * an Acer projector, rather then listing this as an "unknown" monitor. e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 461 * Note this assumes this driver is only ever used with the Acer C120, if we e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 462 * add support for other devices the vendor and model should be parameterized. e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 463 */ e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 @464 static struct edid gm12u320_edid = { e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 465 .header = { 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 }, e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 466 .mfg_id = { 0x04, 0x72 }, /* "ACR" */ e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 467 .prod_code = { 0x20, 0xc1 }, /* C120h */ e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 468 .serial = 0xaa55aa55, e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 469 .mfg_week = 1, e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 470 .mfg_year = 16, e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 471 .version = 1, /* EDID 1.3 */ e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 472 .revision = 3, /* EDID 1.3 */ e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 473 .input = 0x08, /* Analog input */ e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 474 .features = 0x0a, /* Pref timing in DTD 1 */ e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 475 .standard_timings = { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 476 { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 477 .detailed_timings = { { e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 478 .pixel_clock = 3383, e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 479 /* hactive = 848, hblank = 256 */ e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 480 .data.pixel_data.hactive_lo = 0x50, e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 481 .data.pixel_data.hblank_lo = 0x00, e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 482 .data.pixel_data.hactive_hblank_hi = 0x31, e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 483 /* vactive = 480, vblank = 28 */ e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 484 .data.pixel_data.vactive_lo = 0xe0, e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 485 .data.pixel_data.vblank_lo = 0x1c, e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 486 .data.pixel_data.vactive_vblank_hi = 0x10, e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 487 /* hsync offset 40 pw 128, vsync offset 1 pw 4 */ e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 488 .data.pixel_data.hsync_offset_lo = 0x28, e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 489 .data.pixel_data.hsync_pulse_width_lo = 0x80, e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 490 .data.pixel_data.vsync_offset_pulse_width_lo = 0x14, e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 491 .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00, e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 492 /* Digital separate syncs, hsync+, vsync+ */ e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 493 .data.pixel_data.misc = 0x1e, e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 494 }, { e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 495 .pixel_clock = 0, e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 496 .data.other_data.type = 0xfd, /* Monitor ranges */ e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 497 .data.other_data.data.range.min_vfreq = 59, e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 498 .data.other_data.data.range.max_vfreq = 61, e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 499 .data.other_data.data.range.min_hfreq_khz = 29, e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 500 .data.other_data.data.range.max_hfreq_khz = 32, e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 501 .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */ e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 502 .data.other_data.data.range.flags = 0, e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 503 .data.other_data.data.range.formula.cvt = { e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 504 0xa0, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20 }, e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 505 }, { e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 506 .pixel_clock = 0, e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 507 .data.other_data.type = 0xfc, /* Model string */ e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 508 .data.other_data.data.str.str = { e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 509 'P', 'r', 'o', 'j', 'e', 'c', 't', 'o', 'r', '\n', e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 510 ' ', ' ', ' ' }, e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 511 }, { e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 512 .pixel_clock = 0, e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 513 .data.other_data.type = 0xfe, /* Unspecified text / padding */ e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 514 .data.other_data.data.str.str = { e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 515 '\n', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 516 ' ', ' ', ' ' }, e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 517 } }, e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 518 .checksum = 0x13, e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 519 }; e4f86e43716443e drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 520

-- 0-DAY CI Kernel Test Service https://01.org/lkp

Jani Nikula

1:20 p.m.

New subject: [Intel-gfx] [PATCH v2 03/11] drm/edid: slightly restructure timing and non-timing descriptor structs

I think I'm just going to revert back to my original plan of leaving the struct restructuring to another time in the future.

BR, Jani.

On Mon, 28 Mar 2022, kernel test robot lkp@intel.com wrote:

...

-- Jani Nikula, Intel Open Source Graphics Center

kernel test robot

12:26 p.m.

New subject: [Intel-gfx] [PATCH v2 03/11] drm/edid: slightly restructure timing and non-timing descriptor structs

Hi Jani,

I love your patch! Yet something to improve:

[auto build test ERROR on drm/drm-next] [also build test ERROR on drm-intel/for-linux-next drm-tip/drm-tip v5.17 next-20220328] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch]

url: https://github.com/intel-lab-lkp/linux/commits/Jani-Nikula/drm-edid-constify... base: git://anongit.freedesktop.org/drm/drm drm-next config: i386-randconfig-a012-20220328 (https://download.01.org/0day-ci/archive/20220328/202203282045.xd3D6oF8-lkp@i...) compiler: clang version 15.0.0 (https://github.com/llvm/llvm-project 0f6d9501cf49ce02937099350d08f20c4af86f3d) reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/intel-lab-lkp/linux/commit/f538c9296c54ce8f878432153584a6... git remote add linux-review https://github.com/intel-lab-lkp/linux git fetch --no-tags linux-review Jani-Nikula/drm-edid-constify-EDID-parsing-with-some-fixes/20220328-171858 git checkout f538c9296c54ce8f878432153584a68939ffc111 # save the config file to linux build tree mkdir build_dir COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=i386 SHELL=/bin/bash drivers/gpu/drm/tiny/

If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot lkp@intel.com

All errors (new ones prefixed by >>):

...

.pixel_clock = 3383, ^ drivers/gpu/drm/tiny/gm12u320.c:495:4: error: field designator 'pixel_clock' does not refer to any field in type 'struct detailed_timing' .pixel_clock = 0, ^

...

.data.other_data.type = 0xfd, /* Monitor ranges */ ^ drivers/gpu/drm/tiny/gm12u320.c:497:9: error: field designator 'other_data' does not refer to any field in type 'union (unnamed union at include/drm/drm_edid.h:173:2)' .data.other_data.data.range.min_vfreq = 59, ^ drivers/gpu/drm/tiny/gm12u320.c:498:9: error: field designator 'other_data' does not refer to any field in type 'union (unnamed union at include/drm/drm_edid.h:173:2)' .data.other_data.data.range.max_vfreq = 61, ^ drivers/gpu/drm/tiny/gm12u320.c:499:9: error: field designator 'other_data' does not refer to any field in type 'union (unnamed union at include/drm/drm_edid.h:173:2)' .data.other_data.data.range.min_hfreq_khz = 29, ^ drivers/gpu/drm/tiny/gm12u320.c:500:9: error: field designator 'other_data' does not refer to any field in type 'union (unnamed union at include/drm/drm_edid.h:173:2)' .data.other_data.data.range.max_hfreq_khz = 32, ^ drivers/gpu/drm/tiny/gm12u320.c:501:9: error: field designator 'other_data' does not refer to any field in type 'union (unnamed union at include/drm/drm_edid.h:173:2)' .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */ ^ drivers/gpu/drm/tiny/gm12u320.c:502:9: error: field designator 'other_data' does not refer to any field in type 'union (unnamed union at include/drm/drm_edid.h:173:2)' .data.other_data.data.range.flags = 0, ^ drivers/gpu/drm/tiny/gm12u320.c:503:9: error: field designator 'other_data' does not refer to any field in type 'union (unnamed union at include/drm/drm_edid.h:173:2)' .data.other_data.data.range.formula.cvt = { ^ drivers/gpu/drm/tiny/gm12u320.c:506:4: error: field designator 'pixel_clock' does not refer to any field in type 'struct detailed_timing' .pixel_clock = 0, ^ drivers/gpu/drm/tiny/gm12u320.c:507:9: error: field designator 'other_data' does not refer to any field in type 'union (unnamed union at include/drm/drm_edid.h:173:2)' .data.other_data.type = 0xfc, /* Model string */ ^ drivers/gpu/drm/tiny/gm12u320.c:508:9: error: field designator 'other_data' does not refer to any field in type 'union (unnamed union at include/drm/drm_edid.h:173:2)' .data.other_data.data.str.str = { ^ drivers/gpu/drm/tiny/gm12u320.c:512:4: error: field designator 'pixel_clock' does not refer to any field in type 'struct detailed_timing' .pixel_clock = 0, ^ drivers/gpu/drm/tiny/gm12u320.c:513:9: error: field designator 'other_data' does not refer to any field in type 'union (unnamed union at include/drm/drm_edid.h:173:2)' .data.other_data.type = 0xfe, /* Unspecified text / padding */ ^ drivers/gpu/drm/tiny/gm12u320.c:514:9: error: field designator 'other_data' does not refer to any field in type 'union (unnamed union at include/drm/drm_edid.h:173:2)' .data.other_data.data.str.str = { ^ 16 errors generated.

vim +478 drivers/gpu/drm/tiny/gm12u320.c

e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 457 e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 458 /* e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 459 * We use fake EDID info so that userspace know that it is dealing with e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 460 * an Acer projector, rather then listing this as an "unknown" monitor. e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 461 * Note this assumes this driver is only ever used with the Acer C120, if we e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 462 * add support for other devices the vendor and model should be parameterized. e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 463 */ e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 464 static struct edid gm12u320_edid = { e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 465 .header = { 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 }, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 466 .mfg_id = { 0x04, 0x72 }, /* "ACR" */ e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 467 .prod_code = { 0x20, 0xc1 }, /* C120h */ e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 468 .serial = 0xaa55aa55, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 469 .mfg_week = 1, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 470 .mfg_year = 16, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 471 .version = 1, /* EDID 1.3 */ e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 472 .revision = 3, /* EDID 1.3 */ e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 473 .input = 0x08, /* Analog input */ e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 474 .features = 0x0a, /* Pref timing in DTD 1 */ e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 475 .standard_timings = { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 476 { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 477 .detailed_timings = { { e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 @478 .pixel_clock = 3383, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 479 /* hactive = 848, hblank = 256 */ e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 480 .data.pixel_data.hactive_lo = 0x50, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 481 .data.pixel_data.hblank_lo = 0x00, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 482 .data.pixel_data.hactive_hblank_hi = 0x31, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 483 /* vactive = 480, vblank = 28 */ e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 484 .data.pixel_data.vactive_lo = 0xe0, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 485 .data.pixel_data.vblank_lo = 0x1c, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 486 .data.pixel_data.vactive_vblank_hi = 0x10, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 487 /* hsync offset 40 pw 128, vsync offset 1 pw 4 */ e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 488 .data.pixel_data.hsync_offset_lo = 0x28, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 489 .data.pixel_data.hsync_pulse_width_lo = 0x80, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 490 .data.pixel_data.vsync_offset_pulse_width_lo = 0x14, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 491 .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 492 /* Digital separate syncs, hsync+, vsync+ */ e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 493 .data.pixel_data.misc = 0x1e, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 494 }, { e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 495 .pixel_clock = 0, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 @496 .data.other_data.type = 0xfd, /* Monitor ranges */ e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 497 .data.other_data.data.range.min_vfreq = 59, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 498 .data.other_data.data.range.max_vfreq = 61, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 499 .data.other_data.data.range.min_hfreq_khz = 29, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 500 .data.other_data.data.range.max_hfreq_khz = 32, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 501 .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */ e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 502 .data.other_data.data.range.flags = 0, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 503 .data.other_data.data.range.formula.cvt = { e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 504 0xa0, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20 }, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 505 }, { e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 506 .pixel_clock = 0, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 507 .data.other_data.type = 0xfc, /* Model string */ e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 508 .data.other_data.data.str.str = { e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 509 'P', 'r', 'o', 'j', 'e', 'c', 't', 'o', 'r', '\n', e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 510 ' ', ' ', ' ' }, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 511 }, { e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 512 .pixel_clock = 0, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 513 .data.other_data.type = 0xfe, /* Unspecified text / padding */ e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 514 .data.other_data.data.str.str = { e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 515 '\n', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 516 ' ', ' ', ' ' }, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 517 } }, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 518 .checksum = 0x13, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 519 }; e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 520

-- 0-DAY CI Kernel Test Service https://01.org/lkp

kernel test robot

12:46 p.m.

New subject: [Intel-gfx] [PATCH v2 03/11] drm/edid: slightly restructure timing and non-timing descriptor structs

Hi Jani,

I love your patch! Yet something to improve:

url: https://github.com/intel-lab-lkp/linux/commits/Jani-Nikula/drm-edid-constify... base: git://anongit.freedesktop.org/drm/drm drm-next config: mips-randconfig-r005-20220327 (https://download.01.org/0day-ci/archive/20220328/202203282023.nkTeTLA5-lkp@i...) compiler: mips-linux-gcc (GCC) 11.2.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/intel-lab-lkp/linux/commit/f538c9296c54ce8f878432153584a6... git remote add linux-review https://github.com/intel-lab-lkp/linux git fetch --no-tags linux-review Jani-Nikula/drm-edid-constify-EDID-parsing-with-some-fixes/20220328-171858 git checkout f538c9296c54ce8f878432153584a68939ffc111 # save the config file to linux build tree mkdir build_dir COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=mips SHELL=/bin/bash drivers/gpu/drm/tiny/

If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot lkp@intel.com

All error/warnings (new ones prefixed by >>):

...

478 | .pixel_clock = 3383, | ^~~~~~~~~~~

...

...

496 | .data.other_data.type = 0xfd, /* Monitor ranges */ | ^~~~~~~~~~ drivers/gpu/drm/tiny/gm12u320.c:496:41: warning: initialized field overwritten [-Woverride-init] 496 | .data.other_data.type = 0xfd, /* Monitor ranges */ | ^~~~ drivers/gpu/drm/tiny/gm12u320.c:496:41: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock') drivers/gpu/drm/tiny/gm12u320.c:497:23: error: 'union <anonymous>' has no member named 'other_data' 497 | .data.other_data.data.range.min_vfreq = 59, | ^~~~~~~~~~ drivers/gpu/drm/tiny/gm12u320.c:497:57: warning: initialized field overwritten [-Woverride-init] 497 | .data.other_data.data.range.min_vfreq = 59, | ^~ drivers/gpu/drm/tiny/gm12u320.c:497:57: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock') drivers/gpu/drm/tiny/gm12u320.c:498:23: error: 'union <anonymous>' has no member named 'other_data' 498 | .data.other_data.data.range.max_vfreq = 61, | ^~~~~~~~~~ drivers/gpu/drm/tiny/gm12u320.c:498:57: warning: initialized field overwritten [-Woverride-init] 498 | .data.other_data.data.range.max_vfreq = 61, | ^~ drivers/gpu/drm/tiny/gm12u320.c:498:57: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock') drivers/gpu/drm/tiny/gm12u320.c:499:23: error: 'union <anonymous>' has no member named 'other_data' 499 | .data.other_data.data.range.min_hfreq_khz = 29, | ^~~~~~~~~~ drivers/gpu/drm/tiny/gm12u320.c:499:61: warning: initialized field overwritten [-Woverride-init] 499 | .data.other_data.data.range.min_hfreq_khz = 29, | ^~ drivers/gpu/drm/tiny/gm12u320.c:499:61: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock') drivers/gpu/drm/tiny/gm12u320.c:500:23: error: 'union <anonymous>' has no member named 'other_data' 500 | .data.other_data.data.range.max_hfreq_khz = 32, | ^~~~~~~~~~ drivers/gpu/drm/tiny/gm12u320.c:500:61: warning: initialized field overwritten [-Woverride-init] 500 | .data.other_data.data.range.max_hfreq_khz = 32, | ^~ drivers/gpu/drm/tiny/gm12u320.c:500:61: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock') drivers/gpu/drm/tiny/gm12u320.c:501:23: error: 'union <anonymous>' has no member named 'other_data' 501 | .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */ | ^~~~~~~~~~ drivers/gpu/drm/tiny/gm12u320.c:501:63: warning: initialized field overwritten [-Woverride-init] 501 | .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */ | ^ drivers/gpu/drm/tiny/gm12u320.c:501:63: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock') drivers/gpu/drm/tiny/gm12u320.c:502:23: error: 'union <anonymous>' has no member named 'other_data' 502 | .data.other_data.data.range.flags = 0, | ^~~~~~~~~~ drivers/gpu/drm/tiny/gm12u320.c:502:53: warning: initialized field overwritten [-Woverride-init] 502 | .data.other_data.data.range.flags = 0, | ^ drivers/gpu/drm/tiny/gm12u320.c:502:53: note: (near initialization for 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock') drivers/gpu/drm/tiny/gm12u320.c:503:23: error: 'union <anonymous>' has no member named 'other_data' 503 | .data.other_data.data.range.formula.cvt = { | ^~~~~~~~~~

vim +478 drivers/gpu/drm/tiny/gm12u320.c

e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 457 e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 458 /* e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 459 * We use fake EDID info so that userspace know that it is dealing with e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 460 * an Acer projector, rather then listing this as an "unknown" monitor. e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 461 * Note this assumes this driver is only ever used with the Acer C120, if we e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 462 * add support for other devices the vendor and model should be parameterized. e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 463 */ e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 @464 static struct edid gm12u320_edid = { e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 465 .header = { 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 }, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 466 .mfg_id = { 0x04, 0x72 }, /* "ACR" */ e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 467 .prod_code = { 0x20, 0xc1 }, /* C120h */ e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 468 .serial = 0xaa55aa55, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 469 .mfg_week = 1, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 470 .mfg_year = 16, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 471 .version = 1, /* EDID 1.3 */ e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 472 .revision = 3, /* EDID 1.3 */ e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 473 .input = 0x08, /* Analog input */ e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 474 .features = 0x0a, /* Pref timing in DTD 1 */ e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 475 .standard_timings = { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 476 { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 477 .detailed_timings = { { e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 @478 .pixel_clock = 3383, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 479 /* hactive = 848, hblank = 256 */ e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 480 .data.pixel_data.hactive_lo = 0x50, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 481 .data.pixel_data.hblank_lo = 0x00, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 482 .data.pixel_data.hactive_hblank_hi = 0x31, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 483 /* vactive = 480, vblank = 28 */ e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 484 .data.pixel_data.vactive_lo = 0xe0, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 485 .data.pixel_data.vblank_lo = 0x1c, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 486 .data.pixel_data.vactive_vblank_hi = 0x10, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 487 /* hsync offset 40 pw 128, vsync offset 1 pw 4 */ e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 488 .data.pixel_data.hsync_offset_lo = 0x28, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 489 .data.pixel_data.hsync_pulse_width_lo = 0x80, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 490 .data.pixel_data.vsync_offset_pulse_width_lo = 0x14, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 491 .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 492 /* Digital separate syncs, hsync+, vsync+ */ e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 493 .data.pixel_data.misc = 0x1e, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 494 }, { e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 495 .pixel_clock = 0, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 @496 .data.other_data.type = 0xfd, /* Monitor ranges */ e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 497 .data.other_data.data.range.min_vfreq = 59, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 498 .data.other_data.data.range.max_vfreq = 61, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 499 .data.other_data.data.range.min_hfreq_khz = 29, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 500 .data.other_data.data.range.max_hfreq_khz = 32, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 501 .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */ e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 502 .data.other_data.data.range.flags = 0, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 503 .data.other_data.data.range.formula.cvt = { e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 504 0xa0, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20 }, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 505 }, { e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 506 .pixel_clock = 0, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 507 .data.other_data.type = 0xfc, /* Model string */ e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 508 .data.other_data.data.str.str = { e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 509 'P', 'r', 'o', 'j', 'e', 'c', 't', 'o', 'r', '\n', e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 510 ' ', ' ', ' ' }, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 511 }, { e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 512 .pixel_clock = 0, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 513 .data.other_data.type = 0xfe, /* Unspecified text / padding */ e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 514 .data.other_data.data.str.str = { e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 515 '\n', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 516 ' ', ' ', ' ' }, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 517 } }, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 518 .checksum = 0x13, e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 519 }; e4f86e43716443 drivers/gpu/drm/gm12u320/gm12u320.c Hans de Goede 2019-07-21 520

-- 0-DAY CI Kernel Test Service https://01.org/lkp

Jani Nikula

9:17 a.m.

New subject: [PATCH v2 04/11] drm/edid: pass a timing pointer to is_display_descriptor()

Use struct member access instead of direct offsets to avoid lots of casts all over the place.

Use BUILD_BUG_ON() for sanity check.

Cc: Ville Syrjälä ville.syrjala@linux.intel.com Signed-off-by: Jani Nikula jani.nikula@intel.com --- drivers/gpu/drm/drm_edid.c | 27 ++++++++++++++++----------- 1 file changed, 16 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index ac80681d64f6..586b0ed3b3dc 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -2331,10 +2331,15 @@ struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev, } EXPORT_SYMBOL(drm_mode_find_dmt);

-static bool is_display_descriptor(const u8 d[18], u8 tag) +static bool is_display_descriptor(const struct detailed_timing *descriptor, u8 tag) { - return d[0] == 0x00 && d[1] == 0x00 && - d[2] == 0x00 && d[3] == tag; + BUILD_BUG_ON(offsetof(typeof(*descriptor), data.descriptor.pad0) != 0); + BUILD_BUG_ON(offsetof(typeof(*descriptor), data.descriptor.pad1) != 2); + BUILD_BUG_ON(offsetof(typeof(*descriptor), data.descriptor.type) != 3); + + return descriptor->data.descriptor.pad0 == 0 && + descriptor->data.descriptor.pad1 == 0 && + descriptor->data.descriptor.type == tag; }

static bool is_detailed_timing_descriptor(const u8 d[18]) @@ -2405,7 +2410,7 @@ is_rb(struct detailed_timing *t, void *data) { u8 *r = (u8 *)t;

- if (!is_display_descriptor(r, EDID_DETAIL_MONITOR_RANGE)) + if (!is_display_descriptor(t, EDID_DETAIL_MONITOR_RANGE)) return;

if (r[10] == DRM_EDID_CVT_SUPPORT_FLAG && r[15] & 0x10) @@ -2431,7 +2436,7 @@ find_gtf2(struct detailed_timing *t, void *data) { u8 *r = (u8 *)t;

- if (!is_display_descriptor(r, EDID_DETAIL_MONITOR_RANGE)) + if (!is_display_descriptor(t, EDID_DETAIL_MONITOR_RANGE)) return;

if (r[10] == 0x02) @@ -2987,7 +2992,7 @@ do_inferred_modes(struct detailed_timing *timing, void *c) struct edid_display_descriptor *data = &timing->data.descriptor; struct detailed_data_monitor_range *range = &data->data.range;

- if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_MONITOR_RANGE)) + if (!is_display_descriptor(timing, EDID_DETAIL_MONITOR_RANGE)) return;

closure->modes += drm_dmt_modes_for_range(closure->connector, @@ -3067,7 +3072,7 @@ do_established_modes(struct detailed_timing *timing, void *c) { struct detailed_mode_closure *closure = c;

- if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_EST_TIMINGS)) + if (!is_display_descriptor(timing, EDID_DETAIL_EST_TIMINGS)) return;

closure->modes += drm_est3_modes(closure->connector, timing); @@ -3122,7 +3127,7 @@ do_standard_modes(struct detailed_timing *timing, void *c) struct edid *edid = closure->edid; int i;

- if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_STD_MODES)) + if (!is_display_descriptor(timing, EDID_DETAIL_STD_MODES)) return;

for (i = 0; i < 6; i++) { @@ -3231,7 +3236,7 @@ do_cvt_mode(struct detailed_timing *timing, void *c) { struct detailed_mode_closure *closure = c;

- if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_CVT_3BYTE)) + if (!is_display_descriptor(timing, EDID_DETAIL_CVT_3BYTE)) return;

closure->modes += drm_cvt_modes(closure->connector, timing); @@ -4491,7 +4496,7 @@ drm_parse_hdmi_vsdb_audio(struct drm_connector *connector, const u8 *db) static void monitor_name(struct detailed_timing *t, void *data) { - if (!is_display_descriptor((const u8 *)t, EDID_DETAIL_MONITOR_NAME)) + if (!is_display_descriptor(t, EDID_DETAIL_MONITOR_NAME)) return;

*(u8 **)data = t->data.descriptor.data.str.str; @@ -5226,7 +5231,7 @@ void get_monitor_range(struct detailed_timing *timing, const struct edid_display_descriptor *data = &timing->data.descriptor; const struct detailed_data_monitor_range *range = &data->data.range;

- if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_MONITOR_RANGE)) + if (!is_display_descriptor(timing, EDID_DETAIL_MONITOR_RANGE)) return;

-- 2.30.2

Jani Nikula

9:17 a.m.

New subject: [PATCH v2 05/11] drm/edid: use struct detailed_timing member access in is_rb()

Use struct detailed_timing member access instead of direct offsets to avoid casting.

Use BUILD_BUG_ON() for sanity check.

Cc: Ville Syrjälä ville.syrjala@linux.intel.com Signed-off-by: Jani Nikula jani.nikula@intel.com

---

Note: Why can we use range.formula.cvt.flags directly in is_rb() while gtf2 functions check for range.flags == 0x02 first to ensure it's gtf2? --- drivers/gpu/drm/drm_edid.c | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index 586b0ed3b3dc..242f074f60d9 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -2406,15 +2406,21 @@ drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure) }

static void -is_rb(struct detailed_timing *t, void *data) +is_rb(struct detailed_timing *descriptor, void *data) { - u8 *r = (u8 *)t; + bool *res = data;

- if (!is_display_descriptor(t, EDID_DETAIL_MONITOR_RANGE)) + if (!is_display_descriptor(descriptor, EDID_DETAIL_MONITOR_RANGE)) return;

- if (r[10] == DRM_EDID_CVT_SUPPORT_FLAG && r[15] & 0x10) - *(bool *)data = true; + BUILD_BUG_ON(offsetof(typeof(*descriptor), + data.descriptor.data.range.flags) != 10); + BUILD_BUG_ON(offsetof(typeof(*descriptor), + data.descriptor.data.range.formula.cvt.flags) != 15); + + if (descriptor->data.descriptor.data.range.flags == DRM_EDID_CVT_SUPPORT_FLAG && + descriptor->data.descriptor.data.range.formula.cvt.flags & 0x10) + *res = true; }

/* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */

-- 2.30.2

Jani Nikula

9:17 a.m.

New subject: [PATCH v2 06/11] drm/edid: use struct detailed_data_monitor_range member access in gtf2 functions

Use struct struct detailed_data_monitor_range member access instead of direct offsets to avoid casting.

Use BUILD_BUG_ON() for sanity check.

v2: - Rename timing to descriptor (Ville) - Return and use struct detailed_data_monitor_range

Cc: Ville Syrjälä ville.syrjala@linux.intel.com Signed-off-by: Jani Nikula jani.nikula@intel.com --- drivers/gpu/drm/drm_edid.c | 63 ++++++++++++++++++++++++++------------ 1 file changed, 43 insertions(+), 20 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index 242f074f60d9..4d63f3412672 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -2438,61 +2438,84 @@ drm_monitor_supports_rb(struct edid *edid) }

static void -find_gtf2(struct detailed_timing *t, void *data) +find_gtf2(struct detailed_timing *descriptor, void *data) { - u8 *r = (u8 *)t; + struct detailed_data_monitor_range **res = data;

- if (!is_display_descriptor(t, EDID_DETAIL_MONITOR_RANGE)) + if (!is_display_descriptor(descriptor, EDID_DETAIL_MONITOR_RANGE)) return;

- if (r[10] == 0x02) - *(u8 **)data = r; + BUILD_BUG_ON(offsetof(typeof(*descriptor), data.descriptor.data.range.flags) != 10); + + if (descriptor->data.descriptor.data.range.flags == + DRM_EDID_SECONDARY_GTF_SUPPORT_FLAG) + *res = &descriptor->data.descriptor.data.range; }

/* Secondary GTF curve kicks in above some break frequency */ static int drm_gtf2_hbreak(struct edid *edid) { - u8 *r = NULL; + struct detailed_data_monitor_range *range = NULL; + + drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);

- drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); - return r ? (r[12] * 2) : 0; + BUILD_BUG_ON(offsetof(struct detailed_timing, data.descriptor.data.range) + + offsetof(typeof(*range), formula.gtf2.hfreq_start_khz) != 12); + + return range ? range->formula.gtf2.hfreq_start_khz * 2 : 0; }

static int drm_gtf2_2c(struct edid *edid) { - u8 *r = NULL; + struct detailed_data_monitor_range *range = NULL; + + drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range); + + BUILD_BUG_ON(offsetof(struct detailed_timing, data.descriptor.data.range) + + offsetof(typeof(*range), formula.gtf2.c) != 13);

- drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); - return r ? r[13] : 0; + return range ? range->formula.gtf2.c : 0; }

static int drm_gtf2_m(struct edid *edid) { - u8 *r = NULL; + struct detailed_data_monitor_range *range = NULL;

- drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); - return r ? (r[15] << 8) + r[14] : 0; + drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range); + + BUILD_BUG_ON(offsetof(struct detailed_timing, data.descriptor.data.range) + + offsetof(typeof(*range), formula.gtf2.m) != 14); + + return range ? le16_to_cpu(range->formula.gtf2.m) : 0; }

static int drm_gtf2_k(struct edid *edid) { - u8 *r = NULL; + struct detailed_data_monitor_range *range = NULL; + + drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);

- drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); - return r ? r[16] : 0; + BUILD_BUG_ON(offsetof(struct detailed_timing, data.descriptor.data.range) + + offsetof(typeof(*range), formula.gtf2.k) != 16); + + return range ? range->formula.gtf2.k : 0; }

static int drm_gtf2_2j(struct edid *edid) { - u8 *r = NULL; + struct detailed_data_monitor_range *range = NULL; + + drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range); + + BUILD_BUG_ON(offsetof(struct detailed_timing, data.descriptor.data.range) + + offsetof(typeof(*range), formula.gtf2.j) != 17);

- drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); - return r ? r[17] : 0; + return range ? range->formula.gtf2.j : 0; }

/**

-- 2.30.2

Jani Nikula

9:17 a.m.

New subject: [PATCH v2 07/11] drm/edid: constify struct detailed_timing in lower level parsing

Start constifying the struct detailed_timing pointers being passed around from bottom up.

Cc: Ville Syrjälä ville.syrjala@linux.intel.com Signed-off-by: Jani Nikula jani.nikula@intel.com --- drivers/gpu/drm/drm_edid.c | 40 +++++++++++++++++++------------------- 1 file changed, 20 insertions(+), 20 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index 4d63f3412672..60eee683be3f 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -2566,7 +2566,7 @@ static int drm_mode_hsync(const struct drm_display_mode *mode) */ static struct drm_display_mode * drm_mode_std(struct drm_connector *connector, struct edid *edid, - struct std_timing *t) + const struct std_timing *t) { struct drm_device *dev = connector->dev; struct drm_display_mode *m, *mode = NULL; @@ -2684,7 +2684,7 @@ drm_mode_std(struct drm_connector *connector, struct edid *edid, */ static void drm_mode_do_interlace_quirk(struct drm_display_mode *mode, - struct detailed_pixel_timing *pt) + const struct detailed_pixel_timing *pt) { int i; static const struct { @@ -2728,11 +2728,11 @@ drm_mode_do_interlace_quirk(struct drm_display_mode *mode, */ static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev, struct edid *edid, - struct detailed_timing *timing, + const struct detailed_timing *timing, u32 quirks) { struct drm_display_mode *mode; - struct detailed_pixel_timing *pt = &timing->data.pixel_data; + const struct detailed_pixel_timing *pt = &timing->data.pixel_data; unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo; unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo; unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo; @@ -2827,7 +2827,7 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,

static bool mode_in_hsync_range(const struct drm_display_mode *mode, - struct edid *edid, u8 *t) + struct edid *edid, const u8 *t) { int hsync, hmin, hmax;

@@ -2844,7 +2844,7 @@ mode_in_hsync_range(const struct drm_display_mode *mode,

static bool mode_in_vsync_range(const struct drm_display_mode *mode, - struct edid *edid, u8 *t) + struct edid *edid, const u8 *t) { int vsync, vmin, vmax;

@@ -2860,7 +2860,7 @@ mode_in_vsync_range(const struct drm_display_mode *mode, }

static u32 -range_pixel_clock(struct edid *edid, u8 *t) +range_pixel_clock(struct edid *edid, const u8 *t) { /* unspecified */ if (t[9] == 0 || t[9] == 255) @@ -2876,10 +2876,10 @@ range_pixel_clock(struct edid *edid, u8 *t)

static bool mode_in_range(const struct drm_display_mode *mode, struct edid *edid, - struct detailed_timing *timing) + const struct detailed_timing *timing) { u32 max_clock; - u8 *t = (u8 *)timing; + const u8 *t = (const u8 *)timing;

if (!mode_in_hsync_range(mode, edid, t)) return false; @@ -2922,7 +2922,7 @@ static bool valid_inferred_mode(const struct drm_connector *connector,

static int drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid, - struct detailed_timing *timing) + const struct detailed_timing *timing) { int i, modes = 0; struct drm_display_mode *newmode; @@ -2957,7 +2957,7 @@ void drm_mode_fixup_1366x768(struct drm_display_mode *mode)

static int drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid, - struct detailed_timing *timing) + const struct detailed_timing *timing) { int i, modes = 0; struct drm_display_mode *newmode; @@ -2986,7 +2986,7 @@ drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,

static int drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid, - struct detailed_timing *timing) + const struct detailed_timing *timing) { int i, modes = 0; struct drm_display_mode *newmode; @@ -3018,8 +3018,8 @@ static void do_inferred_modes(struct detailed_timing *timing, void *c) { struct detailed_mode_closure *closure = c; - struct edid_display_descriptor *data = &timing->data.descriptor; - struct detailed_data_monitor_range *range = &data->data.range; + const struct edid_display_descriptor *data = &timing->data.descriptor; + const struct detailed_data_monitor_range *range = &data->data.range;

if (!is_display_descriptor(timing, EDID_DETAIL_MONITOR_RANGE)) return; @@ -3068,11 +3068,11 @@ add_inferred_modes(struct drm_connector *connector, struct edid *edid) }

static int -drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing) +drm_est3_modes(struct drm_connector *connector, const struct detailed_timing *timing) { int i, j, m, modes = 0; struct drm_display_mode *mode; - u8 *est = ((u8 *)timing) + 6; + const u8 *est = ((const u8 *)timing) + 6;

for (i = 0; i < 6; i++) { for (j = 7; j >= 0; j--) { @@ -3151,7 +3151,7 @@ static void do_standard_modes(struct detailed_timing *timing, void *c) { struct detailed_mode_closure *closure = c; - struct edid_display_descriptor *data = &timing->data.descriptor; + const struct edid_display_descriptor *data = &timing->data.descriptor; struct drm_connector *connector = closure->connector; struct edid *edid = closure->edid; int i; @@ -3160,7 +3160,7 @@ do_standard_modes(struct detailed_timing *timing, void *c) return;

for (i = 0; i < 6; i++) { - struct std_timing *std = &data->data.timings[i]; + const struct std_timing *std = &data->data.timings[i]; struct drm_display_mode *newmode;

newmode = drm_mode_std(connector, edid, std); @@ -3209,12 +3209,12 @@ add_standard_modes(struct drm_connector *connector, struct edid *edid) }

static int drm_cvt_modes(struct drm_connector *connector, - struct detailed_timing *timing) + const struct detailed_timing *timing) { int i, j, modes = 0; struct drm_display_mode *newmode; struct drm_device *dev = connector->dev; - struct cvt_timing *cvt; + const struct cvt_timing *cvt; const int rates[] = { 60, 85, 75, 60, 50 }; const u8 empty[3] = { 0, 0, 0 };

-- 2.30.2

Jani Nikula

9:17 a.m.

New subject: [PATCH v2 08/11] drm/edid: constify struct detailed_timing in parsing callbacks

Moving one level higher, constify struct detailed_timing pointers in callbacks.

Cc: Ville Syrjälä ville.syrjala@linux.intel.com Signed-off-by: Jani Nikula jani.nikula@intel.com --- drivers/gpu/drm/drm_edid.c | 40 ++++++++++++++++++++------------------ 1 file changed, 21 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index 60eee683be3f..95c48485794c 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -2347,7 +2347,7 @@ static bool is_detailed_timing_descriptor(const u8 d[18]) return d[0] != 0x00 || d[1] != 0x00; }

-typedef void detailed_cb(struct detailed_timing *timing, void *closure); +typedef void detailed_cb(const struct detailed_timing *timing, void *closure);

static void cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure) @@ -2406,7 +2406,7 @@ drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure) }

static void -is_rb(struct detailed_timing *descriptor, void *data) +is_rb(const struct detailed_timing *descriptor, void *data) { bool *res = data;

@@ -2438,9 +2438,9 @@ drm_monitor_supports_rb(struct edid *edid) }

static void -find_gtf2(struct detailed_timing *descriptor, void *data) +find_gtf2(const struct detailed_timing *descriptor, void *data) { - struct detailed_data_monitor_range **res = data; + const struct detailed_data_monitor_range **res = data;

if (!is_display_descriptor(descriptor, EDID_DETAIL_MONITOR_RANGE)) return; @@ -2456,7 +2456,7 @@ find_gtf2(struct detailed_timing *descriptor, void *data) static int drm_gtf2_hbreak(struct edid *edid) { - struct detailed_data_monitor_range *range = NULL; + const struct detailed_data_monitor_range *range = NULL;