On 08/18/2014 10:11 AM, Inki Dae wrote:

This patch adds a new flag, MIPI_DSI-MODE_LPM, to transmit data in low power. With this flag, msg.flags has MIPI_DSI_MSG_USE_LPM so that host driver of each SoC can clear or set relevant register bit for low power transmission.

All host drivers shall support continuous clock behavior on the Clock Lane, and optionally may support non-continuous clock behavior. Both of them can transmit data in high speed of low power.

With each clock behavior, non-continuous or continuous clock mode, host controller will transmit data in high speed by default so if peripheral wants to receive data in low power, the peripheral driver should set MIPI_DSI_MODE_LPM flag.

I think it would be better to remove last two paragraphs as irrelevant, LPM and clock behavior are orthogonal.

Signed-off-by: Inki Dae inki.dae@samsung.com

drivers/gpu/drm/drm_mipi_dsi.c | 6 ++++++ include/drm/drm_mipi_dsi.h | 2 ++ 2 files changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/drivers/gpu/drm/drm_mipi_dsi.c index 6aa6a9e..eb6dfe5 100644 --- a/drivers/gpu/drm/drm_mipi_dsi.c +++ b/drivers/gpu/drm/drm_mipi_dsi.c @@ -231,6 +231,9 @@ ssize_t mipi_dsi_dcs_write(struct mipi_dsi_device *dsi, const void *data, break; }

• if (dsi->mode_flags & MIPI_DSI_MODE_LPM)

• msg.flags = MIPI_DSI_MSG_USE_LPM;
  

• return ops->transfer(dsi->host, &msg);

} EXPORT_SYMBOL(mipi_dsi_dcs_write); @@ -260,6 +263,9 @@ ssize_t mipi_dsi_dcs_read(struct mipi_dsi_device *dsi, u8 cmd, void *data, if (!ops || !ops->transfer) return -ENOSYS;

• if (dsi->mode_flags & MIPI_DSI_MODE_LPM)

• msg.flags = MIPI_DSI_MSG_USE_LPM;
  

I see three other ways of adding LPM to DCS:

1. Add flags argument to DCS command, eg: mipi_dsi_dcs_write(dsi, data, len, flags)

2. Pass struct mipi_dsi_device to transfer callback: ssize_t (*transfer)(struct mipi_dsi_device *dsi, struct mipi_dsi_msg *msg); or ssize_t (*transfer)(struct mipi_dsi_host *host, struct mipi_dsi_device *dsi, struct mipi_dsi_msg *msg);

This way DSI host will have access to mipi_dsi_device and to its flags.

3. Create new API function, lets call it dsi_transfer, which should by called by DCS helpers instead of transfer op. This function shall translate device flags to message flags and call the original op.

I think the 3rd solution is the best one, but I have no strong feelings against the other ones, including your. As I remember Thierry have also some ideas about changes in DSI API so I have added him to CC.

Regards Andrzej

return ops->transfer(dsi->host, &msg); } EXPORT_SYMBOL(mipi_dsi_dcs_read); diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h index 2bb55b8..8569dc5 100644 --- a/include/drm/drm_mipi_dsi.h +++ b/include/drm/drm_mipi_dsi.h @@ -96,6 +96,8 @@ void mipi_dsi_host_unregister(struct mipi_dsi_host *host); #define MIPI_DSI_MODE_EOT_PACKET BIT(9) /* device supports non-continuous clock behavior (DSI spec 5.6.1) */ #define MIPI_DSI_CLOCK_NON_CONTINUOUS BIT(10) +/* transmit data in low power */ +#define MIPI_DSI_MODE_LPM BIT(11)

enum mipi_dsi_pixel_format { MIPI_DSI_FMT_RGB888,

On 08/18/2014 10:11 AM, Inki Dae wrote:

This patch adds non-continuous clock mode support

Clock mode on Clock Lane is continuous clock by default. So if we want to transmit data in non-continuous clock mode to reduce power consumption, then host driver should set DSIM_CLKLANE_STOP bit. In this case, host controller turns off HS clock between high speed transmissions.

For this, this patch adds a new bit, DSIM_CLKLANE_STOP, and makes the host driver set this bit only in case that dsi->mode_flags has MIPI_DSI_CLOCK_NON_CONTINUOUS flag.

Signed-off-by: Inki Dae inki.dae@samsung.com

Acked-by: Andrzej Hajda a.hajda@samsung.com -- Regards Andrzej

---

drivers/gpu/drm/exynos/exynos_drm_dsi.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index 442aa2d..2d47290 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -114,6 +114,8 @@ #define DSIM_SYNC_INFORM (1 << 27) #define DSIM_EOT_DISABLE (1 << 28) #define DSIM_MFLUSH_VS (1 << 29) +/* This flag is valid only for exynos3250/3472/4415/5260/5430 */ +#define DSIM_CLKLANE_STOP (1 << 30)

/* DSIM_ESCMODE */ #define DSIM_TX_TRIGGER_RST (1 << 4) @@ -262,6 +264,7 @@ struct exynos_dsi_driver_data { unsigned int plltmr_reg;

unsigned int has_freqband:1;

• unsigned int has_clklane_stop:1;

};

struct exynos_dsi { @@ -304,6 +307,7 @@ struct exynos_dsi { static struct exynos_dsi_driver_data exynos4_dsi_driver_data = { .plltmr_reg = 0x50, .has_freqband = 1,

• .has_clklane_stop = 1,

};

static struct exynos_dsi_driver_data exynos5_dsi_driver_data = { @@ -569,6 +573,7 @@ static void exynos_dsi_disable_clock(struct exynos_dsi *dsi)

static int exynos_dsi_init_link(struct exynos_dsi *dsi) {

• struct exynos_dsi_driver_data *driver_data = dsi->driver_data; int timeout; u32 reg; u32 lanes_mask;

@@ -650,6 +655,20 @@ static int exynos_dsi_init_link(struct exynos_dsi *dsi) reg |= DSIM_LANE_EN(lanes_mask); writel(reg, dsi->reg_base + DSIM_CONFIG_REG);

• /*

• * Use non-continuous clock mode if the periparal wants and
  

• * host controller supports
  

• *
  

• * In non-continous clock mode, host controller will turn off
  

• * the HS clock between high-speed transmissions to reduce
  

• * power consumption.
  

• */
  

• if (driver_data->has_clklane_stop &&

• 	dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) {
  

• reg |= DSIM_CLKLANE_STOP;
  

• writel(reg, dsi->reg_base + DSIM_CONFIG_REG);
  

• }
• /* Check clock and data lane state are stop state */ timeout = 100; do {