In order to readout DP SDPs (Secondary Data Packet: DP HDR Metadata Infoframe SDP, DP VSC SDP), it refactors handling DP SDPs codes. It adds new compute routines for DP HDR Metadata Infoframe SDP and DP VSC SDP. And new writing routines of DP SDPs (Secondary Data Packet) that uses computed configs. New reading routines of DP SDPs are added for readout. It adds a logging function for DP VSC SDP. When receiving video it is very useful to be able to log DP VSC SDP. This greatly simplifies debugging. In order to use a common VSC SDP Colorimetry calculating code on PSR, it uses a new psr vsc sdp compute routine.
v2: Minor style fix v3: - Add a new drm data structure for DP VSC SDP - Replace a structure name to drm_dp_vsc_sdp from intel_dp_vsc_sdp - Move logging functions to drm core [Jani N] And use drm core's DP VSC SDP logging function - Explicitly disable unused DIPs (AVI, GCP, VS, SPD, DRM. They will be used for HDMI), when intel_dp_set_infoframes() function will be called.
Gwan-gyeong Mun (17): drm: add DP 1.4 VSC SDP Payload related enums and a structure drm/i915/dp: Add compute routine for DP VSC SDP drm/i915/dp: Add compute routine for DP HDR Metadata Infoframe SDP drm/i915/dp: Add writing of DP SDPs (Secondary Data Packet) video/hdmi: Add Unpack only function for DRM infoframe drm/i915/dp: Read out DP SDPs (Secondary Data Packet) drm: Add logging function for DP VSC SDP drm/i915: Include HDMI DRM infoframe in the crtc state dump drm/i915: Include DP HDR Metadata Infoframe SDP in the crtc state dump drm/i915: Include DP VSC SDP in the crtc state dump drm/i915: Program DP SDPs with computed configs drm/i915: Add state readout for DP HDR Metadata Infoframe SDP drm/i915: Add state readout for DP VSC SDP drm/i915: Program DP SDPs on pipe updates drm/i915: Stop sending DP SDPs on intel_ddi_post_disable_dp() drm/i915/dp: Add compute routine for DP PSR VSC SDP drm/i915/psr: Use new DP VSC SDP compute routine on PSR
drivers/gpu/drm/drm_dp_helper.c | 174 +++++ drivers/gpu/drm/i915/display/intel_ddi.c | 19 +- drivers/gpu/drm/i915/display/intel_display.c | 61 ++ .../drm/i915/display/intel_display_types.h | 1 + drivers/gpu/drm/i915/display/intel_dp.c | 607 +++++++++++++----- drivers/gpu/drm/i915/display/intel_dp.h | 18 +- drivers/gpu/drm/i915/display/intel_psr.c | 54 +- drivers/gpu/drm/i915/display/intel_psr.h | 6 +- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/video/hdmi.c | 58 +- include/drm/drm_dp_helper.h | 60 ++ include/linux/hdmi.h | 2 + 12 files changed, 843 insertions(+), 218 deletions(-)
It adds new enumeration definitions for VSC SDP Payload for Pixel Encoding/Colorimetry Format. And it adds a new drm data structure for DP VSC SDP.
enum dp_colorspace and enum dp_colorimetry correspond "Pixel Encoding and Colorimetry Formats". enum dp_dynamic_range corresponds "Dynamic Range". And enum dp_content_type corresponds "Content Type" All of them are based on DP 1.4 spec [Table 2-117: VSC SDP Payload for DB16 through DB18].
v3: Add a new drm data structure for DP VSC SDP
Signed-off-by: Gwan-gyeong Mun gwan-gyeong.mun@intel.com --- include/drm/drm_dp_helper.h | 57 +++++++++++++++++++++++++++++++++++++ 1 file changed, 57 insertions(+)
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index 262faf9e5e94..c098727681fa 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h @@ -1209,6 +1209,63 @@ struct dp_sdp { #define EDP_VSC_PSR_UPDATE_RFB (1<<1) #define EDP_VSC_PSR_CRC_VALUES_VALID (1<<2)
+/* Based on DP 1.4 spec [Table 2-117: VSC SDP Payload for DB16 through DB18] */ +enum dp_colorspace { + DP_COLORSPACE_RGB = 0, + DP_COLORSPACE_YUV444 = 0x1, + DP_COLORSPACE_YUV422 = 0x2, + DP_COLORSPACE_YUV420 = 0x3, + DP_COLORSPACE_Y_ONLY = 0x4, + DP_COLORSPACE_RAW = 0x5, + DP_COLORSPACE_RESERVED = 0x6, +}; + +/** + * Based on DP 1.4 spec [Table 2-117: VSC SDP Payload for DB16 through DB18] + * and a name of enum member followes DRM_MODE_COLORIMETRY definition. + */ +enum dp_colorimetry { + DP_COLORIMETRY_DEFAULT = 0, /* sRGB (IEC 61966-2-1) / ITU-R BT.601 */ + DP_COLORIMETRY_RGB_WIDE_FIXED = 0x1, + DP_COLORIMETRY_BT709_YCC = 0x1, + DP_COLORIMETRY_RGB_WIDE_FLOAT = 0x2, + DP_COLORIMETRY_XVYCC_601 = 0x2, + DP_COLORIMETRY_OPRGB = 0x3, + DP_COLORIMETRY_XVYCC_709 = 0x3, + DP_COLORIMETRY_DCI_P3_RGB = 0x4, + DP_COLORIMETRY_SYCC_601 = 0x4, + DP_COLORIMETRY_RGB_CUSTOM = 0x5, + DP_COLORIMETRY_OPYCC_601 = 0x5, + DP_COLORIMETRY_BT2020_RGB = 0x6, + DP_COLORIMETRY_BT2020_CYCC = 0x6, + DP_COLORIMETRY_BT2020_YCC = 0x7, +}; + +enum dp_dynamic_range { + DP_DYNAMIC_RANGE_VESA = 0, + DP_DYNAMIC_RANGE_CTA = 1, +}; + +enum dp_content_type { + DP_CONTENT_TYPE_NOT_DEFINED = 0x00, + DP_CONTENT_TYPE_GRAPHICS = 0x01, + DP_CONTENT_TYPE_PHOTO = 0x02, + DP_CONTENT_TYPE_VIDEO = 0x03, + DP_CONTENT_TYPE_GAME = 0x04, +}; + +/* DRM DP VSC SDP as per DP 1.4 spec */ +struct drm_dp_vsc_sdp { + unsigned char sdp_type; /* Secondary-data Packet Type */ + unsigned char revision; /* Revision Number */ + unsigned char length; /* Number of Valid Data Bytes */ + enum dp_colorspace colorspace; + enum dp_colorimetry colorimetry; + int bpc; /* bit per color */ + enum dp_dynamic_range dynamic_range; + enum dp_content_type content_type; +}; + int drm_dp_psr_setup_time(const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE]);
static inline int
-----Original Message----- From: dri-devel dri-devel-bounces@lists.freedesktop.org On Behalf Of Gwan- gyeong Mun Sent: Tuesday, February 4, 2020 4:50 AM To: intel-gfx@lists.freedesktop.org Cc: linux-fbdev@vger.kernel.org; dri-devel@lists.freedesktop.org Subject: [PATCH v3 01/17] drm: add DP 1.4 VSC SDP Payload related enums and a structure
%s/add/Add/ Also you can rephrase this as " Add DP1.4 VSC SDP Payload related Data Structures"/
It adds new enumeration definitions for VSC SDP Payload for Pixel Encoding/Colorimetry Format. And it adds a new drm data structure for DP VSC SDP.
enum dp_colorspace and enum dp_colorimetry correspond "Pixel Encoding and Colorimetry Formats". enum dp_dynamic_range corresponds "Dynamic Range". And enum dp_content_type corresponds "Content Type" All of them are based on DP 1.4 spec [Table 2-117: VSC SDP Payload for DB16 through DB18].
v3: Add a new drm data structure for DP VSC SDP
Signed-off-by: Gwan-gyeong Mun gwan-gyeong.mun@intel.com
include/drm/drm_dp_helper.h | 57 +++++++++++++++++++++++++++++++++++++ 1 file changed, 57 insertions(+)
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index 262faf9e5e94..c098727681fa 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h @@ -1209,6 +1209,63 @@ struct dp_sdp { #define EDP_VSC_PSR_UPDATE_RFB (1<<1) #define EDP_VSC_PSR_CRC_VALUES_VALID (1<<2)
+/* Based on DP 1.4 spec [Table 2-117: VSC SDP Payload for DB16 through +DB18] */ enum dp_colorspace {
We should not call this colorspace, rather rename it to dp_pixelformat. These are not colorspaces.
Also add these to kernel docs as they are standard definitions.
- DP_COLORSPACE_RGB = 0,
Make this as DP_PIXELFORMAT_RGB and rename all the below ones as well.
- DP_COLORSPACE_YUV444 = 0x1,
- DP_COLORSPACE_YUV422 = 0x2,
- DP_COLORSPACE_YUV420 = 0x3,
- DP_COLORSPACE_Y_ONLY = 0x4,
- DP_COLORSPACE_RAW = 0x5,
- DP_COLORSPACE_RESERVED = 0x6,
+};
+/**
- Based on DP 1.4 spec [Table 2-117: VSC SDP Payload for DB16 through
+DB18]
- and a name of enum member followes DRM_MODE_COLORIMETRY definition.
Typo in follows
- */
+enum dp_colorimetry {
You can call this as dp_colorspace (this is actual colorspace), you can stick with colorimetry as well. Will leave that to you.
- DP_COLORIMETRY_DEFAULT = 0, /* sRGB (IEC 61966-2-1) / ITU-R BT.601 */
- DP_COLORIMETRY_RGB_WIDE_FIXED = 0x1,
- DP_COLORIMETRY_BT709_YCC = 0x1,
- DP_COLORIMETRY_RGB_WIDE_FLOAT = 0x2,
- DP_COLORIMETRY_XVYCC_601 = 0x2,
- DP_COLORIMETRY_OPRGB = 0x3,
- DP_COLORIMETRY_XVYCC_709 = 0x3,
- DP_COLORIMETRY_DCI_P3_RGB = 0x4,
- DP_COLORIMETRY_SYCC_601 = 0x4,
- DP_COLORIMETRY_RGB_CUSTOM = 0x5,
- DP_COLORIMETRY_OPYCC_601 = 0x5,
- DP_COLORIMETRY_BT2020_RGB = 0x6,
- DP_COLORIMETRY_BT2020_CYCC = 0x6,
- DP_COLORIMETRY_BT2020_YCC = 0x7,
+};
+enum dp_dynamic_range {
- DP_DYNAMIC_RANGE_VESA = 0,
- DP_DYNAMIC_RANGE_CTA = 1,
+};
+enum dp_content_type {
- DP_CONTENT_TYPE_NOT_DEFINED = 0x00,
- DP_CONTENT_TYPE_GRAPHICS = 0x01,
- DP_CONTENT_TYPE_PHOTO = 0x02,
- DP_CONTENT_TYPE_VIDEO = 0x03,
- DP_CONTENT_TYPE_GAME = 0x04,
+};
+/* DRM DP VSC SDP as per DP 1.4 spec */ struct drm_dp_vsc_sdp {
- unsigned char sdp_type; /* Secondary-data Packet Type */
- unsigned char revision; /* Revision Number */
These comments seems self-explanatory, you can probably drop them.
- unsigned char length; /* Number of Valid Data Bytes */
- enum dp_colorspace colorspace;
- enum dp_colorimetry colorimetry;
- int bpc; /* bit per color */
- enum dp_dynamic_range dynamic_range;
- enum dp_content_type content_type;
+};
int drm_dp_psr_setup_time(const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE]);
static inline int
2.24.1
dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
On Wed, 2020-02-05 at 20:12 +0530, Shankar, Uma wrote:
-----Original Message----- From: dri-devel dri-devel-bounces@lists.freedesktop.org On Behalf Of Gwan- gyeong Mun Sent: Tuesday, February 4, 2020 4:50 AM To: intel-gfx@lists.freedesktop.org Cc: linux-fbdev@vger.kernel.org; dri-devel@lists.freedesktop.org Subject: [PATCH v3 01/17] drm: add DP 1.4 VSC SDP Payload related enums and a structure
%s/add/Add/ Also you can rephrase this as " Add DP1.4 VSC SDP Payload related Data Structures"/
Hi Uma, Thank you for reviewing a patch series.
Okay I'll rephrase commit message with your guide.
It adds new enumeration definitions for VSC SDP Payload for Pixel Encoding/Colorimetry Format. And it adds a new drm data structure for DP VSC SDP.
enum dp_colorspace and enum dp_colorimetry correspond "Pixel Encoding and Colorimetry Formats". enum dp_dynamic_range corresponds "Dynamic Range". And enum dp_content_type corresponds "Content Type" All of them are based on DP 1.4 spec [Table 2-117: VSC SDP Payload for DB16 through DB18].
v3: Add a new drm data structure for DP VSC SDP
Signed-off-by: Gwan-gyeong Mun gwan-gyeong.mun@intel.com
include/drm/drm_dp_helper.h | 57 +++++++++++++++++++++++++++++++++++++ 1 file changed, 57 insertions(+)
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index 262faf9e5e94..c098727681fa 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h @@ -1209,6 +1209,63 @@ struct dp_sdp { #define EDP_VSC_PSR_UPDATE_RFB (1<<1) #define EDP_VSC_PSR_CRC_VALUES_VALID (1<<2)
+/* Based on DP 1.4 spec [Table 2-117: VSC SDP Payload for DB16 through +DB18] */ enum dp_colorspace {
We should not call this colorspace, rather rename it to dp_pixelformat. These are not colorspaces.
Also add these to kernel docs as they are standard definitions.
- DP_COLORSPACE_RGB = 0,
Make this as DP_PIXELFORMAT_RGB and rename all the below ones as well.
- DP_COLORSPACE_YUV444 = 0x1,
- DP_COLORSPACE_YUV422 = 0x2,
- DP_COLORSPACE_YUV420 = 0x3,
- DP_COLORSPACE_Y_ONLY = 0x4,
- DP_COLORSPACE_RAW = 0x5,
- DP_COLORSPACE_RESERVED = 0x6,
+};
+/**
- Based on DP 1.4 spec [Table 2-117: VSC SDP Payload for DB16
through +DB18]
- and a name of enum member followes DRM_MODE_COLORIMETRY
definition.
Typo in follows
- */
+enum dp_colorimetry {
You can call this as dp_colorspace (this is actual colorspace), you can stick with colorimetry as well. Will leave that to you.
Yes, the DP spec uses colorimetry as the term, I prefer colorimetry.
- DP_COLORIMETRY_DEFAULT = 0, /* sRGB (IEC 61966-2-1) / ITU-R
BT.601 */
- DP_COLORIMETRY_RGB_WIDE_FIXED = 0x1,
- DP_COLORIMETRY_BT709_YCC = 0x1,
- DP_COLORIMETRY_RGB_WIDE_FLOAT = 0x2,
- DP_COLORIMETRY_XVYCC_601 = 0x2,
- DP_COLORIMETRY_OPRGB = 0x3,
- DP_COLORIMETRY_XVYCC_709 = 0x3,
- DP_COLORIMETRY_DCI_P3_RGB = 0x4,
- DP_COLORIMETRY_SYCC_601 = 0x4,
- DP_COLORIMETRY_RGB_CUSTOM = 0x5,
- DP_COLORIMETRY_OPYCC_601 = 0x5,
- DP_COLORIMETRY_BT2020_RGB = 0x6,
- DP_COLORIMETRY_BT2020_CYCC = 0x6,
- DP_COLORIMETRY_BT2020_YCC = 0x7,
+};
+enum dp_dynamic_range {
- DP_DYNAMIC_RANGE_VESA = 0,
- DP_DYNAMIC_RANGE_CTA = 1,
+};
+enum dp_content_type {
- DP_CONTENT_TYPE_NOT_DEFINED = 0x00,
- DP_CONTENT_TYPE_GRAPHICS = 0x01,
- DP_CONTENT_TYPE_PHOTO = 0x02,
- DP_CONTENT_TYPE_VIDEO = 0x03,
- DP_CONTENT_TYPE_GAME = 0x04,
+};
+/* DRM DP VSC SDP as per DP 1.4 spec */ struct drm_dp_vsc_sdp {
- unsigned char sdp_type; /* Secondary-data Packet Type */
- unsigned char revision; /* Revision Number */
These comments seems self-explanatory, you can probably drop them.
Thank you for review in detail, I'll update everything that you commented.
- unsigned char length; /* Number of Valid Data Bytes */
- enum dp_colorspace colorspace;
- enum dp_colorimetry colorimetry;
- int bpc; /* bit per color */
- enum dp_dynamic_range dynamic_range;
- enum dp_content_type content_type;
+};
int drm_dp_psr_setup_time(const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE]);
static inline int
2.24.1
dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
In order to support state readout for DP VSC SDP, we need to have a structure which holds DP VSC SDP payload data such as "union hdmi_infoframe drm" which is used for DRM infoframe. It adds a struct drm_dp_vsc_sdp vsc to intel_crtc_state.infoframes.
And it stores computed dp vsc sdp to infoframes.vsc of crtc state. While computing we'll also fill out the inforames.enable bitmask appropriately.
The compute routine follows DP 1.4 spec [Table 2-117: VSC SDP Payload for DB16 through DB18].
v3: Replace a structure name to drm_dp_vsc_sdp from intel_dp_vsc_sdp
Signed-off-by: Gwan-gyeong Mun gwan-gyeong.mun@intel.com --- .../drm/i915/display/intel_display_types.h | 1 + drivers/gpu/drm/i915/display/intel_dp.c | 92 +++++++++++++++++++ 2 files changed, 93 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 33ba93863488..6633c1061670 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -1021,6 +1021,7 @@ struct intel_crtc_state { union hdmi_infoframe spd; union hdmi_infoframe hdmi; union hdmi_infoframe drm; + struct drm_dp_vsc_sdp vsc; } infoframes;
/* HDMI scrambling status */ diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index f4dede6253f8..2bdc43c80e03 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2372,6 +2372,97 @@ static bool intel_dp_port_has_audio(struct drm_i915_private *dev_priv, return true; }
+static void intel_dp_compute_vsc_colorimetry(const struct intel_crtc_state *crtc_state, + const struct drm_connector_state *conn_state, + struct drm_dp_vsc_sdp *vsc) +{ + /* + * Prepare VSC Header for SU as per DP 1.4 spec, Table 2-118 + * VSC SDP supporting 3D stereo, PSR2, and Pixel Encoding/ + * Colorimetry Format indication. + */ + vsc->revision = 0x5; + vsc->length = 0x13; + + /* DP 1.4a spec, Table 2-120 */ + switch (crtc_state->output_format) { + case INTEL_OUTPUT_FORMAT_YCBCR444: + vsc->colorspace = DP_COLORSPACE_YUV444; + break; + case INTEL_OUTPUT_FORMAT_YCBCR420: + vsc->colorspace = DP_COLORSPACE_YUV420; + break; + case INTEL_OUTPUT_FORMAT_RGB: + default: + vsc->colorspace = DP_COLORSPACE_RGB; + } + + switch (conn_state->colorspace) { + case DRM_MODE_COLORIMETRY_BT709_YCC: + vsc->colorimetry = DP_COLORIMETRY_BT709_YCC; + break; + case DRM_MODE_COLORIMETRY_XVYCC_601: + vsc->colorimetry = DP_COLORIMETRY_XVYCC_601; + break; + case DRM_MODE_COLORIMETRY_XVYCC_709: + vsc->colorimetry = DP_COLORIMETRY_XVYCC_709; + break; + case DRM_MODE_COLORIMETRY_SYCC_601: + vsc->colorimetry = DP_COLORIMETRY_SYCC_601; + break; + case DRM_MODE_COLORIMETRY_OPYCC_601: + vsc->colorimetry = DP_COLORIMETRY_OPYCC_601; + break; + case DRM_MODE_COLORIMETRY_BT2020_CYCC: + vsc->colorimetry = DP_COLORIMETRY_BT2020_CYCC; + break; + case DRM_MODE_COLORIMETRY_BT2020_RGB: + vsc->colorimetry = DP_COLORIMETRY_BT2020_RGB; + break; + case DRM_MODE_COLORIMETRY_BT2020_YCC: + vsc->colorimetry = DP_COLORIMETRY_BT2020_YCC; + break; + case DRM_MODE_COLORIMETRY_DCI_P3_RGB_D65: + case DRM_MODE_COLORIMETRY_DCI_P3_RGB_THEATER: + vsc->colorimetry = DP_COLORIMETRY_DCI_P3_RGB; + break; + default: + /* + * RGB->YCBCR color conversion uses the BT.709 + * color space. + */ + if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420) + vsc->colorimetry = DP_COLORIMETRY_BT709_YCC; + else + vsc->colorimetry = DP_COLORIMETRY_DEFAULT; + break; + } + + vsc->bpc = crtc_state->pipe_bpp / 3; + /* all YCbCr are always limited range */ + vsc->dynamic_range = DP_DYNAMIC_RANGE_CTA; + vsc->content_type = DP_CONTENT_TYPE_NOT_DEFINED; +} + +static void intel_dp_compute_vsc_sdp(struct intel_dp *intel_dp, + struct intel_crtc_state *crtc_state, + const struct drm_connector_state *conn_state) +{ + struct drm_dp_vsc_sdp *vsc = &crtc_state->infoframes.vsc; + + /* When PSR is enabled, VSC SDP is handled by PSR routine */ + if (intel_psr_enabled(intel_dp)) + return; + + if (!intel_dp_needs_vsc_sdp(crtc_state, conn_state)) + return; + + crtc_state->infoframes.enable |= intel_hdmi_infoframe_enable(DP_SDP_VSC); + vsc->sdp_type = DP_SDP_VSC; + intel_dp_compute_vsc_colorimetry(crtc_state, conn_state, + &crtc_state->infoframes.vsc); +} + int intel_dp_compute_config(struct intel_encoder *encoder, struct intel_crtc_state *pipe_config, @@ -2477,6 +2568,7 @@ intel_dp_compute_config(struct intel_encoder *encoder, intel_dp_set_clock(encoder, pipe_config);
intel_psr_compute_config(intel_dp, pipe_config); + intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);
return 0; }
-----Original Message----- From: dri-devel dri-devel-bounces@lists.freedesktop.org On Behalf Of Gwan- gyeong Mun Sent: Tuesday, February 4, 2020 4:50 AM To: intel-gfx@lists.freedesktop.org Cc: linux-fbdev@vger.kernel.org; dri-devel@lists.freedesktop.org Subject: [PATCH v3 02/17] drm/i915/dp: Add compute routine for DP VSC SDP
In order to support state readout for DP VSC SDP, we need to have a structure which holds DP VSC SDP payload data such as "union hdmi_infoframe drm" which is used for DRM infoframe. It adds a struct drm_dp_vsc_sdp vsc to intel_crtc_state.infoframes.
And it stores computed dp vsc sdp to infoframes.vsc of crtc state. While computing we'll also fill out the inforames.enable bitmask appropriately.
The compute routine follows DP 1.4 spec [Table 2-117: VSC SDP Payload for DB16 through DB18].
v3: Replace a structure name to drm_dp_vsc_sdp from intel_dp_vsc_sdp
With the structure names updated, this looks good to me. Reviewed-by: Uma Shankar uma.shankar@intel.com
Signed-off-by: Gwan-gyeong Mun gwan-gyeong.mun@intel.com
.../drm/i915/display/intel_display_types.h | 1 + drivers/gpu/drm/i915/display/intel_dp.c | 92 +++++++++++++++++++ 2 files changed, 93 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 33ba93863488..6633c1061670 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -1021,6 +1021,7 @@ struct intel_crtc_state { union hdmi_infoframe spd; union hdmi_infoframe hdmi; union hdmi_infoframe drm;
struct drm_dp_vsc_sdp vsc;} infoframes;
/* HDMI scrambling status */
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index f4dede6253f8..2bdc43c80e03 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2372,6 +2372,97 @@ static bool intel_dp_port_has_audio(struct drm_i915_private *dev_priv, return true; }
+static void intel_dp_compute_vsc_colorimetry(const struct intel_crtc_state *crtc_state,
const struct drm_connector_state*conn_state,
struct drm_dp_vsc_sdp *vsc)+{
- /*
* Prepare VSC Header for SU as per DP 1.4 spec, Table 2-118* VSC SDP supporting 3D stereo, PSR2, and Pixel Encoding/* Colorimetry Format indication.*/- vsc->revision = 0x5;
- vsc->length = 0x13;
- /* DP 1.4a spec, Table 2-120 */
- switch (crtc_state->output_format) {
- case INTEL_OUTPUT_FORMAT_YCBCR444:
vsc->colorspace = DP_COLORSPACE_YUV444;break;- case INTEL_OUTPUT_FORMAT_YCBCR420:
vsc->colorspace = DP_COLORSPACE_YUV420;break;- case INTEL_OUTPUT_FORMAT_RGB:
- default:
vsc->colorspace = DP_COLORSPACE_RGB;- }
- switch (conn_state->colorspace) {
- case DRM_MODE_COLORIMETRY_BT709_YCC:
vsc->colorimetry = DP_COLORIMETRY_BT709_YCC;break;- case DRM_MODE_COLORIMETRY_XVYCC_601:
vsc->colorimetry = DP_COLORIMETRY_XVYCC_601;break;- case DRM_MODE_COLORIMETRY_XVYCC_709:
vsc->colorimetry = DP_COLORIMETRY_XVYCC_709;break;- case DRM_MODE_COLORIMETRY_SYCC_601:
vsc->colorimetry = DP_COLORIMETRY_SYCC_601;break;- case DRM_MODE_COLORIMETRY_OPYCC_601:
vsc->colorimetry = DP_COLORIMETRY_OPYCC_601;break;- case DRM_MODE_COLORIMETRY_BT2020_CYCC:
vsc->colorimetry = DP_COLORIMETRY_BT2020_CYCC;break;- case DRM_MODE_COLORIMETRY_BT2020_RGB:
vsc->colorimetry = DP_COLORIMETRY_BT2020_RGB;break;- case DRM_MODE_COLORIMETRY_BT2020_YCC:
vsc->colorimetry = DP_COLORIMETRY_BT2020_YCC;break;- case DRM_MODE_COLORIMETRY_DCI_P3_RGB_D65:
- case DRM_MODE_COLORIMETRY_DCI_P3_RGB_THEATER:
vsc->colorimetry = DP_COLORIMETRY_DCI_P3_RGB;break;- default:
/** RGB->YCBCR color conversion uses the BT.709* color space.*/if (crtc_state->output_format ==INTEL_OUTPUT_FORMAT_YCBCR420)
vsc->colorimetry = DP_COLORIMETRY_BT709_YCC;elsevsc->colorimetry = DP_COLORIMETRY_DEFAULT;break;- }
- vsc->bpc = crtc_state->pipe_bpp / 3;
- /* all YCbCr are always limited range */
- vsc->dynamic_range = DP_DYNAMIC_RANGE_CTA;
- vsc->content_type = DP_CONTENT_TYPE_NOT_DEFINED; }
+static void intel_dp_compute_vsc_sdp(struct intel_dp *intel_dp,
struct intel_crtc_state *crtc_state,const struct drm_connector_state *conn_state) {- struct drm_dp_vsc_sdp *vsc = &crtc_state->infoframes.vsc;
- /* When PSR is enabled, VSC SDP is handled by PSR routine */
- if (intel_psr_enabled(intel_dp))
return;- if (!intel_dp_needs_vsc_sdp(crtc_state, conn_state))
return;- crtc_state->infoframes.enable |=
intel_hdmi_infoframe_enable(DP_SDP_VSC);
- vsc->sdp_type = DP_SDP_VSC;
- intel_dp_compute_vsc_colorimetry(crtc_state, conn_state,
&crtc_state->infoframes.vsc);+}
int intel_dp_compute_config(struct intel_encoder *encoder, struct intel_crtc_state *pipe_config, @@ -2477,6 +2568,7 @@ intel_dp_compute_config(struct intel_encoder *encoder, intel_dp_set_clock(encoder, pipe_config);
intel_psr_compute_config(intel_dp, pipe_config);
intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);
return 0;
}
2.24.1
dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
It stores computed dp hdr metadata infoframe sdp to infoframes.drm of crtc state. It referenced intel_hdmi_compute_drm_infoframe().
While computing, we'll also fill out the inforames.enable bitmask appropriately.
v2: Wrap a long line.
Signed-off-by: Gwan-gyeong Mun gwan-gyeong.mun@intel.com --- drivers/gpu/drm/i915/display/intel_dp.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 2bdc43c80e03..b265b5c599f2 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2463,6 +2463,27 @@ static void intel_dp_compute_vsc_sdp(struct intel_dp *intel_dp, &crtc_state->infoframes.vsc); }
+static void +intel_dp_compute_hdr_metadata_infoframe_sdp(struct intel_crtc_state *crtc_state, + const struct drm_connector_state *conn_state) +{ + int ret; + struct hdmi_drm_infoframe *drm_infoframe = &crtc_state->infoframes.drm.drm; + + if (!conn_state->hdr_output_metadata) + return; + + ret = drm_hdmi_infoframe_set_hdr_metadata(drm_infoframe, conn_state); + + if (ret) { + DRM_DEBUG_KMS("couldn't set HDR metadata in infoframe\n"); + return; + } + + crtc_state->infoframes.enable |= + intel_hdmi_infoframe_enable(HDMI_PACKET_TYPE_GAMUT_METADATA); +} + int intel_dp_compute_config(struct intel_encoder *encoder, struct intel_crtc_state *pipe_config, @@ -2569,6 +2590,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
intel_psr_compute_config(intel_dp, pipe_config); intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state); + intel_dp_compute_hdr_metadata_infoframe_sdp(pipe_config, conn_state);
return 0; }
-----Original Message----- From: dri-devel dri-devel-bounces@lists.freedesktop.org On Behalf Of Gwan- gyeong Mun Sent: Tuesday, February 4, 2020 4:50 AM To: intel-gfx@lists.freedesktop.org Cc: linux-fbdev@vger.kernel.org; dri-devel@lists.freedesktop.org Subject: [PATCH v3 03/17] drm/i915/dp: Add compute routine for DP HDR Metadata Infoframe SDP
It stores computed dp hdr metadata infoframe sdp to infoframes.drm of crtc state. It referenced intel_hdmi_compute_drm_infoframe().
While computing, we'll also fill out the inforames.enable bitmask appropriately.
Typo in infoframes
With the above fixed, this is Reviewed-by: Uma Shankar uma.shankar@intel.com
v2: Wrap a long line.
Signed-off-by: Gwan-gyeong Mun gwan-gyeong.mun@intel.com
drivers/gpu/drm/i915/display/intel_dp.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 2bdc43c80e03..b265b5c599f2 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2463,6 +2463,27 @@ static void intel_dp_compute_vsc_sdp(struct intel_dp *intel_dp, &crtc_state->infoframes.vsc); }
+static void +intel_dp_compute_hdr_metadata_infoframe_sdp(struct intel_crtc_state *crtc_state,
const struct drm_connector_state*conn_state) {
- int ret;
- struct hdmi_drm_infoframe *drm_infoframe =
+&crtc_state->infoframes.drm.drm;
- if (!conn_state->hdr_output_metadata)
return;- ret = drm_hdmi_infoframe_set_hdr_metadata(drm_infoframe, conn_state);
- if (ret) {
DRM_DEBUG_KMS("couldn't set HDR metadata in infoframe\n");return;- }
- crtc_state->infoframes.enable |=
- intel_hdmi_infoframe_enable(HDMI_PACKET_TYPE_GAMUT_METADATA);
+}
int intel_dp_compute_config(struct intel_encoder *encoder, struct intel_crtc_state *pipe_config, @@ -2569,6 +2590,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
intel_psr_compute_config(intel_dp, pipe_config); intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);
intel_dp_compute_hdr_metadata_infoframe_sdp(pipe_config, conn_state);
return 0;
}
2.24.1
dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
It adds routines that write DP VSC SDP and DP HDR Metadata Infoframe SDP. In order to pack DP VSC SDP, it adds intel_dp_vsc_sdp_pack() function. It follows DP 1.4a spec. [Table 2-116: VSC SDP Header Bytes] and [Table 2-117: VSC SDP Payload for DB16 through DB18]
In order to pack DP HDR Metadata Infoframe SDP, it adds intel_dp_hdr_metadata_infoframe_sdp_pack() function. And it follows DP 1.4a spec. ([Table 2-125: INFOFRAME SDP v1.2 Header Bytes] and [Table 2-126: INFOFRAME SDP v1.2 Payload Data Bytes - DB0 through DB31]) and CTA-861-G spec. [Table-42 Dynamic Range and Mastering InfoFrame].
A machanism and a naming rule of intel_dp_set_infoframes() function references intel_encoder->set_infoframes() of intel_hdmi.c . VSC SDP is used for PSR and Pixel Encoding and Colorimetry Formats cases. Because PSR routine has its own routine of writing a VSC SDP, when the PSR is enabled, intel_dp_set_infoframes() does not write a VSC SDP.
v3: - Explicitly disable unused DIPs (AVI, GCP, VS, SPD, DRM. They will be used for HDMI), when intel_dp_set_infoframes() function will be called. - Replace a structure name to drm_dp_vsc_sdp from intel_dp_vsc_sdp.
Signed-off-by: Gwan-gyeong Mun gwan-gyeong.mun@intel.com --- drivers/gpu/drm/i915/display/intel_dp.c | 194 ++++++++++++++++++++++++ drivers/gpu/drm/i915/display/intel_dp.h | 3 + 2 files changed, 197 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index b265b5c599f2..dd7e5588001e 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -4731,6 +4731,200 @@ intel_dp_needs_vsc_sdp(const struct intel_crtc_state *crtc_state, return false; }
+static ssize_t intel_dp_vsc_sdp_pack(const struct drm_dp_vsc_sdp *vsc, + struct dp_sdp *sdp, size_t size) +{ + size_t length = sizeof(struct dp_sdp); + + if (size < length) + return -ENOSPC; + + memset(sdp, 0, size); + + /* + * Prepare VSC Header for SU as per DP 1.4a spec, Table 2-119 + * VSC SDP Header Bytes + */ + sdp->sdp_header.HB0 = 0; /* Secondary-Data Packet ID = 0 */ + sdp->sdp_header.HB1 = vsc->sdp_type; /* Secondary-data Packet Type */ + sdp->sdp_header.HB2 = vsc->revision; /* Revision Number */ + sdp->sdp_header.HB3 = vsc->length; /* Number of Valid Data Bytes */ + + /* VSC SDP Payload for DB16 through DB18 */ + /* Pixel Encoding and Colorimetry Formats */ + sdp->db[16] = (vsc->colorspace & 0xf) << 4; /* DB16[7:4] */ + sdp->db[16] |= vsc->colorimetry & 0xf; /* DB16[3:0] */ + + switch (vsc->bpc) { + case 8: + sdp->db[17] = 0x1; /* DB17[3:0] */ + break; + case 10: + sdp->db[17] = 0x2; + break; + case 12: + sdp->db[17] = 0x3; + break; + case 16: + sdp->db[17] = 0x4; + break; + default: + MISSING_CASE(vsc->bpc); + break; + } + /* Dynamic Range and Component Bit Depth */ + if (vsc->dynamic_range == DP_DYNAMIC_RANGE_CTA) + sdp->db[17] |= 0x80; /* DB17[7] */ + + /* Content Type */ + sdp->db[18] = vsc->content_type & 0x7; + + return length; +} + +static ssize_t +intel_dp_hdr_metadata_infoframe_sdp_pack(const struct hdmi_drm_infoframe *drm_infoframe, + struct dp_sdp *sdp, + size_t size) +{ + size_t length = sizeof(struct dp_sdp); + const int infoframe_size = HDMI_INFOFRAME_HEADER_SIZE + HDMI_DRM_INFOFRAME_SIZE; + unsigned char buf[HDMI_INFOFRAME_HEADER_SIZE + HDMI_DRM_INFOFRAME_SIZE]; + ssize_t len; + + if (size < length) + return -ENOSPC; + + memset(sdp, 0, size); + + len = hdmi_drm_infoframe_pack_only(drm_infoframe, buf, sizeof(buf)); + if (len < 0) { + DRM_DEBUG_KMS("buffer size is smaller than hdr metadata infoframe\n"); + return -ENOSPC; + } + + if (len != infoframe_size) { + DRM_DEBUG_KMS("wrong static hdr metadata size\n"); + return -ENOSPC; + } + + /* + * Set up the infoframe sdp packet for HDR static metadata. + * Prepare VSC Header for SU as per DP 1.4a spec, + * Table 2-100 and Table 2-101 + */ + + /* Secondary-Data Packet ID, 00h for non-Audio INFOFRAME */ + sdp->sdp_header.HB0 = 0; + /* + * Packet Type 80h + Non-audio INFOFRAME Type value + * HDMI_INFOFRAME_TYPE_DRM: 0x87 + * - 80h + Non-audio INFOFRAME Type value + * - InfoFrame Type: 0x07 + * [CTA-861-G Table-42 Dynamic Range and Mastering InfoFrame] + */ + sdp->sdp_header.HB1 = drm_infoframe->type; + /* + * Least Significant Eight Bits of (Data Byte Count – 1) + * infoframe_size - 1 + */ + sdp->sdp_header.HB2 = 0x1D; + /* INFOFRAME SDP Version Number */ + sdp->sdp_header.HB3 = (0x13 << 2); + /* CTA Header Byte 2 (INFOFRAME Version Number) */ + sdp->db[0] = drm_infoframe->version; + /* CTA Header Byte 3 (Length of INFOFRAME): HDMI_DRM_INFOFRAME_SIZE */ + sdp->db[1] = drm_infoframe->length; + /* + * Copy HDMI_DRM_INFOFRAME_SIZE size from a buffer after + */ + BUILD_BUG_ON(sizeof(sdp->db) < HDMI_DRM_INFOFRAME_SIZE + 2); + memcpy(&sdp->db[2], &buf[HDMI_INFOFRAME_HEADER_SIZE], + HDMI_DRM_INFOFRAME_SIZE); + + /* + * Size of DP infoframe sdp packet for HDR static metadata is consist of + * - DP SDP Header(struct dp_sdp_header): 4 bytes + * - Two Data Blocks: 2 bytes + * CTA Header Byte2 (INFOFRAME Version Number) + * CTA Header Byte3 (Length of INFOFRAME) + * - HDMI_DRM_INFOFRAME_SIZE: 26 bytes + * + * Prior to GEN11's GMP register size is identical to DP HDR static metadata + * infoframe size. But GEN11+ has larger than that size, write_infoframe + * will pad rest of the size. + */ + return sizeof(struct dp_sdp_header) + 2 + HDMI_DRM_INFOFRAME_SIZE; +} + +static void intel_write_dp_sdp(struct intel_encoder *encoder, + const struct intel_crtc_state *crtc_state, + unsigned int type) +{ + struct intel_digital_port *intel_dig_port = enc_to_dig_port(encoder); + struct dp_sdp sdp = {}; + ssize_t len; + + if ((crtc_state->infoframes.enable & + intel_hdmi_infoframe_enable(type)) == 0) + return; + + switch (type) { + case DP_SDP_VSC: + len = intel_dp_vsc_sdp_pack(&crtc_state->infoframes.vsc, &sdp, + sizeof(sdp)); + break; + case HDMI_PACKET_TYPE_GAMUT_METADATA: + len = intel_dp_hdr_metadata_infoframe_sdp_pack(&crtc_state->infoframes.drm.drm, + &sdp, sizeof(sdp)); + break; + default: + MISSING_CASE(type); + break; + } + + if (WARN_ON(len < 0)) + return; + + intel_dig_port->write_infoframe(encoder, crtc_state, type, &sdp, len); +} + +void intel_dp_set_infoframes(struct intel_encoder *encoder, + bool enable, + const struct intel_crtc_state *crtc_state, + const struct drm_connector_state *conn_state) +{ + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); + struct intel_dp *intel_dp = enc_to_intel_dp(encoder); + i915_reg_t reg = HSW_TVIDEO_DIP_CTL(crtc_state->cpu_transcoder); + u32 dip_enable = VIDEO_DIP_ENABLE_AVI_HSW | VIDEO_DIP_ENABLE_GCP_HSW | + VIDEO_DIP_ENABLE_VS_HSW | VIDEO_DIP_ENABLE_GMP_HSW | + VIDEO_DIP_ENABLE_SPD_HSW | VIDEO_DIP_ENABLE_DRM_GLK; + u32 val = I915_READ(reg); + + /* TODO: Add DSC case (DIP_ENABLE_PPS) */ + /* When PSR is enabled, this routine doesn't disable VSC DIP */ + if (intel_psr_enabled(intel_dp)) + val &= ~dip_enable; + else + val &= ~(dip_enable | VIDEO_DIP_ENABLE_VSC_HSW); + + if (!enable) { + I915_WRITE(reg, val); + POSTING_READ(reg); + return; + } + + I915_WRITE(reg, val); + POSTING_READ(reg); + + /* When PSR is enabled, VSC SDP is handled by PSR routine */ + if (!intel_psr_enabled(intel_dp)) + intel_write_dp_sdp(encoder, crtc_state, DP_SDP_VSC); + + intel_write_dp_sdp(encoder, crtc_state, HDMI_PACKET_TYPE_GAMUT_METADATA); +} + static void intel_dp_setup_vsc_sdp(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state, diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h index 3da166054788..0dc09a463ee1 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.h +++ b/drivers/gpu/drm/i915/display/intel_dp.h @@ -116,6 +116,9 @@ void intel_dp_vsc_enable(struct intel_dp *intel_dp, void intel_dp_hdr_metadata_enable(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state, const struct drm_connector_state *conn_state); +void intel_dp_set_infoframes(struct intel_encoder *encoder, bool enable, + const struct intel_crtc_state *crtc_state, + const struct drm_connector_state *conn_state); bool intel_digital_port_connected(struct intel_encoder *encoder);
static inline unsigned int intel_dp_unused_lane_mask(int lane_count)
-----Original Message----- From: dri-devel dri-devel-bounces@lists.freedesktop.org On Behalf Of Gwan- gyeong Mun Sent: Tuesday, February 4, 2020 4:50 AM To: intel-gfx@lists.freedesktop.org Cc: linux-fbdev@vger.kernel.org; dri-devel@lists.freedesktop.org Subject: [PATCH v3 04/17] drm/i915/dp: Add writing of DP SDPs (Secondary Data Packet)
Drop things in (), not needed.
It adds routines that write DP VSC SDP and DP HDR Metadata Infoframe SDP. In order to pack DP VSC SDP, it adds intel_dp_vsc_sdp_pack() function. It follows DP 1.4a spec. [Table 2-116: VSC SDP Header Bytes] and [Table 2-117: VSC SDP Payload for DB16 through DB18]
In order to pack DP HDR Metadata Infoframe SDP, it adds intel_dp_hdr_metadata_infoframe_sdp_pack() function. And it follows DP 1.4a spec. ([Table 2-125: INFOFRAME SDP v1.2 Header Bytes] and [Table 2-126: INFOFRAME SDP v1.2 Payload Data Bytes - DB0 through DB31]) and CTA-861-G spec. [Table-42 Dynamic Range and Mastering InfoFrame].
A machanism and a naming rule of intel_dp_set_infoframes() function references
Typo in mechanism.
intel_encoder->set_infoframes() of intel_hdmi.c . VSC SDP is used for PSR and Pixel Encoding and Colorimetry Formats cases. Because PSR routine has its own routine of writing a VSC SDP, when the PSR is enabled, intel_dp_set_infoframes() does not write a VSC SDP.
v3:
- Explicitly disable unused DIPs (AVI, GCP, VS, SPD, DRM. They will be used for HDMI), when intel_dp_set_infoframes() function will be called.
- Replace a structure name to drm_dp_vsc_sdp from intel_dp_vsc_sdp.
Signed-off-by: Gwan-gyeong Mun gwan-gyeong.mun@intel.com
drivers/gpu/drm/i915/display/intel_dp.c | 194 ++++++++++++++++++++++++ drivers/gpu/drm/i915/display/intel_dp.h | 3 + 2 files changed, 197 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index b265b5c599f2..dd7e5588001e 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -4731,6 +4731,200 @@ intel_dp_needs_vsc_sdp(const struct intel_crtc_state *crtc_state, return false; }
+static ssize_t intel_dp_vsc_sdp_pack(const struct drm_dp_vsc_sdp *vsc,
struct dp_sdp *sdp, size_t size) {- size_t length = sizeof(struct dp_sdp);
- if (size < length)
return -ENOSPC;- memset(sdp, 0, size);
- /*
* Prepare VSC Header for SU as per DP 1.4a spec, Table 2-119* VSC SDP Header Bytes*/- sdp->sdp_header.HB0 = 0; /* Secondary-Data Packet ID = 0 */
- sdp->sdp_header.HB1 = vsc->sdp_type; /* Secondary-data Packet Type */
- sdp->sdp_header.HB2 = vsc->revision; /* Revision Number */
- sdp->sdp_header.HB3 = vsc->length; /* Number of Valid Data Bytes */
- /* VSC SDP Payload for DB16 through DB18 */
- /* Pixel Encoding and Colorimetry Formats */
- sdp->db[16] = (vsc->colorspace & 0xf) << 4; /* DB16[7:4] */
- sdp->db[16] |= vsc->colorimetry & 0xf; /* DB16[3:0] */
- switch (vsc->bpc) {
- case 8:
sdp->db[17] = 0x1; /* DB17[3:0] */break;- case 10:
sdp->db[17] = 0x2;break;- case 12:
sdp->db[17] = 0x3;break;- case 16:
sdp->db[17] = 0x4;break;- default:
MISSING_CASE(vsc->bpc);
6bpc is not handled here, add that as well.
break;- }
- /* Dynamic Range and Component Bit Depth */
- if (vsc->dynamic_range == DP_DYNAMIC_RANGE_CTA)
sdp->db[17] |= 0x80; /* DB17[7] */- /* Content Type */
- sdp->db[18] = vsc->content_type & 0x7;
- return length;
+}
+static ssize_t +intel_dp_hdr_metadata_infoframe_sdp_pack(const struct hdmi_drm_infoframe *drm_infoframe,
struct dp_sdp *sdp,size_t size)+{
- size_t length = sizeof(struct dp_sdp);
- const int infoframe_size = HDMI_INFOFRAME_HEADER_SIZE +
HDMI_DRM_INFOFRAME_SIZE;
- unsigned char buf[HDMI_INFOFRAME_HEADER_SIZE +
HDMI_DRM_INFOFRAME_SIZE];
- ssize_t len;
- if (size < length)
return -ENOSPC;- memset(sdp, 0, size);
- len = hdmi_drm_infoframe_pack_only(drm_infoframe, buf, sizeof(buf));
- if (len < 0) {
DRM_DEBUG_KMS("buffer size is smaller than hdr metadatainfoframe\n");
return -ENOSPC;- }
- if (len != infoframe_size) {
DRM_DEBUG_KMS("wrong static hdr metadata size\n");return -ENOSPC;- }
- /*
* Set up the infoframe sdp packet for HDR static metadata.* Prepare VSC Header for SU as per DP 1.4a spec,* Table 2-100 and Table 2-101*/- /* Secondary-Data Packet ID, 00h for non-Audio INFOFRAME */
- sdp->sdp_header.HB0 = 0;
- /*
* Packet Type 80h + Non-audio INFOFRAME Type value* HDMI_INFOFRAME_TYPE_DRM: 0x87* - 80h + Non-audio INFOFRAME Type value* - InfoFrame Type: 0x07* [CTA-861-G Table-42 Dynamic Range and Mastering InfoFrame]*/- sdp->sdp_header.HB1 = drm_infoframe->type;
- /*
* Least Significant Eight Bits of (Data Byte Count – 1)* infoframe_size - 1*/- sdp->sdp_header.HB2 = 0x1D;
- /* INFOFRAME SDP Version Number */
- sdp->sdp_header.HB3 = (0x13 << 2);
- /* CTA Header Byte 2 (INFOFRAME Version Number) */
- sdp->db[0] = drm_infoframe->version;
- /* CTA Header Byte 3 (Length of INFOFRAME):
HDMI_DRM_INFOFRAME_SIZE */
- sdp->db[1] = drm_infoframe->length;
- /*
* Copy HDMI_DRM_INFOFRAME_SIZE size from a buffer after
Comment Looks incomplete.
*/- BUILD_BUG_ON(sizeof(sdp->db) < HDMI_DRM_INFOFRAME_SIZE + 2);
- memcpy(&sdp->db[2], &buf[HDMI_INFOFRAME_HEADER_SIZE],
HDMI_DRM_INFOFRAME_SIZE);- /*
* Size of DP infoframe sdp packet for HDR static metadata is consist of
Drop "is"
* - DP SDP Header(struct dp_sdp_header): 4 bytes* - Two Data Blocks: 2 bytes* CTA Header Byte2 (INFOFRAME Version Number)* CTA Header Byte3 (Length of INFOFRAME)* - HDMI_DRM_INFOFRAME_SIZE: 26 bytes** Prior to GEN11's GMP register size is identical to DP HDR static metadata* infoframe size. But GEN11+ has larger than that size, write_infoframe* will pad rest of the size.*/- return sizeof(struct dp_sdp_header) + 2 + HDMI_DRM_INFOFRAME_SIZE; }
+static void intel_write_dp_sdp(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,unsigned int type)+{
- struct intel_digital_port *intel_dig_port = enc_to_dig_port(encoder);
- struct dp_sdp sdp = {};
- ssize_t len;
- if ((crtc_state->infoframes.enable &
intel_hdmi_infoframe_enable(type)) == 0)return;- switch (type) {
- case DP_SDP_VSC:
len = intel_dp_vsc_sdp_pack(&crtc_state->infoframes.vsc, &sdp,sizeof(sdp));break;- case HDMI_PACKET_TYPE_GAMUT_METADATA:
len = intel_dp_hdr_metadata_infoframe_sdp_pack(&crtc_state-infoframes.drm.drm,
&sdp, sizeof(sdp));break;- default:
MISSING_CASE(type);break;- }
- if (WARN_ON(len < 0))
return;- intel_dig_port->write_infoframe(encoder, crtc_state, type, &sdp, len);
+}
+void intel_dp_set_infoframes(struct intel_encoder *encoder,
bool enable,const struct intel_crtc_state *crtc_state,const struct drm_connector_state *conn_state) {- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
- struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
- i915_reg_t reg = HSW_TVIDEO_DIP_CTL(crtc_state->cpu_transcoder);
- u32 dip_enable = VIDEO_DIP_ENABLE_AVI_HSW |
VIDEO_DIP_ENABLE_GCP_HSW |
VIDEO_DIP_ENABLE_VS_HSW |VIDEO_DIP_ENABLE_GMP_HSW |
VIDEO_DIP_ENABLE_SPD_HSW |VIDEO_DIP_ENABLE_DRM_GLK;
- u32 val = I915_READ(reg);
- /* TODO: Add DSC case (DIP_ENABLE_PPS) */
- /* When PSR is enabled, this routine doesn't disable VSC DIP */
- if (intel_psr_enabled(intel_dp))
val &= ~dip_enable;- else
val &= ~(dip_enable | VIDEO_DIP_ENABLE_VSC_HSW);
dip_enable has VIDEO_DIP_ENABLE_VSC_HSW already in it. Please fix this.
- if (!enable) {
I915_WRITE(reg, val);POSTING_READ(reg);return;- }
- I915_WRITE(reg, val);
- POSTING_READ(reg);
- /* When PSR is enabled, VSC SDP is handled by PSR routine */
- if (!intel_psr_enabled(intel_dp))
intel_write_dp_sdp(encoder, crtc_state, DP_SDP_VSC);- intel_write_dp_sdp(encoder, crtc_state,
+HDMI_PACKET_TYPE_GAMUT_METADATA); }
static void intel_dp_setup_vsc_sdp(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state, diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h index 3da166054788..0dc09a463ee1 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.h +++ b/drivers/gpu/drm/i915/display/intel_dp.h @@ -116,6 +116,9 @@ void intel_dp_vsc_enable(struct intel_dp *intel_dp, void intel_dp_hdr_metadata_enable(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state, const struct drm_connector_state *conn_state); +void intel_dp_set_infoframes(struct intel_encoder *encoder, bool enable,
const struct intel_crtc_state *crtc_state,const struct drm_connector_state *conn_state);bool intel_digital_port_connected(struct intel_encoder *encoder);
static inline unsigned int intel_dp_unused_lane_mask(int lane_count)
2.24.1
dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
On Wed, 2020-02-05 at 21:39 +0530, Shankar, Uma wrote:
-----Original Message----- From: dri-devel dri-devel-bounces@lists.freedesktop.org On Behalf Of Gwan- gyeong Mun Sent: Tuesday, February 4, 2020 4:50 AM To: intel-gfx@lists.freedesktop.org Cc: linux-fbdev@vger.kernel.org; dri-devel@lists.freedesktop.org Subject: [PATCH v3 04/17] drm/i915/dp: Add writing of DP SDPs (Secondary Data Packet)
Drop things in (), not needed.
It adds routines that write DP VSC SDP and DP HDR Metadata Infoframe SDP. In order to pack DP VSC SDP, it adds intel_dp_vsc_sdp_pack() function. It follows DP 1.4a spec. [Table 2-116: VSC SDP Header Bytes] and [Table 2-117: VSC SDP Payload for DB16 through DB18]
In order to pack DP HDR Metadata Infoframe SDP, it adds intel_dp_hdr_metadata_infoframe_sdp_pack() function. And it follows DP 1.4a spec. ([Table 2-125: INFOFRAME SDP v1.2 Header Bytes] and [Table 2-126: INFOFRAME SDP v1.2 Payload Data Bytes - DB0 through DB31]) and CTA-861-G spec. [Table-42 Dynamic Range and Mastering InfoFrame].
A machanism and a naming rule of intel_dp_set_infoframes() function references
Typo in mechanism.
intel_encoder->set_infoframes() of intel_hdmi.c . VSC SDP is used for PSR and Pixel Encoding and Colorimetry Formats cases. Because PSR routine has its own routine of writing a VSC SDP, when the PSR is enabled, intel_dp_set_infoframes() does not write a VSC SDP.
v3:
- Explicitly disable unused DIPs (AVI, GCP, VS, SPD, DRM. They
will be used for HDMI), when intel_dp_set_infoframes() function will be called.
- Replace a structure name to drm_dp_vsc_sdp from
intel_dp_vsc_sdp.
Signed-off-by: Gwan-gyeong Mun gwan-gyeong.mun@intel.com
drivers/gpu/drm/i915/display/intel_dp.c | 194 ++++++++++++++++++++++++ drivers/gpu/drm/i915/display/intel_dp.h | 3 + 2 files changed, 197 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index b265b5c599f2..dd7e5588001e 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -4731,6 +4731,200 @@ intel_dp_needs_vsc_sdp(const struct intel_crtc_state *crtc_state, return false; }
+static ssize_t intel_dp_vsc_sdp_pack(const struct drm_dp_vsc_sdp *vsc,
struct dp_sdp *sdp, size_t size) {- size_t length = sizeof(struct dp_sdp);
- if (size < length)
return -ENOSPC;- memset(sdp, 0, size);
- /*
* Prepare VSC Header for SU as per DP 1.4a spec, Table 2-119* VSC SDP Header Bytes*/- sdp->sdp_header.HB0 = 0; /* Secondary-Data Packet ID = 0 */
- sdp->sdp_header.HB1 = vsc->sdp_type; /* Secondary-data Packet
Type */
- sdp->sdp_header.HB2 = vsc->revision; /* Revision Number */
- sdp->sdp_header.HB3 = vsc->length; /* Number of Valid Data
Bytes */
- /* VSC SDP Payload for DB16 through DB18 */
- /* Pixel Encoding and Colorimetry Formats */
- sdp->db[16] = (vsc->colorspace & 0xf) << 4; /* DB16[7:4] */
- sdp->db[16] |= vsc->colorimetry & 0xf; /* DB16[3:0] */
- switch (vsc->bpc) {
- case 8:
sdp->db[17] = 0x1; /* DB17[3:0] */break;- case 10:
sdp->db[17] = 0x2;break;- case 12:
sdp->db[17] = 0x3;break;- case 16:
sdp->db[17] = 0x4;break;- default:
MISSING_CASE(vsc->bpc);6bpc is not handled here, add that as well.
Yes, I missed 6bpc case, I'll update it.
break;- }
- /* Dynamic Range and Component Bit Depth */
- if (vsc->dynamic_range == DP_DYNAMIC_RANGE_CTA)
sdp->db[17] |= 0x80; /* DB17[7] */- /* Content Type */
- sdp->db[18] = vsc->content_type & 0x7;
- return length;
+}
+static ssize_t +intel_dp_hdr_metadata_infoframe_sdp_pack(const struct hdmi_drm_infoframe *drm_infoframe,
struct dp_sdp *sdp,size_t size)+{
- size_t length = sizeof(struct dp_sdp);
- const int infoframe_size = HDMI_INFOFRAME_HEADER_SIZE +
HDMI_DRM_INFOFRAME_SIZE;
- unsigned char buf[HDMI_INFOFRAME_HEADER_SIZE +
HDMI_DRM_INFOFRAME_SIZE];
- ssize_t len;
- if (size < length)
return -ENOSPC;- memset(sdp, 0, size);
- len = hdmi_drm_infoframe_pack_only(drm_infoframe, buf,
sizeof(buf));
- if (len < 0) {
DRM_DEBUG_KMS("buffer size is smaller than hdr metadatainfoframe\n");
return -ENOSPC;- }
- if (len != infoframe_size) {
DRM_DEBUG_KMS("wrong static hdr metadata size\n");return -ENOSPC;- }
- /*
* Set up the infoframe sdp packet for HDR static metadata.* Prepare VSC Header for SU as per DP 1.4a spec,* Table 2-100 and Table 2-101*/- /* Secondary-Data Packet ID, 00h for non-Audio INFOFRAME */
- sdp->sdp_header.HB0 = 0;
- /*
* Packet Type 80h + Non-audio INFOFRAME Type value* HDMI_INFOFRAME_TYPE_DRM: 0x87* - 80h + Non-audio INFOFRAME Type value* - InfoFrame Type: 0x07* [CTA-861-G Table-42 Dynamic Range and MasteringInfoFrame]
*/- sdp->sdp_header.HB1 = drm_infoframe->type;
- /*
* Least Significant Eight Bits of (Data Byte Count – 1)* infoframe_size - 1*/- sdp->sdp_header.HB2 = 0x1D;
- /* INFOFRAME SDP Version Number */
- sdp->sdp_header.HB3 = (0x13 << 2);
- /* CTA Header Byte 2 (INFOFRAME Version Number) */
- sdp->db[0] = drm_infoframe->version;
- /* CTA Header Byte 3 (Length of INFOFRAME):
HDMI_DRM_INFOFRAME_SIZE */
- sdp->db[1] = drm_infoframe->length;
- /*
* Copy HDMI_DRM_INFOFRAME_SIZE size from a buffer afterComment Looks incomplete.
I missed some comments, I'll update it.
*/- BUILD_BUG_ON(sizeof(sdp->db) < HDMI_DRM_INFOFRAME_SIZE + 2);
- memcpy(&sdp->db[2], &buf[HDMI_INFOFRAME_HEADER_SIZE],
HDMI_DRM_INFOFRAME_SIZE);- /*
* Size of DP infoframe sdp packet for HDR static metadata isconsist of
Drop "is"
Includes this, I'll polish polish commit message and comments.
* - DP SDP Header(struct dp_sdp_header): 4 bytes* - Two Data Blocks: 2 bytes* CTA Header Byte2 (INFOFRAME Version Number)* CTA Header Byte3 (Length of INFOFRAME)* - HDMI_DRM_INFOFRAME_SIZE: 26 bytes** Prior to GEN11's GMP register size is identical to DP HDRstatic metadata
* infoframe size. But GEN11+ has larger than that size,write_infoframe
* will pad rest of the size.*/- return sizeof(struct dp_sdp_header) + 2 +
HDMI_DRM_INFOFRAME_SIZE; }
+static void intel_write_dp_sdp(struct intel_encoder *encoder,
const struct intel_crtc_state*crtc_state,
unsigned int type)+{
- struct intel_digital_port *intel_dig_port =
enc_to_dig_port(encoder);
- struct dp_sdp sdp = {};
- ssize_t len;
- if ((crtc_state->infoframes.enable &
intel_hdmi_infoframe_enable(type)) == 0)return;- switch (type) {
- case DP_SDP_VSC:
len = intel_dp_vsc_sdp_pack(&crtc_state-infoframes.vsc, &sdp,
sizeof(sdp));break;- case HDMI_PACKET_TYPE_GAMUT_METADATA:
len =intel_dp_hdr_metadata_infoframe_sdp_pack(&crtc_state-
infoframes.drm.drm,
&sdp,sizeof(sdp));
break;- default:
MISSING_CASE(type);break;- }
- if (WARN_ON(len < 0))
return;- intel_dig_port->write_infoframe(encoder, crtc_state, type,
&sdp, len); +}
+void intel_dp_set_infoframes(struct intel_encoder *encoder,
bool enable,const struct intel_crtc_state *crtc_state,const struct drm_connector_state*conn_state) {
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
- struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
- i915_reg_t reg = HSW_TVIDEO_DIP_CTL(crtc_state-
cpu_transcoder);
- u32 dip_enable = VIDEO_DIP_ENABLE_AVI_HSW |
VIDEO_DIP_ENABLE_GCP_HSW |
VIDEO_DIP_ENABLE_VS_HSW |VIDEO_DIP_ENABLE_GMP_HSW |
VIDEO_DIP_ENABLE_SPD_HSW |VIDEO_DIP_ENABLE_DRM_GLK;
- u32 val = I915_READ(reg);
- /* TODO: Add DSC case (DIP_ENABLE_PPS) */
- /* When PSR is enabled, this routine doesn't disable VSC DIP */
- if (intel_psr_enabled(intel_dp))
val &= ~dip_enable;- else
val &= ~(dip_enable | VIDEO_DIP_ENABLE_VSC_HSW);dip_enable has VIDEO_DIP_ENABLE_VSC_HSW already in it. Please fix this.
Declaring of dip_enable does not include VIDEO_DIP_ENABLE_VSC_HSW. therefore we need it here to disable VSC SDP DIP.
- if (!enable) {
I915_WRITE(reg, val);POSTING_READ(reg);return;- }
- I915_WRITE(reg, val);
- POSTING_READ(reg);
- /* When PSR is enabled, VSC SDP is handled by PSR routine */
- if (!intel_psr_enabled(intel_dp))
intel_write_dp_sdp(encoder, crtc_state, DP_SDP_VSC);- intel_write_dp_sdp(encoder, crtc_state,
+HDMI_PACKET_TYPE_GAMUT_METADATA); }
static void intel_dp_setup_vsc_sdp(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state, diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h index 3da166054788..0dc09a463ee1 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.h +++ b/drivers/gpu/drm/i915/display/intel_dp.h @@ -116,6 +116,9 @@ void intel_dp_vsc_enable(struct intel_dp *intel_dp, void intel_dp_hdr_metadata_enable(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state, const struct drm_connector_state *conn_state); +void intel_dp_set_infoframes(struct intel_encoder *encoder, bool enable,
const struct intel_crtc_state *crtc_state,const struct drm_connector_state*conn_state); bool intel_digital_port_connected(struct intel_encoder *encoder);
static inline unsigned int intel_dp_unused_lane_mask(int lane_count) -- 2.24.1
dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
-----Original Message----- From: Mun, Gwan-gyeong gwan-gyeong.mun@intel.com Sent: Sunday, February 9, 2020 9:05 AM To: Shankar, Uma uma.shankar@intel.com; intel-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org; linux-fbdev@vger.kernel.org Subject: Re: [PATCH v3 04/17] drm/i915/dp: Add writing of DP SDPs (Secondary Data Packet)
On Wed, 2020-02-05 at 21:39 +0530, Shankar, Uma wrote:
-----Original Message----- From: dri-devel dri-devel-bounces@lists.freedesktop.org On Behalf Of Gwan- gyeong Mun Sent: Tuesday, February 4, 2020 4:50 AM To: intel-gfx@lists.freedesktop.org Cc: linux-fbdev@vger.kernel.org; dri-devel@lists.freedesktop.org Subject: [PATCH v3 04/17] drm/i915/dp: Add writing of DP SDPs (Secondary Data Packet)
Drop things in (), not needed.
It adds routines that write DP VSC SDP and DP HDR Metadata Infoframe SDP. In order to pack DP VSC SDP, it adds intel_dp_vsc_sdp_pack() function. It follows DP 1.4a spec. [Table 2-116: VSC SDP Header Bytes] and [Table 2-117: VSC SDP Payload for DB16 through DB18]
In order to pack DP HDR Metadata Infoframe SDP, it adds intel_dp_hdr_metadata_infoframe_sdp_pack() function. And it follows DP 1.4a spec. ([Table 2-125: INFOFRAME SDP v1.2 Header Bytes] and [Table 2-126: INFOFRAME SDP v1.2 Payload Data Bytes - DB0 through DB31]) and CTA-861-G spec. [Table-42 Dynamic Range and Mastering InfoFrame].
A machanism and a naming rule of intel_dp_set_infoframes() function references
Typo in mechanism.
intel_encoder->set_infoframes() of intel_hdmi.c . VSC SDP is used for PSR and Pixel Encoding and Colorimetry Formats cases. Because PSR routine has its own routine of writing a VSC SDP, when the PSR is enabled, intel_dp_set_infoframes() does not write a VSC SDP.
v3:
- Explicitly disable unused DIPs (AVI, GCP, VS, SPD, DRM. They
will be used for HDMI), when intel_dp_set_infoframes() function will be called.
- Replace a structure name to drm_dp_vsc_sdp from
intel_dp_vsc_sdp.
Signed-off-by: Gwan-gyeong Mun gwan-gyeong.mun@intel.com
drivers/gpu/drm/i915/display/intel_dp.c | 194 ++++++++++++++++++++++++ drivers/gpu/drm/i915/display/intel_dp.h | 3 + 2 files changed, 197 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index b265b5c599f2..dd7e5588001e 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -4731,6 +4731,200 @@ intel_dp_needs_vsc_sdp(const struct intel_crtc_state *crtc_state, return false; }
+static ssize_t intel_dp_vsc_sdp_pack(const struct drm_dp_vsc_sdp *vsc,
struct dp_sdp *sdp, size_t size) {- size_t length = sizeof(struct dp_sdp);
- if (size < length)
return -ENOSPC;- memset(sdp, 0, size);
- /*
* Prepare VSC Header for SU as per DP 1.4a spec, Table 2-119* VSC SDP Header Bytes*/- sdp->sdp_header.HB0 = 0; /* Secondary-Data Packet ID = 0 */
- sdp->sdp_header.HB1 = vsc->sdp_type; /* Secondary-data Packet
Type */
- sdp->sdp_header.HB2 = vsc->revision; /* Revision Number */
- sdp->sdp_header.HB3 = vsc->length; /* Number of Valid Data
Bytes */
- /* VSC SDP Payload for DB16 through DB18 */
- /* Pixel Encoding and Colorimetry Formats */
- sdp->db[16] = (vsc->colorspace & 0xf) << 4; /* DB16[7:4] */
- sdp->db[16] |= vsc->colorimetry & 0xf; /* DB16[3:0] */
- switch (vsc->bpc) {
- case 8:
sdp->db[17] = 0x1; /* DB17[3:0] */break;- case 10:
sdp->db[17] = 0x2;break;- case 12:
sdp->db[17] = 0x3;break;- case 16:
sdp->db[17] = 0x4;break;- default:
MISSING_CASE(vsc->bpc);6bpc is not handled here, add that as well.
Yes, I missed 6bpc case, I'll update it.
break;- }
- /* Dynamic Range and Component Bit Depth */
- if (vsc->dynamic_range == DP_DYNAMIC_RANGE_CTA)
sdp->db[17] |= 0x80; /* DB17[7] */- /* Content Type */
- sdp->db[18] = vsc->content_type & 0x7;
- return length;
+}
+static ssize_t +intel_dp_hdr_metadata_infoframe_sdp_pack(const struct hdmi_drm_infoframe *drm_infoframe,
struct dp_sdp *sdp,size_t size)+{
- size_t length = sizeof(struct dp_sdp);
- const int infoframe_size = HDMI_INFOFRAME_HEADER_SIZE +
HDMI_DRM_INFOFRAME_SIZE;
- unsigned char buf[HDMI_INFOFRAME_HEADER_SIZE +
HDMI_DRM_INFOFRAME_SIZE];
- ssize_t len;
- if (size < length)
return -ENOSPC;- memset(sdp, 0, size);
- len = hdmi_drm_infoframe_pack_only(drm_infoframe, buf,
sizeof(buf));
- if (len < 0) {
DRM_DEBUG_KMS("buffer size is smaller than hdr metadatainfoframe\n");
return -ENOSPC;- }
- if (len != infoframe_size) {
DRM_DEBUG_KMS("wrong static hdr metadata size\n");return -ENOSPC;- }
- /*
* Set up the infoframe sdp packet for HDR static metadata.* Prepare VSC Header for SU as per DP 1.4a spec,* Table 2-100 and Table 2-101*/- /* Secondary-Data Packet ID, 00h for non-Audio INFOFRAME */
- sdp->sdp_header.HB0 = 0;
- /*
* Packet Type 80h + Non-audio INFOFRAME Type value* HDMI_INFOFRAME_TYPE_DRM: 0x87* - 80h + Non-audio INFOFRAME Type value* - InfoFrame Type: 0x07* [CTA-861-G Table-42 Dynamic Range and MasteringInfoFrame]
*/- sdp->sdp_header.HB1 = drm_infoframe->type;
- /*
* Least Significant Eight Bits of (Data Byte Count – 1)* infoframe_size - 1*/- sdp->sdp_header.HB2 = 0x1D;
- /* INFOFRAME SDP Version Number */
- sdp->sdp_header.HB3 = (0x13 << 2);
- /* CTA Header Byte 2 (INFOFRAME Version Number) */
- sdp->db[0] = drm_infoframe->version;
- /* CTA Header Byte 3 (Length of INFOFRAME):
HDMI_DRM_INFOFRAME_SIZE */
- sdp->db[1] = drm_infoframe->length;
- /*
* Copy HDMI_DRM_INFOFRAME_SIZE size from a buffer afterComment Looks incomplete.
I missed some comments, I'll update it.
*/- BUILD_BUG_ON(sizeof(sdp->db) < HDMI_DRM_INFOFRAME_SIZE + 2);
- memcpy(&sdp->db[2], &buf[HDMI_INFOFRAME_HEADER_SIZE],
HDMI_DRM_INFOFRAME_SIZE);- /*
* Size of DP infoframe sdp packet for HDR static metadata isconsist of
Drop "is"
Includes this, I'll polish polish commit message and comments.
* - DP SDP Header(struct dp_sdp_header): 4 bytes* - Two Data Blocks: 2 bytes* CTA Header Byte2 (INFOFRAME Version Number)* CTA Header Byte3 (Length of INFOFRAME)* - HDMI_DRM_INFOFRAME_SIZE: 26 bytes** Prior to GEN11's GMP register size is identical to DP HDRstatic metadata
* infoframe size. But GEN11+ has larger than that size,write_infoframe
* will pad rest of the size.*/- return sizeof(struct dp_sdp_header) + 2 +
HDMI_DRM_INFOFRAME_SIZE; }
+static void intel_write_dp_sdp(struct intel_encoder *encoder,
const struct intel_crtc_state*crtc_state,
unsigned int type)+{
- struct intel_digital_port *intel_dig_port =
enc_to_dig_port(encoder);
- struct dp_sdp sdp = {};
- ssize_t len;
- if ((crtc_state->infoframes.enable &
intel_hdmi_infoframe_enable(type)) == 0)return;- switch (type) {
- case DP_SDP_VSC:
len = intel_dp_vsc_sdp_pack(&crtc_state-infoframes.vsc, &sdp,
sizeof(sdp));break;- case HDMI_PACKET_TYPE_GAMUT_METADATA:
len =intel_dp_hdr_metadata_infoframe_sdp_pack(&crtc_state-
infoframes.drm.drm,
&sdp,sizeof(sdp));
break;- default:
MISSING_CASE(type);break;- }
- if (WARN_ON(len < 0))
return;- intel_dig_port->write_infoframe(encoder, crtc_state, type,
&sdp, len); +}
+void intel_dp_set_infoframes(struct intel_encoder *encoder,
bool enable,const struct intel_crtc_state *crtc_state,const struct drm_connector_state*conn_state) {
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
- struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
- i915_reg_t reg = HSW_TVIDEO_DIP_CTL(crtc_state-
cpu_transcoder);
- u32 dip_enable = VIDEO_DIP_ENABLE_AVI_HSW |
VIDEO_DIP_ENABLE_GCP_HSW |
VIDEO_DIP_ENABLE_VS_HSW |VIDEO_DIP_ENABLE_GMP_HSW |
VIDEO_DIP_ENABLE_SPD_HSW |VIDEO_DIP_ENABLE_DRM_GLK;
- u32 val = I915_READ(reg);
- /* TODO: Add DSC case (DIP_ENABLE_PPS) */
- /* When PSR is enabled, this routine doesn't disable VSC DIP */
- if (intel_psr_enabled(intel_dp))
val &= ~dip_enable;- else
val &= ~(dip_enable | VIDEO_DIP_ENABLE_VSC_HSW);dip_enable has VIDEO_DIP_ENABLE_VSC_HSW already in it. Please fix this.
Declaring of dip_enable does not include VIDEO_DIP_ENABLE_VSC_HSW. therefore we need it here to disable VSC SDP DIP.
Oh ok, Took VS for VSC. Scratch my earlier comment, change is correct.
- if (!enable) {
I915_WRITE(reg, val);POSTING_READ(reg);return;- }
- I915_WRITE(reg, val);
- POSTING_READ(reg);
- /* When PSR is enabled, VSC SDP is handled by PSR routine */
- if (!intel_psr_enabled(intel_dp))
intel_write_dp_sdp(encoder, crtc_state, DP_SDP_VSC);- intel_write_dp_sdp(encoder, crtc_state,
+HDMI_PACKET_TYPE_GAMUT_METADATA); }
static void intel_dp_setup_vsc_sdp(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state, diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h index 3da166054788..0dc09a463ee1 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.h +++ b/drivers/gpu/drm/i915/display/intel_dp.h @@ -116,6 +116,9 @@ void intel_dp_vsc_enable(struct intel_dp *intel_dp, void intel_dp_hdr_metadata_enable(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state, const struct drm_connector_state *conn_state); +void intel_dp_set_infoframes(struct intel_encoder *encoder, bool enable,
const struct intel_crtc_state *crtc_state,const struct drm_connector_state*conn_state); bool intel_digital_port_connected(struct intel_encoder *encoder);
static inline unsigned int intel_dp_unused_lane_mask(int lane_count) -- 2.24.1
dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
It adds an unpack only function for DRM infoframe for dynamic range and mastering infoframe readout. It unpacks the information data block contained in the binary buffer into a structured frame of the HDMI Dynamic Range and Mastering (DRM) information frame.
In contrast to hdmi_drm_infoframe_unpack() function, it does not verify a checksum.
It can be used for unpacking a DP HDR Metadata Infoframe SDP case. DP HDR Metadata Infoframe SDP uses the same Dynamic Range and Mastering (DRM) information (CTA-861-G spec.) such as HDMI DRM infoframe. But DP SDP header and payload structure are different from HDMI DRM Infoframe. Therefore unpacking DRM infoframe for DP requires skipping of a verifying checksum.
Signed-off-by: Gwan-gyeong Mun gwan-gyeong.mun@intel.com --- drivers/video/hdmi.c | 58 +++++++++++++++++++++++++++++++------------- include/linux/hdmi.h | 2 ++ 2 files changed, 43 insertions(+), 17 deletions(-)
diff --git a/drivers/video/hdmi.c b/drivers/video/hdmi.c index 9c82e2a0a411..9818836d82b7 100644 --- a/drivers/video/hdmi.c +++ b/drivers/video/hdmi.c @@ -1775,20 +1775,18 @@ hdmi_vendor_any_infoframe_unpack(union hdmi_vendor_any_infoframe *frame, }
/** - * hdmi_drm_infoframe_unpack() - unpack binary buffer to a HDMI DRM infoframe + * hdmi_drm_infoframe_unpack_only() - unpack binary buffer to a HDMI DRM infoframe * @frame: HDMI DRM infoframe * @buffer: source buffer * @size: size of buffer * - * Unpacks the information contained in binary @buffer into a structured + * Unpacks the information data block contained in binary @buffer into a structured * @frame of the HDMI Dynamic Range and Mastering (DRM) information frame. - * Also verifies the checksum as required by section 5.3.5 of the HDMI 1.4 - * specification. * * Returns 0 on success or a negative error code on failure. */ -static int hdmi_drm_infoframe_unpack(struct hdmi_drm_infoframe *frame, - const void *buffer, size_t size) +int hdmi_drm_infoframe_unpack_only(struct hdmi_drm_infoframe *frame, + const void *buffer, size_t size) { const u8 *ptr = buffer; const u8 *temp; @@ -1797,23 +1795,13 @@ static int hdmi_drm_infoframe_unpack(struct hdmi_drm_infoframe *frame, int ret; int i;
- if (size < HDMI_INFOFRAME_SIZE(DRM)) - return -EINVAL; - - if (ptr[0] != HDMI_INFOFRAME_TYPE_DRM || - ptr[1] != 1 || - ptr[2] != HDMI_DRM_INFOFRAME_SIZE) - return -EINVAL; - - if (hdmi_infoframe_checksum(buffer, HDMI_INFOFRAME_SIZE(DRM)) != 0) + if (size < HDMI_DRM_INFOFRAME_SIZE) return -EINVAL;
ret = hdmi_drm_infoframe_init(frame); if (ret) return ret;
- ptr += HDMI_INFOFRAME_HEADER_SIZE; - frame->eotf = ptr[0] & 0x7; frame->metadata_type = ptr[1] & 0x7;
@@ -1837,6 +1825,42 @@ static int hdmi_drm_infoframe_unpack(struct hdmi_drm_infoframe *frame,
return 0; } +EXPORT_SYMBOL(hdmi_drm_infoframe_unpack_only); + +/** + * hdmi_drm_infoframe_unpack() - unpack binary buffer to a HDMI DRM infoframe + * @frame: HDMI DRM infoframe + * @buffer: source buffer + * @size: size of buffer + * + * Unpacks the information contained in binary @buffer into a structured + * @frame of the HDMI Dynamic Range and Mastering (DRM) information frame. + * Also verifies the checksum as required by section 5.3.5 of the HDMI 1.4 + * specification. + * + * Returns 0 on success or a negative error code on failure. + */ +static int hdmi_drm_infoframe_unpack(struct hdmi_drm_infoframe *frame, + const void *buffer, size_t size) +{ + const u8 *ptr = buffer; + int ret; + + if (size < HDMI_INFOFRAME_SIZE(DRM)) + return -EINVAL; + + if (ptr[0] != HDMI_INFOFRAME_TYPE_DRM || + ptr[1] != 1 || + ptr[2] != HDMI_DRM_INFOFRAME_SIZE) + return -EINVAL; + + if (hdmi_infoframe_checksum(buffer, HDMI_INFOFRAME_SIZE(DRM)) != 0) + return -EINVAL; + + ret = hdmi_drm_infoframe_unpack_only(frame, ptr + HDMI_INFOFRAME_HEADER_SIZE, + size - HDMI_INFOFRAME_HEADER_SIZE); + return ret; +}
/** * hdmi_infoframe_unpack() - unpack binary buffer to a HDMI infoframe diff --git a/include/linux/hdmi.h b/include/linux/hdmi.h index 9918a6c910c5..afb43efc03e0 100644 --- a/include/linux/hdmi.h +++ b/include/linux/hdmi.h @@ -219,6 +219,8 @@ ssize_t hdmi_drm_infoframe_pack(struct hdmi_drm_infoframe *frame, void *buffer, ssize_t hdmi_drm_infoframe_pack_only(const struct hdmi_drm_infoframe *frame, void *buffer, size_t size); int hdmi_drm_infoframe_check(struct hdmi_drm_infoframe *frame); +int hdmi_drm_infoframe_unpack_only(struct hdmi_drm_infoframe *frame, + const void *buffer, size_t size);
enum hdmi_spd_sdi { HDMI_SPD_SDI_UNKNOWN,
-----Original Message----- From: Intel-gfx intel-gfx-bounces@lists.freedesktop.org On Behalf Of Gwan- gyeong Mun Sent: Tuesday, February 4, 2020 4:50 AM To: intel-gfx@lists.freedesktop.org Cc: linux-fbdev@vger.kernel.org; dri-devel@lists.freedesktop.org Subject: [Intel-gfx] [PATCH v3 05/17] video/hdmi: Add Unpack only function for DRM infoframe
It adds an unpack only function for DRM infoframe for dynamic range and mastering infoframe readout. It unpacks the information data block contained in the binary buffer into a structured frame of the HDMI Dynamic Range and Mastering (DRM) information frame.
In contrast to hdmi_drm_infoframe_unpack() function, it does not verify a checksum.
It can be used for unpacking a DP HDR Metadata Infoframe SDP case. DP HDR Metadata Infoframe SDP uses the same Dynamic Range and Mastering (DRM) information (CTA-861-G spec.) such as HDMI DRM infoframe. But DP SDP header and payload structure are different from HDMI DRM Infoframe. Therefore unpacking DRM infoframe for DP requires skipping of a verifying checksum.
Looks good to me. Reviewed-by: Uma Shankar uma.shankar@intel.com
Signed-off-by: Gwan-gyeong Mun gwan-gyeong.mun@intel.com
drivers/video/hdmi.c | 58 +++++++++++++++++++++++++++++++------------- include/linux/hdmi.h | 2 ++ 2 files changed, 43 insertions(+), 17 deletions(-)
diff --git a/drivers/video/hdmi.c b/drivers/video/hdmi.c index 9c82e2a0a411..9818836d82b7 100644 --- a/drivers/video/hdmi.c +++ b/drivers/video/hdmi.c @@ -1775,20 +1775,18 @@ hdmi_vendor_any_infoframe_unpack(union hdmi_vendor_any_infoframe *frame, }
/**
- hdmi_drm_infoframe_unpack() - unpack binary buffer to a HDMI DRM infoframe
- hdmi_drm_infoframe_unpack_only() - unpack binary buffer to a HDMI
- DRM infoframe
- @frame: HDMI DRM infoframe
- @buffer: source buffer
- @size: size of buffer
- Unpacks the information contained in binary @buffer into a structured
- Unpacks the information data block contained in binary @buffer into
- a structured
- @frame of the HDMI Dynamic Range and Mastering (DRM) information frame.
- Also verifies the checksum as required by section 5.3.5 of the HDMI 1.4
*/
- specification.
- Returns 0 on success or a negative error code on failure.
-static int hdmi_drm_infoframe_unpack(struct hdmi_drm_infoframe *frame,
const void *buffer, size_t size)+int hdmi_drm_infoframe_unpack_only(struct hdmi_drm_infoframe *frame,
const void *buffer, size_t size){ const u8 *ptr = buffer; const u8 *temp; @@ -1797,23 +1795,13 @@ static int hdmi_drm_infoframe_unpack(struct hdmi_drm_infoframe *frame, int ret; int i;
- if (size < HDMI_INFOFRAME_SIZE(DRM))
return -EINVAL;- if (ptr[0] != HDMI_INFOFRAME_TYPE_DRM ||
ptr[1] != 1 ||ptr[2] != HDMI_DRM_INFOFRAME_SIZE)return -EINVAL;- if (hdmi_infoframe_checksum(buffer, HDMI_INFOFRAME_SIZE(DRM)) != 0)
if (size < HDMI_DRM_INFOFRAME_SIZE) return -EINVAL;
ret = hdmi_drm_infoframe_init(frame); if (ret) return ret;
- ptr += HDMI_INFOFRAME_HEADER_SIZE;
- frame->eotf = ptr[0] & 0x7; frame->metadata_type = ptr[1] & 0x7;
@@ -1837,6 +1825,42 @@ static int hdmi_drm_infoframe_unpack(struct hdmi_drm_infoframe *frame,
return 0; } +EXPORT_SYMBOL(hdmi_drm_infoframe_unpack_only);
+/**
- hdmi_drm_infoframe_unpack() - unpack binary buffer to a HDMI DRM
+infoframe
- @frame: HDMI DRM infoframe
- @buffer: source buffer
- @size: size of buffer
- Unpacks the information contained in binary @buffer into a
+structured
- @frame of the HDMI Dynamic Range and Mastering (DRM) information frame.
- Also verifies the checksum as required by section 5.3.5 of the HDMI
+1.4
- specification.
- Returns 0 on success or a negative error code on failure.
- */
+static int hdmi_drm_infoframe_unpack(struct hdmi_drm_infoframe *frame,
const void *buffer, size_t size) {- const u8 *ptr = buffer;
- int ret;
- if (size < HDMI_INFOFRAME_SIZE(DRM))
return -EINVAL;- if (ptr[0] != HDMI_INFOFRAME_TYPE_DRM ||
ptr[1] != 1 ||ptr[2] != HDMI_DRM_INFOFRAME_SIZE)return -EINVAL;- if (hdmi_infoframe_checksum(buffer, HDMI_INFOFRAME_SIZE(DRM)) != 0)
return -EINVAL;- ret = hdmi_drm_infoframe_unpack_only(frame, ptr +
HDMI_INFOFRAME_HEADER_SIZE,
size - HDMI_INFOFRAME_HEADER_SIZE);- return ret;
+}
/**
- hdmi_infoframe_unpack() - unpack binary buffer to a HDMI infoframe diff --git
a/include/linux/hdmi.h b/include/linux/hdmi.h index 9918a6c910c5..afb43efc03e0 100644 --- a/include/linux/hdmi.h +++ b/include/linux/hdmi.h @@ -219,6 +219,8 @@ ssize_t hdmi_drm_infoframe_pack(struct hdmi_drm_infoframe *frame, void *buffer, ssize_t hdmi_drm_infoframe_pack_only(const struct hdmi_drm_infoframe *frame, void *buffer, size_t size); int hdmi_drm_infoframe_check(struct hdmi_drm_infoframe *frame); +int hdmi_drm_infoframe_unpack_only(struct hdmi_drm_infoframe *frame,
const void *buffer, size_t size);enum hdmi_spd_sdi { HDMI_SPD_SDI_UNKNOWN, -- 2.24.1
Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
It adds code to read the DP SDPs from the video DIP and unpack them into the crtc state.
It adds routines that read out DP VSC SDP and DP HDR Metadata Infoframe SDP In order to unpack DP VSC SDP, it adds intel_dp_vsc_sdp_unpack() function. It follows DP 1.4a spec. [Table 2-116: VSC SDP Header Bytes] and [Table 2-117: VSC SDP Payload for DB16 through DB18]
In order to unpack DP HDR Metadata Infoframe SDP, it adds intel_dp_hdr_metadata_infoframe_sdp_unpack(). And it follows DP 1.4a spec. ([Table 2-125: INFOFRAME SDP v1.2 Header Bytes] and [Table 2-126: INFOFRAME SDP v1.2 Payload Data Bytes - DB0 through DB31]) and CTA-861-G spec. [Table-42 Dynamic Range and Mastering InfoFrame].
A nameing rule and style of intel_read_dp_sdp() function references intel_read_infoframe() function of intel_hdmi.c
v2: Minor style fix v3: Replace a structure name to drm_dp_vsc_sdp from intel_dp_vsc_sdp
Signed-off-by: Gwan-gyeong Mun gwan-gyeong.mun@intel.com --- drivers/gpu/drm/i915/display/intel_dp.c | 170 ++++++++++++++++++++++++ drivers/gpu/drm/i915/display/intel_dp.h | 3 + 2 files changed, 173 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index dd7e5588001e..d4ece0a824c0 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -4925,6 +4925,176 @@ void intel_dp_set_infoframes(struct intel_encoder *encoder, intel_write_dp_sdp(encoder, crtc_state, HDMI_PACKET_TYPE_GAMUT_METADATA); }
+static int intel_dp_vsc_sdp_unpack(struct drm_dp_vsc_sdp *vsc, + const void *buffer, size_t size) +{ + const struct dp_sdp *sdp = buffer; + + if (size < sizeof(struct dp_sdp)) + return -EINVAL; + + memset(vsc, 0, size); + + if (sdp->sdp_header.HB0 != 0) + return -EINVAL; + + if (sdp->sdp_header.HB1 != DP_SDP_VSC) + return -EINVAL; + vsc->sdp_type = sdp->sdp_header.HB1; + + if (sdp->sdp_header.HB2 == 0x2 && sdp->sdp_header.HB3 == 0x8) { + vsc->revision = sdp->sdp_header.HB2; + vsc->length = sdp->sdp_header.HB3; + } else if (sdp->sdp_header.HB2 == 0x4 && sdp->sdp_header.HB3 == 0xe) { + vsc->revision = sdp->sdp_header.HB2; + vsc->length = sdp->sdp_header.HB3; + } else if (sdp->sdp_header.HB2 == 0x5 && sdp->sdp_header.HB3 == 0x13) { + vsc->revision = sdp->sdp_header.HB2; + vsc->length = sdp->sdp_header.HB3; + vsc->colorspace = (sdp->db[16] >> 4) & 0xf; + vsc->colorimetry = sdp->db[16] & 0xf; + vsc->dynamic_range = (sdp->db[17] >> 7) & 0x1; + + switch (sdp->db[17] & 0x7) { + case 0x1: + vsc->bpc = 8; + break; + case 0x2: + vsc->bpc = 10; + break; + case 0x3: + vsc->bpc = 12; + break; + case 0x4: + vsc->bpc = 16; + break; + default: + MISSING_CASE(sdp->db[17] & 0x7); + return -EINVAL; + } + + vsc->content_type = sdp->db[18] & 0x7; + } else { + return -EINVAL; + } + + return 0; +} + +static int +intel_dp_hdr_metadata_infoframe_sdp_unpack(struct hdmi_drm_infoframe *drm_infoframe, + const void *buffer, size_t size) +{ + int ret; + + const struct dp_sdp *sdp = buffer; + + if (size < sizeof(struct dp_sdp)) + return -EINVAL; + + if (sdp->sdp_header.HB0 != 0) + return -EINVAL; + + if (sdp->sdp_header.HB1 != HDMI_INFOFRAME_TYPE_DRM) + return -EINVAL; + + /* + * Least Significant Eight Bits of (Data Byte Count – 1) + * 1Dh (i.e., Data Byte Count = 30 bytes). + */ + if (sdp->sdp_header.HB2 != 0x1D) + return -EINVAL; + + /* Most Significant Two Bits of (Data Byte Count – 1), Clear to 00b. */ + if ((sdp->sdp_header.HB3 & 0x3) != 0) + return -EINVAL; + + /* INFOFRAME SDP Version Number */ + if (((sdp->sdp_header.HB3 >> 2) & 0x3f) != 0x13) + return -EINVAL; + + /* CTA Header Byte 2 (INFOFRAME Version Number) */ + if (sdp->db[0] != 1) + return -EINVAL; + + /* CTA Header Byte 3 (Length of INFOFRAME): HDMI_DRM_INFOFRAME_SIZE */ + if (sdp->db[1] != HDMI_DRM_INFOFRAME_SIZE) + return -EINVAL; + + ret = hdmi_drm_infoframe_unpack_only(drm_infoframe, &sdp->db[2], + HDMI_DRM_INFOFRAME_SIZE); + + return ret; +} + +static void intel_read_dp_vsc_sdp(struct intel_encoder *encoder, + struct intel_crtc_state *crtc_state, + struct drm_dp_vsc_sdp *vsc) +{ + struct intel_digital_port *intel_dig_port = enc_to_dig_port(encoder); + struct intel_dp *intel_dp = enc_to_intel_dp(encoder); + unsigned int type = DP_SDP_VSC; + struct dp_sdp sdp = {}; + int ret; + + /* When PSR is enabled, VSC SDP is handled by PSR routine */ + if (intel_psr_enabled(intel_dp)) + return; + + if ((crtc_state->infoframes.enable & + intel_hdmi_infoframe_enable(type)) == 0) + return; + + intel_dig_port->read_infoframe(encoder, crtc_state, type, &sdp, sizeof(sdp)); + + ret = intel_dp_vsc_sdp_unpack(vsc, &sdp, sizeof(sdp)); + + if (ret) + DRM_DEBUG_KMS("Failed to unpack DP VSC SDP\n"); +} + +static void intel_read_dp_hdr_metadata_infoframe_sdp(struct intel_encoder *encoder, + struct intel_crtc_state *crtc_state, + struct hdmi_drm_infoframe *drm_infoframe) +{ + struct intel_digital_port *intel_dig_port = enc_to_dig_port(encoder); + unsigned int type = HDMI_PACKET_TYPE_GAMUT_METADATA; + struct dp_sdp sdp = {}; + int ret; + + if ((crtc_state->infoframes.enable & + intel_hdmi_infoframe_enable(type)) == 0) + return; + + intel_dig_port->read_infoframe(encoder, crtc_state, type, &sdp, + sizeof(sdp)); + + ret = intel_dp_hdr_metadata_infoframe_sdp_unpack(drm_infoframe, &sdp, + sizeof(sdp)); + + if (ret) + DRM_DEBUG_KMS("Failed to unpack DP HDR Metadata Infoframe SDP\n"); +} + +void intel_read_dp_sdp(struct intel_encoder *encoder, + struct intel_crtc_state *crtc_state, + unsigned int type) +{ + switch (type) { + case DP_SDP_VSC: + intel_read_dp_vsc_sdp(encoder, crtc_state, + &crtc_state->infoframes.vsc); + break; + case HDMI_PACKET_TYPE_GAMUT_METADATA: + intel_read_dp_hdr_metadata_infoframe_sdp(encoder, crtc_state, + &crtc_state->infoframes.drm.drm); + break; + default: + MISSING_CASE(type); + break; + } +} + static void intel_dp_setup_vsc_sdp(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state, diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h index 0dc09a463ee1..e8f9ba962d09 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.h +++ b/drivers/gpu/drm/i915/display/intel_dp.h @@ -119,6 +119,9 @@ void intel_dp_hdr_metadata_enable(struct intel_dp *intel_dp, void intel_dp_set_infoframes(struct intel_encoder *encoder, bool enable, const struct intel_crtc_state *crtc_state, const struct drm_connector_state *conn_state); +void intel_read_dp_sdp(struct intel_encoder *encoder, + struct intel_crtc_state *crtc_state, + unsigned int type); bool intel_digital_port_connected(struct intel_encoder *encoder);
static inline unsigned int intel_dp_unused_lane_mask(int lane_count)
-----Original Message----- From: dri-devel dri-devel-bounces@lists.freedesktop.org On Behalf Of Gwan- gyeong Mun Sent: Tuesday, February 4, 2020 4:50 AM To: intel-gfx@lists.freedesktop.org Cc: linux-fbdev@vger.kernel.org; dri-devel@lists.freedesktop.org Subject: [PATCH v3 06/17] drm/i915/dp: Read out DP SDPs (Secondary Data Packet)
Drop the content in bracket.
It adds code to read the DP SDPs from the video DIP and unpack them into the crtc state.
It adds routines that read out DP VSC SDP and DP HDR Metadata Infoframe SDP In order to unpack DP VSC SDP, it adds intel_dp_vsc_sdp_unpack() function. It follows DP 1.4a spec. [Table 2-116: VSC SDP Header Bytes] and [Table 2-117: VSC SDP Payload for DB16 through DB18]
In order to unpack DP HDR Metadata Infoframe SDP, it adds intel_dp_hdr_metadata_infoframe_sdp_unpack(). And it follows DP 1.4a spec. ([Table 2-125: INFOFRAME SDP v1.2 Header Bytes] and [Table 2-126: INFOFRAME SDP v1.2 Payload Data Bytes - DB0 through DB31]) and CTA-861-G spec. [Table-42 Dynamic Range and Mastering InfoFrame].
A nameing rule and style of intel_read_dp_sdp() function references
Typo in naming.
intel_read_infoframe() function of intel_hdmi.c
v2: Minor style fix v3: Replace a structure name to drm_dp_vsc_sdp from intel_dp_vsc_sdp
Signed-off-by: Gwan-gyeong Mun gwan-gyeong.mun@intel.com
drivers/gpu/drm/i915/display/intel_dp.c | 170 ++++++++++++++++++++++++ drivers/gpu/drm/i915/display/intel_dp.h | 3 + 2 files changed, 173 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index dd7e5588001e..d4ece0a824c0 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -4925,6 +4925,176 @@ void intel_dp_set_infoframes(struct intel_encoder *encoder, intel_write_dp_sdp(encoder, crtc_state, HDMI_PACKET_TYPE_GAMUT_METADATA); }
+static int intel_dp_vsc_sdp_unpack(struct drm_dp_vsc_sdp *vsc,
const void *buffer, size_t size) {- const struct dp_sdp *sdp = buffer;
- if (size < sizeof(struct dp_sdp))
return -EINVAL;- memset(vsc, 0, size);
- if (sdp->sdp_header.HB0 != 0)
return -EINVAL;- if (sdp->sdp_header.HB1 != DP_SDP_VSC)
return -EINVAL;- vsc->sdp_type = sdp->sdp_header.HB1;
- if (sdp->sdp_header.HB2 == 0x2 && sdp->sdp_header.HB3 == 0x8) {
vsc->revision = sdp->sdp_header.HB2;vsc->length = sdp->sdp_header.HB3;- } else if (sdp->sdp_header.HB2 == 0x4 && sdp->sdp_header.HB3 == 0xe) {
vsc->revision = sdp->sdp_header.HB2;vsc->length = sdp->sdp_header.HB3;- } else if (sdp->sdp_header.HB2 == 0x5 && sdp->sdp_header.HB3 == 0x13) {
vsc->revision = sdp->sdp_header.HB2;vsc->length = sdp->sdp_header.HB3;
The above 2 lines can be done unconditionally, may be combine the if checks.
vsc->colorspace = (sdp->db[16] >> 4) & 0xf;vsc->colorimetry = sdp->db[16] & 0xf;vsc->dynamic_range = (sdp->db[17] >> 7) & 0x1;switch (sdp->db[17] & 0x7) {case 0x1:vsc->bpc = 8;break;case 0x2:vsc->bpc = 10;break;case 0x3:vsc->bpc = 12;break;case 0x4:vsc->bpc = 16;break;default:MISSING_CASE(sdp->db[17] & 0x7);
Handle 6bpc case as well.
return -EINVAL;}vsc->content_type = sdp->db[18] & 0x7;- } else {
return -EINVAL;- }
- return 0;
+}
+static int +intel_dp_hdr_metadata_infoframe_sdp_unpack(struct hdmi_drm_infoframe *drm_infoframe,
const void *buffer, size_t size) {- int ret;
- const struct dp_sdp *sdp = buffer;
- if (size < sizeof(struct dp_sdp))
return -EINVAL;- if (sdp->sdp_header.HB0 != 0)
return -EINVAL;- if (sdp->sdp_header.HB1 != HDMI_INFOFRAME_TYPE_DRM)
return -EINVAL;- /*
* Least Significant Eight Bits of (Data Byte Count – 1)* 1Dh (i.e., Data Byte Count = 30 bytes).*/- if (sdp->sdp_header.HB2 != 0x1D)
return -EINVAL;- /* Most Significant Two Bits of (Data Byte Count – 1), Clear to 00b. */
- if ((sdp->sdp_header.HB3 & 0x3) != 0)
return -EINVAL;- /* INFOFRAME SDP Version Number */
- if (((sdp->sdp_header.HB3 >> 2) & 0x3f) != 0x13)
return -EINVAL;- /* CTA Header Byte 2 (INFOFRAME Version Number) */
- if (sdp->db[0] != 1)
return -EINVAL;- /* CTA Header Byte 3 (Length of INFOFRAME):
HDMI_DRM_INFOFRAME_SIZE */
- if (sdp->db[1] != HDMI_DRM_INFOFRAME_SIZE)
return -EINVAL;- ret = hdmi_drm_infoframe_unpack_only(drm_infoframe, &sdp->db[2],
HDMI_DRM_INFOFRAME_SIZE);- return ret;
+}
+static void intel_read_dp_vsc_sdp(struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state,struct drm_dp_vsc_sdp *vsc)+{
- struct intel_digital_port *intel_dig_port = enc_to_dig_port(encoder);
- struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
- unsigned int type = DP_SDP_VSC;
- struct dp_sdp sdp = {};
- int ret;
- /* When PSR is enabled, VSC SDP is handled by PSR routine */
- if (intel_psr_enabled(intel_dp))
return;- if ((crtc_state->infoframes.enable &
intel_hdmi_infoframe_enable(type)) == 0)return;- intel_dig_port->read_infoframe(encoder, crtc_state, type, &sdp,
+sizeof(sdp));
- ret = intel_dp_vsc_sdp_unpack(vsc, &sdp, sizeof(sdp));
- if (ret)
DRM_DEBUG_KMS("Failed to unpack DP VSC SDP\n"); }+static void intel_read_dp_hdr_metadata_infoframe_sdp(struct intel_encoder *encoder,
struct intel_crtc_state*crtc_state,
struct hdmi_drm_infoframe*drm_infoframe) {
- struct intel_digital_port *intel_dig_port = enc_to_dig_port(encoder);
- unsigned int type = HDMI_PACKET_TYPE_GAMUT_METADATA;
- struct dp_sdp sdp = {};
- int ret;
- if ((crtc_state->infoframes.enable &
intel_hdmi_infoframe_enable(type)) == 0)return;- intel_dig_port->read_infoframe(encoder, crtc_state, type, &sdp,
sizeof(sdp));- ret = intel_dp_hdr_metadata_infoframe_sdp_unpack(drm_infoframe, &sdp,
sizeof(sdp));- if (ret)
DRM_DEBUG_KMS("Failed to unpack DP HDR Metadata InfoframeSDP\n"); }
+void intel_read_dp_sdp(struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state,unsigned int type)+{
- switch (type) {
- case DP_SDP_VSC:
intel_read_dp_vsc_sdp(encoder, crtc_state,&crtc_state->infoframes.vsc);break;- case HDMI_PACKET_TYPE_GAMUT_METADATA:
intel_read_dp_hdr_metadata_infoframe_sdp(encoder, crtc_state,&crtc_state-infoframes.drm.drm);
break;- default:
MISSING_CASE(type);break;- }
+}
static void intel_dp_setup_vsc_sdp(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state, diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h index 0dc09a463ee1..e8f9ba962d09 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.h +++ b/drivers/gpu/drm/i915/display/intel_dp.h @@ -119,6 +119,9 @@ void intel_dp_hdr_metadata_enable(struct intel_dp *intel_dp, void intel_dp_set_infoframes(struct intel_encoder *encoder, bool enable, const struct intel_crtc_state *crtc_state, const struct drm_connector_state *conn_state); +void intel_read_dp_sdp(struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state,unsigned int type);bool intel_digital_port_connected(struct intel_encoder *encoder);
static inline unsigned int intel_dp_unused_lane_mask(int lane_count)
2.24.1
dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
On Wed, 2020-02-05 at 21:59 +0530, Shankar, Uma wrote:
-----Original Message----- From: dri-devel dri-devel-bounces@lists.freedesktop.org On Behalf Of Gwan- gyeong Mun Sent: Tuesday, February 4, 2020 4:50 AM To: intel-gfx@lists.freedesktop.org Cc: linux-fbdev@vger.kernel.org; dri-devel@lists.freedesktop.org Subject: [PATCH v3 06/17] drm/i915/dp: Read out DP SDPs (Secondary Data Packet)
Drop the content in bracket.
It adds code to read the DP SDPs from the video DIP and unpack them into the crtc state.
It adds routines that read out DP VSC SDP and DP HDR Metadata Infoframe SDP In order to unpack DP VSC SDP, it adds intel_dp_vsc_sdp_unpack() function. It follows DP 1.4a spec. [Table 2-116: VSC SDP Header Bytes] and [Table 2-117: VSC SDP Payload for DB16 through DB18]
In order to unpack DP HDR Metadata Infoframe SDP, it adds intel_dp_hdr_metadata_infoframe_sdp_unpack(). And it follows DP 1.4a spec. ([Table 2-125: INFOFRAME SDP v1.2 Header Bytes] and [Table 2-126: INFOFRAME SDP v1.2 Payload Data Bytes - DB0 through DB31]) and CTA-861-G spec. [Table-42 Dynamic Range and Mastering InfoFrame].
A nameing rule and style of intel_read_dp_sdp() function references
Typo in naming.
intel_read_infoframe() function of intel_hdmi.c
v2: Minor style fix v3: Replace a structure name to drm_dp_vsc_sdp from intel_dp_vsc_sdp
Signed-off-by: Gwan-gyeong Mun gwan-gyeong.mun@intel.com
drivers/gpu/drm/i915/display/intel_dp.c | 170 ++++++++++++++++++++++++ drivers/gpu/drm/i915/display/intel_dp.h | 3 + 2 files changed, 173 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index dd7e5588001e..d4ece0a824c0 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -4925,6 +4925,176 @@ void intel_dp_set_infoframes(struct intel_encoder *encoder, intel_write_dp_sdp(encoder, crtc_state, HDMI_PACKET_TYPE_GAMUT_METADATA); }
+static int intel_dp_vsc_sdp_unpack(struct drm_dp_vsc_sdp *vsc,
const void *buffer, size_t size) {- const struct dp_sdp *sdp = buffer;
- if (size < sizeof(struct dp_sdp))
return -EINVAL;- memset(vsc, 0, size);
- if (sdp->sdp_header.HB0 != 0)
return -EINVAL;- if (sdp->sdp_header.HB1 != DP_SDP_VSC)
return -EINVAL;- vsc->sdp_type = sdp->sdp_header.HB1;
- if (sdp->sdp_header.HB2 == 0x2 && sdp->sdp_header.HB3 == 0x8) {
vsc->revision = sdp->sdp_header.HB2;vsc->length = sdp->sdp_header.HB3;- } else if (sdp->sdp_header.HB2 == 0x4 && sdp->sdp_header.HB3 ==
0xe) {
vsc->revision = sdp->sdp_header.HB2;vsc->length = sdp->sdp_header.HB3;- } else if (sdp->sdp_header.HB2 == 0x5 && sdp->sdp_header.HB3 ==
0x13) {
vsc->revision = sdp->sdp_header.HB2;vsc->length = sdp->sdp_header.HB3;The above 2 lines can be done unconditionally, may be combine the if checks.
vsc->colorspace = (sdp->db[16] >> 4) & 0xf;vsc->colorimetry = sdp->db[16] & 0xf;vsc->dynamic_range = (sdp->db[17] >> 7) & 0x1;switch (sdp->db[17] & 0x7) {case 0x1:vsc->bpc = 8;break;case 0x2:vsc->bpc = 10;break;case 0x3:vsc->bpc = 12;break;case 0x4:vsc->bpc = 16;break;default:MISSING_CASE(sdp->db[17] & 0x7);Handle 6bpc case as well.
Yes, I'll update everything that you commented.
return -EINVAL;}vsc->content_type = sdp->db[18] & 0x7;- } else {
return -EINVAL;- }
- return 0;
+}
+static int +intel_dp_hdr_metadata_infoframe_sdp_unpack(struct hdmi_drm_infoframe *drm_infoframe,
const void *buffer, size_tsize) {
- int ret;
- const struct dp_sdp *sdp = buffer;
- if (size < sizeof(struct dp_sdp))
return -EINVAL;- if (sdp->sdp_header.HB0 != 0)
return -EINVAL;- if (sdp->sdp_header.HB1 != HDMI_INFOFRAME_TYPE_DRM)
return -EINVAL;- /*
* Least Significant Eight Bits of (Data Byte Count – 1)* 1Dh (i.e., Data Byte Count = 30 bytes).*/- if (sdp->sdp_header.HB2 != 0x1D)
return -EINVAL;- /* Most Significant Two Bits of (Data Byte Count – 1), Clear to
00b. */
- if ((sdp->sdp_header.HB3 & 0x3) != 0)
return -EINVAL;- /* INFOFRAME SDP Version Number */
- if (((sdp->sdp_header.HB3 >> 2) & 0x3f) != 0x13)
return -EINVAL;- /* CTA Header Byte 2 (INFOFRAME Version Number) */
- if (sdp->db[0] != 1)
return -EINVAL;- /* CTA Header Byte 3 (Length of INFOFRAME):
HDMI_DRM_INFOFRAME_SIZE */
- if (sdp->db[1] != HDMI_DRM_INFOFRAME_SIZE)
return -EINVAL;- ret = hdmi_drm_infoframe_unpack_only(drm_infoframe, &sdp-
db[2],
HDMI_DRM_INFOFRAME_SIZE);- return ret;
+}
+static void intel_read_dp_vsc_sdp(struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state,struct drm_dp_vsc_sdp *vsc)+{
- struct intel_digital_port *intel_dig_port =
enc_to_dig_port(encoder);
- struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
- unsigned int type = DP_SDP_VSC;
- struct dp_sdp sdp = {};
- int ret;
- /* When PSR is enabled, VSC SDP is handled by PSR routine */
- if (intel_psr_enabled(intel_dp))
return;- if ((crtc_state->infoframes.enable &
intel_hdmi_infoframe_enable(type)) == 0)return;- intel_dig_port->read_infoframe(encoder, crtc_state, type, &sdp,
+sizeof(sdp));
- ret = intel_dp_vsc_sdp_unpack(vsc, &sdp, sizeof(sdp));
- if (ret)
DRM_DEBUG_KMS("Failed to unpack DP VSC SDP\n"); }+static void intel_read_dp_hdr_metadata_infoframe_sdp(struct intel_encoder *encoder,
structintel_crtc_state *crtc_state,
structhdmi_drm_infoframe *drm_infoframe) {
- struct intel_digital_port *intel_dig_port =
enc_to_dig_port(encoder);
- unsigned int type = HDMI_PACKET_TYPE_GAMUT_METADATA;
- struct dp_sdp sdp = {};
- int ret;
- if ((crtc_state->infoframes.enable &
intel_hdmi_infoframe_enable(type)) == 0)return;- intel_dig_port->read_infoframe(encoder, crtc_state, type, &sdp,
sizeof(sdp));- ret = intel_dp_hdr_metadata_infoframe_sdp_unpack(drm_infoframe,
&sdp,
sizeof(sdp));- if (ret)
DRM_DEBUG_KMS("Failed to unpack DP HDR MetadataInfoframe SDP\n"); }
+void intel_read_dp_sdp(struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state,unsigned int type)+{
- switch (type) {
- case DP_SDP_VSC:
intel_read_dp_vsc_sdp(encoder, crtc_state,&crtc_state->infoframes.vsc);break;- case HDMI_PACKET_TYPE_GAMUT_METADATA:
intel_read_dp_hdr_metadata_infoframe_sdp(encoder,crtc_state,
&crtc_state-infoframes.drm.drm);
break;- default:
MISSING_CASE(type);break;- }
+}
static void intel_dp_setup_vsc_sdp(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state, diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h index 0dc09a463ee1..e8f9ba962d09 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.h +++ b/drivers/gpu/drm/i915/display/intel_dp.h @@ -119,6 +119,9 @@ void intel_dp_hdr_metadata_enable(struct intel_dp *intel_dp, void intel_dp_set_infoframes(struct intel_encoder *encoder, bool enable, const struct intel_crtc_state *crtc_state, const struct drm_connector_state *conn_state); +void intel_read_dp_sdp(struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state,unsigned int type);bool intel_digital_port_connected(struct intel_encoder *encoder);
static inline unsigned int intel_dp_unused_lane_mask(int lane_count) -- 2.24.1
dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
When receiving video it is very useful to be able to log DP VSC SDP. This greatly simplifies debugging.
v2: Minor style fix v3: Move logging functions to drm core [Jani N]
Signed-off-by: Gwan-gyeong Mun gwan-gyeong.mun@intel.com --- drivers/gpu/drm/drm_dp_helper.c | 174 ++++++++++++++++++++++++++++++++ include/drm/drm_dp_helper.h | 3 + 2 files changed, 177 insertions(+)
diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c index 5a103e9b3c86..5e3aef8c32e0 100644 --- a/drivers/gpu/drm/drm_dp_helper.c +++ b/drivers/gpu/drm/drm_dp_helper.c @@ -1395,3 +1395,177 @@ int drm_dp_dsc_sink_supported_input_bpcs(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_S return num_bpc; } EXPORT_SYMBOL(drm_dp_dsc_sink_supported_input_bpcs); + +static const char *dp_colorspace_get_name(enum dp_colorspace colorspace) +{ + if (colorspace < 0 || colorspace > DP_COLORSPACE_RESERVED) + return "Invalid"; + + switch (colorspace) { + case DP_COLORSPACE_RGB: + return "RGB"; + case DP_COLORSPACE_YUV444: + return "YUV444"; + case DP_COLORSPACE_YUV422: + return "YUV422"; + case DP_COLORSPACE_YUV420: + return "YUV420"; + case DP_COLORSPACE_Y_ONLY: + return "Y_ONLY"; + case DP_COLORSPACE_RAW: + return "RAW"; + default: + return "Reserved"; + } +} + +static const char *dp_colorimetry_get_name(enum dp_colorspace colorspace, + enum dp_colorimetry colorimetry) +{ + if (colorspace < 0 || colorspace > DP_COLORSPACE_RESERVED) + return "Invalid"; + + switch (colorimetry) { + case DP_COLORIMETRY_DEFAULT: + switch (colorspace) { + case DP_COLORSPACE_RGB: + return "sRGB"; + case DP_COLORSPACE_YUV444: + case DP_COLORSPACE_YUV422: + case DP_COLORSPACE_YUV420: + return "BT.601"; + case DP_COLORSPACE_Y_ONLY: + return "DICOM PS3.14"; + case DP_COLORSPACE_RAW: + return "Custom Color Profile"; + default: + return "Reserved"; + } + case DP_COLORIMETRY_RGB_WIDE_FIXED: /* and DP_COLORIMETRY_BT709_YCC */ + switch (colorspace) { + case DP_COLORSPACE_RGB: + return "Wide Fixed"; + case DP_COLORSPACE_YUV444: + case DP_COLORSPACE_YUV422: + case DP_COLORSPACE_YUV420: + return "BT.709"; + default: + return "Reserved"; + } + case DP_COLORIMETRY_RGB_WIDE_FLOAT: /* and DP_COLORIMETRY_XVYCC_601 */ + switch (colorspace) { + case DP_COLORSPACE_RGB: + return "Wide Float"; + case DP_COLORSPACE_YUV444: + case DP_COLORSPACE_YUV422: + case DP_COLORSPACE_YUV420: + return "xvYCC 601"; + default: + return "Reserved"; + } + case DP_COLORIMETRY_OPRGB: /* and DP_COLORIMETRY_XVYCC_709 */ + switch (colorspace) { + case DP_COLORSPACE_RGB: + return "OpRGB"; + case DP_COLORSPACE_YUV444: + case DP_COLORSPACE_YUV422: + case DP_COLORSPACE_YUV420: + return "xvYCC 709"; + default: + return "Reserved"; + } + case DP_COLORIMETRY_DCI_P3_RGB: /* and DP_COLORIMETRY_SYCC_601 */ + switch (colorspace) { + case DP_COLORSPACE_RGB: + return "DCI-P3"; + case DP_COLORSPACE_YUV444: + case DP_COLORSPACE_YUV422: + case DP_COLORSPACE_YUV420: + return "sYCC 601"; + default: + return "Reserved"; + } + case DP_COLORIMETRY_RGB_CUSTOM: /* and DP_COLORIMETRY_OPYCC_601 */ + switch (colorspace) { + case DP_COLORSPACE_RGB: + return "Custom Profile"; + case DP_COLORSPACE_YUV444: + case DP_COLORSPACE_YUV422: + case DP_COLORSPACE_YUV420: + return "OpYCC 601"; + default: + return "Reserved"; + } + case DP_COLORIMETRY_BT2020_RGB: /* and DP_COLORIMETRY_BT2020_CYCC */ + switch (colorspace) { + case DP_COLORSPACE_RGB: + return "BT.2020 RGB"; + case DP_COLORSPACE_YUV444: + case DP_COLORSPACE_YUV422: + case DP_COLORSPACE_YUV420: + return "BT.2020 CYCC"; + default: + return "Reserved"; + } + case DP_COLORIMETRY_BT2020_YCC: + switch (colorspace) { + case DP_COLORSPACE_YUV444: + case DP_COLORSPACE_YUV422: + case DP_COLORSPACE_YUV420: + return "BT.2020 YCC"; + default: + return "Reserved"; + } + default: + return "Invalid"; + } +} + +static const char *dp_dynamic_range_get_name(enum dp_dynamic_range dynamic_range) +{ + switch (dynamic_range) { + case DP_DYNAMIC_RANGE_VESA: + return "VESA range"; + case DP_DYNAMIC_RANGE_CTA: + return "CTA range"; + default: + return "Invalid"; + } +} + +static const char *dp_content_type_get_name(enum dp_content_type content_type) +{ + switch (content_type) { + case DP_CONTENT_TYPE_NOT_DEFINED: + return "Not defined"; + case DP_CONTENT_TYPE_GRAPHICS: + return "Graphics"; + case DP_CONTENT_TYPE_PHOTO: + return "Photo"; + case DP_CONTENT_TYPE_VIDEO: + return "Video"; + case DP_CONTENT_TYPE_GAME: + return "Game"; + default: + return "Reserved"; + } +} + +void drm_dp_vsc_sdp_log(const char *level, struct device *dev, + const struct drm_dp_vsc_sdp *vsc) +{ +#define DP_SDP_LOG(fmt, ...) dev_printk(level, dev, fmt, ##__VA_ARGS__) + DP_SDP_LOG("DP SDP: %s, revision %u, length %u\n", "VSC", + vsc->revision, vsc->length); + DP_SDP_LOG(" colorspace: %s\n", + dp_colorspace_get_name(vsc->colorspace)); + DP_SDP_LOG(" colorimetry: %s\n", + dp_colorimetry_get_name(vsc->colorspace, vsc->colorimetry)); + DP_SDP_LOG(" bpc: %u\n", vsc->bpc); + DP_SDP_LOG(" dynamic range: %s\n", + dp_dynamic_range_get_name(vsc->dynamic_range)); + DP_SDP_LOG(" content type: %s\n", + dp_content_type_get_name(vsc->content_type)); +#undef DP_SDP_LOG +} +EXPORT_SYMBOL(drm_dp_vsc_sdp_log); diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index c098727681fa..00b775df6241 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h @@ -1266,6 +1266,9 @@ struct drm_dp_vsc_sdp { enum dp_content_type content_type; };
+void drm_dp_vsc_sdp_log(const char *level, struct device *dev, + const struct drm_dp_vsc_sdp *vsc); + int drm_dp_psr_setup_time(const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE]);
static inline int
-----Original Message----- From: Intel-gfx intel-gfx-bounces@lists.freedesktop.org On Behalf Of Gwan- gyeong Mun Sent: Tuesday, February 4, 2020 4:50 AM To: intel-gfx@lists.freedesktop.org Cc: linux-fbdev@vger.kernel.org; dri-devel@lists.freedesktop.org Subject: [Intel-gfx] [PATCH v3 07/17] drm: Add logging function for DP VSC SDP
When receiving video it is very useful to be able to log DP VSC SDP. This greatly simplifies debugging.
v2: Minor style fix v3: Move logging functions to drm core [Jani N]
Looks good to me. Reviewed-by: Uma Shankar uma.shankar@intel.com
Signed-off-by: Gwan-gyeong Mun gwan-gyeong.mun@intel.com
drivers/gpu/drm/drm_dp_helper.c | 174 ++++++++++++++++++++++++++++++++ include/drm/drm_dp_helper.h | 3 + 2 files changed, 177 insertions(+)
diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c index 5a103e9b3c86..5e3aef8c32e0 100644 --- a/drivers/gpu/drm/drm_dp_helper.c +++ b/drivers/gpu/drm/drm_dp_helper.c @@ -1395,3 +1395,177 @@ int drm_dp_dsc_sink_supported_input_bpcs(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_S return num_bpc; } EXPORT_SYMBOL(drm_dp_dsc_sink_supported_input_bpcs);
+static const char *dp_colorspace_get_name(enum dp_colorspace +colorspace) {
- if (colorspace < 0 || colorspace > DP_COLORSPACE_RESERVED)
return "Invalid";- switch (colorspace) {
- case DP_COLORSPACE_RGB:
return "RGB";- case DP_COLORSPACE_YUV444:
return "YUV444";- case DP_COLORSPACE_YUV422:
return "YUV422";- case DP_COLORSPACE_YUV420:
return "YUV420";- case DP_COLORSPACE_Y_ONLY:
return "Y_ONLY";- case DP_COLORSPACE_RAW:
return "RAW";- default:
return "Reserved";- }
+}
+static const char *dp_colorimetry_get_name(enum dp_colorspace colorspace,
enum dp_colorimetry colorimetry) {- if (colorspace < 0 || colorspace > DP_COLORSPACE_RESERVED)
return "Invalid";- switch (colorimetry) {
- case DP_COLORIMETRY_DEFAULT:
switch (colorspace) {case DP_COLORSPACE_RGB:return "sRGB";case DP_COLORSPACE_YUV444:case DP_COLORSPACE_YUV422:case DP_COLORSPACE_YUV420:return "BT.601";case DP_COLORSPACE_Y_ONLY:return "DICOM PS3.14";case DP_COLORSPACE_RAW:return "Custom Color Profile";default:return "Reserved";}- case DP_COLORIMETRY_RGB_WIDE_FIXED: /* and
DP_COLORIMETRY_BT709_YCC */
switch (colorspace) {case DP_COLORSPACE_RGB:return "Wide Fixed";case DP_COLORSPACE_YUV444:case DP_COLORSPACE_YUV422:case DP_COLORSPACE_YUV420:return "BT.709";default:return "Reserved";}- case DP_COLORIMETRY_RGB_WIDE_FLOAT: /* and
DP_COLORIMETRY_XVYCC_601 */
switch (colorspace) {case DP_COLORSPACE_RGB:return "Wide Float";case DP_COLORSPACE_YUV444:case DP_COLORSPACE_YUV422:case DP_COLORSPACE_YUV420:return "xvYCC 601";default:return "Reserved";}- case DP_COLORIMETRY_OPRGB: /* and DP_COLORIMETRY_XVYCC_709 */
switch (colorspace) {case DP_COLORSPACE_RGB:return "OpRGB";case DP_COLORSPACE_YUV444:case DP_COLORSPACE_YUV422:case DP_COLORSPACE_YUV420:return "xvYCC 709";default:return "Reserved";}- case DP_COLORIMETRY_DCI_P3_RGB: /* and DP_COLORIMETRY_SYCC_601
*/
switch (colorspace) {case DP_COLORSPACE_RGB:return "DCI-P3";case DP_COLORSPACE_YUV444:case DP_COLORSPACE_YUV422:case DP_COLORSPACE_YUV420:return "sYCC 601";default:return "Reserved";}- case DP_COLORIMETRY_RGB_CUSTOM: /* and
DP_COLORIMETRY_OPYCC_601 */
switch (colorspace) {case DP_COLORSPACE_RGB:return "Custom Profile";case DP_COLORSPACE_YUV444:case DP_COLORSPACE_YUV422:case DP_COLORSPACE_YUV420:return "OpYCC 601";default:return "Reserved";}- case DP_COLORIMETRY_BT2020_RGB: /* and
DP_COLORIMETRY_BT2020_CYCC */
switch (colorspace) {case DP_COLORSPACE_RGB:return "BT.2020 RGB";case DP_COLORSPACE_YUV444:case DP_COLORSPACE_YUV422:case DP_COLORSPACE_YUV420:return "BT.2020 CYCC";default:return "Reserved";}- case DP_COLORIMETRY_BT2020_YCC:
switch (colorspace) {case DP_COLORSPACE_YUV444:case DP_COLORSPACE_YUV422:case DP_COLORSPACE_YUV420:return "BT.2020 YCC";default:return "Reserved";}- default:
return "Invalid";- }
+}
+static const char *dp_dynamic_range_get_name(enum dp_dynamic_range +dynamic_range) {
- switch (dynamic_range) {
- case DP_DYNAMIC_RANGE_VESA:
return "VESA range";- case DP_DYNAMIC_RANGE_CTA:
return "CTA range";- default:
return "Invalid";- }
+}
+static const char *dp_content_type_get_name(enum dp_content_type +content_type) {
- switch (content_type) {
- case DP_CONTENT_TYPE_NOT_DEFINED:
return "Not defined";- case DP_CONTENT_TYPE_GRAPHICS:
return "Graphics";- case DP_CONTENT_TYPE_PHOTO:
return "Photo";- case DP_CONTENT_TYPE_VIDEO:
return "Video";- case DP_CONTENT_TYPE_GAME:
return "Game";- default:
return "Reserved";- }
+}
+void drm_dp_vsc_sdp_log(const char *level, struct device *dev,
const struct drm_dp_vsc_sdp *vsc)+{ +#define DP_SDP_LOG(fmt, ...) dev_printk(level, dev, fmt, ##__VA_ARGS__)
- DP_SDP_LOG("DP SDP: %s, revision %u, length %u\n", "VSC",
vsc->revision, vsc->length);- DP_SDP_LOG(" colorspace: %s\n",
dp_colorspace_get_name(vsc->colorspace));- DP_SDP_LOG(" colorimetry: %s\n",
dp_colorimetry_get_name(vsc->colorspace, vsc->colorimetry));- DP_SDP_LOG(" bpc: %u\n", vsc->bpc);
- DP_SDP_LOG(" dynamic range: %s\n",
dp_dynamic_range_get_name(vsc->dynamic_range));- DP_SDP_LOG(" content type: %s\n",
dp_content_type_get_name(vsc->content_type));+#undef DP_SDP_LOG +} +EXPORT_SYMBOL(drm_dp_vsc_sdp_log); diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index c098727681fa..00b775df6241 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h @@ -1266,6 +1266,9 @@ struct drm_dp_vsc_sdp { enum dp_content_type content_type; };
+void drm_dp_vsc_sdp_log(const char *level, struct device *dev,
const struct drm_dp_vsc_sdp *vsc);int drm_dp_psr_setup_time(const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE]);
static inline int
2.24.1
Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Dump out the HDMI Dynamic Range and Mastering (DRM) infoframe in the normal crtc state dump.
Signed-off-by: Gwan-gyeong Mun gwan-gyeong.mun@intel.com --- drivers/gpu/drm/i915/display/intel_display.c | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index c0e5002ce64c..239861bcedba 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -13030,6 +13030,9 @@ static void intel_dump_pipe_config(const struct intel_crtc_state *pipe_config, if (pipe_config->infoframes.enable & intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_VENDOR)) intel_dump_infoframe(dev_priv, &pipe_config->infoframes.hdmi); + if (pipe_config->infoframes.enable & + intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_DRM)) + intel_dump_infoframe(dev_priv, &pipe_config->infoframes.drm);
drm_dbg_kms(&dev_priv->drm, "requested mode:\n"); drm_mode_debug_printmodeline(&pipe_config->hw.mode);
-----Original Message----- From: dri-devel dri-devel-bounces@lists.freedesktop.org On Behalf Of Gwan- gyeong Mun Sent: Tuesday, February 4, 2020 4:50 AM To: intel-gfx@lists.freedesktop.org Cc: linux-fbdev@vger.kernel.org; dri-devel@lists.freedesktop.org Subject: [PATCH v3 08/17] drm/i915: Include HDMI DRM infoframe in the crtc state dump
Dump out the HDMI Dynamic Range and Mastering (DRM) infoframe in the normal crtc state dump.
Looks good to me. Reviewed-by: Uma Shankar uma.shankar@intel.com
Signed-off-by: Gwan-gyeong Mun gwan-gyeong.mun@intel.com
drivers/gpu/drm/i915/display/intel_display.c | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index c0e5002ce64c..239861bcedba 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -13030,6 +13030,9 @@ static void intel_dump_pipe_config(const struct intel_crtc_state *pipe_config, if (pipe_config->infoframes.enable & intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_VENDOR)) intel_dump_infoframe(dev_priv, &pipe_config->infoframes.hdmi);
if (pipe_config->infoframes.enable &
intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_DRM))intel_dump_infoframe(dev_priv, &pipe_config->infoframes.drm);drm_dbg_kms(&dev_priv->drm, "requested mode:\n"); drm_mode_debug_printmodeline(&pipe_config->hw.mode);
-- 2.24.1
dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Dump out the DP HDR Metadata Infoframe SDP in the normal crtc state dump.
HDMI Dynamic Range and Mastering (DRM) infoframe and DP HDR Metadata Infoframe SDP use the same member variable in infoframes of crtc state.
Signed-off-by: Gwan-gyeong Mun gwan-gyeong.mun@intel.com --- drivers/gpu/drm/i915/display/intel_display.c | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 239861bcedba..593c63f51210 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -13033,6 +13033,9 @@ static void intel_dump_pipe_config(const struct intel_crtc_state *pipe_config, if (pipe_config->infoframes.enable & intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_DRM)) intel_dump_infoframe(dev_priv, &pipe_config->infoframes.drm); + if (pipe_config->infoframes.enable & + intel_hdmi_infoframe_enable(HDMI_PACKET_TYPE_GAMUT_METADATA)) + intel_dump_infoframe(dev_priv, &pipe_config->infoframes.drm);
drm_dbg_kms(&dev_priv->drm, "requested mode:\n"); drm_mode_debug_printmodeline(&pipe_config->hw.mode);
-----Original Message----- From: dri-devel dri-devel-bounces@lists.freedesktop.org On Behalf Of Gwan- gyeong Mun Sent: Tuesday, February 4, 2020 4:50 AM To: intel-gfx@lists.freedesktop.org Cc: linux-fbdev@vger.kernel.org; dri-devel@lists.freedesktop.org Subject: [PATCH v3 09/17] drm/i915: Include DP HDR Metadata Infoframe SDP in the crtc state dump
Dump out the DP HDR Metadata Infoframe SDP in the normal crtc state dump.
HDMI Dynamic Range and Mastering (DRM) infoframe and DP HDR Metadata Infoframe SDP use the same member variable in infoframes of crtc state.
Looks good to me. Reviewed-by: Uma Shankar uma.shankar@intel.com
Signed-off-by: Gwan-gyeong Mun gwan-gyeong.mun@intel.com
drivers/gpu/drm/i915/display/intel_display.c | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 239861bcedba..593c63f51210 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -13033,6 +13033,9 @@ static void intel_dump_pipe_config(const struct intel_crtc_state *pipe_config, if (pipe_config->infoframes.enable & intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_DRM)) intel_dump_infoframe(dev_priv, &pipe_config->infoframes.drm);
if (pipe_config->infoframes.enable &
intel_hdmi_infoframe_enable(HDMI_PACKET_TYPE_GAMUT_METADATA))intel_dump_infoframe(dev_priv, &pipe_config->infoframes.drm);drm_dbg_kms(&dev_priv->drm, "requested mode:\n"); drm_mode_debug_printmodeline(&pipe_config->hw.mode);
-- 2.24.1
dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Dump out the DP VSC SDP in the normal crtc state dump
v3: Replace a structure name to drm_dp_vsc_sdp from intel_dp_vsc_sdp Use drm core's DP VSC SDP logging function
Signed-off-by: Gwan-gyeong Mun gwan-gyeong.mun@intel.com --- drivers/gpu/drm/i915/display/intel_display.c | 13 +++++++++++++ 1 file changed, 13 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 593c63f51210..4f187fd330e8 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -12878,6 +12878,16 @@ intel_dump_infoframe(struct drm_i915_private *dev_priv, hdmi_infoframe_log(KERN_DEBUG, dev_priv->drm.dev, frame); }
+static void +intel_dump_dp_vsc_sdp(struct drm_i915_private *dev_priv, + const struct drm_dp_vsc_sdp *vsc) +{ + if (!drm_debug_enabled(DRM_UT_KMS)) + return; + + drm_dp_vsc_sdp_log(KERN_DEBUG, dev_priv->drm.dev, vsc); +} + #define OUTPUT_TYPE(x) [INTEL_OUTPUT_ ## x] = #x
static const char * const output_type_str[] = { @@ -13036,6 +13046,9 @@ static void intel_dump_pipe_config(const struct intel_crtc_state *pipe_config, if (pipe_config->infoframes.enable & intel_hdmi_infoframe_enable(HDMI_PACKET_TYPE_GAMUT_METADATA)) intel_dump_infoframe(dev_priv, &pipe_config->infoframes.drm); + if (pipe_config->infoframes.enable & + intel_hdmi_infoframe_enable(DP_SDP_VSC)) + intel_dump_dp_vsc_sdp(dev_priv, &pipe_config->infoframes.vsc);
drm_dbg_kms(&dev_priv->drm, "requested mode:\n"); drm_mode_debug_printmodeline(&pipe_config->hw.mode);
-----Original Message----- From: dri-devel dri-devel-bounces@lists.freedesktop.org On Behalf Of Gwan- gyeong Mun Sent: Tuesday, February 4, 2020 4:50 AM To: intel-gfx@lists.freedesktop.org Cc: linux-fbdev@vger.kernel.org; dri-devel@lists.freedesktop.org Subject: [PATCH v3 10/17] drm/i915: Include DP VSC SDP in the crtc state dump
Dump out the DP VSC SDP in the normal crtc state dump
v3: Replace a structure name to drm_dp_vsc_sdp from intel_dp_vsc_sdp Use drm core's DP VSC SDP logging function
Looks good to me. Reviewed-by: Uma Shankar uma.shankar@intel.com
Signed-off-by: Gwan-gyeong Mun gwan-gyeong.mun@intel.com
drivers/gpu/drm/i915/display/intel_display.c | 13 +++++++++++++ 1 file changed, 13 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 593c63f51210..4f187fd330e8 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -12878,6 +12878,16 @@ intel_dump_infoframe(struct drm_i915_private *dev_priv, hdmi_infoframe_log(KERN_DEBUG, dev_priv->drm.dev, frame); }
+static void +intel_dump_dp_vsc_sdp(struct drm_i915_private *dev_priv,
const struct drm_dp_vsc_sdp *vsc) {- if (!drm_debug_enabled(DRM_UT_KMS))
return;- drm_dp_vsc_sdp_log(KERN_DEBUG, dev_priv->drm.dev, vsc); }
#define OUTPUT_TYPE(x) [INTEL_OUTPUT_ ## x] = #x
static const char * const output_type_str[] = { @@ -13036,6 +13046,9 @@ static void intel_dump_pipe_config(const struct intel_crtc_state *pipe_config, if (pipe_config->infoframes.enable & intel_hdmi_infoframe_enable(HDMI_PACKET_TYPE_GAMUT_METADATA)) intel_dump_infoframe(dev_priv, &pipe_config->infoframes.drm);
if (pipe_config->infoframes.enable &
intel_hdmi_infoframe_enable(DP_SDP_VSC))intel_dump_dp_vsc_sdp(dev_priv, &pipe_config->infoframes.vsc);drm_dbg_kms(&dev_priv->drm, "requested mode:\n"); drm_mode_debug_printmodeline(&pipe_config->hw.mode);
-- 2.24.1
dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
In order to use computed config for DP SDPs (DP VSC SDP and DP HDR Metadata Infoframe SDP), it replaces intel_dp_vsc_enable() function and intel_dp_hdr_metadata_enable() function to intel_dp_set_infoframes() function.
Before applying it, routines of program SDP always calculated configs when they called. And it removes unused functions.
v3: Rebased
Signed-off-by: Gwan-gyeong Mun gwan-gyeong.mun@intel.com --- drivers/gpu/drm/i915/display/intel_ddi.c | 3 +- drivers/gpu/drm/i915/display/intel_dp.c | 226 ----------------------- drivers/gpu/drm/i915/display/intel_dp.h | 6 - 3 files changed, 1 insertion(+), 234 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index c96f629cddc3..374ab6a3757c 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -3900,8 +3900,7 @@ static void intel_enable_ddi_dp(struct intel_encoder *encoder,
intel_edp_backlight_on(crtc_state, conn_state); intel_psr_enable(intel_dp, crtc_state); - intel_dp_vsc_enable(intel_dp, crtc_state, conn_state); - intel_dp_hdr_metadata_enable(intel_dp, crtc_state, conn_state); + intel_dp_set_infoframes(encoder, true, crtc_state, conn_state); intel_edp_drrs_enable(intel_dp, crtc_state);
if (crtc_state->has_audio) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index d4ece0a824c0..cffb77daec96 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -5095,232 +5095,6 @@ void intel_read_dp_sdp(struct intel_encoder *encoder, } }
-static void -intel_dp_setup_vsc_sdp(struct intel_dp *intel_dp, - const struct intel_crtc_state *crtc_state, - const struct drm_connector_state *conn_state) -{ - struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); - struct dp_sdp vsc_sdp = {}; - - /* Prepare VSC Header for SU as per DP 1.4a spec, Table 2-119 */ - vsc_sdp.sdp_header.HB0 = 0; - vsc_sdp.sdp_header.HB1 = 0x7; - - /* - * VSC SDP supporting 3D stereo, PSR2, and Pixel Encoding/ - * Colorimetry Format indication. - */ - vsc_sdp.sdp_header.HB2 = 0x5; - - /* - * VSC SDP supporting 3D stereo, + PSR2, + Pixel Encoding/ - * Colorimetry Format indication (HB2 = 05h). - */ - vsc_sdp.sdp_header.HB3 = 0x13; - - /* DP 1.4a spec, Table 2-120 */ - switch (crtc_state->output_format) { - case INTEL_OUTPUT_FORMAT_YCBCR444: - vsc_sdp.db[16] = 0x1 << 4; /* YCbCr 444 : DB16[7:4] = 1h */ - break; - case INTEL_OUTPUT_FORMAT_YCBCR420: - vsc_sdp.db[16] = 0x3 << 4; /* YCbCr 420 : DB16[7:4] = 3h */ - break; - case INTEL_OUTPUT_FORMAT_RGB: - default: - /* RGB: DB16[7:4] = 0h */ - break; - } - - switch (conn_state->colorspace) { - case DRM_MODE_COLORIMETRY_BT709_YCC: - vsc_sdp.db[16] |= 0x1; - break; - case DRM_MODE_COLORIMETRY_XVYCC_601: - vsc_sdp.db[16] |= 0x2; - break; - case DRM_MODE_COLORIMETRY_XVYCC_709: - vsc_sdp.db[16] |= 0x3; - break; - case DRM_MODE_COLORIMETRY_SYCC_601: - vsc_sdp.db[16] |= 0x4; - break; - case DRM_MODE_COLORIMETRY_OPYCC_601: - vsc_sdp.db[16] |= 0x5; - break; - case DRM_MODE_COLORIMETRY_BT2020_CYCC: - case DRM_MODE_COLORIMETRY_BT2020_RGB: - vsc_sdp.db[16] |= 0x6; - break; - case DRM_MODE_COLORIMETRY_BT2020_YCC: - vsc_sdp.db[16] |= 0x7; - break; - case DRM_MODE_COLORIMETRY_DCI_P3_RGB_D65: - case DRM_MODE_COLORIMETRY_DCI_P3_RGB_THEATER: - vsc_sdp.db[16] |= 0x4; /* DCI-P3 (SMPTE RP 431-2) */ - break; - default: - /* sRGB (IEC 61966-2-1) / ITU-R BT.601: DB16[0:3] = 0h */ - - /* RGB->YCBCR color conversion uses the BT.709 color space. */ - if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420) - vsc_sdp.db[16] |= 0x1; /* 0x1, ITU-R BT.709 */ - break; - } - - /* - * For pixel encoding formats YCbCr444, YCbCr422, YCbCr420, and Y Only, - * the following Component Bit Depth values are defined: - * 001b = 8bpc. - * 010b = 10bpc. - * 011b = 12bpc. - * 100b = 16bpc. - */ - switch (crtc_state->pipe_bpp) { - case 24: /* 8bpc */ - vsc_sdp.db[17] = 0x1; - break; - case 30: /* 10bpc */ - vsc_sdp.db[17] = 0x2; - break; - case 36: /* 12bpc */ - vsc_sdp.db[17] = 0x3; - break; - case 48: /* 16bpc */ - vsc_sdp.db[17] = 0x4; - break; - default: - MISSING_CASE(crtc_state->pipe_bpp); - break; - } - - /* - * Dynamic Range (Bit 7) - * 0 = VESA range, 1 = CTA range. - * all YCbCr are always limited range - */ - vsc_sdp.db[17] |= 0x80; - - /* - * Content Type (Bits 2:0) - * 000b = Not defined. - * 001b = Graphics. - * 010b = Photo. - * 011b = Video. - * 100b = Game - * All other values are RESERVED. - * Note: See CTA-861-G for the definition and expected - * processing by a stream sink for the above contect types. - */ - vsc_sdp.db[18] = 0; - - intel_dig_port->write_infoframe(&intel_dig_port->base, - crtc_state, DP_SDP_VSC, &vsc_sdp, sizeof(vsc_sdp)); -} - -static void -intel_dp_setup_hdr_metadata_infoframe_sdp(struct intel_dp *intel_dp, - const struct intel_crtc_state *crtc_state, - const struct drm_connector_state *conn_state) -{ - struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); - struct dp_sdp infoframe_sdp = {}; - struct hdmi_drm_infoframe drm_infoframe = {}; - const int infoframe_size = HDMI_INFOFRAME_HEADER_SIZE + HDMI_DRM_INFOFRAME_SIZE; - unsigned char buf[HDMI_INFOFRAME_HEADER_SIZE + HDMI_DRM_INFOFRAME_SIZE]; - ssize_t len; - int ret; - - ret = drm_hdmi_infoframe_set_hdr_metadata(&drm_infoframe, conn_state); - if (ret) { - DRM_DEBUG_KMS("couldn't set HDR metadata in infoframe\n"); - return; - } - - len = hdmi_drm_infoframe_pack_only(&drm_infoframe, buf, sizeof(buf)); - if (len < 0) { - DRM_DEBUG_KMS("buffer size is smaller than hdr metadata infoframe\n"); - return; - } - - if (len != infoframe_size) { - DRM_DEBUG_KMS("wrong static hdr metadata size\n"); - return; - } - - /* - * Set up the infoframe sdp packet for HDR static metadata. - * Prepare VSC Header for SU as per DP 1.4a spec, - * Table 2-100 and Table 2-101 - */ - - /* Packet ID, 00h for non-Audio INFOFRAME */ - infoframe_sdp.sdp_header.HB0 = 0; - /* - * Packet Type 80h + Non-audio INFOFRAME Type value - * HDMI_INFOFRAME_TYPE_DRM: 0x87, - */ - infoframe_sdp.sdp_header.HB1 = drm_infoframe.type; - /* - * Least Significant Eight Bits of (Data Byte Count – 1) - * infoframe_size - 1, - */ - infoframe_sdp.sdp_header.HB2 = 0x1D; - /* INFOFRAME SDP Version Number */ - infoframe_sdp.sdp_header.HB3 = (0x13 << 2); - /* CTA Header Byte 2 (INFOFRAME Version Number) */ - infoframe_sdp.db[0] = drm_infoframe.version; - /* CTA Header Byte 3 (Length of INFOFRAME): HDMI_DRM_INFOFRAME_SIZE */ - infoframe_sdp.db[1] = drm_infoframe.length; - /* - * Copy HDMI_DRM_INFOFRAME_SIZE size from a buffer after - * HDMI_INFOFRAME_HEADER_SIZE - */ - BUILD_BUG_ON(sizeof(infoframe_sdp.db) < HDMI_DRM_INFOFRAME_SIZE + 2); - memcpy(&infoframe_sdp.db[2], &buf[HDMI_INFOFRAME_HEADER_SIZE], - HDMI_DRM_INFOFRAME_SIZE); - - /* - * Size of DP infoframe sdp packet for HDR static metadata is consist of - * - DP SDP Header(struct dp_sdp_header): 4 bytes - * - Two Data Blocks: 2 bytes - * CTA Header Byte2 (INFOFRAME Version Number) - * CTA Header Byte3 (Length of INFOFRAME) - * - HDMI_DRM_INFOFRAME_SIZE: 26 bytes - * - * Prior to GEN11's GMP register size is identical to DP HDR static metadata - * infoframe size. But GEN11+ has larger than that size, write_infoframe - * will pad rest of the size. - */ - intel_dig_port->write_infoframe(&intel_dig_port->base, crtc_state, - HDMI_PACKET_TYPE_GAMUT_METADATA, - &infoframe_sdp, - sizeof(struct dp_sdp_header) + 2 + HDMI_DRM_INFOFRAME_SIZE); -} - -void intel_dp_vsc_enable(struct intel_dp *intel_dp, - const struct intel_crtc_state *crtc_state, - const struct drm_connector_state *conn_state) -{ - if (!intel_dp_needs_vsc_sdp(crtc_state, conn_state)) - return; - - intel_dp_setup_vsc_sdp(intel_dp, crtc_state, conn_state); -} - -void intel_dp_hdr_metadata_enable(struct intel_dp *intel_dp, - const struct intel_crtc_state *crtc_state, - const struct drm_connector_state *conn_state) -{ - if (!conn_state->hdr_output_metadata) - return; - - intel_dp_setup_hdr_metadata_infoframe_sdp(intel_dp, - crtc_state, - conn_state); -} - static u8 intel_dp_autotest_link_training(struct intel_dp *intel_dp) { int status = 0; diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h index e8f9ba962d09..6562bb8edeba 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.h +++ b/drivers/gpu/drm/i915/display/intel_dp.h @@ -110,12 +110,6 @@ int intel_dp_link_required(int pixel_clock, int bpp); int intel_dp_max_data_rate(int max_link_clock, int max_lanes); bool intel_dp_needs_vsc_sdp(const struct intel_crtc_state *crtc_state, const struct drm_connector_state *conn_state); -void intel_dp_vsc_enable(struct intel_dp *intel_dp, - const struct intel_crtc_state *crtc_state, - const struct drm_connector_state *conn_state); -void intel_dp_hdr_metadata_enable(struct intel_dp *intel_dp, - const struct intel_crtc_state *crtc_state, - const struct drm_connector_state *conn_state); void intel_dp_set_infoframes(struct intel_encoder *encoder, bool enable, const struct intel_crtc_state *crtc_state, const struct drm_connector_state *conn_state);
-----Original Message----- From: Intel-gfx intel-gfx-bounces@lists.freedesktop.org On Behalf Of Gwan- gyeong Mun Sent: Tuesday, February 4, 2020 4:50 AM To: intel-gfx@lists.freedesktop.org Cc: linux-fbdev@vger.kernel.org; dri-devel@lists.freedesktop.org Subject: [Intel-gfx] [PATCH v3 11/17] drm/i915: Program DP SDPs with computed configs
In order to use computed config for DP SDPs (DP VSC SDP and DP HDR Metadata Infoframe SDP), it replaces intel_dp_vsc_enable() function and intel_dp_hdr_metadata_enable() function to intel_dp_set_infoframes() function.
Before applying it, routines of program SDP always calculated configs when they called. And it removes unused functions.
Fix the sentence, seems unclear. With that fixed, Reviewed-by: Uma Shankar uma.shankar@intel.com
v3: Rebased
Signed-off-by: Gwan-gyeong Mun gwan-gyeong.mun@intel.com
drivers/gpu/drm/i915/display/intel_ddi.c | 3 +- drivers/gpu/drm/i915/display/intel_dp.c | 226 ----------------------- drivers/gpu/drm/i915/display/intel_dp.h | 6 - 3 files changed, 1 insertion(+), 234 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index c96f629cddc3..374ab6a3757c 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -3900,8 +3900,7 @@ static void intel_enable_ddi_dp(struct intel_encoder *encoder,
intel_edp_backlight_on(crtc_state, conn_state); intel_psr_enable(intel_dp, crtc_state);
- intel_dp_vsc_enable(intel_dp, crtc_state, conn_state);
- intel_dp_hdr_metadata_enable(intel_dp, crtc_state, conn_state);
intel_dp_set_infoframes(encoder, true, crtc_state, conn_state); intel_edp_drrs_enable(intel_dp, crtc_state);
if (crtc_state->has_audio)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index d4ece0a824c0..cffb77daec96 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -5095,232 +5095,6 @@ void intel_read_dp_sdp(struct intel_encoder *encoder, } }
-static void -intel_dp_setup_vsc_sdp(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state,const struct drm_connector_state *conn_state)-{
- struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
- struct dp_sdp vsc_sdp = {};
- /* Prepare VSC Header for SU as per DP 1.4a spec, Table 2-119 */
- vsc_sdp.sdp_header.HB0 = 0;
- vsc_sdp.sdp_header.HB1 = 0x7;
- /*
* VSC SDP supporting 3D stereo, PSR2, and Pixel Encoding/* Colorimetry Format indication.*/- vsc_sdp.sdp_header.HB2 = 0x5;
- /*
* VSC SDP supporting 3D stereo, + PSR2, + Pixel Encoding/* Colorimetry Format indication (HB2 = 05h).*/- vsc_sdp.sdp_header.HB3 = 0x13;
- /* DP 1.4a spec, Table 2-120 */
- switch (crtc_state->output_format) {
- case INTEL_OUTPUT_FORMAT_YCBCR444:
vsc_sdp.db[16] = 0x1 << 4; /* YCbCr 444 : DB16[7:4] = 1h */break;- case INTEL_OUTPUT_FORMAT_YCBCR420:
vsc_sdp.db[16] = 0x3 << 4; /* YCbCr 420 : DB16[7:4] = 3h */break;- case INTEL_OUTPUT_FORMAT_RGB:
- default:
/* RGB: DB16[7:4] = 0h */break;- }
- switch (conn_state->colorspace) {
- case DRM_MODE_COLORIMETRY_BT709_YCC:
vsc_sdp.db[16] |= 0x1;break;- case DRM_MODE_COLORIMETRY_XVYCC_601:
vsc_sdp.db[16] |= 0x2;break;- case DRM_MODE_COLORIMETRY_XVYCC_709:
vsc_sdp.db[16] |= 0x3;break;- case DRM_MODE_COLORIMETRY_SYCC_601:
vsc_sdp.db[16] |= 0x4;break;- case DRM_MODE_COLORIMETRY_OPYCC_601:
vsc_sdp.db[16] |= 0x5;break;- case DRM_MODE_COLORIMETRY_BT2020_CYCC:
- case DRM_MODE_COLORIMETRY_BT2020_RGB:
vsc_sdp.db[16] |= 0x6;break;- case DRM_MODE_COLORIMETRY_BT2020_YCC:
vsc_sdp.db[16] |= 0x7;break;- case DRM_MODE_COLORIMETRY_DCI_P3_RGB_D65:
- case DRM_MODE_COLORIMETRY_DCI_P3_RGB_THEATER:
vsc_sdp.db[16] |= 0x4; /* DCI-P3 (SMPTE RP 431-2) */break;- default:
/* sRGB (IEC 61966-2-1) / ITU-R BT.601: DB16[0:3] = 0h *//* RGB->YCBCR color conversion uses the BT.709 color space. */if (crtc_state->output_format ==INTEL_OUTPUT_FORMAT_YCBCR420)
vsc_sdp.db[16] |= 0x1; /* 0x1, ITU-R BT.709 */break;- }
- /*
* For pixel encoding formats YCbCr444, YCbCr422, YCbCr420, and Y Only,* the following Component Bit Depth values are defined:* 001b = 8bpc.* 010b = 10bpc.* 011b = 12bpc.* 100b = 16bpc.*/- switch (crtc_state->pipe_bpp) {
- case 24: /* 8bpc */
vsc_sdp.db[17] = 0x1;break;- case 30: /* 10bpc */
vsc_sdp.db[17] = 0x2;break;- case 36: /* 12bpc */
vsc_sdp.db[17] = 0x3;break;- case 48: /* 16bpc */
vsc_sdp.db[17] = 0x4;break;- default:
MISSING_CASE(crtc_state->pipe_bpp);break;- }
- /*
* Dynamic Range (Bit 7)* 0 = VESA range, 1 = CTA range.* all YCbCr are always limited range*/- vsc_sdp.db[17] |= 0x80;
- /*
* Content Type (Bits 2:0)* 000b = Not defined.* 001b = Graphics.* 010b = Photo.* 011b = Video.* 100b = Game* All other values are RESERVED.* Note: See CTA-861-G for the definition and expected* processing by a stream sink for the above contect types.*/- vsc_sdp.db[18] = 0;
- intel_dig_port->write_infoframe(&intel_dig_port->base,
crtc_state, DP_SDP_VSC, &vsc_sdp, sizeof(vsc_sdp));-}
-static void -intel_dp_setup_hdr_metadata_infoframe_sdp(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state,const struct drm_connector_state*conn_state) -{
- struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
- struct dp_sdp infoframe_sdp = {};
- struct hdmi_drm_infoframe drm_infoframe = {};
- const int infoframe_size = HDMI_INFOFRAME_HEADER_SIZE +
HDMI_DRM_INFOFRAME_SIZE;
- unsigned char buf[HDMI_INFOFRAME_HEADER_SIZE +
HDMI_DRM_INFOFRAME_SIZE];
- ssize_t len;
- int ret;
- ret = drm_hdmi_infoframe_set_hdr_metadata(&drm_infoframe,
conn_state);
- if (ret) {
DRM_DEBUG_KMS("couldn't set HDR metadata in infoframe\n");return;- }
- len = hdmi_drm_infoframe_pack_only(&drm_infoframe, buf, sizeof(buf));
- if (len < 0) {
DRM_DEBUG_KMS("buffer size is smaller than hdr metadatainfoframe\n");
return;- }
- if (len != infoframe_size) {
DRM_DEBUG_KMS("wrong static hdr metadata size\n");return;- }
- /*
* Set up the infoframe sdp packet for HDR static metadata.* Prepare VSC Header for SU as per DP 1.4a spec,* Table 2-100 and Table 2-101*/- /* Packet ID, 00h for non-Audio INFOFRAME */
- infoframe_sdp.sdp_header.HB0 = 0;
- /*
* Packet Type 80h + Non-audio INFOFRAME Type value* HDMI_INFOFRAME_TYPE_DRM: 0x87,*/- infoframe_sdp.sdp_header.HB1 = drm_infoframe.type;
- /*
* Least Significant Eight Bits of (Data Byte Count – 1)* infoframe_size - 1,*/- infoframe_sdp.sdp_header.HB2 = 0x1D;
- /* INFOFRAME SDP Version Number */
- infoframe_sdp.sdp_header.HB3 = (0x13 << 2);
- /* CTA Header Byte 2 (INFOFRAME Version Number) */
- infoframe_sdp.db[0] = drm_infoframe.version;
- /* CTA Header Byte 3 (Length of INFOFRAME):
HDMI_DRM_INFOFRAME_SIZE */
- infoframe_sdp.db[1] = drm_infoframe.length;
- /*
* Copy HDMI_DRM_INFOFRAME_SIZE size from a buffer after* HDMI_INFOFRAME_HEADER_SIZE*/- BUILD_BUG_ON(sizeof(infoframe_sdp.db) < HDMI_DRM_INFOFRAME_SIZE
- 2);
- memcpy(&infoframe_sdp.db[2], &buf[HDMI_INFOFRAME_HEADER_SIZE],
HDMI_DRM_INFOFRAME_SIZE);- /*
* Size of DP infoframe sdp packet for HDR static metadata is consist of* - DP SDP Header(struct dp_sdp_header): 4 bytes* - Two Data Blocks: 2 bytes* CTA Header Byte2 (INFOFRAME Version Number)* CTA Header Byte3 (Length of INFOFRAME)* - HDMI_DRM_INFOFRAME_SIZE: 26 bytes** Prior to GEN11's GMP register size is identical to DP HDR static metadata* infoframe size. But GEN11+ has larger than that size, write_infoframe* will pad rest of the size.*/- intel_dig_port->write_infoframe(&intel_dig_port->base, crtc_state,
HDMI_PACKET_TYPE_GAMUT_METADATA,&infoframe_sdp,sizeof(struct dp_sdp_header) + 2 +HDMI_DRM_INFOFRAME_SIZE); -}
-void intel_dp_vsc_enable(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state,const struct drm_connector_state *conn_state)-{
- if (!intel_dp_needs_vsc_sdp(crtc_state, conn_state))
return;- intel_dp_setup_vsc_sdp(intel_dp, crtc_state, conn_state);
-}
-void intel_dp_hdr_metadata_enable(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state,const struct drm_connector_state *conn_state)-{
- if (!conn_state->hdr_output_metadata)
return;- intel_dp_setup_hdr_metadata_infoframe_sdp(intel_dp,
crtc_state,conn_state);-}
static u8 intel_dp_autotest_link_training(struct intel_dp *intel_dp) { int status = 0; diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h index e8f9ba962d09..6562bb8edeba 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.h +++ b/drivers/gpu/drm/i915/display/intel_dp.h @@ -110,12 +110,6 @@ int intel_dp_link_required(int pixel_clock, int bpp); int intel_dp_max_data_rate(int max_link_clock, int max_lanes); bool intel_dp_needs_vsc_sdp(const struct intel_crtc_state *crtc_state, const struct drm_connector_state *conn_state); -void intel_dp_vsc_enable(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state,const struct drm_connector_state *conn_state);-void intel_dp_hdr_metadata_enable(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state,const struct drm_connector_state *conn_state);void intel_dp_set_infoframes(struct intel_encoder *encoder, bool enable, const struct intel_crtc_state *crtc_state, const struct drm_connector_state *conn_state); -- 2.24.1
Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
On Wed, 2020-02-05 at 22:21 +0530, Shankar, Uma wrote:
-----Original Message----- From: Intel-gfx intel-gfx-bounces@lists.freedesktop.org On Behalf Of Gwan- gyeong Mun Sent: Tuesday, February 4, 2020 4:50 AM To: intel-gfx@lists.freedesktop.org Cc: linux-fbdev@vger.kernel.org; dri-devel@lists.freedesktop.org Subject: [Intel-gfx] [PATCH v3 11/17] drm/i915: Program DP SDPs with computed configs
In order to use computed config for DP SDPs (DP VSC SDP and DP HDR Metadata Infoframe SDP), it replaces intel_dp_vsc_enable() function and intel_dp_hdr_metadata_enable() function to intel_dp_set_infoframes() function.
Before applying it, routines of program SDP always calculated configs when they called. And it removes unused functions.
Fix the sentence, seems unclear. With that fixed,
Okay, I'll update with the condition of before / after.
Reviewed-by: Uma Shankar uma.shankar@intel.com
v3: Rebased
Signed-off-by: Gwan-gyeong Mun gwan-gyeong.mun@intel.com
drivers/gpu/drm/i915/display/intel_ddi.c | 3 +- drivers/gpu/drm/i915/display/intel_dp.c | 226 -----------------
drivers/gpu/drm/i915/display/intel_dp.h | 6 - 3 files changed, 1 insertion(+), 234 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index c96f629cddc3..374ab6a3757c 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -3900,8 +3900,7 @@ static void intel_enable_ddi_dp(struct intel_encoder *encoder,
intel_edp_backlight_on(crtc_state, conn_state); intel_psr_enable(intel_dp, crtc_state);
- intel_dp_vsc_enable(intel_dp, crtc_state, conn_state);
- intel_dp_hdr_metadata_enable(intel_dp, crtc_state, conn_state);
intel_dp_set_infoframes(encoder, true, crtc_state, conn_state); intel_edp_drrs_enable(intel_dp, crtc_state);
if (crtc_state->has_audio)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index d4ece0a824c0..cffb77daec96 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -5095,232 +5095,6 @@ void intel_read_dp_sdp(struct intel_encoder *encoder, } }
-static void -intel_dp_setup_vsc_sdp(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state,const struct drm_connector_state *conn_state)-{
- struct intel_digital_port *intel_dig_port =
dp_to_dig_port(intel_dp);
- struct dp_sdp vsc_sdp = {};
- /* Prepare VSC Header for SU as per DP 1.4a spec, Table 2-119
*/
- vsc_sdp.sdp_header.HB0 = 0;
- vsc_sdp.sdp_header.HB1 = 0x7;
- /*
* VSC SDP supporting 3D stereo, PSR2, and Pixel Encoding/* Colorimetry Format indication.*/- vsc_sdp.sdp_header.HB2 = 0x5;
- /*
* VSC SDP supporting 3D stereo, + PSR2, + Pixel Encoding/* Colorimetry Format indication (HB2 = 05h).*/- vsc_sdp.sdp_header.HB3 = 0x13;
- /* DP 1.4a spec, Table 2-120 */
- switch (crtc_state->output_format) {
- case INTEL_OUTPUT_FORMAT_YCBCR444:
vsc_sdp.db[16] = 0x1 << 4; /* YCbCr 444 : DB16[7:4] =1h */
break;- case INTEL_OUTPUT_FORMAT_YCBCR420:
vsc_sdp.db[16] = 0x3 << 4; /* YCbCr 420 : DB16[7:4] =3h */
break;- case INTEL_OUTPUT_FORMAT_RGB:
- default:
/* RGB: DB16[7:4] = 0h */break;- }
- switch (conn_state->colorspace) {
- case DRM_MODE_COLORIMETRY_BT709_YCC:
vsc_sdp.db[16] |= 0x1;break;- case DRM_MODE_COLORIMETRY_XVYCC_601:
vsc_sdp.db[16] |= 0x2;break;- case DRM_MODE_COLORIMETRY_XVYCC_709:
vsc_sdp.db[16] |= 0x3;break;- case DRM_MODE_COLORIMETRY_SYCC_601:
vsc_sdp.db[16] |= 0x4;break;- case DRM_MODE_COLORIMETRY_OPYCC_601:
vsc_sdp.db[16] |= 0x5;break;- case DRM_MODE_COLORIMETRY_BT2020_CYCC:
- case DRM_MODE_COLORIMETRY_BT2020_RGB:
vsc_sdp.db[16] |= 0x6;break;- case DRM_MODE_COLORIMETRY_BT2020_YCC:
vsc_sdp.db[16] |= 0x7;break;- case DRM_MODE_COLORIMETRY_DCI_P3_RGB_D65:
- case DRM_MODE_COLORIMETRY_DCI_P3_RGB_THEATER:
vsc_sdp.db[16] |= 0x4; /* DCI-P3 (SMPTE RP 431-2) */break;- default:
/* sRGB (IEC 61966-2-1) / ITU-R BT.601: DB16[0:3] = 0h*/
/* RGB->YCBCR color conversion uses the BT.709 colorspace. */
if (crtc_state->output_format ==INTEL_OUTPUT_FORMAT_YCBCR420)
vsc_sdp.db[16] |= 0x1; /* 0x1, ITU-R BT.709 */break;- }
- /*
* For pixel encoding formats YCbCr444, YCbCr422, YCbCr420, andY Only,
* the following Component Bit Depth values are defined:* 001b = 8bpc.* 010b = 10bpc.* 011b = 12bpc.* 100b = 16bpc.*/- switch (crtc_state->pipe_bpp) {
- case 24: /* 8bpc */
vsc_sdp.db[17] = 0x1;break;- case 30: /* 10bpc */
vsc_sdp.db[17] = 0x2;break;- case 36: /* 12bpc */
vsc_sdp.db[17] = 0x3;break;- case 48: /* 16bpc */
vsc_sdp.db[17] = 0x4;break;- default:
MISSING_CASE(crtc_state->pipe_bpp);break;- }
- /*
* Dynamic Range (Bit 7)* 0 = VESA range, 1 = CTA range.* all YCbCr are always limited range*/- vsc_sdp.db[17] |= 0x80;
- /*
* Content Type (Bits 2:0)* 000b = Not defined.* 001b = Graphics.* 010b = Photo.* 011b = Video.* 100b = Game* All other values are RESERVED.* Note: See CTA-861-G for the definition and expected* processing by a stream sink for the above contect types.*/- vsc_sdp.db[18] = 0;
- intel_dig_port->write_infoframe(&intel_dig_port->base,
crtc_state, DP_SDP_VSC, &vsc_sdp,sizeof(vsc_sdp)); -}
-static void -intel_dp_setup_hdr_metadata_infoframe_sdp(struct intel_dp *intel_dp,
const struct intel_crtc_state*crtc_state,
const structdrm_connector_state *conn_state) -{
- struct intel_digital_port *intel_dig_port =
dp_to_dig_port(intel_dp);
- struct dp_sdp infoframe_sdp = {};
- struct hdmi_drm_infoframe drm_infoframe = {};
- const int infoframe_size = HDMI_INFOFRAME_HEADER_SIZE +
HDMI_DRM_INFOFRAME_SIZE;
- unsigned char buf[HDMI_INFOFRAME_HEADER_SIZE +
HDMI_DRM_INFOFRAME_SIZE];
- ssize_t len;
- int ret;
- ret = drm_hdmi_infoframe_set_hdr_metadata(&drm_infoframe,
conn_state);
- if (ret) {
DRM_DEBUG_KMS("couldn't set HDR metadata ininfoframe\n");
return;- }
- len = hdmi_drm_infoframe_pack_only(&drm_infoframe, buf,
sizeof(buf));
- if (len < 0) {
DRM_DEBUG_KMS("buffer size is smaller than hdr metadatainfoframe\n");
return;- }
- if (len != infoframe_size) {
DRM_DEBUG_KMS("wrong static hdr metadata size\n");return;- }
- /*
* Set up the infoframe sdp packet for HDR static metadata.* Prepare VSC Header for SU as per DP 1.4a spec,* Table 2-100 and Table 2-101*/- /* Packet ID, 00h for non-Audio INFOFRAME */
- infoframe_sdp.sdp_header.HB0 = 0;
- /*
* Packet Type 80h + Non-audio INFOFRAME Type value* HDMI_INFOFRAME_TYPE_DRM: 0x87,*/- infoframe_sdp.sdp_header.HB1 = drm_infoframe.type;
- /*
* Least Significant Eight Bits of (Data Byte Count – 1)* infoframe_size - 1,*/- infoframe_sdp.sdp_header.HB2 = 0x1D;
- /* INFOFRAME SDP Version Number */
- infoframe_sdp.sdp_header.HB3 = (0x13 << 2);
- /* CTA Header Byte 2 (INFOFRAME Version Number) */
- infoframe_sdp.db[0] = drm_infoframe.version;
- /* CTA Header Byte 3 (Length of INFOFRAME):
HDMI_DRM_INFOFRAME_SIZE */
- infoframe_sdp.db[1] = drm_infoframe.length;
- /*
* Copy HDMI_DRM_INFOFRAME_SIZE size from a buffer after* HDMI_INFOFRAME_HEADER_SIZE*/- BUILD_BUG_ON(sizeof(infoframe_sdp.db) < HDMI_DRM_INFOFRAME_SIZE
- 2);
- memcpy(&infoframe_sdp.db[2], &buf[HDMI_INFOFRAME_HEADER_SIZE],
HDMI_DRM_INFOFRAME_SIZE);- /*
* Size of DP infoframe sdp packet for HDR static metadata isconsist of
* - DP SDP Header(struct dp_sdp_header): 4 bytes* - Two Data Blocks: 2 bytes* CTA Header Byte2 (INFOFRAME Version Number)* CTA Header Byte3 (Length of INFOFRAME)* - HDMI_DRM_INFOFRAME_SIZE: 26 bytes** Prior to GEN11's GMP register size is identical to DP HDRstatic metadata
* infoframe size. But GEN11+ has larger than that size,write_infoframe
* will pad rest of the size.*/- intel_dig_port->write_infoframe(&intel_dig_port->base,
crtc_state,
HDMI_PACKET_TYPE_GAMUT_METADATA,
&infoframe_sdp,sizeof(struct dp_sdp_header) +2 + HDMI_DRM_INFOFRAME_SIZE); -}
-void intel_dp_vsc_enable(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state,const struct drm_connector_state *conn_state)-{
- if (!intel_dp_needs_vsc_sdp(crtc_state, conn_state))
return;- intel_dp_setup_vsc_sdp(intel_dp, crtc_state, conn_state);
-}
-void intel_dp_hdr_metadata_enable(struct intel_dp *intel_dp,
const struct intel_crtc_state*crtc_state,
const struct drm_connector_state*conn_state) -{
- if (!conn_state->hdr_output_metadata)
return;- intel_dp_setup_hdr_metadata_infoframe_sdp(intel_dp,
crtc_state,conn_state);-}
static u8 intel_dp_autotest_link_training(struct intel_dp *intel_dp) { int status = 0; diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h index e8f9ba962d09..6562bb8edeba 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.h +++ b/drivers/gpu/drm/i915/display/intel_dp.h @@ -110,12 +110,6 @@ int intel_dp_link_required(int pixel_clock, int bpp); int intel_dp_max_data_rate(int max_link_clock, int max_lanes); bool intel_dp_needs_vsc_sdp(const struct intel_crtc_state *crtc_state, const struct drm_connector_state *conn_state); -void intel_dp_vsc_enable(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state,const struct drm_connector_state *conn_state);-void intel_dp_hdr_metadata_enable(struct intel_dp *intel_dp,
const struct intel_crtc_state*crtc_state,
const struct drm_connector_state*conn_state); void intel_dp_set_infoframes(struct intel_encoder *encoder, bool enable, const struct intel_crtc_state *crtc_state, const struct drm_connector_state
*conn_state);
2.24.1
Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Added state readout for DP HDR Metadata Infoframe SDP.
Signed-off-by: Gwan-gyeong Mun gwan-gyeong.mun@intel.com --- drivers/gpu/drm/i915/display/intel_ddi.c | 8 ++++++++ 1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 374ab6a3757c..a9eaf7a6bc15 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -4322,6 +4322,9 @@ void intel_ddi_get_config(struct intel_encoder *encoder, pipe_config->fec_enable); }
+ pipe_config->infoframes.enable |= + intel_hdmi_infoframes_enabled(encoder, pipe_config); + break; case TRANS_DDI_MODE_SELECT_DP_MST: pipe_config->output_types |= BIT(INTEL_OUTPUT_DP_MST); @@ -4333,6 +4336,9 @@ void intel_ddi_get_config(struct intel_encoder *encoder, REG_FIELD_GET(TRANS_DDI_MST_TRANSPORT_SELECT_MASK, temp);
intel_dp_get_m_n(intel_crtc, pipe_config); + + pipe_config->infoframes.enable |= + intel_hdmi_infoframes_enabled(encoder, pipe_config); break; default: break; @@ -4383,6 +4389,8 @@ void intel_ddi_get_config(struct intel_encoder *encoder, intel_read_infoframe(encoder, pipe_config, HDMI_INFOFRAME_TYPE_DRM, &pipe_config->infoframes.drm); + + intel_read_dp_sdp(encoder, pipe_config, HDMI_PACKET_TYPE_GAMUT_METADATA); }
static enum intel_output_type
-----Original Message----- From: Intel-gfx intel-gfx-bounces@lists.freedesktop.org On Behalf Of Gwan- gyeong Mun Sent: Tuesday, February 4, 2020 4:50 AM To: intel-gfx@lists.freedesktop.org Cc: linux-fbdev@vger.kernel.org; dri-devel@lists.freedesktop.org Subject: [Intel-gfx] [PATCH v3 12/17] drm/i915: Add state readout for DP HDR Metadata Infoframe SDP
Added state readout for DP HDR Metadata Infoframe SDP.
Looks good. Reviewed-by: Uma Shankar uma.shankar@intel.com
Signed-off-by: Gwan-gyeong Mun gwan-gyeong.mun@intel.com
drivers/gpu/drm/i915/display/intel_ddi.c | 8 ++++++++ 1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 374ab6a3757c..a9eaf7a6bc15 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -4322,6 +4322,9 @@ void intel_ddi_get_config(struct intel_encoder *encoder, pipe_config->fec_enable); }
pipe_config->infoframes.enable |=intel_hdmi_infoframes_enabled(encoder, pipe_config);- break; case TRANS_DDI_MODE_SELECT_DP_MST: pipe_config->output_types |= BIT(INTEL_OUTPUT_DP_MST); @@ -
4333,6 +4336,9 @@ void intel_ddi_get_config(struct intel_encoder *encoder,
REG_FIELD_GET(TRANS_DDI_MST_TRANSPORT_SELECT_MASK, temp);
intel_dp_get_m_n(intel_crtc, pipe_config);
pipe_config->infoframes.enable |=intel_hdmi_infoframes_enabled(encoder, pipe_config);@@ -4383,6 +4389,8 @@ void intel_ddi_get_config(struct intel_encoder *encoder, intel_read_infoframe(encoder, pipe_config, HDMI_INFOFRAME_TYPE_DRM, &pipe_config->infoframes.drm);
- intel_read_dp_sdp(encoder, pipe_config,
+HDMI_PACKET_TYPE_GAMUT_METADATA); }
static enum intel_output_type
2.24.1
Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Added state readout for DP VSC SDP and enabled state validation for DP VSC SDP.
v2: Minor style fix v3: Replace a structure name to drm_dp_vsc_sdp from intel_dp_vsc_sdp
Signed-off-by: Gwan-gyeong Mun gwan-gyeong.mun@intel.com --- drivers/gpu/drm/i915/display/intel_ddi.c | 1 + drivers/gpu/drm/i915/display/intel_display.c | 42 ++++++++++++++++++++ 2 files changed, 43 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index a9eaf7a6bc15..64e4edefa998 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -4391,6 +4391,7 @@ void intel_ddi_get_config(struct intel_encoder *encoder, &pipe_config->infoframes.drm);
intel_read_dp_sdp(encoder, pipe_config, HDMI_PACKET_TYPE_GAMUT_METADATA); + intel_read_dp_sdp(encoder, pipe_config, DP_SDP_VSC); }
static enum intel_output_type diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 4f187fd330e8..02471c7aa6e7 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -13503,6 +13503,13 @@ intel_compare_infoframe(const union hdmi_infoframe *a, return memcmp(a, b, sizeof(*a)) == 0; }
+static bool +intel_compare_dp_vsc_sdp(const struct drm_dp_vsc_sdp *a, + const struct drm_dp_vsc_sdp *b) +{ + return memcmp(a, b, sizeof(*a)) == 0; +} + static void pipe_config_infoframe_mismatch(struct drm_i915_private *dev_priv, bool fastset, const char *name, @@ -13528,6 +13535,30 @@ pipe_config_infoframe_mismatch(struct drm_i915_private *dev_priv, } }
+static void +pipe_config_dp_vsc_sdp_mismatch(struct drm_i915_private *dev_priv, + bool fastset, const char *name, + const struct drm_dp_vsc_sdp *a, + const struct drm_dp_vsc_sdp *b) +{ + if (fastset) { + if (!drm_debug_enabled(DRM_UT_KMS)) + return; + + DRM_DEBUG_KMS("fastset mismatch in %s dp sdp\n", name); + DRM_DEBUG_KMS("expected:\n"); + drm_dp_vsc_sdp_log(KERN_DEBUG, dev_priv->drm.dev, a); + DRM_DEBUG_KMS("found:\n"); + drm_dp_vsc_sdp_log(KERN_DEBUG, dev_priv->drm.dev, b); + } else { + DRM_ERROR("mismatch in %s dp sdp\n", name); + DRM_ERROR("expected:\n"); + drm_dp_vsc_sdp_log(KERN_ERR, dev_priv->drm.dev, a); + DRM_ERROR("found:\n"); + drm_dp_vsc_sdp_log(KERN_ERR, dev_priv->drm.dev, b); + } +} + static void __printf(4, 5) pipe_config_mismatch(bool fastset, const struct intel_crtc *crtc, const char *name, const char *format, ...) @@ -13729,6 +13760,16 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, } \ } while (0)
+#define PIPE_CONF_CHECK_DP_VSC_SDP(name) do { \ + if (!intel_compare_dp_vsc_sdp(¤t_config->infoframes.name, \ + &pipe_config->infoframes.name)) { \ + pipe_config_dp_vsc_sdp_mismatch(dev_priv, fastset, __stringify(name), \ + ¤t_config->infoframes.name, \ + &pipe_config->infoframes.name); \ + ret = false; \ + } \ +} while (0) + #define PIPE_CONF_CHECK_COLOR_LUT(name1, name2, bit_precision) do { \ if (current_config->name1 != pipe_config->name1) { \ pipe_config_mismatch(fastset, crtc, __stringify(name1), \ @@ -13902,6 +13943,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, PIPE_CONF_CHECK_INFOFRAME(spd); PIPE_CONF_CHECK_INFOFRAME(hdmi); PIPE_CONF_CHECK_INFOFRAME(drm); + PIPE_CONF_CHECK_DP_VSC_SDP(vsc);
PIPE_CONF_CHECK_X(sync_mode_slaves_mask); PIPE_CONF_CHECK_I(master_transcoder);
-----Original Message----- From: dri-devel dri-devel-bounces@lists.freedesktop.org On Behalf Of Gwan- gyeong Mun Sent: Tuesday, February 4, 2020 4:50 AM To: intel-gfx@lists.freedesktop.org Cc: linux-fbdev@vger.kernel.org; dri-devel@lists.freedesktop.org Subject: [PATCH v3 13/17] drm/i915: Add state readout for DP VSC SDP
Added state readout for DP VSC SDP and enabled state validation for DP VSC SDP.
v2: Minor style fix v3: Replace a structure name to drm_dp_vsc_sdp from intel_dp_vsc_sdp
Looks good. Reviewed-by: Uma Shankar uma.shankar@intel.com
Signed-off-by: Gwan-gyeong Mun gwan-gyeong.mun@intel.com
drivers/gpu/drm/i915/display/intel_ddi.c | 1 + drivers/gpu/drm/i915/display/intel_display.c | 42 ++++++++++++++++++++ 2 files changed, 43 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index a9eaf7a6bc15..64e4edefa998 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -4391,6 +4391,7 @@ void intel_ddi_get_config(struct intel_encoder *encoder, &pipe_config->infoframes.drm);
intel_read_dp_sdp(encoder, pipe_config, HDMI_PACKET_TYPE_GAMUT_METADATA);
- intel_read_dp_sdp(encoder, pipe_config, DP_SDP_VSC);
}
static enum intel_output_type diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 4f187fd330e8..02471c7aa6e7 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -13503,6 +13503,13 @@ intel_compare_infoframe(const union hdmi_infoframe *a, return memcmp(a, b, sizeof(*a)) == 0; }
+static bool +intel_compare_dp_vsc_sdp(const struct drm_dp_vsc_sdp *a,
const struct drm_dp_vsc_sdp *b)+{
- return memcmp(a, b, sizeof(*a)) == 0;
+}
static void pipe_config_infoframe_mismatch(struct drm_i915_private *dev_priv, bool fastset, const char *name, @@ -13528,6 +13535,30 @@ pipe_config_infoframe_mismatch(struct drm_i915_private *dev_priv, } }
+static void +pipe_config_dp_vsc_sdp_mismatch(struct drm_i915_private *dev_priv,
bool fastset, const char *name,const struct drm_dp_vsc_sdp *a,const struct drm_dp_vsc_sdp *b)+{
- if (fastset) {
if (!drm_debug_enabled(DRM_UT_KMS))return;DRM_DEBUG_KMS("fastset mismatch in %s dp sdp\n", name);DRM_DEBUG_KMS("expected:\n");drm_dp_vsc_sdp_log(KERN_DEBUG, dev_priv->drm.dev, a);DRM_DEBUG_KMS("found:\n");drm_dp_vsc_sdp_log(KERN_DEBUG, dev_priv->drm.dev, b);- } else {
DRM_ERROR("mismatch in %s dp sdp\n", name);DRM_ERROR("expected:\n");drm_dp_vsc_sdp_log(KERN_ERR, dev_priv->drm.dev, a);DRM_ERROR("found:\n");drm_dp_vsc_sdp_log(KERN_ERR, dev_priv->drm.dev, b);- }
+}
static void __printf(4, 5) pipe_config_mismatch(bool fastset, const struct intel_crtc *crtc, const char *name, const char *format, ...) @@ -13729,6 +13760,16 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, } \ } while (0)
+#define PIPE_CONF_CHECK_DP_VSC_SDP(name) do { \
- if (!intel_compare_dp_vsc_sdp(¤t_config->infoframes.name, \
&pipe_config->infoframes.name)) { \pipe_config_dp_vsc_sdp_mismatch(dev_priv, fastset,__stringify(name), \
¤t_config-infoframes.name, \
&pipe_config->infoframes.name);\
ret = false; \- } \
+} while (0)
#define PIPE_CONF_CHECK_COLOR_LUT(name1, name2, bit_precision) do { \ if (current_config->name1 != pipe_config->name1) { \ pipe_config_mismatch(fastset, crtc, __stringify(name1), \ @@ - 13902,6 +13943,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, PIPE_CONF_CHECK_INFOFRAME(spd); PIPE_CONF_CHECK_INFOFRAME(hdmi); PIPE_CONF_CHECK_INFOFRAME(drm);
PIPE_CONF_CHECK_DP_VSC_SDP(vsc);
PIPE_CONF_CHECK_X(sync_mode_slaves_mask); PIPE_CONF_CHECK_I(master_transcoder);
-- 2.24.1
dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Call intel_dp_set_infoframes() function on pipe updates to make sure that we send VSC SDP and HDR Metadata Infoframe SDP (when applicable) on fastsets.
Signed-off-by: Gwan-gyeong Mun gwan-gyeong.mun@intel.com --- drivers/gpu/drm/i915/display/intel_ddi.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 64e4edefa998..69073a15edb8 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -4062,6 +4062,7 @@ static void intel_ddi_update_pipe_dp(struct intel_encoder *encoder, intel_ddi_set_dp_msa(crtc_state, conn_state);
intel_psr_update(intel_dp, crtc_state); + intel_dp_set_infoframes(encoder, true, crtc_state, conn_state); intel_edp_drrs_enable(intel_dp, crtc_state);
intel_panel_update_backlight(encoder, crtc_state, conn_state);
-----Original Message----- From: dri-devel dri-devel-bounces@lists.freedesktop.org On Behalf Of Gwan- gyeong Mun Sent: Tuesday, February 4, 2020 4:50 AM To: intel-gfx@lists.freedesktop.org Cc: linux-fbdev@vger.kernel.org; dri-devel@lists.freedesktop.org Subject: [PATCH v3 14/17] drm/i915: Program DP SDPs on pipe updates
Call intel_dp_set_infoframes() function on pipe updates to make sure that we send VSC SDP and HDR Metadata Infoframe SDP (when applicable) on fastsets.
Looks good to me. Reviewed-by: Uma Shankar uma.shankar@intel.com
Signed-off-by: Gwan-gyeong Mun gwan-gyeong.mun@intel.com
drivers/gpu/drm/i915/display/intel_ddi.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 64e4edefa998..69073a15edb8 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -4062,6 +4062,7 @@ static void intel_ddi_update_pipe_dp(struct intel_encoder *encoder, intel_ddi_set_dp_msa(crtc_state, conn_state);
intel_psr_update(intel_dp, crtc_state);
intel_dp_set_infoframes(encoder, true, crtc_state, conn_state); intel_edp_drrs_enable(intel_dp, crtc_state);
intel_panel_update_backlight(encoder, crtc_state, conn_state);
-- 2.24.1
dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Call intel_dp_set_infoframes(false) function on intel_ddi_post_disable_dp() to make sure not to send VSC SDP and HDR Metadata Infoframe SDP.
Signed-off-by: Gwan-gyeong Mun gwan-gyeong.mun@intel.com --- drivers/gpu/drm/i915/display/intel_ddi.c | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 69073a15edb8..8509cd33569e 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -3713,6 +3713,8 @@ static void intel_ddi_post_disable_dp(struct intel_encoder *encoder, INTEL_OUTPUT_DP_MST); enum phy phy = intel_port_to_phy(dev_priv, encoder->port);
+ intel_dp_set_infoframes(encoder, false, old_crtc_state, old_conn_state); + /* * Power down sink before disabling the port, otherwise we end * up getting interrupts from the sink on detecting link loss.
-----Original Message----- From: dri-devel dri-devel-bounces@lists.freedesktop.org On Behalf Of Gwan- gyeong Mun Sent: Tuesday, February 4, 2020 4:50 AM To: intel-gfx@lists.freedesktop.org Cc: linux-fbdev@vger.kernel.org; dri-devel@lists.freedesktop.org Subject: [PATCH v3 15/17] drm/i915: Stop sending DP SDPs on intel_ddi_post_disable_dp()
Just say " Stop sending DP SDPs on ddi disable"
Call intel_dp_set_infoframes(false) function on intel_ddi_post_disable_dp() to make sure not to send VSC SDP and HDR Metadata Infoframe SDP.
With the above fixed. Reviewed-by: Uma Shankar uma.shankar@intel.com
Signed-off-by: Gwan-gyeong Mun gwan-gyeong.mun@intel.com
drivers/gpu/drm/i915/display/intel_ddi.c | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 69073a15edb8..8509cd33569e 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -3713,6 +3713,8 @@ static void intel_ddi_post_disable_dp(struct intel_encoder *encoder, INTEL_OUTPUT_DP_MST); enum phy phy = intel_port_to_phy(dev_priv, encoder->port);
- intel_dp_set_infoframes(encoder, false, old_crtc_state,
+old_conn_state);
- /*
- Power down sink before disabling the port, otherwise we end
- up getting interrupts from the sink on detecting link loss.
-- 2.24.1
dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
In order to use a common VSC SDP Colorimetry calculating code on PSR, it adds a compute routine for PSR VSC SDP. As PSR routine can not use infoframes.vsc of crtc state, it also adds new writing of DP SDPs (Secondary Data Packet) for PSR. PSR routine has its own scenario and timings of writing a VSC SDP.
v3: Replace a structure name to drm_dp_vsc_sdp from intel_dp_vsc_sdp
Signed-off-by: Gwan-gyeong Mun gwan-gyeong.mun@intel.com --- drivers/gpu/drm/i915/display/intel_dp.c | 53 +++++++++++++++++++++++++ drivers/gpu/drm/i915/display/intel_dp.h | 8 ++++ 2 files changed, 61 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index cffb77daec96..4d65ef36577f 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2463,6 +2463,42 @@ static void intel_dp_compute_vsc_sdp(struct intel_dp *intel_dp, &crtc_state->infoframes.vsc); }
+void intel_dp_compute_psr_vsc_sdp(struct intel_dp *intel_dp, + const struct intel_crtc_state *crtc_state, + const struct drm_connector_state *conn_state, + struct drm_dp_vsc_sdp *vsc) +{ + struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); + + vsc->sdp_type = DP_SDP_VSC; + + if (dev_priv->psr.psr2_enabled) { + if (dev_priv->psr.colorimetry_support && + intel_dp_needs_vsc_sdp(crtc_state, conn_state)) { + /* [PSR2, +Colorimetry] */ + intel_dp_compute_vsc_colorimetry(crtc_state, conn_state, + vsc); + } else { + /* + * [PSR2, -Colorimetry] + * Prepare VSC Header for SU as per eDP 1.4 spec, Table 6-11 + * 3D stereo + PSR/PSR2 + Y-coordinate. + */ + vsc->revision = 0x4; + vsc->length = 0xe; + } + } else { + /* + * [PSR1] + * Prepare VSC Header for SU as per DP 1.4 spec, Table 2-118 + * VSC SDP supporting 3D stereo + PSR (applies to eDP v1.3 or + * higher). + */ + vsc->revision = 0x2; + vsc->length = 0x8; + } +} + static void intel_dp_compute_hdr_metadata_infoframe_sdp(struct intel_crtc_state *crtc_state, const struct drm_connector_state *conn_state) @@ -4889,6 +4925,23 @@ static void intel_write_dp_sdp(struct intel_encoder *encoder, intel_dig_port->write_infoframe(encoder, crtc_state, type, &sdp, len); }
+void intel_write_dp_vsc_sdp(struct intel_encoder *encoder, + const struct intel_crtc_state *crtc_state, + struct drm_dp_vsc_sdp *vsc) +{ + struct intel_digital_port *intel_dig_port = enc_to_dig_port(encoder); + struct dp_sdp sdp = {}; + ssize_t len; + + len = intel_dp_vsc_sdp_pack(vsc, &sdp, sizeof(sdp)); + + if (WARN_ON(len < 0)) + return; + + intel_dig_port->write_infoframe(encoder, crtc_state, DP_SDP_VSC, + &sdp, len); +} + void intel_dp_set_infoframes(struct intel_encoder *encoder, bool enable, const struct intel_crtc_state *crtc_state, diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h index 6562bb8edeba..5074e52722c0 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.h +++ b/drivers/gpu/drm/i915/display/intel_dp.h @@ -18,6 +18,7 @@ struct drm_connector_state; struct drm_encoder; struct drm_i915_private; struct drm_modeset_acquire_ctx; +struct drm_dp_vsc_sdp; struct intel_connector; struct intel_crtc_state; struct intel_digital_port; @@ -110,6 +111,13 @@ int intel_dp_link_required(int pixel_clock, int bpp); int intel_dp_max_data_rate(int max_link_clock, int max_lanes); bool intel_dp_needs_vsc_sdp(const struct intel_crtc_state *crtc_state, const struct drm_connector_state *conn_state); +void intel_dp_compute_psr_vsc_sdp(struct intel_dp *intel_dp, + const struct intel_crtc_state *crtc_state, + const struct drm_connector_state *conn_state, + struct drm_dp_vsc_sdp *vsc); +void intel_write_dp_vsc_sdp(struct intel_encoder *encoder, + const struct intel_crtc_state *crtc_state, + struct drm_dp_vsc_sdp *vsc); void intel_dp_set_infoframes(struct intel_encoder *encoder, bool enable, const struct intel_crtc_state *crtc_state, const struct drm_connector_state *conn_state);
-----Original Message----- From: dri-devel dri-devel-bounces@lists.freedesktop.org On Behalf Of Gwan- gyeong Mun Sent: Tuesday, February 4, 2020 4:50 AM To: intel-gfx@lists.freedesktop.org Cc: linux-fbdev@vger.kernel.org; dri-devel@lists.freedesktop.org Subject: [PATCH v3 16/17] drm/i915/dp: Add compute routine for DP PSR VSC SDP
In order to use a common VSC SDP Colorimetry calculating code on PSR, it adds a compute routine for PSR VSC SDP. As PSR routine can not use infoframes.vsc of crtc state, it also adds new writing of DP SDPs (Secondary Data Packet) for PSR. PSR routine has its own scenario and timings of writing a VSC SDP.
v3: Replace a structure name to drm_dp_vsc_sdp from intel_dp_vsc_sdp
Looks good to me. Reviewed-by: Uma Shankar uma.shankar@intel.com
Signed-off-by: Gwan-gyeong Mun gwan-gyeong.mun@intel.com
drivers/gpu/drm/i915/display/intel_dp.c | 53 +++++++++++++++++++++++++ drivers/gpu/drm/i915/display/intel_dp.h | 8 ++++ 2 files changed, 61 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index cffb77daec96..4d65ef36577f 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2463,6 +2463,42 @@ static void intel_dp_compute_vsc_sdp(struct intel_dp *intel_dp, &crtc_state->infoframes.vsc); }
+void intel_dp_compute_psr_vsc_sdp(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state,const struct drm_connector_state *conn_state,struct drm_dp_vsc_sdp *vsc)+{
- struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
- vsc->sdp_type = DP_SDP_VSC;
- if (dev_priv->psr.psr2_enabled) {
if (dev_priv->psr.colorimetry_support &&intel_dp_needs_vsc_sdp(crtc_state, conn_state)) {/* [PSR2, +Colorimetry] */intel_dp_compute_vsc_colorimetry(crtc_state, conn_state,vsc);} else {/** [PSR2, -Colorimetry]* Prepare VSC Header for SU as per eDP 1.4 spec, Table 6-11
* 3D stereo + PSR/PSR2 + Y-coordinate.*/vsc->revision = 0x4;vsc->length = 0xe;}- } else {
/** [PSR1]* Prepare VSC Header for SU as per DP 1.4 spec, Table 2-118* VSC SDP supporting 3D stereo + PSR (applies to eDP v1.3 or* higher).*/vsc->revision = 0x2;vsc->length = 0x8;- }
+}
static void intel_dp_compute_hdr_metadata_infoframe_sdp(struct intel_crtc_state *crtc_state, const struct drm_connector_state *conn_state) @@ -4889,6 +4925,23 @@ static void intel_write_dp_sdp(struct intel_encoder *encoder, intel_dig_port->write_infoframe(encoder, crtc_state, type, &sdp, len); }
+void intel_write_dp_vsc_sdp(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,struct drm_dp_vsc_sdp *vsc)+{
- struct intel_digital_port *intel_dig_port = enc_to_dig_port(encoder);
- struct dp_sdp sdp = {};
- ssize_t len;
- len = intel_dp_vsc_sdp_pack(vsc, &sdp, sizeof(sdp));
- if (WARN_ON(len < 0))
return;- intel_dig_port->write_infoframe(encoder, crtc_state, DP_SDP_VSC,
&sdp, len);+}
void intel_dp_set_infoframes(struct intel_encoder *encoder, bool enable, const struct intel_crtc_state *crtc_state, diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h index 6562bb8edeba..5074e52722c0 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.h +++ b/drivers/gpu/drm/i915/display/intel_dp.h @@ -18,6 +18,7 @@ struct drm_connector_state; struct drm_encoder; struct drm_i915_private; struct drm_modeset_acquire_ctx; +struct drm_dp_vsc_sdp; struct intel_connector; struct intel_crtc_state; struct intel_digital_port; @@ -110,6 +111,13 @@ int intel_dp_link_required(int pixel_clock, int bpp); int intel_dp_max_data_rate(int max_link_clock, int max_lanes); bool intel_dp_needs_vsc_sdp(const struct intel_crtc_state *crtc_state, const struct drm_connector_state *conn_state); +void intel_dp_compute_psr_vsc_sdp(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state,const struct drm_connector_state *conn_state,struct drm_dp_vsc_sdp *vsc);+void intel_write_dp_vsc_sdp(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,struct drm_dp_vsc_sdp *vsc);void intel_dp_set_infoframes(struct intel_encoder *encoder, bool enable, const struct intel_crtc_state *crtc_state, const struct drm_connector_state *conn_state); -- 2.24.1
dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
In order to use a common VSC SDP Colorimetry calculating code on PSR, it uses a new psr vsc sdp compute routine. Because PSR routine has its own scenario and timings of writing a VSC SDP, the current PSR routine needs to have its own drm_dp_vsc_sdp structure member variable on struct i915_psr.
In order to calculate colorimetry information, intel_psr_update() function and intel_psr_enable() function extend a drm_connector_state argument.
There are no changes to PSR mechanism.
v3: Replace a structure name to drm_dp_vsc_sdp from intel_dp_vsc_sdp
Signed-off-by: Gwan-gyeong Mun gwan-gyeong.mun@intel.com --- drivers/gpu/drm/i915/display/intel_ddi.c | 4 +- drivers/gpu/drm/i915/display/intel_psr.c | 54 +++++++----------------- drivers/gpu/drm/i915/display/intel_psr.h | 6 ++- drivers/gpu/drm/i915/i915_drv.h | 1 + 4 files changed, 22 insertions(+), 43 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 8509cd33569e..00b46c45f6a8 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -3901,7 +3901,7 @@ static void intel_enable_ddi_dp(struct intel_encoder *encoder, intel_dp_stop_link_train(intel_dp);
intel_edp_backlight_on(crtc_state, conn_state); - intel_psr_enable(intel_dp, crtc_state); + intel_psr_enable(intel_dp, crtc_state, conn_state); intel_dp_set_infoframes(encoder, true, crtc_state, conn_state); intel_edp_drrs_enable(intel_dp, crtc_state);
@@ -4063,7 +4063,7 @@ static void intel_ddi_update_pipe_dp(struct intel_encoder *encoder,
intel_ddi_set_dp_msa(crtc_state, conn_state);
- intel_psr_update(intel_dp, crtc_state); + intel_psr_update(intel_dp, crtc_state, conn_state); intel_dp_set_infoframes(encoder, true, crtc_state, conn_state); intel_edp_drrs_enable(intel_dp, crtc_state);
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index e41ed962aa80..a4564607b6c5 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -330,39 +330,6 @@ void intel_psr_init_dpcd(struct intel_dp *intel_dp) } }
-static void intel_psr_setup_vsc(struct intel_dp *intel_dp, - const struct intel_crtc_state *crtc_state) -{ - struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); - struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); - struct dp_sdp psr_vsc; - - if (dev_priv->psr.psr2_enabled) { - /* Prepare VSC Header for SU as per EDP 1.4 spec, Table 6.11 */ - memset(&psr_vsc, 0, sizeof(psr_vsc)); - psr_vsc.sdp_header.HB0 = 0; - psr_vsc.sdp_header.HB1 = 0x7; - if (dev_priv->psr.colorimetry_support) { - psr_vsc.sdp_header.HB2 = 0x5; - psr_vsc.sdp_header.HB3 = 0x13; - } else { - psr_vsc.sdp_header.HB2 = 0x4; - psr_vsc.sdp_header.HB3 = 0xe; - } - } else { - /* Prepare VSC packet as per EDP 1.3 spec, Table 3.10 */ - memset(&psr_vsc, 0, sizeof(psr_vsc)); - psr_vsc.sdp_header.HB0 = 0; - psr_vsc.sdp_header.HB1 = 0x7; - psr_vsc.sdp_header.HB2 = 0x2; - psr_vsc.sdp_header.HB3 = 0x8; - } - - intel_dig_port->write_infoframe(&intel_dig_port->base, - crtc_state, - DP_SDP_VSC, &psr_vsc, sizeof(psr_vsc)); -} - static void hsw_psr_setup_aux(struct intel_dp *intel_dp) { struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); @@ -841,9 +808,12 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp, }
static void intel_psr_enable_locked(struct drm_i915_private *dev_priv, - const struct intel_crtc_state *crtc_state) + const struct intel_crtc_state *crtc_state, + const struct drm_connector_state *conn_state) { struct intel_dp *intel_dp = dev_priv->psr.dp; + struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); + struct intel_encoder *encoder = &intel_dig_port->base; u32 val;
WARN_ON(dev_priv->psr.enabled); @@ -881,7 +851,9 @@ static void intel_psr_enable_locked(struct drm_i915_private *dev_priv,
DRM_DEBUG_KMS("Enabling PSR%s\n", dev_priv->psr.psr2_enabled ? "2" : "1"); - intel_psr_setup_vsc(intel_dp, crtc_state); + intel_dp_compute_psr_vsc_sdp(intel_dp, crtc_state, conn_state, + &dev_priv->psr.vsc); + intel_write_dp_vsc_sdp(encoder, crtc_state, &dev_priv->psr.vsc); intel_psr_enable_sink(intel_dp); intel_psr_enable_source(intel_dp, crtc_state); dev_priv->psr.enabled = true; @@ -893,11 +865,13 @@ static void intel_psr_enable_locked(struct drm_i915_private *dev_priv, * intel_psr_enable - Enable PSR * @intel_dp: Intel DP * @crtc_state: new CRTC state + * @conn_state: new CONNECTOR state * * This function can only be called after the pipe is fully trained and enabled. */ void intel_psr_enable(struct intel_dp *intel_dp, - const struct intel_crtc_state *crtc_state) + const struct intel_crtc_state *crtc_state, + const struct drm_connector_state *conn_state) { struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
@@ -916,7 +890,7 @@ void intel_psr_enable(struct intel_dp *intel_dp, goto unlock; }
- intel_psr_enable_locked(dev_priv, crtc_state); + intel_psr_enable_locked(dev_priv, crtc_state, conn_state);
unlock: mutex_unlock(&dev_priv->psr.lock); @@ -1049,13 +1023,15 @@ static void psr_force_hw_tracking_exit(struct drm_i915_private *dev_priv) * intel_psr_update - Update PSR state * @intel_dp: Intel DP * @crtc_state: new CRTC state + * @conn_state: new CONNECTOR state * * This functions will update PSR states, disabling, enabling or switching PSR * version when executing fastsets. For full modeset, intel_psr_disable() and * intel_psr_enable() should be called instead. */ void intel_psr_update(struct intel_dp *intel_dp, - const struct intel_crtc_state *crtc_state) + const struct intel_crtc_state *crtc_state, + const struct drm_connector_state *conn_state) { struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); struct i915_psr *psr = &dev_priv->psr; @@ -1090,7 +1066,7 @@ void intel_psr_update(struct intel_dp *intel_dp, intel_psr_disable_locked(intel_dp);
if (enable) - intel_psr_enable_locked(dev_priv, crtc_state); + intel_psr_enable_locked(dev_priv, crtc_state, conn_state);
unlock: mutex_unlock(&dev_priv->psr.lock); diff --git a/drivers/gpu/drm/i915/display/intel_psr.h b/drivers/gpu/drm/i915/display/intel_psr.h index c58a1d438808..a003fb18105a 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.h +++ b/drivers/gpu/drm/i915/display/intel_psr.h @@ -17,11 +17,13 @@ struct intel_dp; #define CAN_PSR(dev_priv) (HAS_PSR(dev_priv) && dev_priv->psr.sink_support) void intel_psr_init_dpcd(struct intel_dp *intel_dp); void intel_psr_enable(struct intel_dp *intel_dp, - const struct intel_crtc_state *crtc_state); + const struct intel_crtc_state *crtc_state, + const struct drm_connector_state *conn_state); void intel_psr_disable(struct intel_dp *intel_dp, const struct intel_crtc_state *old_crtc_state); void intel_psr_update(struct intel_dp *intel_dp, - const struct intel_crtc_state *crtc_state); + const struct intel_crtc_state *crtc_state, + const struct drm_connector_state *conn_state); int intel_psr_debug_set(struct drm_i915_private *dev_priv, u64 value); void intel_psr_invalidate(struct drm_i915_private *dev_priv, unsigned frontbuffer_bits, diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index a8a08c63278e..fa2f1a18ffe0 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -504,6 +504,7 @@ struct i915_psr { u32 dc3co_exit_delay; struct delayed_work idle_work; bool initially_probed; + struct drm_dp_vsc_sdp vsc; };
#define QUIRK_LVDS_SSC_DISABLE (1<<1)
-----Original Message----- From: Intel-gfx intel-gfx-bounces@lists.freedesktop.org On Behalf Of Gwan- gyeong Mun Sent: Tuesday, February 4, 2020 4:50 AM To: intel-gfx@lists.freedesktop.org Cc: linux-fbdev@vger.kernel.org; dri-devel@lists.freedesktop.org Subject: [Intel-gfx] [PATCH v3 17/17] drm/i915/psr: Use new DP VSC SDP compute routine on PSR
In order to use a common VSC SDP Colorimetry calculating code on PSR, it uses a new psr vsc sdp compute routine. Because PSR routine has its own scenario and timings of writing a VSC SDP, the current PSR routine needs to have its own drm_dp_vsc_sdp structure member variable on struct i915_psr.
In order to calculate colorimetry information, intel_psr_update() function and intel_psr_enable() function extend a drm_connector_state argument.
There are no changes to PSR mechanism.
v3: Replace a structure name to drm_dp_vsc_sdp from intel_dp_vsc_sdp
Looks good. Reviewed-by: Uma Shankar uma.shankar@intel.com
Note: Please rebase, fix the comments and resend to trigger a full CI run.
Signed-off-by: Gwan-gyeong Mun gwan-gyeong.mun@intel.com
drivers/gpu/drm/i915/display/intel_ddi.c | 4 +- drivers/gpu/drm/i915/display/intel_psr.c | 54 +++++++----------------- drivers/gpu/drm/i915/display/intel_psr.h | 6 ++- drivers/gpu/drm/i915/i915_drv.h | 1 + 4 files changed, 22 insertions(+), 43 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 8509cd33569e..00b46c45f6a8 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -3901,7 +3901,7 @@ static void intel_enable_ddi_dp(struct intel_encoder *encoder, intel_dp_stop_link_train(intel_dp);
intel_edp_backlight_on(crtc_state, conn_state);
- intel_psr_enable(intel_dp, crtc_state);
- intel_psr_enable(intel_dp, crtc_state, conn_state); intel_dp_set_infoframes(encoder, true, crtc_state, conn_state); intel_edp_drrs_enable(intel_dp, crtc_state);
@@ -4063,7 +4063,7 @@ static void intel_ddi_update_pipe_dp(struct intel_encoder *encoder,
intel_ddi_set_dp_msa(crtc_state, conn_state);
- intel_psr_update(intel_dp, crtc_state);
- intel_psr_update(intel_dp, crtc_state, conn_state); intel_dp_set_infoframes(encoder, true, crtc_state, conn_state); intel_edp_drrs_enable(intel_dp, crtc_state);
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index e41ed962aa80..a4564607b6c5 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -330,39 +330,6 @@ void intel_psr_init_dpcd(struct intel_dp *intel_dp) } }
-static void intel_psr_setup_vsc(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state)-{
- struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
- struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
- struct dp_sdp psr_vsc;
- if (dev_priv->psr.psr2_enabled) {
/* Prepare VSC Header for SU as per EDP 1.4 spec, Table 6.11 */memset(&psr_vsc, 0, sizeof(psr_vsc));psr_vsc.sdp_header.HB0 = 0;psr_vsc.sdp_header.HB1 = 0x7;if (dev_priv->psr.colorimetry_support) {psr_vsc.sdp_header.HB2 = 0x5;psr_vsc.sdp_header.HB3 = 0x13;} else {psr_vsc.sdp_header.HB2 = 0x4;psr_vsc.sdp_header.HB3 = 0xe;}- } else {
/* Prepare VSC packet as per EDP 1.3 spec, Table 3.10 */memset(&psr_vsc, 0, sizeof(psr_vsc));psr_vsc.sdp_header.HB0 = 0;psr_vsc.sdp_header.HB1 = 0x7;psr_vsc.sdp_header.HB2 = 0x2;psr_vsc.sdp_header.HB3 = 0x8;- }
- intel_dig_port->write_infoframe(&intel_dig_port->base,
crtc_state,DP_SDP_VSC, &psr_vsc, sizeof(psr_vsc));-}
static void hsw_psr_setup_aux(struct intel_dp *intel_dp) { struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); @@ -841,9 +808,12 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp, }
static void intel_psr_enable_locked(struct drm_i915_private *dev_priv,
const struct intel_crtc_state *crtc_state)
const struct intel_crtc_state *crtc_state,const struct drm_connector_state *conn_state){ struct intel_dp *intel_dp = dev_priv->psr.dp;
struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
struct intel_encoder *encoder = &intel_dig_port->base; u32 val;
WARN_ON(dev_priv->psr.enabled);
@@ -881,7 +851,9 @@ static void intel_psr_enable_locked(struct drm_i915_private *dev_priv,
DRM_DEBUG_KMS("Enabling PSR%s\n", dev_priv->psr.psr2_enabled ? "2" : "1");
- intel_psr_setup_vsc(intel_dp, crtc_state);
- intel_dp_compute_psr_vsc_sdp(intel_dp, crtc_state, conn_state,
&dev_priv->psr.vsc);- intel_write_dp_vsc_sdp(encoder, crtc_state, &dev_priv->psr.vsc); intel_psr_enable_sink(intel_dp); intel_psr_enable_source(intel_dp, crtc_state); dev_priv->psr.enabled = true;
@@ -893,11 +865,13 @@ static void intel_psr_enable_locked(struct drm_i915_private *dev_priv,
- intel_psr_enable - Enable PSR
- @intel_dp: Intel DP
- @crtc_state: new CRTC state
*/
- @conn_state: new CONNECTOR state
- This function can only be called after the pipe is fully trained and enabled.
void intel_psr_enable(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state)
const struct intel_crtc_state *crtc_state,const struct drm_connector_state *conn_state){ struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
@@ -916,7 +890,7 @@ void intel_psr_enable(struct intel_dp *intel_dp, goto unlock; }
- intel_psr_enable_locked(dev_priv, crtc_state);
- intel_psr_enable_locked(dev_priv, crtc_state, conn_state);
unlock: mutex_unlock(&dev_priv->psr.lock); @@ -1049,13 +1023,15 @@ static void psr_force_hw_tracking_exit(struct drm_i915_private *dev_priv)
- intel_psr_update - Update PSR state
- @intel_dp: Intel DP
- @crtc_state: new CRTC state
*/
- @conn_state: new CONNECTOR state
- This functions will update PSR states, disabling, enabling or switching PSR
- version when executing fastsets. For full modeset, intel_psr_disable() and
- intel_psr_enable() should be called instead.
void intel_psr_update(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state)
const struct intel_crtc_state *crtc_state,const struct drm_connector_state *conn_state){ struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); struct i915_psr *psr = &dev_priv->psr; @@ -1090,7 +1066,7 @@ void intel_psr_update(struct intel_dp *intel_dp, intel_psr_disable_locked(intel_dp);
if (enable)
intel_psr_enable_locked(dev_priv, crtc_state);
intel_psr_enable_locked(dev_priv, crtc_state, conn_state);unlock: mutex_unlock(&dev_priv->psr.lock); diff --git a/drivers/gpu/drm/i915/display/intel_psr.h b/drivers/gpu/drm/i915/display/intel_psr.h index c58a1d438808..a003fb18105a 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.h +++ b/drivers/gpu/drm/i915/display/intel_psr.h @@ -17,11 +17,13 @@ struct intel_dp; #define CAN_PSR(dev_priv) (HAS_PSR(dev_priv) && dev_priv->psr.sink_support) void intel_psr_init_dpcd(struct intel_dp *intel_dp); void intel_psr_enable(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state);
const struct intel_crtc_state *crtc_state,const struct drm_connector_state *conn_state);void intel_psr_disable(struct intel_dp *intel_dp, const struct intel_crtc_state *old_crtc_state); void intel_psr_update(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state);
const struct intel_crtc_state *crtc_state,const struct drm_connector_state *conn_state);int intel_psr_debug_set(struct drm_i915_private *dev_priv, u64 value); void intel_psr_invalidate(struct drm_i915_private *dev_priv, unsigned frontbuffer_bits, diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index a8a08c63278e..fa2f1a18ffe0 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -504,6 +504,7 @@ struct i915_psr { u32 dc3co_exit_delay; struct delayed_work idle_work; bool initially_probed;
- struct drm_dp_vsc_sdp vsc;
};
#define QUIRK_LVDS_SSC_DISABLE (1<<1)
2.24.1
Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
dri-devel@lists.freedesktop.org
-
Gwan-gyeong Mun -
Mun, Gwan-gyeong
-
Shankar, Uma