Hi Marek,

Many thanks for your patch and sorry for the delay regarding this "last Christmas" patch (Dec. 24, 2020), lost in my inbox :(

Could you please resend it (as I did not succeed to apply it directly)?

patchwork reference https://patchwork.freedesktop.org/patch/409968/?series=85222

Many thanks, Philippe :-)

On 5/28/21 4:01 PM, yannick Fertre wrote:

Hi Philippe, I have already reviewed this patch on January 7, 2020. (https://lore.kernel.org/dri-devel/0ab4ee45-4437-3b02-cf63-0e3b1b53920f@st.co...)

Could you please review it and merge it?

Best regards

Yannick

On 5/28/21 10:05 AM, Yannick Fertre wrote:

...

There is not much value in the extra conversion step, the calculations required for the LTDC IP are different than what is used in the drm_display_mode_to_videomode(), so just do the right ones in the LTDC driver right away.

Signed-off-by: Marek Vasut marex@denx.de Signed-off-by: Yannick Fertre yannick.fertre@foss.st.com

---

drivers/gpu/drm/stm/ltdc.c | 32 +++++++++++++++++---------------   1 file changed, 17 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c index e99771b947b6..d113b9be12c0 100644 --- a/drivers/gpu/drm/stm/ltdc.c +++ b/drivers/gpu/drm/stm/ltdc.c @@ -570,31 +570,33 @@ static void ltdc_crtc_mode_set_nofb(struct drm_crtc *crtc)           }       } -    drm_display_mode_to_videomode(mode, &vm);

DRM_DEBUG_DRIVER("CRTC:%d mode:%s\n", crtc->base.id, mode->name); -    DRM_DEBUG_DRIVER("Video mode: %dx%d", vm.hactive, vm.vactive); +    DRM_DEBUG_DRIVER("Video mode: %dx%d", mode->hdisplay, mode->vdisplay);       DRM_DEBUG_DRIVER(" hfp %d hbp %d hsl %d vfp %d vbp %d vsl %d\n", -             vm.hfront_porch, vm.hback_porch, vm.hsync_len, -             vm.vfront_porch, vm.vback_porch, vm.vsync_len); +             mode->hsync_start - mode->hdisplay, +             mode->htotal - mode->hsync_end, +             mode->hsync_end - mode->hsync_start, +             mode->vsync_start - mode->vdisplay, +             mode->vtotal - mode->vsync_end, +             mode->vsync_end - mode->vsync_start);       /* Convert video timings to ltdc timings */ -    hsync = vm.hsync_len - 1; -    vsync = vm.vsync_len - 1; -    accum_hbp = hsync + vm.hback_porch; -    accum_vbp = vsync + vm.vback_porch; -    accum_act_w = accum_hbp + vm.hactive; -    accum_act_h = accum_vbp + vm.vactive; -    total_width = accum_act_w + vm.hfront_porch; -    total_height = accum_act_h + vm.vfront_porch; +    hsync = mode->hsync_end - mode->hsync_start - 1; +    vsync = mode->vsync_end - mode->vsync_start - 1; +    accum_hbp = mode->htotal - mode->hsync_start - 1; +    accum_vbp = mode->vtotal - mode->vsync_start - 1; +    accum_act_w = accum_hbp + mode->hdisplay; +    accum_act_h = accum_vbp + mode->vdisplay; +    total_width = mode->htotal - 1; +    total_height = mode->vtotal - 1;       /* Configures the HS, VS, DE and PC polarities. Default Active Low */       val = 0; -    if (vm.flags & DISPLAY_FLAGS_HSYNC_HIGH) +    if (mode->flags & DRM_MODE_FLAG_PHSYNC)           val |= GCR_HSPOL; -    if (vm.flags & DISPLAY_FLAGS_VSYNC_HIGH) +    if (mode->flags & DRM_MODE_FLAG_PVSYNC)           val |= GCR_VSPOL;       if (bus_flags & DRM_BUS_FLAG_DE_LOW)