From: Kieran Bingham kieran.bingham+renesas@ideasonboard.com
Extend the Renesas DU display bindings to support the r8a779a0 V3U.
Signed-off-by: Kieran Bingham kieran.bingham+renesas@ideasonboard.com --- .../bindings/display/renesas,du.yaml | 52 +++++++++++++++++++ 1 file changed, 52 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/renesas,du.yaml b/Documentation/devicetree/bindings/display/renesas,du.yaml index 121596f106da..febbd89a646e 100644 --- a/Documentation/devicetree/bindings/display/renesas,du.yaml +++ b/Documentation/devicetree/bindings/display/renesas,du.yaml @@ -39,6 +39,7 @@ properties: - renesas,du-r8a77980 # for R-Car V3H compatible DU - renesas,du-r8a77990 # for R-Car E3 compatible DU - renesas,du-r8a77995 # for R-Car D3 compatible DU + - renesas,du-r8a779a0 # for R-Car V3U compatible DU
reg: maxItems: 1 @@ -774,6 +775,57 @@ allOf: - reset-names - renesas,vsps
+ - if: + properties: + compatible: + contains: + enum: + - renesas,du-r8a779a0 + then: + properties: + clocks: + items: + - description: Functional clock for DU0 + - description: Functional clock for DU1 + + clock-names: + items: + - const: du.0 + - const: du.1 + + interrupts: + maxItems: 2 + + resets: + maxItems: 1 + + reset-names: + items: + - const: du.0 + + ports: + properties: + port@0: + description: DSI 0 + port@1: + description: DSI 1 + port@2: false + port@3: false + + required: + - port@0 + - port@1 + + renesas,vsps: + minItems: 2 + + required: + - clock-names + - interrupts + - resets + - reset-names + - renesas,vsps + additionalProperties: false
examples:
Hi Kieran,
Thank you for the patch.
On Wed, Jun 23, 2021 at 12:11:46AM +0100, Kieran Bingham wrote:
From: Kieran Bingham kieran.bingham+renesas@ideasonboard.com
Extend the Renesas DU display bindings to support the r8a779a0 V3U.
Signed-off-by: Kieran Bingham kieran.bingham+renesas@ideasonboard.com
Reviewed-by: Laurent Pinchart laurent.pinchart@ideasonboard.com
.../bindings/display/renesas,du.yaml | 52 +++++++++++++++++++ 1 file changed, 52 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/renesas,du.yaml b/Documentation/devicetree/bindings/display/renesas,du.yaml index 121596f106da..febbd89a646e 100644 --- a/Documentation/devicetree/bindings/display/renesas,du.yaml +++ b/Documentation/devicetree/bindings/display/renesas,du.yaml @@ -39,6 +39,7 @@ properties: - renesas,du-r8a77980 # for R-Car V3H compatible DU - renesas,du-r8a77990 # for R-Car E3 compatible DU - renesas,du-r8a77995 # for R-Car D3 compatible DU
- renesas,du-r8a779a0 # for R-Car V3U compatible DUreg: maxItems: 1
@@ -774,6 +775,57 @@ allOf: - reset-names - renesas,vsps
- if:
properties:compatible:contains:enum:- renesas,du-r8a779a0- then:
properties:clocks:items:- description: Functional clock for DU0- description: Functional clock for DU1clock-names:items:- const: du.0- const: du.1interrupts:maxItems: 2resets:maxItems: 1reset-names:items:- const: du.0ports:properties:port@0:description: DSI 0port@1:description: DSI 1port@2: falseport@3: falserequired:- port@0- port@1renesas,vsps:minItems: 2required:- clock-names- interrupts- resets- reset-names- renesas,vspsadditionalProperties: false
examples:
Hi Kieran,
On Wed, Jun 23, 2021 at 1:11 AM Kieran Bingham kieran.bingham@ideasonboard.com wrote:
From: Kieran Bingham kieran.bingham+renesas@ideasonboard.com
Extend the Renesas DU display bindings to support the r8a779a0 V3U.
Signed-off-by: Kieran Bingham kieran.bingham+renesas@ideasonboard.com
Thanks for your patch!
--- a/Documentation/devicetree/bindings/display/renesas,du.yaml +++ b/Documentation/devicetree/bindings/display/renesas,du.yaml @@ -39,6 +39,7 @@ properties: - renesas,du-r8a77980 # for R-Car V3H compatible DU - renesas,du-r8a77990 # for R-Car E3 compatible DU - renesas,du-r8a77995 # for R-Car D3 compatible DU
- renesas,du-r8a779a0 # for R-Car V3U compatible DUreg: maxItems: 1
@@ -774,6 +775,57 @@ allOf: - reset-names - renesas,vsps
- if:
properties:compatible:contains:enum:- renesas,du-r8a779a0- then:
properties:clocks:items:- description: Functional clock for DU0- description: Functional clock for DU1clock-names:items:- const: du.0- const: du.1
The hardware block has only a single function clock for both channels, like on R-Car H1.
And what about DU_DOTCLKIN?
Gr{oetje,eeting}s,
Geert
Hi Geert,
On Wed, Jun 23, 2021 at 02:53:33PM +0200, Geert Uytterhoeven wrote:
On Wed, Jun 23, 2021 at 1:11 AM Kieran Bingham wrote:
From: Kieran Bingham kieran.bingham+renesas@ideasonboard.com
Extend the Renesas DU display bindings to support the r8a779a0 V3U.
Signed-off-by: Kieran Bingham kieran.bingham+renesas@ideasonboard.com
Thanks for your patch!
--- a/Documentation/devicetree/bindings/display/renesas,du.yaml +++ b/Documentation/devicetree/bindings/display/renesas,du.yaml @@ -39,6 +39,7 @@ properties: - renesas,du-r8a77980 # for R-Car V3H compatible DU - renesas,du-r8a77990 # for R-Car E3 compatible DU - renesas,du-r8a77995 # for R-Car D3 compatible DU
- renesas,du-r8a779a0 # for R-Car V3U compatible DUreg: maxItems: 1
@@ -774,6 +775,57 @@ allOf: - reset-names - renesas,vsps
- if:
properties:compatible:contains:enum:- renesas,du-r8a779a0- then:
properties:clocks:items:- description: Functional clock for DU0- description: Functional clock for DU1clock-names:items:- const: du.0- const: du.1The hardware block has only a single function clock for both channels, like on R-Car H1.
And what about DU_DOTCLKIN?
As far as I can tell, there's no DU_DOTCLKIN in V3U.
Hi Laurent,
On Wed, Jun 23, 2021 at 2:58 PM Laurent Pinchart laurent.pinchart@ideasonboard.com wrote:
On Wed, Jun 23, 2021 at 02:53:33PM +0200, Geert Uytterhoeven wrote:
On Wed, Jun 23, 2021 at 1:11 AM Kieran Bingham wrote:
From: Kieran Bingham kieran.bingham+renesas@ideasonboard.com
Extend the Renesas DU display bindings to support the r8a779a0 V3U.
Signed-off-by: Kieran Bingham kieran.bingham+renesas@ideasonboard.com
Thanks for your patch!
--- a/Documentation/devicetree/bindings/display/renesas,du.yaml +++ b/Documentation/devicetree/bindings/display/renesas,du.yaml @@ -39,6 +39,7 @@ properties: - renesas,du-r8a77980 # for R-Car V3H compatible DU - renesas,du-r8a77990 # for R-Car E3 compatible DU - renesas,du-r8a77995 # for R-Car D3 compatible DU
- renesas,du-r8a779a0 # for R-Car V3U compatible DUreg: maxItems: 1
@@ -774,6 +775,57 @@ allOf: - reset-names - renesas,vsps
- if:
properties:compatible:contains:enum:- renesas,du-r8a779a0- then:
properties:clocks:items:- description: Functional clock for DU0- description: Functional clock for DU1clock-names:items:- const: du.0- const: du.1The hardware block has only a single function clock for both channels, like on R-Car H1.
And what about DU_DOTCLKIN?
As far as I can tell, there's no DU_DOTCLKIN in V3U.
See Table 6.13 of the Hardware User's Manual, pin IPC_CLKIN. Note that the register bits to configure it are present in drivers/pinctrl/renesas/pfc-r8a779a0.c, but the actual pin group is missing.
Gr{oetje,eeting}s,
Geert
Hi Geert,
On Wed, Jun 23, 2021 at 03:09:06PM +0200, Geert Uytterhoeven wrote:
On Wed, Jun 23, 2021 at 2:58 PM Laurent Pinchart wrote:
On Wed, Jun 23, 2021 at 02:53:33PM +0200, Geert Uytterhoeven wrote:
On Wed, Jun 23, 2021 at 1:11 AM Kieran Bingham wrote:
From: Kieran Bingham kieran.bingham+renesas@ideasonboard.com
Extend the Renesas DU display bindings to support the r8a779a0 V3U.
Signed-off-by: Kieran Bingham kieran.bingham+renesas@ideasonboard.com
Thanks for your patch!
--- a/Documentation/devicetree/bindings/display/renesas,du.yaml +++ b/Documentation/devicetree/bindings/display/renesas,du.yaml @@ -39,6 +39,7 @@ properties: - renesas,du-r8a77980 # for R-Car V3H compatible DU - renesas,du-r8a77990 # for R-Car E3 compatible DU - renesas,du-r8a77995 # for R-Car D3 compatible DU
- renesas,du-r8a779a0 # for R-Car V3U compatible DUreg: maxItems: 1
@@ -774,6 +775,57 @@ allOf: - reset-names - renesas,vsps
- if:
properties:compatible:contains:enum:- renesas,du-r8a779a0- then:
properties:clocks:items:- description: Functional clock for DU0- description: Functional clock for DU1clock-names:items:- const: du.0- const: du.1The hardware block has only a single function clock for both channels, like on R-Car H1.
And what about DU_DOTCLKIN?
As far as I can tell, there's no DU_DOTCLKIN in V3U.
See Table 6.13 of the Hardware User's Manual, pin IPC_CLKIN.
Maybe that's incorrect ? There's no mention of DU_DOTCLKIN anywhere else, and the DU bits that allow selection of the input clocks list the value documented for Gen3 SoCs as selected DU_DOTCLKIN as reserved.
Note that the register bits to configure it are present in drivers/pinctrl/renesas/pfc-r8a779a0.c, but the actual pin group is missing.
Hi Geert,
On 23/06/2021 13:53, Geert Uytterhoeven wrote:
Hi Kieran,
On Wed, Jun 23, 2021 at 1:11 AM Kieran Bingham kieran.bingham@ideasonboard.com wrote:
From: Kieran Bingham kieran.bingham+renesas@ideasonboard.com
Extend the Renesas DU display bindings to support the r8a779a0 V3U.
Signed-off-by: Kieran Bingham kieran.bingham+renesas@ideasonboard.com
Thanks for your patch!
--- a/Documentation/devicetree/bindings/display/renesas,du.yaml +++ b/Documentation/devicetree/bindings/display/renesas,du.yaml @@ -39,6 +39,7 @@ properties: - renesas,du-r8a77980 # for R-Car V3H compatible DU - renesas,du-r8a77990 # for R-Car E3 compatible DU - renesas,du-r8a77995 # for R-Car D3 compatible DU
- renesas,du-r8a779a0 # for R-Car V3U compatible DUreg: maxItems: 1
@@ -774,6 +775,57 @@ allOf: - reset-names - renesas,vsps
- if:
properties:compatible:contains:enum:- renesas,du-r8a779a0- then:
properties:clocks:items:- description: Functional clock for DU0- description: Functional clock for DU1clock-names:items:- const: du.0- const: du.1The hardware block has only a single function clock for both channels, like on R-Car H1.
Indeed, but I believe both channels still need to set them, if they can be operated independently, the driver looks up the clock based on the du.%d, and so for DU1, it is simply expressed as the same clock in DT.
Is this acceptable? or is there further issues there?
And what about DU_DOTCLKIN?
This thread has already discussed this with Laurent, and I concur - There doesn't appear to be any relevant reference to DU_DOTCLKIN on the DU side.
Gr{oetje,eeting}s,
Geert
Hi Kieran,
On Wed, Sep 01, 2021 at 11:01:11PM +0100, Kieran Bingham wrote:
On 23/06/2021 13:53, Geert Uytterhoeven wrote:
On Wed, Jun 23, 2021 at 1:11 AM Kieran Bingham wrote:
From: Kieran Bingham kieran.bingham+renesas@ideasonboard.com
Extend the Renesas DU display bindings to support the r8a779a0 V3U.
Signed-off-by: Kieran Bingham kieran.bingham+renesas@ideasonboard.com
Thanks for your patch!
--- a/Documentation/devicetree/bindings/display/renesas,du.yaml +++ b/Documentation/devicetree/bindings/display/renesas,du.yaml @@ -39,6 +39,7 @@ properties: - renesas,du-r8a77980 # for R-Car V3H compatible DU - renesas,du-r8a77990 # for R-Car E3 compatible DU - renesas,du-r8a77995 # for R-Car D3 compatible DU
- renesas,du-r8a779a0 # for R-Car V3U compatible DUreg: maxItems: 1
@@ -774,6 +775,57 @@ allOf: - reset-names - renesas,vsps
- if:
properties:compatible:contains:enum:- renesas,du-r8a779a0- then:
properties:clocks:items:- description: Functional clock for DU0- description: Functional clock for DU1clock-names:items:- const: du.0- const: du.1The hardware block has only a single function clock for both channels, like on R-Car H1.
Indeed, but I believe both channels still need to set them, if they can be operated independently, the driver looks up the clock based on the du.%d, and so for DU1, it is simply expressed as the same clock in DT.
Is this acceptable? or is there further issues there?
Could we handle that on the driver side, like we do for H1 by not setting RCAR_DU_FEATURE_CRTC_IRQ_CLOCK ? We would probably need to split that flag in two, as there are two interrupts.
It's a bit annoying not knowing what the MSTP bits do exactly, we've modelled them as gates for the functional clock, but maybe in cases like this one the mapping isn't fully correct, I'm not sure.
And what about DU_DOTCLKIN?
This thread has already discussed this with Laurent, and I concur - There doesn't appear to be any relevant reference to DU_DOTCLKIN on the DU side.
Hi Laurent,
On 01/09/2021 23:13, Laurent Pinchart wrote:
Hi Kieran,
On Wed, Sep 01, 2021 at 11:01:11PM +0100, Kieran Bingham wrote:
On 23/06/2021 13:53, Geert Uytterhoeven wrote:
On Wed, Jun 23, 2021 at 1:11 AM Kieran Bingham wrote:
From: Kieran Bingham kieran.bingham+renesas@ideasonboard.com
Extend the Renesas DU display bindings to support the r8a779a0 V3U.
Signed-off-by: Kieran Bingham kieran.bingham+renesas@ideasonboard.com
Thanks for your patch!
--- a/Documentation/devicetree/bindings/display/renesas,du.yaml +++ b/Documentation/devicetree/bindings/display/renesas,du.yaml @@ -39,6 +39,7 @@ properties: - renesas,du-r8a77980 # for R-Car V3H compatible DU - renesas,du-r8a77990 # for R-Car E3 compatible DU - renesas,du-r8a77995 # for R-Car D3 compatible DU
- renesas,du-r8a779a0 # for R-Car V3U compatible DUreg: maxItems: 1
@@ -774,6 +775,57 @@ allOf: - reset-names - renesas,vsps
- if:
properties:compatible:contains:enum:- renesas,du-r8a779a0- then:
properties:clocks:items:- description: Functional clock for DU0- description: Functional clock for DU1clock-names:items:- const: du.0- const: du.1The hardware block has only a single function clock for both channels, like on R-Car H1.
Indeed, but I believe both channels still need to set them, if they can be operated independently, the driver looks up the clock based on the du.%d, and so for DU1, it is simply expressed as the same clock in DT.
Is this acceptable? or is there further issues there?
Could we handle that on the driver side, like we do for H1 by not setting RCAR_DU_FEATURE_CRTC_IRQ_CLOCK ? We would probably need to split that flag in two, as there are two interrupts.
Ok, that's not so bad to split, Done.
It's a bit annoying not knowing what the MSTP bits do exactly, we've modelled them as gates for the functional clock, but maybe in cases like this one the mapping isn't fully correct, I'm not sure.
And what about DU_DOTCLKIN?
This thread has already discussed this with Laurent, and I concur - There doesn't appear to be any relevant reference to DU_DOTCLKIN on the DU side.
dri-devel@lists.freedesktop.org
-
Geert Uytterhoeven -
Kieran Bingham -
Laurent Pinchart