Hi Dave,

New -next pull request. Highlights: - Remaining vlv patches from Jesse et al. - Some hw workarounds from Jesse - hw context support from Ben - full uncore sharing on ivb - prep work to move the gtt code from intel-gtt.c to drm/i915 for gen6+ - some backlight code improvements - leftovers for the timeout ioctl (we've forgotten the getparam) - ibx transcoder workarounds - some smaller fixlets and improvements - the new version of the "dont rely on HPD exclusively for VGA" patch

Wrt regressions QA reported quite a few this time around. - The piglit/kernel-test fallout all has patches that are just awaiting review and merging into the next -next cycle. - Which just leaves a bunch of bugs about new modelines that don't work. It looks like these are all due to the new 16:9/16:10 modes in 3.5 (yeah, only in this manual testing cycle did the git branch used by QA contain a backmerge of mainline with these patches). Although I haven't yet confirmed this by letting our QA test the revert of that series. - Wrt bugs in general I'm trying to fight down some of our long-standing backlight issues (not regressions), but this seems to be a game of "you move, you lose" ... :(

Yours, Daniel

The following changes since commit 1523c310b3ed964b71a8db16f70c3bc21cc0642e:

drm/i915: add min freq control to debugfs (2012-06-04 21:34:47 +0200)

are available in the git repository at:

git://people.freedesktop.org/~danvet/drm-intel tags/drm-intel-next-2012-06-21

for you to fetch changes up to ff049b6ce21d2814451afd4a116d001712e0116b:

drm/i915: bind driver to ValleyView chipsets (2012-06-20 22:52:49 +0200)

---------------------------------------------------------------- Ben Widawsky (17): drm/i915: Inifite timeout for wait ioctl drm/i915: Add wait render timeout get param drm/i915: CXT_SIZE register offsets added drm/i915: preliminary context support drm/i915: context basic create & destroy drm/i915: context switch implementation drm/i915: Ivybridge MI_ARB_ON_OFF context w/a drm/i915: PIPE_CONTROL_TLB_INVALIDATE drm/i915: possibly invalidate TLB before context switch drm/i915: use the default context drm/i915: add ccid to error state drm/i915: switch to default context on idle drm/i915/context: create & destroy ioctls drm/i915/context: switch contexts with execbuf2 drm/i915: reset the GPU on context fini drm/i915: disable contexts on old HW drm/i915: set IDICOS to medium uncore resources

Chris Wilson (1): drm/i915: Switch off FBC when disabling the primary plane when obscured

Daniel Vetter (25): drm/i915: implement IBX hdmi transcoder select workaround drm/i915: assert that the IBX port transcoder select w/a is implemented drm/i915: ensure HDMI port is disabled inside set_infoframes drm/i915: pnv has a backlight polarity control bit, too drm/i915: clear up backlight #define confusion on gen4+ drm/i915: properly enable the blc controller on the right pipe drm/i915: allow pipe A for lvds on gen4 agp/intel-gtt: remove dead code drm/i915: stop using dev->agp->base agp/intel-gtt: don't require the agp bridge on setup drm/i915 + agp/intel-gtt: prep work for direct setup agp/intel-gtt: move gart base addres setup drm/i915: call intel_enable_gtt drm/i915: kick any firmware framebuffers before claiming the gtt drm/i915: ensure context objects are bound to the global gtt drm/i915/crt: Do not rely upon the HPD presence pin drm/i915: fixup hangman rebase goof-up drm/i915: fix module unload after context merge drm/i915: initialize the context idr unconditionally drm/i915: return -ENOENT if the context doesn't exist drm/i915/context: shut up compiler drm/i915: simplify context_idr_cleanup drm/i915: return -ENODEV if hw context are not supported drm/i915: don't call modeset_init_hw in i915_reset drm/i915: disable flushing_list/gpu_write_list

Eugeni Dodonov (1): drm/i915: properly wait for SBI status

Jesse Barnes (15): drm/i915: disable RCBP and VDS unit clock gating on SNB and VLV drm/i915: load boot context at driver init time drm/i915: add TDL unit clock gating disable for VLV drm/i915: add L3 bank clock gating disable on VLV drm/i915: ValleyView mode setting limits and PLL functions drm/i915: add ValleyView specific CRT detect function drm/i915: add HDMI and DP port enumeration on ValleyView drm/i915: access VLV regs through read/write switch drm/i915: VLV VGA port only handles on & off, like PCH VGA agp/intel: allow cacheable and GDFT PTEs on ValleyView agp/intel: use correct GTT offset on VLV drm/i915: don't enable PPGTT on VLV yet drm/i915: support page flipping on ValleyView drm/i915: enable display messages to GT on ValleyView drm/i915: bind driver to ValleyView chipsets

Seth Forshee (1): drm/i915: ignore pipe select bit when checking for LVDS register initialization

Shobhit Kumar (1): drm/i915: Enable DP panel power sequencing for ValleyView

drivers/char/agp/intel-agp.c | 5 +- drivers/char/agp/intel-agp.h | 3 - drivers/char/agp/intel-gtt.c | 91 +++-- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/i915_debugfs.c | 1 + drivers/gpu/drm/i915/i915_dma.c | 78 +++- drivers/gpu/drm/i915/i915_drv.c | 103 +++++- drivers/gpu/drm/i915/i915_drv.h | 30 +- drivers/gpu/drm/i915/i915_gem.c | 54 ++- drivers/gpu/drm/i915/i915_gem_context.c | 535 ++++++++++++++++++++++++++++ drivers/gpu/drm/i915/i915_gem_debug.c | 3 +- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 68 ++-- drivers/gpu/drm/i915/i915_irq.c | 98 +++-- drivers/gpu/drm/i915/i915_reg.h | 102 ++++-- drivers/gpu/drm/i915/intel_crt.c | 57 ++- drivers/gpu/drm/i915/intel_display.c | 281 ++++++++++++++- drivers/gpu/drm/i915/intel_drv.h | 5 +- drivers/gpu/drm/i915/intel_fb.c | 4 +- drivers/gpu/drm/i915/intel_hdmi.c | 55 ++- drivers/gpu/drm/i915/intel_lvds.c | 34 +- drivers/gpu/drm/i915/intel_panel.c | 38 +- drivers/gpu/drm/i915/intel_pm.c | 89 ++++- drivers/gpu/drm/i915/intel_ringbuffer.c | 14 +- drivers/gpu/drm/i915/intel_ringbuffer.h | 8 + drivers/gpu/drm/i915/intel_sprite.c | 25 +- include/drm/i915_drm.h | 26 +- include/drm/intel-gtt.h | 8 + 27 files changed, 1565 insertions(+), 251 deletions(-) create mode 100644 drivers/gpu/drm/i915/i915_gem_context.c