In 5.13 the DPU driver was changed to vote on the bus bandwidth for all the soc families, however suggested [1] dts changes were for some reason not merged at that time. Let's merge them now.
If the bootloader does not setup the bus vote, clock might not be enabled before the driver votes on the MDP bus bandwidth. Originally bus votes were static and happened in MDSS hadling code, while now they are dynamic and are moved to the MDP handling code, thus bus clocks also should belong to the MDP device.
[1] https://lore.kernel.org/linux-arm-msm/04b4612dfd3f651ead068725409211a0@codea...
Changes since v2: - Dropped merged patches - Rephrased commit message for sm8250.
Changes since v1: - Add dts changes as requested by Kalyan Thota
---------------------------------------------------------------- Dmitry Baryshkov (2): arm64: dts: sdm845: move bus clock to mdp node for sdm845 target arm64: dts: sm8250: remove bus clock from the mdss node for sm8250 target
arch/arm64/boot/dts/qcom/sdm845.dtsi | 8 ++++---- arch/arm64/boot/dts/qcom/sm8250.dtsi | 3 +-- 2 files changed, 5 insertions(+), 6 deletions(-)
Move the bus clock to mdp device node,in order to facilitate bus band width scaling on sdm845 target.
The parent device MDSS will not vote for bus bw, instead the vote will be triggered by mdp device node. Since a minimum vote is required to turn on bus clock, move the clock node to mdp device from where the votes are requested.
Signed-off-by: Dmitry Baryshkov dmitry.baryshkov@linaro.org --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 1796ae8372be..9e77a323b1cd 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -4148,9 +4148,8 @@ mdss: mdss@ae00000 { power-domains = <&dispcc MDSS_GDSC>;
clocks = <&gcc GCC_DISP_AHB_CLK>, - <&gcc GCC_DISP_AXI_CLK>, <&dispcc DISP_CC_MDSS_MDP_CLK>; - clock-names = "iface", "bus", "core"; + clock-names = "iface", "core";
assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>; assigned-clock-rates = <300000000>; @@ -4178,11 +4177,12 @@ mdss_mdp: mdp@ae01000 { <0 0x0aeb0000 0 0x2008>; reg-names = "mdp", "vbif";
- clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, + clocks = <&gcc GCC_DISP_AXI_CLK>, + <&dispcc DISP_CC_MDSS_AHB_CLK>, <&dispcc DISP_CC_MDSS_AXI_CLK>, <&dispcc DISP_CC_MDSS_MDP_CLK>, <&dispcc DISP_CC_MDSS_VSYNC_CLK>; - clock-names = "iface", "bus", "core", "vsync"; + clock-names = "gcc-bus", "iface", "bus", "core", "vsync";
assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>, <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
Remove the bus clock from the mdss device node, in order to facilitate bus band width scaling on sm8250 target.
The parent device MDSS will not vote for bus bw, instead the vote will be triggered by mdp device node. Since a minimum vote is required to turn on bus clock, and since mdp device node already has the bus clock, remove the clock from the mdss device.
Signed-off-by: Dmitry Baryshkov dmitry.baryshkov@linaro.org --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 4798368b02ef..1df03c809d02 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -2470,10 +2470,9 @@ mdss: mdss@ae00000 { power-domains = <&dispcc MDSS_GDSC>;
clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, - <&gcc GCC_DISP_HF_AXI_CLK>, <&gcc GCC_DISP_SF_AXI_CLK>, <&dispcc DISP_CC_MDSS_MDP_CLK>; - clock-names = "iface", "bus", "nrt_bus", "core"; + clock-names = "iface", "nrt_bus", "core";
assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>; assigned-clock-rates = <460000000>;
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Dmitry Baryshkov