The req_rate name is a little misleading, so let's rename to pclk_rate (pixel clock rate).

Signed-off-by: Dario Binacchi dariobin@libero.it

---

(no changes since v2)

Changes in v2: - The patch has been added in version 2.

drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c index 30213708fc99..aeec5786617d 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c @@ -203,18 +203,18 @@ static void tilcdc_crtc_set_clk(struct drm_crtc *crtc) struct drm_device *dev = crtc->dev; struct tilcdc_drm_private *priv = dev->dev_private; struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); - unsigned long clk_rate, real_rate, req_rate; + unsigned long clk_rate, real_rate, pclk_rate; unsigned int clkdiv; int ret;

clkdiv = 2; /* first try using a standard divider of 2 */

/* mode.clock is in KHz, set_rate wants parameter in Hz */ - req_rate = crtc->mode.clock * 1000; + pclk_rate = crtc->mode.clock * 1000;

- ret = clk_set_rate(priv->clk, req_rate * clkdiv); + ret = clk_set_rate(priv->clk, pclk_rate * clkdiv); clk_rate = clk_get_rate(priv->clk); - if (ret < 0 || tilcdc_pclk_diff(req_rate, clk_rate) > 5) { + if (ret < 0 || tilcdc_pclk_diff(pclk_rate, clk_rate) > 5) { /* * If we fail to set the clock rate (some architectures don't * use the common clock framework yet and may not implement @@ -229,7 +229,7 @@ static void tilcdc_crtc_set_clk(struct drm_crtc *crtc) return; }

- clkdiv = DIV_ROUND_CLOSEST(clk_rate, req_rate); + clkdiv = DIV_ROUND_CLOSEST(clk_rate, pclk_rate);

/* * Emit a warning if the real clock rate resulting from the @@ -238,7 +238,7 @@ static void tilcdc_crtc_set_clk(struct drm_crtc *crtc) * 5% is an arbitrary value - LCDs are usually quite tolerant * about pixel clock rates. */ - real_rate = clkdiv * req_rate; + real_rate = clkdiv * pclk_rate;

if (tilcdc_pclk_diff(clk_rate, real_rate) > 5) { dev_warn(dev->dev,

The warning message did not printed the LCD pixel clock rate but the LCD clock divisor input rate. As a consequence, the required and real pixel clock rates are now passed to the tilcdc_pclk_diff().

Signed-off-by: Dario Binacchi dariobin@libero.it

---

Changes in v3: - Replace calculated with requested in the warning message. - Swap the positions of the real_pclk_rate, and pclk_rate parameters in the warning message.

Changes in v2: - The patch has been added in version 2.

drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c index ac6228cb04d9..381a706ab7c2 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c @@ -203,7 +203,7 @@ static void tilcdc_crtc_set_clk(struct drm_crtc *crtc) struct drm_device *dev = crtc->dev; struct tilcdc_drm_private *priv = dev->dev_private; struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); - unsigned long clk_rate, real_rate, real_pclk_rate, pclk_rate; + unsigned long clk_rate, real_pclk_rate, pclk_rate; unsigned int clkdiv; int ret;

@@ -239,12 +239,12 @@ static void tilcdc_crtc_set_clk(struct drm_crtc *crtc) * 5% is an arbitrary value - LCDs are usually quite tolerant * about pixel clock rates. */ - real_rate = clkdiv * pclk_rate; + real_pclk_rate = clk_rate / clkdiv;

- if (tilcdc_pclk_diff(clk_rate, real_rate) > 5) { + if (tilcdc_pclk_diff(pclk_rate, real_pclk_rate) > 5) { dev_warn(dev->dev, - "effective pixel clock rate (%luHz) differs from the calculated rate (%luHz)\n", - clk_rate, real_rate); + "effective pixel clock rate (%luHz) differs from the requested rate (%luHz)\n", + real_pclk_rate, pclk_rate); } }