While working on igt support for nouveau, I noticed that CRC calculation appeared to be broken when the cursor channel was being used. For example, if I had an igt test that would compare a software rendered image of a completely black fb with a green square in it, and then attempt to reproduce that image by positioning the cursor channel and setting it to a green rectangle, the CRCs output by the hardware would differ between the reference fb's CRC and the output's CRC. This was bizarre particularly because through use of the Chamelium I have, I was able to confirm that the image coming out of the display was identical between the reference and output. As well, the issue wouldn't happen when using the outp CRC sources that use the SF CRC source (so, DisplayPort) - only sources using the SOR CRC source (so, everything other then DisplayPort and VGA). It also didn't happen with the ovly plane, only the cursor plane.
Eventually I noticed 0x00000040 being set in the default state cache values for the CRC methods, which isn't in Nvidia's open-gpu-docs and as such appears to be inadvertently cleared to 0s when we enable CRCs. After enabling this again during CRC capture, CRCs appear to be calculated normally in all circumstances now.
Note that we might need to do this for Volta+ as well, but I'm not entirely sure yet as there seem to be some bugs with how Volta+ handles cursors that are currently causing kms_cursor_crc tests to fail.
Cc: Martin Peres martin.peres@free.fr Cc: Jeremy Cline jcline@redhat.com Cc: Simon Ser contact@emersion.fr Signed-off-by: Lyude Paul lyude@redhat.com --- drivers/gpu/drm/nouveau/dispnv50/crc907d.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/nouveau/dispnv50/crc907d.c b/drivers/gpu/drm/nouveau/dispnv50/crc907d.c index 0a89ae9523d4..f9cb484437aa 100644 --- a/drivers/gpu/drm/nouveau/dispnv50/crc907d.c +++ b/drivers/gpu/drm/nouveau/dispnv50/crc907d.c @@ -32,7 +32,8 @@ crc907d_set_src(struct nv50_head *head, int or, enum nv50_crc_source_type source NVDEF(NV907D, HEAD_SET_CRC_CONTROL, EXPECT_BUFFER_COLLAPSE, FALSE) | NVDEF(NV907D, HEAD_SET_CRC_CONTROL, TIMESTAMP_MODE, FALSE) | NVDEF(NV907D, HEAD_SET_CRC_CONTROL, SECONDARY_OUTPUT, NONE) | - NVDEF(NV907D, HEAD_SET_CRC_CONTROL, CRC_DURING_SNOOZE, DISABLE); + NVDEF(NV907D, HEAD_SET_CRC_CONTROL, CRC_DURING_SNOOZE, DISABLE) | + 0x00000040; int ret;
switch (source) {
Something that didn't get noticed until I started running cursor tests: we're accidentally disabling an option for CRC calculation that's enabled by default: WidePipeCrc, which controls whether we use the full width of the data in the display pipe in order calculate CRCs. Having this disabled apparently causes frames with the cursor plane enabled to generate different CRCs than frames without the cursor plane enabled, even if the frames are pixel-equivalent.
So, let's make sure to enable this and fix a bunch of cursor related tests in IGT.
v2: * Nvidia added the specific bit we were using to fix this issues to open-gpu-docs, so pull in the actual macro definitions for it
Cc: Martin Peres martin.peres@free.fr Cc: Jeremy Cline jcline@redhat.com Cc: Simon Ser contact@emersion.fr Signed-off-by: Lyude Paul lyude@redhat.com --- drivers/gpu/drm/nouveau/dispnv50/crc907d.c | 3 ++- drivers/gpu/drm/nouveau/include/nvhw/class/cl907d.h | 3 +++ 2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/nouveau/dispnv50/crc907d.c b/drivers/gpu/drm/nouveau/dispnv50/crc907d.c index 0a89ae9523d4..f9ad641555b7 100644 --- a/drivers/gpu/drm/nouveau/dispnv50/crc907d.c +++ b/drivers/gpu/drm/nouveau/dispnv50/crc907d.c @@ -32,7 +32,8 @@ crc907d_set_src(struct nv50_head *head, int or, enum nv50_crc_source_type source NVDEF(NV907D, HEAD_SET_CRC_CONTROL, EXPECT_BUFFER_COLLAPSE, FALSE) | NVDEF(NV907D, HEAD_SET_CRC_CONTROL, TIMESTAMP_MODE, FALSE) | NVDEF(NV907D, HEAD_SET_CRC_CONTROL, SECONDARY_OUTPUT, NONE) | - NVDEF(NV907D, HEAD_SET_CRC_CONTROL, CRC_DURING_SNOOZE, DISABLE); + NVDEF(NV907D, HEAD_SET_CRC_CONTROL, CRC_DURING_SNOOZE, DISABLE) | + NVDEF(NV907D, HEAD_SET_CRC_CONTROL, WIDE_PIPE_CRC, ENABLE); int ret;
switch (source) { diff --git a/drivers/gpu/drm/nouveau/include/nvhw/class/cl907d.h b/drivers/gpu/drm/nouveau/include/nvhw/class/cl907d.h index 79aff6ff3138..f972ef1409f4 100644 --- a/drivers/gpu/drm/nouveau/include/nvhw/class/cl907d.h +++ b/drivers/gpu/drm/nouveau/include/nvhw/class/cl907d.h @@ -246,6 +246,9 @@ #define NV907D_HEAD_SET_CRC_CONTROL_CRC_DURING_SNOOZE 5:5 #define NV907D_HEAD_SET_CRC_CONTROL_CRC_DURING_SNOOZE_DISABLE (0x00000000) #define NV907D_HEAD_SET_CRC_CONTROL_CRC_DURING_SNOOZE_ENABLE (0x00000001) +#define NV907D_HEAD_SET_CRC_CONTROL_WIDE_PIPE_CRC 6:6 +#define NV907D_HEAD_SET_CRC_CONTROL_WIDE_PIPE_CRC_DISABLE (0x00000000) +#define NV907D_HEAD_SET_CRC_CONTROL_WIDE_PIPE_CRC_ENABLE (0x00000001) #define NV907D_HEAD_SET_CONTEXT_DMA_CRC(a) (0x00000438 + (a)*0x00000300) #define NV907D_HEAD_SET_CONTEXT_DMA_CRC_HANDLE 31:0 #define NV907D_HEAD_SET_OUTPUT_LUT_LO(a) (0x00000448 + (a)*0x00000300)
dri-devel@lists.freedesktop.org
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Lyude Paul