cpp[BytePerPlane] can't describe the 10bit data format correctly, So we use bpp[BitPerPlane] to instead cpp.
Signed-off-by: Sandy Huang hjc@rock-chips.com --- drivers/gpu/drm/vc4/vc4_plane.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c index 5e5f908..ad2b0ec 100644 --- a/drivers/gpu/drm/vc4/vc4_plane.c +++ b/drivers/gpu/drm/vc4/vc4_plane.c @@ -531,7 +531,7 @@ static void vc4_plane_calc_load(struct drm_plane_state *state) vc4_state->crtc_h); vc4_state->membus_load += vc4_state->src_w[i] * vc4_state->src_h[i] * vscale_factor * - fb->format->cpp[i]; + fb->format->bpp[i] / 8; vc4_state->hvs_load += vc4_state->crtc_h * vc4_state->crtc_w; }
@@ -646,7 +646,7 @@ static int vc4_plane_mode_set(struct drm_plane *plane,
vc4_state->offsets[i] += vc4_state->src_x / (i ? h_subsample : 1) * - fb->format->cpp[i]; + fb->format->bpp[i] / 8; }
break; @@ -654,7 +654,7 @@ static int vc4_plane_mode_set(struct drm_plane *plane, case DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED: { u32 tile_size_shift = 12; /* T tiles are 4kb */ /* Whole-tile offsets, mostly for setting the pitch. */ - u32 tile_w_shift = fb->format->cpp[0] == 2 ? 6 : 5; + u32 tile_w_shift = fb->format->bpp[0] == 16 ? 6 : 5; u32 tile_h_shift = 5; /* 16 and 32bpp are 32 pixels high */ u32 tile_w_mask = (1 << tile_w_shift) - 1; /* The height mask on 32-bit-per-pixel tiles is 63, i.e. twice @@ -749,7 +749,7 @@ static int vc4_plane_mode_set(struct drm_plane *plane, return -EINVAL; }
- pix_per_tile = tile_w / fb->format->cpp[0]; + pix_per_tile = tile_w / (fb->format->bpp[0] / 8); tile = vc4_state->src_x / pix_per_tile; x_off = vc4_state->src_x % pix_per_tile;
@@ -763,7 +763,7 @@ static int vc4_plane_mode_set(struct drm_plane *plane, tile_w; vc4_state->offsets[i] += x_off / (i ? h_subsample : 1) * - fb->format->cpp[i]; + fb->format->bpp[i] / 8; }
pitch0 = VC4_SET_FIELD(param, SCALER_TILE_HEIGHT);
cpp[BytePerPlane] can't describe the 10bit data format correctly, So we use bpp[BitPerPlane] to instead cpp.
Signed-off-by: Sandy Huang hjc@rock-chips.com --- drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c index 89f5a75..ab7d423 100644 --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c @@ -644,7 +644,7 @@ static int atmel_hlcdc_plane_atomic_check(struct drm_plane *p, int xdiv = i ? fb->format->hsub : 1; int ydiv = i ? fb->format->vsub : 1;
- state->bpp[i] = fb->format->cpp[i]; + state->bpp[i] = fb->format->bpp[i] / 8; if (!state->bpp[i]) return -EINVAL;
Hi Sandy.
Thanks for taking care of this, but...
On Mon, Sep 23, 2019 at 08:51:45PM +0800, Sandy Huang wrote:
Awaiting conclusion on Daniels comment on PATCH 1 and has dropped this patch for now. And please address the concerns Rob has about bisectability in your cover letter for v2.
Sam
cpp[BytePerPlane] can't describe the 10bit data format correctly, So we use bpp[BitPerPlane] to instead cpp.
Signed-off-by: Sandy Huang hjc@rock-chips.com --- drivers/gpu/drm/cirrus/cirrus.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/cirrus/cirrus.c b/drivers/gpu/drm/cirrus/cirrus.c index 89d9e6f..ba47fdf 100644 --- a/drivers/gpu/drm/cirrus/cirrus.c +++ b/drivers/gpu/drm/cirrus/cirrus.c @@ -121,7 +121,7 @@ static void wreg_hdr(struct cirrus_device *cirrus, u8 val)
static int cirrus_convert_to(struct drm_framebuffer *fb) { - if (fb->format->cpp[0] == 4 && fb->pitches[0] > CIRRUS_MAX_PITCH) { + if (fb->format->bpp[0] == 32 && fb->pitches[0] > CIRRUS_MAX_PITCH) { if (fb->width * 3 <= CIRRUS_MAX_PITCH) /* convert from XR24 to RG24 */ return 3; @@ -138,7 +138,7 @@ static int cirrus_cpp(struct drm_framebuffer *fb)
if (convert_cpp) return convert_cpp; - return fb->format->cpp[0]; + return fb->format->bpp[0] / 8; }
static int cirrus_pitch(struct drm_framebuffer *fb) @@ -306,16 +306,16 @@ static int cirrus_fb_blit_rect(struct drm_framebuffer *fb, if (!vmap) return -ENOMEM;
- if (cirrus->cpp == fb->format->cpp[0]) + if (cirrus->cpp == fb->format->bpp[0] / 8) drm_fb_memcpy_dstclip(cirrus->vram, vmap, fb, rect);
- else if (fb->format->cpp[0] == 4 && cirrus->cpp == 2) + else if (fb->format->bpp[0] == 32 && cirrus->cpp == 2) drm_fb_xrgb8888_to_rgb565_dstclip(cirrus->vram, cirrus->pitch, vmap, fb, rect, false);
- else if (fb->format->cpp[0] == 4 && cirrus->cpp == 3) + else if (fb->format->bpp[0] == 32 && cirrus->cpp == 3) drm_fb_xrgb8888_to_rgb888_dstclip(cirrus->vram, cirrus->pitch, vmap, fb, rect);
cpp[BytePerPlane] can't describe the 10bit data format correctly, So we use bpp[BitPerPlane] to instead cpp.
Signed-off-by: Sandy Huang hjc@rock-chips.com --- drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c index cc4c417..6bfb327 100644 --- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c +++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c @@ -122,11 +122,11 @@ static void hibmc_plane_atomic_update(struct drm_plane *plane,
writel(gpu_addr, priv->mmio + HIBMC_CRT_FB_ADDRESS);
- reg = state->fb->width * (state->fb->format->cpp[0]); + reg = state->fb->width * (state->fb->format->bpp[0] / 8); /* now line_pad is 16 */ reg = PADDING(16, reg);
- line_l = state->fb->width * state->fb->format->cpp[0]; + line_l = state->fb->width * state->fb->format->bpp[0] / 8; line_l = PADDING(16, line_l); writel(HIBMC_FIELD(HIBMC_CRT_FB_WIDTH_WIDTH, reg) | HIBMC_FIELD(HIBMC_CRT_FB_WIDTH_OFFS, line_l), @@ -136,7 +136,7 @@ static void hibmc_plane_atomic_update(struct drm_plane *plane, reg = readl(priv->mmio + HIBMC_CRT_DISP_CTL); reg &= ~HIBMC_CRT_DISP_CTL_FORMAT_MASK; reg |= HIBMC_FIELD(HIBMC_CRT_DISP_CTL_FORMAT, - state->fb->format->cpp[0] * 8 / 16); + state->fb->format->bpp[0] / 16); writel(reg, priv->mmio + HIBMC_CRT_DISP_CTL); }
cpp[BytePerPlane] can't describe the 10bit data format correctly, So we use bpp[BitPerPlane] to instead cpp.
Signed-off-by: Sandy Huang hjc@rock-chips.com --- drivers/gpu/drm/imx/ipuv3-plane.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/imx/ipuv3-plane.c b/drivers/gpu/drm/imx/ipuv3-plane.c index 28826c0..f7c7036 100644 --- a/drivers/gpu/drm/imx/ipuv3-plane.c +++ b/drivers/gpu/drm/imx/ipuv3-plane.c @@ -101,7 +101,7 @@ drm_plane_state_to_eba(struct drm_plane_state *state, int plane) BUG_ON(!cma_obj);
return cma_obj->paddr + fb->offsets[plane] + fb->pitches[plane] * y + - fb->format->cpp[plane] * x; + fb->format->bpp[plane] / 8 * x; }
static inline unsigned long @@ -120,7 +120,7 @@ drm_plane_state_to_ubo(struct drm_plane_state *state) y /= fb->format->vsub;
return cma_obj->paddr + fb->offsets[1] + fb->pitches[1] * y + - fb->format->cpp[1] * x - eba; + fb->format->bpp[1] / 8 * x - eba; }
static inline unsigned long @@ -139,7 +139,7 @@ drm_plane_state_to_vbo(struct drm_plane_state *state) y /= fb->format->vsub;
return cma_obj->paddr + fb->offsets[2] + fb->pitches[2] * y + - fb->format->cpp[2] * x - eba; + fb->format->bpp[2] / 8 * x - eba; }
void ipu_plane_put_resources(struct ipu_plane *ipu_plane) @@ -628,7 +628,7 @@ static void ipu_plane_atomic_update(struct drm_plane *plane, width = drm_rect_width(&state->src) >> 16; height = drm_rect_height(&state->src) >> 16; info = drm_format_info(fb->format->format); - ipu_calculate_bursts(width, info->cpp[0], fb->pitches[0], + ipu_calculate_bursts(width, info->bpp[0] / 8, fb->pitches[0], &burstsize, &num_bursts);
ipu_cpmem_zero(ipu_plane->ipu_ch);
dri-devel@lists.freedesktop.org
-
Sam Ravnborg -
Sandy Huang