Right now there's nothing, and kernel-doc produces a warning because of that. Remove it until we need it for a clean build.
Cc: Laurent Pinchart laurent.pinchart+renesas@ideasonboard.com Signed-off-by: Daniel Vetter daniel.vetter@intel.com --- Documentation/gpu/drm-kms.rst | 3 --- 1 file changed, 3 deletions(-)
diff --git a/Documentation/gpu/drm-kms.rst b/Documentation/gpu/drm-kms.rst index 0e1c80436c1d..675221f0a64b 100644 --- a/Documentation/gpu/drm-kms.rst +++ b/Documentation/gpu/drm-kms.rst @@ -67,9 +67,6 @@ drivers can manually clean up a framebuffer at module unload time with DRM Format Handling -------------------
-.. kernel-doc:: include/drm/drm_fourcc.h - :internal: - .. kernel-doc:: drivers/gpu/drm/drm_fourcc.c :export:
Was forgotten when adding them all over. 0-day should complain about new missing kernel-doc, not sure why that wasn't caught/fixed.
Cc: Chris Wilson chris@chris-wilson.co.uk Signed-off-by: Daniel Vetter daniel.vetter@intel.com --- include/drm/drm_crtc.h | 26 +++++++++++++++++++++----- 1 file changed, 21 insertions(+), 5 deletions(-)
diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h index ebf078685f86..656f189f1198 100644 --- a/include/drm/drm_crtc.h +++ b/include/drm/drm_crtc.h @@ -783,7 +783,10 @@ struct drm_crtc { struct drm_plane *primary; struct drm_plane *cursor;
- /* position inside the mode_config.list, can be used as a [] idx */ + /** + * @index: Position inside the mode_config.list, can be used as an array + * index. + */ unsigned index;
/* position of cursor plane on crtc */ @@ -1210,7 +1213,10 @@ struct drm_encoder { char *name; int encoder_type;
- /* position inside the mode_config.list, can be used as a [] idx */ + /** + * @index: Position inside the mode_config.list, can be used as an array + * index. + */ unsigned index;
uint32_t possible_crtcs; @@ -1713,7 +1719,10 @@ struct drm_plane {
enum drm_plane_type type;
- /* position inside the mode_config.list, can be used as a [] idx */ + /** + * @index: Position inside the mode_config.list, can be used as an array + * index. + */ unsigned index;
const struct drm_plane_helper_funcs *helper_private; @@ -2321,8 +2330,6 @@ struct drm_mode_config_funcs { * @fb_lock: mutex to protect fb state and lists * @num_fb: number of fbs available * @fb_list: list of framebuffers available - * @num_connector: number of connectors on this device - * @connector_list: list of connector objects * @num_encoder: number of encoders on this device * @encoder_list: list of encoder objects * @num_overlay_plane: number of overlay planes on this device @@ -2397,8 +2404,17 @@ struct drm_mode_config { int num_fb; struct list_head fb_list;
+ /** + * @num_connector: Number of connectors on this device. + */ int num_connector; + /** + * @connector_ida: ID allocator for connector indices. + */ struct ida connector_ida; + /** + * @connector_list: List of connector objects. + */ struct list_head connector_list;
/**
On Fri, Jul 15, 2016 at 09:47:59PM +0200, Daniel Vetter wrote:
Was forgotten when adding them all over. 0-day should complain about new missing kernel-doc, not sure why that wasn't caught/fixed.
Cc: Chris Wilson chris@chris-wilson.co.uk Signed-off-by: Daniel Vetter daniel.vetter@intel.com
include/drm/drm_crtc.h | 26 +++++++++++++++++++++----- 1 file changed, 21 insertions(+), 5 deletions(-)
diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h index ebf078685f86..656f189f1198 100644 --- a/include/drm/drm_crtc.h +++ b/include/drm/drm_crtc.h @@ -783,7 +783,10 @@ struct drm_crtc { struct drm_plane *primary; struct drm_plane *cursor;
- /* position inside the mode_config.list, can be used as a [] idx */
- /**
* @index: Position inside the mode_config.list, can be used as an array
For all:
@index: Fixed position inside the mode_config.list, can be used as an array index. The @index is assigned when the crtc is inserted into the list, and it will remain at that position inside the list until the module is unloaded.
Just want to emphasis the unchanging nature of the @index. Second sentence may be overkill. -Chris
On Fri, Jul 15, 2016 at 09:06:04PM +0100, Chris Wilson wrote:
On Fri, Jul 15, 2016 at 09:47:59PM +0200, Daniel Vetter wrote:
Was forgotten when adding them all over. 0-day should complain about new missing kernel-doc, not sure why that wasn't caught/fixed.
Cc: Chris Wilson chris@chris-wilson.co.uk Signed-off-by: Daniel Vetter daniel.vetter@intel.com
include/drm/drm_crtc.h | 26 +++++++++++++++++++++----- 1 file changed, 21 insertions(+), 5 deletions(-)
diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h index ebf078685f86..656f189f1198 100644 --- a/include/drm/drm_crtc.h +++ b/include/drm/drm_crtc.h @@ -783,7 +783,10 @@ struct drm_crtc { struct drm_plane *primary; struct drm_plane *cursor;
- /* position inside the mode_config.list, can be used as a [] idx */
- /**
* @index: Position inside the mode_config.list, can be used as an arrayFor all:
@index: Fixed position inside the mode_config.list, can be used as an array index. The @index is assigned when the crtc is inserted into the list, and it will remain at that position inside the list until the module is unloaded.
Just want to emphasis the unchanging nature of the @index. Second sentence may be overkill.
Just adding "It is invariant over the lifetime of $object." for brevity? -Daniel
On Mon, Jul 18, 2016 at 09:15:35AM +0200, Daniel Vetter wrote:
On Fri, Jul 15, 2016 at 09:06:04PM +0100, Chris Wilson wrote:
On Fri, Jul 15, 2016 at 09:47:59PM +0200, Daniel Vetter wrote:
Was forgotten when adding them all over. 0-day should complain about new missing kernel-doc, not sure why that wasn't caught/fixed.
Cc: Chris Wilson chris@chris-wilson.co.uk Signed-off-by: Daniel Vetter daniel.vetter@intel.com
include/drm/drm_crtc.h | 26 +++++++++++++++++++++----- 1 file changed, 21 insertions(+), 5 deletions(-)
diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h index ebf078685f86..656f189f1198 100644 --- a/include/drm/drm_crtc.h +++ b/include/drm/drm_crtc.h @@ -783,7 +783,10 @@ struct drm_crtc { struct drm_plane *primary; struct drm_plane *cursor;
- /* position inside the mode_config.list, can be used as a [] idx */
- /**
* @index: Position inside the mode_config.list, can be used as an arrayFor all:
@index: Fixed position inside the mode_config.list, can be used as an array index. The @index is assigned when the crtc is inserted into the list, and it will remain at that position inside the list until the module is unloaded.
Just want to emphasis the unchanging nature of the @index. Second sentence may be overkill.
Just adding "It is invariant over the lifetime of $object." for brevity?
Wins. -Chris
I'm fed up with the warning noise from kernel-doc.
Aside: I stumbled over dirty_info_property, which is only set by udl and qxl. But we have a _lot_ more drivers implementing a dirty callback on framebuffers. Not entirely sure what the ABI is supposed to be here, but it seems confusing for sure.
Signed-off-by: Daniel Vetter daniel.vetter@intel.com --- include/drm/drm_crtc.h | 196 +++++++++++++++++++++++++++++++++++++++++++++---- 1 file changed, 180 insertions(+), 16 deletions(-)
diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h index 656f189f1198..6a702a484a23 100644 --- a/include/drm/drm_crtc.h +++ b/include/drm/drm_crtc.h @@ -2351,18 +2351,8 @@ struct drm_mode_config_funcs { * @property_blob_list: list of all the blob property objects * @blob_lock: mutex for blob property allocation and management * @*_property: core property tracking - * @degamma_lut_property: LUT used to convert the framebuffer's colors to linear - * gamma - * @degamma_lut_size_property: size of the degamma LUT as supported by the - * driver (read-only) - * @ctm_property: Matrix used to convert colors after the lookup in the - * degamma LUT - * @gamma_lut_property: LUT used to convert the colors, after the CSC matrix, to - * the gamma space of the connected screen (read-only) - * @gamma_lut_size_property: size of the gamma LUT as supported by the driver * @preferred_depth: preferred RBG pixel depth, used by fb helpers * @prefer_shadow: hint to userspace to prefer shadow-fb rendering - * @async_page_flip: does this device support async flips on the primary plane? * @cursor_width: hint to userspace for max cursor width * @cursor_height: hint to userspace for max cursor height * @helper_private: mid-layer private data @@ -2457,64 +2447,238 @@ struct drm_mode_config {
/* pointers to standard properties */ struct list_head property_blob_list; + /** + * @edid_property: Default connector property to hold the EDID of the + * currently connected sink, if any. + */ struct drm_property *edid_property; + /** + * @dpms_property: Default connector property to control the + * connector's DPMS state. + */ struct drm_property *dpms_property; + /** + * @path_property: Default connector property to hold the DP MST path + * for the port. + */ struct drm_property *path_property; + /** + * @tile_property: Default connector property to store the tile + * position of a tiled screen, for sinks which need to be driven with + * multiple CRTCs. + */ struct drm_property *tile_property; + /** + * @plane_type_property: Default plane property to differentiate + * CURSOR, PRIMARY and OVERLAY legacy uses of planes. + */ struct drm_property *plane_type_property; + /** + * @rotation_property: Optional property for planes or CRTCs to specifiy + * rotation. + */ struct drm_property *rotation_property; + /** + * @prop_src_x: Default atomic plane property for the plane source + * position in the connected &drm_framebuffer. + */ struct drm_property *prop_src_x; + /** + * @prop_src_y: Default atomic plane property for the plane source + * position in the connected &drm_framebuffer. + */ struct drm_property *prop_src_y; + /** + * @prop_src_w: Default atomic plane property for the plane source + * position in the connected &drm_framebuffer. + */ struct drm_property *prop_src_w; + /** + * @prop_src_h: Default atomic plane property for the plane source + * position in the connected &drm_framebuffer. + */ struct drm_property *prop_src_h; + /** + * @prop_crtc_x: Default atomic plane property for the plane destination + * position in the &drm_crtc is is being shown on. + */ struct drm_property *prop_crtc_x; + /** + * @prop_crtc_y: Default atomic plane property for the plane destination + * position in the &drm_crtc is is being shown on. + */ struct drm_property *prop_crtc_y; + /** + * @prop_crtc_w: Default atomic plane property for the plane destination + * position in the &drm_crtc is is being shown on. + */ struct drm_property *prop_crtc_w; + /** + * @prop_crtc_h: Default atomic plane property for the plane destination + * position in the &drm_crtc is is being shown on. + */ struct drm_property *prop_crtc_h; + /** + * @prop_fb_id: Default atomic plane property to specify the + * &drm_framebuffer. + */ struct drm_property *prop_fb_id; + /** + * @prop_crtc_id: Default atomic plane property to specify the + * &drm_crtc. + */ struct drm_property *prop_crtc_id; + /** + * @prop_active: Default atomic CRTC property to control the active + * state, which is the simplified implementation for DPMS in atomic + * drivers. + */ struct drm_property *prop_active; + /** + * @prop_mode_id: Default atomic CRTC property to set the mode for a + * CRTC. A 0 mode implies that the CRTC is entirely disabled - all + * connectors must be of and active must be set to disabled, too. + */ struct drm_property *prop_mode_id;
- /* DVI-I properties */ + /** + * @dvi_i_subconnector_property: Optional DVI-I property to + * differentiate between analog or digital mode. + */ struct drm_property *dvi_i_subconnector_property; + /** + * @dvi_i_select_subconnector_property: Optional DVI-I property to + * select between analog or digital mode. + */ struct drm_property *dvi_i_select_subconnector_property;
- /* TV properties */ + /** + * @tv_subconnector_property: Optional TV property to differentiate + * between different TV connector types. + */ struct drm_property *tv_subconnector_property; + /** + * @tv_select_subconnector_property: Optional TV property to select + * between different TV connector types. + */ struct drm_property *tv_select_subconnector_property; + /** + * @tv_mode_property: Optional TV property to select + * the output TV mode. + */ struct drm_property *tv_mode_property; + /** + * @tv_left_margin_property: Optional TV property to set the left + * margin. + */ struct drm_property *tv_left_margin_property; + /** + * @tv_right_margin_property: Optional TV property to set the right + * margin. + */ struct drm_property *tv_right_margin_property; + /** + * @tv_top_margin_property: Optional TV property to set the right + * margin. + */ struct drm_property *tv_top_margin_property; + /** + * @tv_bottom_margin_property: Optional TV property to set the right + * margin. + */ struct drm_property *tv_bottom_margin_property; + /** + * @tv_brightness_property: Optional TV property to set the + * brightness. + */ struct drm_property *tv_brightness_property; + /** + * @tv_contrast_property: Optional TV property to set the + * contrast. + */ struct drm_property *tv_contrast_property; + /** + * @tv_flicker_reduction_property: Optional TV property to control the + * flicker reduction mode. + */ struct drm_property *tv_flicker_reduction_property; + /** + * @tv_overscan_property: Optional TV property to control the overscan + * setting. + */ struct drm_property *tv_overscan_property; + /** + * @tv_saturation_property: Optional TV property to set the + * saturation. + */ struct drm_property *tv_saturation_property; + /** + * @tv_hue_property: Optional TV property to set the hue. + */ struct drm_property *tv_hue_property;
- /* Optional properties */ + /** + * @scaling_mode_property: Optional connector property to control the + * upscaling, mostly used for built-in panels. + */ struct drm_property *scaling_mode_property; + /** + * @aspect_ratio_property: Optional connector property to control the + * HDMI infoframe aspect ratio setting. + */ struct drm_property *aspect_ratio_property; + /** + * @dirty_info_property: Optional connector property to give userspace a + * hint that the DIRTY_FB ioctl should be used. + */ struct drm_property *dirty_info_property;
- /* Optional color correction properties */ + /** + * @degamma_lut_property: Optional CRTC property to set the LUT used to + * convert the framebuffer's colors to linear gamma. + */ struct drm_property *degamma_lut_property; + /** + * @degamma_lut_size_property: Optional CRTC property for the size of + * the degamma LUT as supported by the driver (read-only). + */ struct drm_property *degamma_lut_size_property; + /** + * @ctm_property: Optional CRTC property to set the + * matrix used to convert colors after the lookup in the + * degamma LUT. + */ struct drm_property *ctm_property; + /** + * @gamma_lut_property: Optional CRTC property to set the LUT used to + * convert the colors, after the CTM matrix, to the gamma space of the + * connected screen. + */ struct drm_property *gamma_lut_property; + /** + * @gamma_lut_size_property: Optional CRTC property for the size of the + * gamma LUT as supported by the driver (read-only). + */ struct drm_property *gamma_lut_size_property;
- /* properties for virtual machine layout */ + /** + * @suggested_x_property: Optional connector property with a hint for + * the position of the output on the host's screen. + */ struct drm_property *suggested_x_property; + /** + * @suggested_y_property: Optional connector property with a hint for + * the position of the output on the host's screen. + */ struct drm_property *suggested_y_property;
/* dumb ioctl parameters */ uint32_t preferred_depth, prefer_shadow;
- /* whether async page flip is supported or not */ + /** + * @async_page_flip: Does this device support async flips on the primary + * plane? + */ bool async_page_flip;
/**
The drm_irq docs want one function from drmP.h, but that one is a serious mess. Extract it, and while at it improve the docs a bit. There's a bit a header loop issue since core data structures like drm_device and drm_driver aren't in their own headers yet, which means the drm_irq.h include in drmP.h needs to be in just the right spot :(
Also noticed that drm_vblank_crtc->last_wait is entirely unused, remove it.
Signed-off-by: Daniel Vetter daniel.vetter@intel.com --- Documentation/gpu/drm-kms.rst | 4 +-- drivers/gpu/drm/drm_irq.c | 1 - include/drm/drmP.h | 83 ++----------------------------------------- 3 files changed, 5 insertions(+), 83 deletions(-)
diff --git a/Documentation/gpu/drm-kms.rst b/Documentation/gpu/drm-kms.rst index 675221f0a64b..8dfa4b214b96 100644 --- a/Documentation/gpu/drm-kms.rst +++ b/Documentation/gpu/drm-kms.rst @@ -649,5 +649,5 @@ Vertical Blanking and Interrupt Handling Functions Reference .. kernel-doc:: drivers/gpu/drm/drm_irq.c :export:
-.. kernel-doc:: include/drm/drmP.h - :functions: drm_crtc_vblank_waitqueue +.. kernel-doc:: include/drm/drm_irq.h + :internal: diff --git a/drivers/gpu/drm/drm_irq.c b/drivers/gpu/drm/drm_irq.c index 49e83b190e01..b49a4a6e97cd 100644 --- a/drivers/gpu/drm/drm_irq.c +++ b/drivers/gpu/drm/drm_irq.c @@ -1664,7 +1664,6 @@ int drm_wait_vblank(struct drm_device *dev, void *data,
DRM_DEBUG("waiting on vblank count %d, crtc %u\n", vblwait->request.sequence, pipe); - vblank->last_wait = vblwait->request.sequence; DRM_WAIT_ON(ret, vblank->queue, 3 * HZ, (((drm_vblank_count(dev, pipe) - vblwait->request.sequence) <= (1 << 23)) || diff --git a/include/drm/drmP.h b/include/drm/drmP.h index 19cbd7f8d302..5f9caf7ee949 100644 --- a/include/drm/drmP.h +++ b/include/drm/drmP.h @@ -52,7 +52,6 @@ #include <linux/poll.h> #include <linux/ratelimit.h> #include <linux/sched.h> -#include <linux/seqlock.h> #include <linux/slab.h> #include <linux/types.h> #include <linux/vmalloc.h> @@ -87,6 +86,7 @@ struct drm_device_dma; struct drm_dma_handle; struct drm_gem_object; struct drm_master; +struct drm_vblank_crtc;
struct device_node; struct videomode; @@ -684,35 +684,6 @@ struct drm_minor { struct mutex debugfs_lock; /* Protects debugfs_list. */ };
- -struct drm_pending_vblank_event { - struct drm_pending_event base; - unsigned int pipe; - struct drm_event_vblank event; -}; - -struct drm_vblank_crtc { - struct drm_device *dev; /* pointer to the drm_device */ - wait_queue_head_t queue; /**< VBLANK wait queue */ - struct timer_list disable_timer; /* delayed disable timer */ - - seqlock_t seqlock; /* protects vblank count and time */ - - u32 count; /* vblank counter */ - struct timeval time; /* vblank timestamp */ - - atomic_t refcount; /* number of users of vblank interruptsper crtc */ - u32 last; /* protected by dev->vbl_lock, used */ - /* for wraparound handling */ - u32 last_wait; /* Last vblank seqno waited per CRTC */ - unsigned int inmodeset; /* Display driver is setting mode */ - unsigned int pipe; /* crtc index */ - int framedur_ns; /* frame/field duration in ns */ - int linedur_ns; /* line duration in ns */ - bool enabled; /* so we don't call enable more than - once per disable */ -}; - /** * DRM device structure. This structure represent a complete card that * may contain multiple heads. @@ -847,6 +818,8 @@ struct drm_device { int switch_power_state; };
+#include <drm/drm_irq.h> + #define DRM_SWITCH_POWER_ON 0 #define DRM_SWITCH_POWER_OFF 1 #define DRM_SWITCH_POWER_CHANGING 2 @@ -933,56 +906,6 @@ void drm_clflush_virt_range(void *addr, unsigned long length); * DMA quiscent + idle. DMA quiescent usually requires the hardware lock. */
- /* IRQ support (drm_irq.h) */ -extern int drm_irq_install(struct drm_device *dev, int irq); -extern int drm_irq_uninstall(struct drm_device *dev); - -extern int drm_vblank_init(struct drm_device *dev, unsigned int num_crtcs); -extern int drm_wait_vblank(struct drm_device *dev, void *data, - struct drm_file *filp); -extern u32 drm_vblank_count(struct drm_device *dev, unsigned int pipe); -extern u32 drm_crtc_vblank_count(struct drm_crtc *crtc); -extern u32 drm_crtc_vblank_count_and_time(struct drm_crtc *crtc, - struct timeval *vblanktime); -extern void drm_crtc_send_vblank_event(struct drm_crtc *crtc, - struct drm_pending_vblank_event *e); -extern void drm_crtc_arm_vblank_event(struct drm_crtc *crtc, - struct drm_pending_vblank_event *e); -extern bool drm_handle_vblank(struct drm_device *dev, unsigned int pipe); -extern bool drm_crtc_handle_vblank(struct drm_crtc *crtc); -extern int drm_crtc_vblank_get(struct drm_crtc *crtc); -extern void drm_crtc_vblank_put(struct drm_crtc *crtc); -extern void drm_wait_one_vblank(struct drm_device *dev, unsigned int pipe); -extern void drm_crtc_wait_one_vblank(struct drm_crtc *crtc); -extern void drm_vblank_off(struct drm_device *dev, unsigned int pipe); -extern void drm_vblank_on(struct drm_device *dev, unsigned int pipe); -extern void drm_crtc_vblank_off(struct drm_crtc *crtc); -extern void drm_crtc_vblank_reset(struct drm_crtc *crtc); -extern void drm_crtc_vblank_on(struct drm_crtc *crtc); -extern void drm_vblank_cleanup(struct drm_device *dev); -extern u32 drm_accurate_vblank_count(struct drm_crtc *crtc); -extern u32 drm_vblank_no_hw_counter(struct drm_device *dev, unsigned int pipe); - -extern int drm_calc_vbltimestamp_from_scanoutpos(struct drm_device *dev, - unsigned int pipe, int *max_error, - struct timeval *vblank_time, - unsigned flags, - const struct drm_display_mode *mode); -extern void drm_calc_timestamping_constants(struct drm_crtc *crtc, - const struct drm_display_mode *mode); - -/** - * drm_crtc_vblank_waitqueue - get vblank waitqueue for the CRTC - * @crtc: which CRTC's vblank waitqueue to retrieve - * - * This function returns a pointer to the vblank waitqueue for the CRTC. - * Drivers can use this to implement vblank waits using wait_event() & co. - */ -static inline wait_queue_head_t *drm_crtc_vblank_waitqueue(struct drm_crtc *crtc) -{ - return &crtc->dev->vblank[drm_crtc_index(crtc)].queue; -} - /* drm_drv.c */ void drm_put_dev(struct drm_device *dev); void drm_unplug_dev(struct drm_device *dev);
Never added when the DP validation code was added.
Signed-off-by: Daniel Vetter daniel.vetter@intel.com --- include/drm/drm_dp_helper.h | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index 4d85cf2874af..72dee1213268 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h @@ -747,7 +747,14 @@ struct drm_dp_aux { struct mutex hw_mutex; ssize_t (*transfer)(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg); - unsigned i2c_nack_count, i2c_defer_count; + /** + * @i2c_nack_count: Counts I2C NACKs, used for DP validation. + */ + unsigned i2c_nack_count; + /** + * @i2c_defer_count: Counts I2C DEFERs, used for DP validation. + */ + unsigned i2c_defer_count; };
ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset,
Just replicates whether the list is empty or not. Nuke code to avoid writing docs for it!
Cc: Dave Airlie airlied@redhat.com Signed-off-by: Daniel Vetter daniel.vetter@ffwll.ch --- drivers/gpu/drm/drm_dp_mst_topology.c | 13 +++---------- include/drm/drm_dp_mst_helper.h | 1 - 2 files changed, 3 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c b/drivers/gpu/drm/drm_dp_mst_topology.c index 6537908050d7..5020a2aaffeb 100644 --- a/drivers/gpu/drm/drm_dp_mst_topology.c +++ b/drivers/gpu/drm/drm_dp_mst_topology.c @@ -1493,11 +1493,8 @@ static void process_single_down_tx_qlock(struct drm_dp_mst_topology_mgr *mgr) WARN_ON(!mutex_is_locked(&mgr->qlock));
/* construct a chunk from the first msg in the tx_msg queue */ - if (list_empty(&mgr->tx_msg_downq)) { - mgr->tx_down_in_progress = false; + if (list_empty(&mgr->tx_msg_downq)) return; - } - mgr->tx_down_in_progress = true;
txmsg = list_first_entry(&mgr->tx_msg_downq, struct drm_dp_sideband_msg_tx, next); ret = process_single_tx_qlock(mgr, txmsg, false); @@ -1512,10 +1509,6 @@ static void process_single_down_tx_qlock(struct drm_dp_mst_topology_mgr *mgr) txmsg->state = DRM_DP_SIDEBAND_TX_TIMEOUT; wake_up(&mgr->tx_waitq); } - if (list_empty(&mgr->tx_msg_downq)) { - mgr->tx_down_in_progress = false; - return; - } }
/* called holding qlock */ @@ -1538,7 +1531,7 @@ static void drm_dp_queue_down_tx(struct drm_dp_mst_topology_mgr *mgr, { mutex_lock(&mgr->qlock); list_add_tail(&txmsg->next, &mgr->tx_msg_downq); - if (!mgr->tx_down_in_progress) + if (list_is_singular(&mgr->tx_msg_downq)) process_single_down_tx_qlock(mgr); mutex_unlock(&mgr->qlock); } @@ -2887,7 +2880,7 @@ static void drm_dp_tx_work(struct work_struct *work) struct drm_dp_mst_topology_mgr *mgr = container_of(work, struct drm_dp_mst_topology_mgr, tx_work);
mutex_lock(&mgr->qlock); - if (mgr->tx_down_in_progress) + if (!list_empty(&mgr->tx_msg_downq)) process_single_down_tx_qlock(mgr); mutex_unlock(&mgr->qlock); } diff --git a/include/drm/drm_dp_mst_helper.h b/include/drm/drm_dp_mst_helper.h index fdb47051d549..c49bbfaf3cbb 100644 --- a/include/drm/drm_dp_mst_helper.h +++ b/include/drm/drm_dp_mst_helper.h @@ -446,7 +446,6 @@ struct drm_dp_mst_topology_mgr { the mstb tx_slots and txmsg->state once they are queued */ struct mutex qlock; struct list_head tx_msg_downq; - bool tx_down_in_progress;
/* payload info + lock for it */ struct mutex payload_lock;
On Fri, Jul 15, 2016 at 09:48:03PM +0200, Daniel Vetter wrote:
Just replicates whether the list is empty or not. Nuke code to avoid writing docs for it!
Cc: Dave Airlie airlied@redhat.com Signed-off-by: Daniel Vetter daniel.vetter@ffwll.ch
Reviewed-by: Chris Wilson chris@chris-wilson.co.uk
Unless Dave to planned to use it elsewhere, tx_msg_downq is indeed redundant. -Chris
Cc: Dave Airlie airlied@redhat.com Signed-off-by: Daniel Vetter daniel.vetter@ffwll.ch --- drivers/gpu/drm/drm_dp_mst_topology.c | 1 + include/drm/drm_dp_mst_helper.h | 140 ++++++++++++++++++++++++++++------ 2 files changed, 117 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c b/drivers/gpu/drm/drm_dp_mst_topology.c index 5020a2aaffeb..04e457117980 100644 --- a/drivers/gpu/drm/drm_dp_mst_topology.c +++ b/drivers/gpu/drm/drm_dp_mst_topology.c @@ -2365,6 +2365,7 @@ EXPORT_SYMBOL(drm_dp_mst_hpd_irq);
/** * drm_dp_mst_detect_port() - get connection status for an MST port + * @connector: DRM connector for this port * @mgr: manager for this port * @port: unverified pointer to a port * diff --git a/include/drm/drm_dp_mst_helper.h b/include/drm/drm_dp_mst_helper.h index c49bbfaf3cbb..003207670597 100644 --- a/include/drm/drm_dp_mst_helper.h +++ b/include/drm/drm_dp_mst_helper.h @@ -87,7 +87,15 @@ struct drm_dp_mst_port { struct drm_connector *connector; struct drm_dp_mst_topology_mgr *mgr;
- struct edid *cached_edid; /* for DP logical ports - make tiling work */ + /** + * @cached_edid: for DP logical ports - make tiling work by ensuring + * that the EDID for all connectors is read immediately. + */ + struct edid *cached_edid; + /** + * @has_audio: Tracks whether the sink connector to this port is + * audio-capable. + */ bool has_audio; };
@@ -397,70 +405,154 @@ struct drm_dp_payload {
/** * struct drm_dp_mst_topology_mgr - DisplayPort MST manager - * @dev: device pointer for adding i2c devices etc. - * @cbs: callbacks for connector addition and destruction. - * @max_dpcd_transaction_bytes - maximum number of bytes to read/write in one go. - * @aux: aux channel for the DP connector. - * @max_payloads: maximum number of payloads the GPU can generate. - * @conn_base_id: DRM connector ID this mgr is connected to. - * @down_rep_recv: msg receiver state for down replies. - * @up_req_recv: msg receiver state for up requests. - * @lock: protects mst state, primary, dpcd. - * @mst_state: if this manager is enabled for an MST capable port. - * @mst_primary: pointer to the primary branch device. - * @dpcd: cache of DPCD for primary port. - * @pbn_div: PBN to slots divisor. * * This struct represents the toplevel displayport MST topology manager. * There should be one instance of this for every MST capable DP connector * on the GPU. */ struct drm_dp_mst_topology_mgr { - + /** + * @dev: device pointer for adding i2c devices etc. + */ struct device *dev; + /** + * @cbs: callbacks for connector addition and destruction. + */ const struct drm_dp_mst_topology_cbs *cbs; + /** + * @max_dpcd_transaction_bytes: maximum number of bytes to read/write + * in one go. + */ int max_dpcd_transaction_bytes; - struct drm_dp_aux *aux; /* auxch for this topology mgr to use */ + /** + * @aux: AUX channel for the DP MST connector this topolgy mgr is + * controlling. + */ + struct drm_dp_aux *aux; + /** + * @max_payloads: maximum number of payloads the GPU can generate. + */ int max_payloads; + /** + * @conn_base_id: DRM connector ID this mgr is connected to. Only used + * to build the MST connector path value. + */ int conn_base_id;
- /* only ever accessed from the workqueue - which should be serialised */ + /** + * @down_rep_recv: Message receiver state for down replies. This and + * @up_req_recv are only ever access from the work item, which is + * serialised. + */ struct drm_dp_sideband_msg_rx down_rep_recv; + /** + * @up_req_recv: Message receiver state for up requests. This and + * @down_rep_recv are only ever access from the work item, which is + * serialised. + */ struct drm_dp_sideband_msg_rx up_req_recv;
- /* pointer to info about the initial MST device */ - struct mutex lock; /* protects mst_state + primary + dpcd */ + /** + * @lock: protects mst state, primary, dpcd. + */ + struct mutex lock;
+ /** + * @mst_state: If this manager is enabled for an MST capable port. False + * if no MST sink/branch devices is connected. + */ bool mst_state; + /** + * @mst_primary: Pointer to the primary/first branch device. + */ struct drm_dp_mst_branch *mst_primary;
+ /** + * @dpcd: Cache of DPCD for primary port. + */ u8 dpcd[DP_RECEIVER_CAP_SIZE]; + /** + * @sink_count: Sink count from DEVICE_SERVICE_IRQ_VECTOR_ESI0. + */ u8 sink_count; + /** + * @pbn_div: PBN to slots divisor. + */ int pbn_div; + /** + * @total_slots: Total slots that can be allocated. + */ int total_slots; + /** + * @avail_slots: Still available slots that can be allocated. + */ int avail_slots; + /** + * @total_pbn: Total PBN count. + */ int total_pbn;
- /* messages to be transmitted */ - /* qlock protects the upq/downq and in_progress, - the mstb tx_slots and txmsg->state once they are queued */ + /** + * @qlock: protects @tx_msg_downq, the tx_slots in struct + * &drm_dp_mst_branch and txmsg->state once they are queued + */ struct mutex qlock; + /** + * @tx_msg_downq: List of pending down replies. + */ struct list_head tx_msg_downq;
- /* payload info + lock for it */ + /** + * @payload_lock: Protect payload information. + */ struct mutex payload_lock; + /** + * @proposed_vcpis: Array of pointers for the new VCPI allocation. The + * VCPI structure itself is embedded into the corresponding + * &drm_dp_mst_port structure. + */ struct drm_dp_vcpi **proposed_vcpis; + /** + * @payloads: Array of payloads. + */ struct drm_dp_payload *payloads; + /** + * @payload_mask: Elements of @payloads actually in use. Since + * reallocation of active outputs isn't possible gaps can be created by + * disabling outputs out of order compared to how they've been enabled. + */ unsigned long payload_mask; + /** + * @vcpi_mask: Similar to @payload_mask, but for @proposed_vcpis. + */ unsigned long vcpi_mask;
+ /** + * @tx_waitq: Wait to queue stall for the tx worker. + */ wait_queue_head_t tx_waitq; + /** + * @work: Probe work. + */ struct work_struct work; - + /** + * @tx_work: Sideband transmit worker. This can nest within the main + * @work worker for each transaction @work launches. + */ struct work_struct tx_work;
+ /** + * @destroy_connector_list: List of to be destroyed connectors. + */ struct list_head destroy_connector_list; + /** + * @destroy_connector_lock: Protects @connector_list. + */ struct mutex destroy_connector_lock; + /** + * @destroy_connector_work: Work item to destroy connectors. Needed to + * avoid locking inversion. + */ struct work_struct destroy_connector_work; };
We need :: before, blank lines around and indentation with 4 _additional_ spaces to make it work. Also, don't use @param in code snippets, it results in confusion.
Signed-off-by: Daniel Vetter daniel.vetter@ffwll.ch --- drivers/gpu/drm/i915/intel_uncore.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c index eeb4cbce19ff..43f833901b8e 100644 --- a/drivers/gpu/drm/i915/intel_uncore.c +++ b/drivers/gpu/drm/i915/intel_uncore.c @@ -1618,8 +1618,10 @@ static int gen6_reset_engines(struct drm_i915_private *dev_priv, * @timeout_ms: timeout in millisecond * * This routine waits until the target register @reg contains the expected - * @value after applying the @mask, i.e. it waits until - * (I915_READ_FW(@reg) & @mask) == @value + * @value after applying the @mask, i.e. it waits until :: + * + * (I915_READ_FW(reg) & mask) == value + * * Otherwise, the wait will timeout after @timeout_ms milliseconds. * * Note that this routine assumes the caller holds forcewake asserted, it is @@ -1652,8 +1654,10 @@ int intel_wait_for_register_fw(struct drm_i915_private *dev_priv, * @timeout_ms: timeout in millisecond * * This routine waits until the target register @reg contains the expected - * @value after applying the @mask, i.e. it waits until - * (I915_READ(@reg) & @mask) == @value + * @value after applying the @mask, i.e. it waits until :: + * + * (I915_READ(reg) & mask) == value + * * Otherwise, the wait will timeout after @timeout_ms milliseconds. * * Returns 0 if the register matches the desired condition, or -ETIMEOUT.
Fairly minimal, there's still lots of functions without any docs, and which aren't static. But probably we want to first clean this up some more.
- Drop the bogus const. Marking argument pointers themselves (instead of what they point at) as const provides roughly 0 value. And it's confusing, since the data the pointer points at _is_ being changed.
- Remove kerneldoc for static functions. Keep comments where they seem valuable.
- Indent and whitespace fixes.
- Blockquote the bit field definitions of the descriptor for correct layouting.
Signed-off-by: Daniel Vetter daniel.vetter@ffwll.ch --- drivers/gpu/drm/i915/intel_lrc.c | 99 ++++++++++++---------------------------- 1 file changed, 30 insertions(+), 69 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index b6af635e3a0f..2e670f15881c 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -288,7 +288,6 @@ logical_ring_init_platform_invariants(struct intel_engine_cs *engine) /** * intel_lr_context_descriptor_update() - calculate & cache the descriptor * descriptor for a pinned context - * * @ctx: Context to work on * @engine: Engine the descriptor will be used with * @@ -297,12 +296,13 @@ logical_ring_init_platform_invariants(struct intel_engine_cs *engine) * expensive to calculate, we'll just do it once and cache the result, * which remains valid until the context is unpinned. * - * This is what a descriptor looks like, from LSB to MSB: - * bits 0-11: flags, GEN8_CTX_* (cached in ctx_desc_template) - * bits 12-31: LRCA, GTT address of (the HWSP of) this context - * bits 32-52: ctx ID, a globally unique tag - * bits 53-54: mbz, reserved for use by hardware - * bits 55-63: group ID, currently unused and set to 0 + * This is what a descriptor looks like, from LSB to MSB:: + * + * bits 0-11: flags, GEN8_CTX_* (cached in ctx_desc_template) + * bits 12-31: LRCA, GTT address of (the HWSP of) this context + * bits 32-52: ctx ID, a globally unique tag + * bits 53-54: mbz, reserved for use by hardware + * bits 55-63: group ID, currently unused and set to 0 */ static void intel_lr_context_descriptor_update(struct i915_gem_context *ctx, @@ -539,10 +539,7 @@ get_context_status(struct intel_engine_cs *engine, unsigned int read_pointer, return status; }
-/** - * intel_lrc_irq_handler() - handle Context Switch interrupts - * @data: tasklet handler passed in unsigned long - * +/* * Check the unread Context Status Buffers and manage the submission of new * contexts to the ELSP accordingly. */ @@ -807,7 +804,7 @@ intel_logical_ring_advance_and_submit(struct drm_i915_gem_request *request) }
/** - * execlists_submission() - submit a batchbuffer for execution, Execlists style + * intel_execlists_submission() - submit a batchbuffer for execution, Execlists style * @params: execbuffer call parameters. * @args: execbuffer call arguments. * @vmas: list of vmas. @@ -1094,7 +1091,7 @@ static int intel_logical_ring_workarounds_emit(struct drm_i915_gem_request *req) * code duplication. */ static inline int gen8_emit_flush_coherentl3_wa(struct intel_engine_cs *engine, - uint32_t *const batch, + uint32_t *batch, uint32_t index) { uint32_t l3sqc4_flush = (0x40400000 | GEN8_LQSC_FLUSH_COHERENT_LINES); @@ -1155,37 +1152,24 @@ static inline int wa_ctx_end(struct i915_wa_ctx_bb *wa_ctx, return 0; }
-/** - * gen8_init_indirectctx_bb() - initialize indirect ctx batch with WA - * - * @engine: only applicable for RCS - * @wa_ctx: structure representing wa_ctx - * offset: specifies start of the batch, should be cache-aligned. This is updated - * with the offset value received as input. - * size: size of the batch in DWORDS but HW expects in terms of cachelines - * @batch: page in which WA are loaded - * @offset: This field specifies the start of the batch, it should be - * cache-aligned otherwise it is adjusted accordingly. - * Typically we only have one indirect_ctx and per_ctx batch buffer which are - * initialized at the beginning and shared across all contexts but this field - * helps us to have multiple batches at different offsets and select them based - * on a criteria. At the moment this batch always start at the beginning of the page - * and at this point we don't have multiple wa_ctx batch buffers. - * - * The number of WA applied are not known at the beginning; we use this field - * to return the no of DWORDS written. +/* + * Typically we only have one indirect_ctx and per_ctx batch buffer which are + * initialized at the beginning and shared across all contexts but this field + * helps us to have multiple batches at different offsets and select them based + * on a criteria. At the moment this batch always start at the beginning of the page + * and at this point we don't have multiple wa_ctx batch buffers. * - * It is to be noted that this batch does not contain MI_BATCH_BUFFER_END - * so it adds NOOPs as padding to make it cacheline aligned. - * MI_BATCH_BUFFER_END will be added to perctx batch and both of them together - * makes a complete batch buffer. + * The number of WA applied are not known at the beginning; we use this field + * to return the no of DWORDS written. * - * Return: non-zero if we exceed the PAGE_SIZE limit. + * It is to be noted that this batch does not contain MI_BATCH_BUFFER_END + * so it adds NOOPs as padding to make it cacheline aligned. + * MI_BATCH_BUFFER_END will be added to perctx batch and both of them together + * makes a complete batch buffer. */ - static int gen8_init_indirectctx_bb(struct intel_engine_cs *engine, struct i915_wa_ctx_bb *wa_ctx, - uint32_t *const batch, + uint32_t *batch, uint32_t *offset) { uint32_t scratch_addr; @@ -1229,26 +1213,18 @@ static int gen8_init_indirectctx_bb(struct intel_engine_cs *engine, return wa_ctx_end(wa_ctx, *offset = index, CACHELINE_DWORDS); }
-/** - * gen8_init_perctx_bb() - initialize per ctx batch with WA - * - * @engine: only applicable for RCS - * @wa_ctx: structure representing wa_ctx - * offset: specifies start of the batch, should be cache-aligned. - * size: size of the batch in DWORDS but HW expects in terms of cachelines - * @batch: page in which WA are loaded - * @offset: This field specifies the start of this batch. - * This batch is started immediately after indirect_ctx batch. Since we ensure - * that indirect_ctx ends on a cacheline this batch is aligned automatically. +/* + * This batch is started immediately after indirect_ctx batch. Since we ensure + * that indirect_ctx ends on a cacheline this batch is aligned automatically. * - * The number of DWORDS written are returned using this field. + * The number of DWORDS written are returned using this field. * * This batch is terminated with MI_BATCH_BUFFER_END and so we need not add padding * to align it with cacheline as padding after MI_BATCH_BUFFER_END is redundant. */ static int gen8_init_perctx_bb(struct intel_engine_cs *engine, struct i915_wa_ctx_bb *wa_ctx, - uint32_t *const batch, + uint32_t *batch, uint32_t *offset) { uint32_t index = wa_ctx_start(wa_ctx, *offset, CACHELINE_DWORDS); @@ -1263,7 +1239,7 @@ static int gen8_init_perctx_bb(struct intel_engine_cs *engine,
static int gen9_init_indirectctx_bb(struct intel_engine_cs *engine, struct i915_wa_ctx_bb *wa_ctx, - uint32_t *const batch, + uint32_t *batch, uint32_t *offset) { int ret; @@ -1330,7 +1306,7 @@ static int gen9_init_indirectctx_bb(struct intel_engine_cs *engine,
static int gen9_init_perctx_bb(struct intel_engine_cs *engine, struct i915_wa_ctx_bb *wa_ctx, - uint32_t *const batch, + uint32_t *batch, uint32_t *offset) { uint32_t index = wa_ctx_start(wa_ctx, *offset, CACHELINE_DWORDS); @@ -1916,9 +1892,7 @@ static int gen8_init_rcs_context(struct drm_i915_gem_request *req)
/** * intel_logical_ring_cleanup() - deallocate the Engine Command Streamer - * * @engine: Engine Command Streamer. - * */ void intel_logical_ring_cleanup(struct intel_engine_cs *engine) { @@ -2365,19 +2339,6 @@ uint32_t intel_lr_context_size(struct intel_engine_cs *engine) return ret; }
-/** - * execlists_context_deferred_alloc() - create the LRC specific bits of a context - * @ctx: LR context to create. - * @engine: engine to be used with the context. - * - * This function can be called more than once, with different engines, if we plan - * to use the context with them. The context backing objects and the ringbuffers - * (specially the ringbuffer backing objects) suck a lot of memory up, and that's why - * the creation is a deferred call: it's better to make sure first that we need to use - * a given ring with the context. - * - * Return: non-zero on error. - */ static int execlists_context_deferred_alloc(struct i915_gem_context *ctx, struct intel_engine_cs *engine) {
On Fri, Jul 15, 2016 at 09:48:06PM +0200, Daniel Vetter wrote:
Fairly minimal, there's still lots of functions without any docs, and which aren't static. But probably we want to first clean this up some more.
- Drop the bogus const. Marking argument pointers themselves (instead of what they point at) as const provides roughly 0 value. And it's confusing, since the data the pointer points at _is_ being changed.
It served its purpose of getting the compiler to sanity check that batch was unchanged as we passed it around the various obscuration macros. -Chris
Not sure why so much slips through when 0day is catching these. Hopefully the much faster sphinx toolchain helps in unlazying people.
Signed-off-by: Daniel Vetter daniel.vetter@ffwll.ch --- drivers/gpu/drm/i915/i915_gem.c | 2 +- drivers/gpu/drm/i915/i915_vgpu.c | 3 ++- drivers/gpu/drm/i915/intel_fbc.c | 2 ++ drivers/gpu/drm/i915/intel_hotplug.c | 1 - 4 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index cf0e8aa8035c..0151c0ce037d 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -916,7 +916,7 @@ fast_user_write(struct io_mapping *mapping, /** * This is the fast pwrite path, where we copy the data directly from the * user into the GTT, uncached. - * @dev: drm device pointer + * @i915: i915 device private data * @obj: i915 gem object * @args: pwrite arguments structure * @file: drm file pointer diff --git a/drivers/gpu/drm/i915/i915_vgpu.c b/drivers/gpu/drm/i915/i915_vgpu.c index f6acb5a0e701..142bac976919 100644 --- a/drivers/gpu/drm/i915/i915_vgpu.c +++ b/drivers/gpu/drm/i915/i915_vgpu.c @@ -97,6 +97,7 @@ static struct _balloon_info_ bl_info;
/** * intel_vgt_deballoon - deballoon reserved graphics address trunks + * @dev_priv: i915 device private data * * This function is called to deallocate the ballooned-out graphic memory, when * driver is unloaded or when ballooning fails. @@ -138,7 +139,7 @@ static int vgt_balloon_space(struct drm_mm *mm,
/** * intel_vgt_balloon - balloon out reserved graphics address trunks - * @dev: drm device + * @dev_priv: i915 device private data * * This function is called at the initialization stage, to balloon out the * graphic address space allocated to other vGPUs, by marking these spaces as diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c index 6a7ad3ed1463..781e2f5f7cd8 100644 --- a/drivers/gpu/drm/i915/intel_fbc.c +++ b/drivers/gpu/drm/i915/intel_fbc.c @@ -1075,6 +1075,8 @@ out: /** * intel_fbc_enable: tries to enable FBC on the CRTC * @crtc: the CRTC + * @crtc_state: corresponding &drm_crtc_state for @crtc + * @plane_state: corresponding &drm_plane_state for the primary plane of @crtc * * This function checks if the given CRTC was chosen for FBC, then enables it if * possible. Notice that it doesn't activate FBC. It is valid to call diff --git a/drivers/gpu/drm/i915/intel_hotplug.c b/drivers/gpu/drm/i915/intel_hotplug.c index f271f1452b98..40ce263d715f 100644 --- a/drivers/gpu/drm/i915/intel_hotplug.c +++ b/drivers/gpu/drm/i915/intel_hotplug.c @@ -527,7 +527,6 @@ void i915_hpd_poll_init_work(struct work_struct *work) { /** * intel_hpd_poll_init - enables/disables polling for connectors with hpd * @dev_priv: i915 device instance - * @enabled: Whether to enable or disable polling * * This function enables polling for all connectors, regardless of whether or * not they support hotplug detection. Under certain conditions HPD may not be
This is unfortunately not all the sphinx noise when building the gpu documentations. But the remaining warnings have completely bogus line and probably also file sources, and I just can't find them.
Probably some serious debuggging of the line annotations in the sphinx/kernel-doc toolchain needed first.
Signed-off-by: Daniel Vetter daniel.vetter@intel.com --- Documentation/gpu/drm-internals.rst | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-)
diff --git a/Documentation/gpu/drm-internals.rst b/Documentation/gpu/drm-internals.rst index 490d655cda20..3bb26135971f 100644 --- a/Documentation/gpu/drm-internals.rst +++ b/Documentation/gpu/drm-internals.rst @@ -188,7 +188,8 @@ Manual IRQ Registration Drivers that require multiple interrupt handlers can't use the managed IRQ registration functions. In that case IRQs must be registered and unregistered manually (usually with the :c:func:`request_irq()` and -:c:func:`free_irq()` functions, or their devm_* equivalent). +:c:func:`free_irq()` functions, or their :c:func:`devm_request_irq()` and +:c:func:`devm_free_irq()` equivalents).
When manually registering IRQs, drivers must not set the DRIVER_HAVE_IRQ driver feature flag, and must not provide the @@ -242,11 +243,13 @@ Open/Close, File Operations and IOCTLs Open and Close --------------
-int (*firstopen) (struct drm_device *); void (*lastclose) (struct -drm_device *); int (*open) (struct drm_device *, struct drm_file -*); void (*preclose) (struct drm_device *, struct drm_file *); -void (*postclose) (struct drm_device *, struct drm_file *); - Open and close handlers. None of those methods are mandatory. +Open and close handlers. None of those methods are mandatory:: + + int (*firstopen) (struct drm_device *); + void (*lastclose) (struct drm_device *); + int (*open) (struct drm_device *, struct drm_file *); + void (*preclose) (struct drm_device *, struct drm_file *); + void (*postclose) (struct drm_device *, struct drm_file *);
The firstopen method is called by the DRM core for legacy UMS (User Mode Setting) drivers only when an application opens a device that has no
On Fri, Jul 15, 2016 at 09:47:58PM +0200, Daniel Vetter wrote:
Right now there's nothing, and kernel-doc produces a warning because of that. Remove it until we need it for a clean build.
Cc: Laurent Pinchart laurent.pinchart+renesas@ideasonboard.com Signed-off-by: Daniel Vetter daniel.vetter@intel.com
Pulled in the entire pile with Chris' irc-ack, and the few things he commented on polished. -Daniel
Documentation/gpu/drm-kms.rst | 3 --- 1 file changed, 3 deletions(-)
diff --git a/Documentation/gpu/drm-kms.rst b/Documentation/gpu/drm-kms.rst index 0e1c80436c1d..675221f0a64b 100644 --- a/Documentation/gpu/drm-kms.rst +++ b/Documentation/gpu/drm-kms.rst @@ -67,9 +67,6 @@ drivers can manually clean up a framebuffer at module unload time with DRM Format Handling
-.. kernel-doc:: include/drm/drm_fourcc.h
- :internal:
.. kernel-doc:: drivers/gpu/drm/drm_fourcc.c :export:
-- 2.8.1
dri-devel@lists.freedesktop.org
-
Chris Wilson -
Daniel Vetter -
Daniel Vetter