This patch defines the hdcp2.2 protocol messages for authentication.

v2: bit_fields are removed. Instead bitmasking used. [Tomas and Jani] prefix HDCP_2_2_ is added to the macros. [Tomas] v3: No Changes. v4: Style and spellings are fixed [Uma] v5: Fix for macros.

Signed-off-by: Ramalingam C ramalingam.c@intel.com --- include/drm/drm_hdcp.h | 179 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 179 insertions(+)

diff --git a/include/drm/drm_hdcp.h b/include/drm/drm_hdcp.h index 98e63d870139..3e963c5d04b2 100644 --- a/include/drm/drm_hdcp.h +++ b/include/drm/drm_hdcp.h @@ -38,4 +38,183 @@ #define DRM_HDCP_DDC_BSTATUS 0x41 #define DRM_HDCP_DDC_KSV_FIFO 0x43

+#define DRM_HDCP_1_4_SRM_ID 0x8 +#define DRM_HDCP_1_4_VRL_LENGTH_SIZE 3 +#define DRM_HDCP_1_4_DCP_SIG_SIZE 40 + +/* Protocol message definition for HDCP2.2 specification */ +#define HDCP_STREAM_TYPE0 0x00 +#define HDCP_STREAM_TYPE1 0x01 + +/* HDCP2.2 Msg IDs */ +#define HDCP_2_2_NULL_MSG 1 +#define HDCP_2_2_AKE_INIT 2 +#define HDCP_2_2_AKE_SEND_CERT 3 +#define HDCP_2_2_AKE_NO_STORED_KM 4 +#define HDCP_2_2_AKE_STORED_KM 5 +#define HDCP_2_2_AKE_SEND_HPRIME 7 +#define HDCP_2_2_AKE_SEND_PAIRING_INFO 8 +#define HDCP_2_2_LC_INIT 9 +#define HDCP_2_2_LC_SEND_LPRIME 10 +#define HDCP_2_2_SKE_SEND_EKS 11 +#define HDCP_2_2_REP_SEND_RECVID_LIST 12 +#define HDCP_2_2_REP_SEND_ACK 15 +#define HDCP_2_2_REP_STREAM_MANAGE 16 +#define HDCP_2_2_REP_STREAM_READY 17 +#define HDCP_2_2_ERRATA_DP_STREAM_TYPE 50 + +#define HDCP_2_2_RTX_LEN 8 +#define HDCP_2_2_RRX_LEN 8 + +#define HDCP_2_2_K_PUB_RX_MOD_N_LEN 128 +#define HDCP_2_2_K_PUB_RX_EXP_E_LEN 3 +#define HDCP_2_2_K_PUB_RX_LEN (HDCP_2_2_K_PUB_RX_MOD_N_LEN + \ + HDCP_2_2_K_PUB_RX_EXP_E_LEN) + +#define HDCP_2_2_DCP_LLC_SIG_LEN 384 + +#define HDCP_2_2_E_KPUB_KM_LEN 128 +#define HDCP_2_2_E_KH_KM_M_LEN (16 + 16) +#define HDCP_2_2_H_PRIME_LEN 32 +#define HDCP_2_2_E_KH_KM_LEN 16 +#define HDCP_2_2_RN_LEN 8 +#define HDCP_2_2_L_PRIME_LEN 32 +#define HDCP_2_2_E_DKEY_KS_LEN 16 +#define HDCP_2_2_RIV_LEN 8 +#define HDCP_2_2_SEQ_NUM_LEN 3 +#define HDCP_2_2_LPRIME_HALF_LEN (HDCP_2_2_L_PRIME_LEN / 2) +#define HDCP_2_2_RECEIVER_ID_LEN DRM_HDCP_KSV_LEN +#define HDCP_2_2_MAX_DEVICE_COUNT 31 +#define HDCP_2_2_RECEIVER_IDS_MAX_LEN (HDCP_2_2_RECEIVER_ID_LEN * \ + HDCP_2_2_MAX_DEVICE_COUNT) +#define HDCP_2_2_MPRIME_LEN 32 + +/* Following Macros take a byte at a time for bit(s) masking */ +/* + * TODO: This has to be changed for DP MST, as multiple stream on + * same port is possible. + * For HDCP2.2 on HDMI and DP SST this value is always 1. + */ +#define HDCP_2_2_MAX_CONTENT_STREAMS_CNT 1 +#define HDCP_2_2_TXCAP_MASK_LEN 2 +#define HDCP_2_2_RXCAPS_LEN 3 +#define HDCP_2_2_RX_REPEATER(x) ((x) & BIT(0)) +#define HDCP_2_2_DP_HDCP_CAPABLE(x) ((x) & BIT(1)) +#define HDCP_2_2_RXINFO_LEN 2 + +/* HDCP1.x compliant device in downstream */ +#define HDCP_2_2_HDCP1_DEVICE_CONNECTED(x) ((x) & BIT(0)) + +/* HDCP2.0 Compliant repeater in downstream */ +#define HDCP_2_2_HDCP_2_0_REP_CONNECTED(x) ((x) & BIT(1)) +#define HDCP_2_2_MAX_CASCADE_EXCEEDED(x) ((x) & BIT(2)) +#define HDCP_2_2_MAX_DEVS_EXCEEDED(x) ((x) & BIT(3)) +#define HDCP_2_2_DEV_COUNT_LO(x) (((x) & (0xF << 4)) >> 4) +#define HDCP_2_2_DEV_COUNT_HI(x) ((x) & BIT(0)) +#define HDCP_2_2_DEPTH(x) (((x) & (0x7 << 1)) >> 1) + +struct hdcp2_cert_rx { + uint8_t receiver_id[HDCP_2_2_RECEIVER_ID_LEN]; + uint8_t kpub_rx[HDCP_2_2_K_PUB_RX_LEN]; + uint8_t reserved[2]; + uint8_t dcp_signature[HDCP_2_2_DCP_LLC_SIG_LEN]; +} __packed; + +struct hdcp2_streamid_type { + uint8_t stream_id; + uint8_t stream_type; +} __packed; + +/* + * The TxCaps field specified in the HDCP HDMI, DP specs + * This field is big endian as specified in the errata. + */ +struct hdcp2_tx_caps { + /* Transmitter must set this to 0x2 */ + uint8_t version; + + /* Reserved for HDCP and DP Spec. Read as Zero */ + uint8_t tx_cap_mask[HDCP_2_2_TXCAP_MASK_LEN]; +} __packed; + +/* Main structures for HDCP2.2 protocol communication */ +struct hdcp2_ake_init { + uint8_t msg_id; + uint8_t r_tx[HDCP_2_2_RTX_LEN]; + struct hdcp2_tx_caps tx_caps; +} __packed; + +struct hdcp2_ake_send_cert { + uint8_t msg_id; + struct hdcp2_cert_rx cert_rx; + uint8_t r_rx[HDCP_2_2_RRX_LEN]; + uint8_t rx_caps[HDCP_2_2_RXCAPS_LEN]; +} __packed; + +struct hdcp2_ake_no_stored_km { + uint8_t msg_id; + uint8_t e_kpub_km[HDCP_2_2_E_KPUB_KM_LEN]; +} __packed; + +struct hdcp2_ake_stored_km { + uint8_t msg_id; + uint8_t e_kh_km_m[HDCP_2_2_E_KH_KM_M_LEN]; +} __packed; + +struct hdcp2_ake_send_hprime { + uint8_t msg_id; + uint8_t h_prime[HDCP_2_2_H_PRIME_LEN]; +} __packed; + +struct hdcp2_ake_send_pairing_info { + uint8_t msg_id; + uint8_t e_kh_km[HDCP_2_2_E_KH_KM_LEN]; +} __packed; + +struct hdcp2_lc_init { + uint8_t msg_id; + uint8_t r_n[HDCP_2_2_RN_LEN]; +} __packed; + +struct hdcp2_lc_send_lprime { + uint8_t msg_id; + uint8_t l_prime[HDCP_2_2_L_PRIME_LEN]; +} __packed; + +struct hdcp2_ske_send_eks { + uint8_t msg_id; + uint8_t e_dkey_ks[HDCP_2_2_E_DKEY_KS_LEN]; + uint8_t riv[HDCP_2_2_RIV_LEN]; +} __packed; + +struct hdcp2_rep_send_receiverid_list { + uint8_t msg_id; + uint8_t rx_info[HDCP_2_2_RXINFO_LEN]; + uint8_t seq_num_v[HDCP_2_2_SEQ_NUM_LEN]; + uint8_t v_prime[HDCP_2_2_LPRIME_HALF_LEN]; + uint8_t receiver_ids[HDCP_2_2_RECEIVER_IDS_MAX_LEN]; +} __packed; + +struct hdcp2_rep_send_ack { + uint8_t msg_id; + uint8_t v[HDCP_2_2_LPRIME_HALF_LEN]; +} __packed; + +struct hdcp2_rep_stream_manage { + uint8_t msg_id; + uint8_t seq_num_m[HDCP_2_2_SEQ_NUM_LEN]; + __be16 k; + struct hdcp2_streamid_type streams[HDCP_2_2_MAX_CONTENT_STREAMS_CNT]; +} __packed; + +struct hdcp2_rep_stream_ready { + uint8_t msg_id; + uint8_t m_prime[HDCP_2_2_MPRIME_LEN]; +} __packed; + +struct hdcp2_dp_errata_stream_type { + uint8_t msg_id; + uint8_t stream_type; +} __packed; + #endif

From: Tomas Winkler tomas.winkler@intel.com

Whitelist HDCP client for in kernel drm use

v2: Rebased. v3: No changes. v4: No changes. v5: No changes.

Signed-off-by: Tomas Winkler tomas.winkler@intel.com --- drivers/misc/mei/bus-fixup.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)

diff --git a/drivers/misc/mei/bus-fixup.c b/drivers/misc/mei/bus-fixup.c index 0208c4b027c5..3df2a69fddfb 100644 --- a/drivers/misc/mei/bus-fixup.c +++ b/drivers/misc/mei/bus-fixup.c @@ -41,6 +41,9 @@ static const uuid_le mei_nfc_info_guid = MEI_UUID_NFC_INFO; #define MEI_UUID_MKHIF_FIX UUID_LE(0x55213584, 0x9a29, 0x4916, \ 0xba, 0xdf, 0xf, 0xb7, 0xed, 0x68, 0x2a, 0xeb)

+#define MEI_UUID_HDCP UUID_LE(0xB638AB7E, 0x94E2, 0x4EA2, \ + 0xA5, 0x52, 0xD1, 0xC5, 0x4B, 0x62, 0x7F, 0x04) + #define MEI_UUID_ANY NULL_UUID_LE

/** @@ -72,6 +75,18 @@ static void blacklist(struct mei_cl_device *cldev) cldev->do_match = 0; }

+/** + * whitelist - forcefully whitelist client + * + * @cldev: me clients device + */ +static void whitelist(struct mei_cl_device *cldev) +{ + dev_dbg(&cldev->dev, "running hook %s\n", __func__); + + cldev->do_match = 1; +} + #define OSTYPE_LINUX 2 struct mei_os_ver { __le16 build; @@ -399,6 +414,7 @@ static struct mei_fixup { MEI_FIXUP(MEI_UUID_NFC_HCI, mei_nfc), MEI_FIXUP(MEI_UUID_WD, mei_wd), MEI_FIXUP(MEI_UUID_MKHIF_FIX, mei_mkhi_fix), + MEI_FIXUP(MEI_UUID_HDCP, whitelist), };

/**

Considering significant number of HDCP specific variables, it will be clean to have separate struct for HDCP.

New structure called intel_hdcp is added within intel_connector.

v2: struct hdcp statically allocated. [Sean Paul] enable and disable function parameters are retained.[Sean Paul] v3: No Changes. v4: Commit msg is rephrased [Uma] v5: Comment for mutex definition.

Signed-off-by: Ramalingam C ramalingam.c@intel.com --- drivers/gpu/drm/i915/intel_display.c | 7 +-- drivers/gpu/drm/i915/intel_drv.h | 15 ++++-- drivers/gpu/drm/i915/intel_hdcp.c | 94 ++++++++++++++++++++---------------- 3 files changed, 67 insertions(+), 49 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 3d849ec17f5c..ef09bb89d2ca 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -15856,9 +15856,10 @@ static void intel_hpd_poll_fini(struct drm_device *dev) for_each_intel_connector_iter(connector, &conn_iter) { if (connector->modeset_retry_work.func) cancel_work_sync(&connector->modeset_retry_work); - if (connector->hdcp_shim) { - cancel_delayed_work_sync(&connector->hdcp_check_work); - cancel_work_sync(&connector->hdcp_prop_work); + if (connector->hdcp.hdcp_shim) { + cancel_delayed_work_sync( + &connector->hdcp.hdcp_check_work); + cancel_work_sync(&connector->hdcp.hdcp_prop_work); } } drm_connector_list_iter_end(&conn_iter); diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 578346b8d7e2..eb480574a92e 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -377,6 +377,15 @@ struct intel_hdcp_shim { bool *hdcp_capable); };

+struct intel_hdcp { + const struct intel_hdcp_shim *hdcp_shim; + /* Mutex for hdcp state of the connector */ + struct mutex hdcp_mutex; + uint64_t hdcp_value; + struct delayed_work hdcp_check_work; + struct work_struct hdcp_prop_work; +}; + struct intel_connector { struct drm_connector base; /* @@ -409,11 +418,7 @@ struct intel_connector { /* Work struct to schedule a uevent on link train failure */ struct work_struct modeset_retry_work;

- const struct intel_hdcp_shim *hdcp_shim; - struct mutex hdcp_mutex; - uint64_t hdcp_value; /* protected by hdcp_mutex */ - struct delayed_work hdcp_check_work; - struct work_struct hdcp_prop_work; + struct intel_hdcp hdcp; };

struct intel_digital_connector_state { diff --git a/drivers/gpu/drm/i915/intel_hdcp.c b/drivers/gpu/drm/i915/intel_hdcp.c index 0cc6a861bcf8..65bbe5874eee 100644 --- a/drivers/gpu/drm/i915/intel_hdcp.c +++ b/drivers/gpu/drm/i915/intel_hdcp.c @@ -626,6 +626,7 @@ struct intel_digital_port *conn_to_dig_port(struct intel_connector *connector)

static int _intel_hdcp_disable(struct intel_connector *connector) { + struct intel_hdcp *hdcp = &connector->hdcp; struct drm_i915_private *dev_priv = connector->base.dev->dev_private; struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector); enum port port = intel_dig_port->base.port; @@ -641,7 +642,7 @@ static int _intel_hdcp_disable(struct intel_connector *connector) return -ETIMEDOUT; }

- ret = connector->hdcp_shim->toggle_signalling(intel_dig_port, false); + ret = hdcp->hdcp_shim->toggle_signalling(intel_dig_port, false); if (ret) { DRM_ERROR("Failed to disable HDCP signalling\n"); return ret; @@ -653,6 +654,7 @@ static int _intel_hdcp_disable(struct intel_connector *connector)

static int _intel_hdcp_enable(struct intel_connector *connector) { + struct intel_hdcp *hdcp = &connector->hdcp; struct drm_i915_private *dev_priv = connector->base.dev->dev_private; int i, ret, tries = 3;

@@ -678,7 +680,7 @@ static int _intel_hdcp_enable(struct intel_connector *connector) /* Incase of authentication failures, HDCP spec expects reauth. */ for (i = 0; i < tries; i++) { ret = intel_hdcp_auth(conn_to_dig_port(connector), - connector->hdcp_shim); + hdcp->hdcp_shim); if (!ret) return 0;

@@ -694,36 +696,42 @@ static int _intel_hdcp_enable(struct intel_connector *connector)

static void intel_hdcp_check_work(struct work_struct *work) { - struct intel_connector *connector = container_of(to_delayed_work(work), + struct intel_hdcp *hdcp = container_of(to_delayed_work(work), + struct intel_hdcp, + hdcp_check_work); + struct intel_connector *connector = container_of(hdcp, struct intel_connector, - hdcp_check_work); + hdcp); + if (!intel_hdcp_check_link(connector)) - schedule_delayed_work(&connector->hdcp_check_work, + schedule_delayed_work(&hdcp->hdcp_check_work, DRM_HDCP_CHECK_PERIOD_MS); }

static void intel_hdcp_prop_work(struct work_struct *work) { - struct intel_connector *connector = container_of(work, + struct intel_hdcp *hdcp = container_of(work, struct intel_hdcp, + hdcp_prop_work); + struct intel_connector *connector = container_of(hdcp, struct intel_connector, - hdcp_prop_work); + hdcp); struct drm_device *dev = connector->base.dev; struct drm_connector_state *state;

drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); - mutex_lock(&connector->hdcp_mutex); + mutex_lock(&hdcp->hdcp_mutex);

/* * This worker is only used to flip between ENABLED/DESIRED. Either of * those to UNDESIRED is handled by core. If hdcp_value == UNDESIRED, * we're running just after hdcp has been disabled, so just exit */ - if (connector->hdcp_value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED) { + if (hdcp->hdcp_value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED) { state = connector->base.state; - state->content_protection = connector->hdcp_value; + state->content_protection = hdcp->hdcp_value; }

- mutex_unlock(&connector->hdcp_mutex); + mutex_unlock(&hdcp->hdcp_mutex); drm_modeset_unlock(&dev->mode_config.connection_mutex); }

@@ -737,6 +745,7 @@ bool is_hdcp_supported(struct drm_i915_private *dev_priv, enum port port) int intel_hdcp_init(struct intel_connector *connector, const struct intel_hdcp_shim *hdcp_shim) { + struct intel_hdcp *hdcp = &connector->hdcp; int ret;

ret = drm_connector_attach_content_protection_property( @@ -744,51 +753,53 @@ int intel_hdcp_init(struct intel_connector *connector, if (ret) return ret;

- connector->hdcp_shim = hdcp_shim; - mutex_init(&connector->hdcp_mutex); - INIT_DELAYED_WORK(&connector->hdcp_check_work, intel_hdcp_check_work); - INIT_WORK(&connector->hdcp_prop_work, intel_hdcp_prop_work); + hdcp->hdcp_shim = hdcp_shim; + mutex_init(&hdcp->hdcp_mutex); + INIT_DELAYED_WORK(&hdcp->hdcp_check_work, intel_hdcp_check_work); + INIT_WORK(&hdcp->hdcp_prop_work, intel_hdcp_prop_work); return 0; }

int intel_hdcp_enable(struct intel_connector *connector) { + struct intel_hdcp *hdcp = &connector->hdcp; int ret;

- if (!connector->hdcp_shim) + if (!hdcp->hdcp_shim) return -ENOENT;

- mutex_lock(&connector->hdcp_mutex); + mutex_lock(&hdcp->hdcp_mutex);

ret = _intel_hdcp_enable(connector); if (ret) goto out;

- connector->hdcp_value = DRM_MODE_CONTENT_PROTECTION_ENABLED; - schedule_work(&connector->hdcp_prop_work); - schedule_delayed_work(&connector->hdcp_check_work, + hdcp->hdcp_value = DRM_MODE_CONTENT_PROTECTION_ENABLED; + schedule_work(&hdcp->hdcp_prop_work); + schedule_delayed_work(&hdcp->hdcp_check_work, DRM_HDCP_CHECK_PERIOD_MS); out: - mutex_unlock(&connector->hdcp_mutex); + mutex_unlock(&hdcp->hdcp_mutex); return ret; }

int intel_hdcp_disable(struct intel_connector *connector) { + struct intel_hdcp *hdcp = &connector->hdcp; int ret = 0;

- if (!connector->hdcp_shim) + if (!hdcp->hdcp_shim) return -ENOENT;

- mutex_lock(&connector->hdcp_mutex); + mutex_lock(&hdcp->hdcp_mutex);

- if (connector->hdcp_value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED) { - connector->hdcp_value = DRM_MODE_CONTENT_PROTECTION_UNDESIRED; + if (hdcp->hdcp_value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED) { + hdcp->hdcp_value = DRM_MODE_CONTENT_PROTECTION_UNDESIRED; ret = _intel_hdcp_disable(connector); }

- mutex_unlock(&connector->hdcp_mutex); - cancel_delayed_work_sync(&connector->hdcp_check_work); + mutex_unlock(&hdcp->hdcp_mutex); + cancel_delayed_work_sync(&hdcp->hdcp_check_work); return ret; }

@@ -828,17 +839,18 @@ void intel_hdcp_atomic_check(struct drm_connector *connector, /* Implements Part 3 of the HDCP authorization procedure */ int intel_hdcp_check_link(struct intel_connector *connector) { + struct intel_hdcp *hdcp = &connector->hdcp; struct drm_i915_private *dev_priv = connector->base.dev->dev_private; struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector); enum port port = intel_dig_port->base.port; int ret = 0;

- if (!connector->hdcp_shim) + if (!hdcp->hdcp_shim) return -ENOENT;

- mutex_lock(&connector->hdcp_mutex); + mutex_lock(&hdcp->hdcp_mutex);

- if (connector->hdcp_value == DRM_MODE_CONTENT_PROTECTION_UNDESIRED) + if (hdcp->hdcp_value == DRM_MODE_CONTENT_PROTECTION_UNDESIRED) goto out;

if (!(I915_READ(PORT_HDCP_STATUS(port)) & HDCP_STATUS_ENC)) { @@ -846,17 +858,17 @@ int intel_hdcp_check_link(struct intel_connector *connector) connector->base.name, connector->base.base.id, I915_READ(PORT_HDCP_STATUS(port))); ret = -ENXIO; - connector->hdcp_value = DRM_MODE_CONTENT_PROTECTION_DESIRED; - schedule_work(&connector->hdcp_prop_work); + hdcp->hdcp_value = DRM_MODE_CONTENT_PROTECTION_DESIRED; + schedule_work(&hdcp->hdcp_prop_work); goto out; }

- if (connector->hdcp_shim->check_link(intel_dig_port)) { - if (connector->hdcp_value != + if (hdcp->hdcp_shim->check_link(intel_dig_port)) { + if (hdcp->hdcp_value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED) { - connector->hdcp_value = + hdcp->hdcp_value = DRM_MODE_CONTENT_PROTECTION_ENABLED; - schedule_work(&connector->hdcp_prop_work); + schedule_work(&hdcp->hdcp_prop_work); } goto out; } @@ -867,20 +879,20 @@ int intel_hdcp_check_link(struct intel_connector *connector) ret = _intel_hdcp_disable(connector); if (ret) { DRM_ERROR("Failed to disable hdcp (%d)\n", ret); - connector->hdcp_value = DRM_MODE_CONTENT_PROTECTION_DESIRED; - schedule_work(&connector->hdcp_prop_work); + hdcp->hdcp_value = DRM_MODE_CONTENT_PROTECTION_DESIRED; + schedule_work(&hdcp->hdcp_prop_work); goto out; }

ret = _intel_hdcp_enable(connector); if (ret) { DRM_ERROR("Failed to enable hdcp (%d)\n", ret); - connector->hdcp_value = DRM_MODE_CONTENT_PROTECTION_DESIRED; - schedule_work(&connector->hdcp_prop_work); + hdcp->hdcp_value = DRM_MODE_CONTENT_PROTECTION_DESIRED; + schedule_work(&hdcp->hdcp_prop_work); goto out; }

out: - mutex_unlock(&connector->hdcp_mutex); + mutex_unlock(&hdcp->hdcp_mutex); return ret; }

Intel HDCP2.2 registers are defined with addr offsets and bit details.

v2: Replaced the arith calc with _PICK [Sean Paul] v3: No changes. v4: %s/HDCP2_CTR_DDI/HDCP2_CTL_DDI [Uma] v5: Added parentheses for the parameters of macro.

Signed-off-by: Ramalingam C ramalingam.c@intel.com --- drivers/gpu/drm/i915/i915_reg.h | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index caad19f5f557..822fee56931e 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -8697,6 +8697,38 @@ enum skl_power_gate { #define HDCP_STATUS_CIPHER BIT(16) #define HDCP_STATUS_FRAME_CNT(x) (((x) >> 8) & 0xff)

+/* HDCP2.2 Registers */ +#define _PORTA_HDCP2_BASE 0x66800 +#define _PORTB_HDCP2_BASE 0x66500 +#define _PORTC_HDCP2_BASE 0x66600 +#define _PORTD_HDCP2_BASE 0x66700 +#define _PORTE_HDCP2_BASE 0x66A00 +#define _PORTF_HDCP2_BASE 0x66900 +#define _PORT_HDCP2_BASE(port, x) _MMIO(_PICK((port), \ + _PORTA_HDCP2_BASE, \ + _PORTB_HDCP2_BASE, \ + _PORTC_HDCP2_BASE, \ + _PORTD_HDCP2_BASE, \ + _PORTE_HDCP2_BASE, \ + _PORTF_HDCP2_BASE) + (x)) + +#define HDCP2_AUTH_DDI(port) _PORT_HDCP2_BASE(port, 0x98) +#define AUTH_LINK_AUTHENTICATED BIT(31) +#define AUTH_LINK_TYPE BIT(30) +#define AUTH_FORCE_CLR_INPUTCTR BIT(19) +#define AUTH_CLR_KEYS BIT(18) + +#define HDCP2_CTL_DDI(port) _PORT_HDCP2_BASE(port, 0xB0) +#define CTL_LINK_ENCRYPTION_REQ BIT(31) + +#define HDCP2_STATUS_DDI(port) _PORT_HDCP2_BASE(port, 0xB4) +#define STREAM_ENCRYPTION_STATUS_A BIT(31) +#define STREAM_ENCRYPTION_STATUS_B BIT(30) +#define STREAM_ENCRYPTION_STATUS_C BIT(29) +#define LINK_TYPE_STATUS BIT(22) +#define LINK_AUTH_STATUS BIT(21) +#define LINK_ENCRYPTION_STATUS BIT(20) + /* Per-pipe DDI Function Control */ #define _TRANS_DDI_FUNC_CTL_A 0x60400 #define _TRANS_DDI_FUNC_CTL_B 0x61400

Initialize HDCP2.2 support. This includes the mei interface initialization along with required component registration.

v2: mei interface handle is protected with mutex. [Chris Wilson] v3: Notifiers are used for the mei interface state. v4: Poll for mei client device state Error msg for out of mem [Uma] Inline req for init function removed [Uma] v5: Rebase as Part of reordering. Component is used for the I915 and MEI_HDCP interface [Daniel]

Signed-off-by: Ramalingam C ramalingam.c@intel.com --- drivers/gpu/drm/i915/i915_drv.h | 2 + drivers/gpu/drm/i915/intel_dp.c | 3 +- drivers/gpu/drm/i915/intel_drv.h | 5 +- drivers/gpu/drm/i915/intel_hdcp.c | 204 +++++++++++++++++++++++++++++++++++++- drivers/gpu/drm/i915/intel_hdmi.c | 2 +- include/drm/i915_component.h | 88 ++++++++++++++++ 6 files changed, 298 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 6f08ab310118..0e6fe140dc63 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2142,6 +2142,8 @@ struct drm_i915_private {

struct i915_pmu pmu;

+ struct i915_hdcp_component *hdcp_comp; + /* * NOTE: This is the dri1/ums dungeon, don't add stuff here. Your patch * will be rejected. Instead look for a better place. diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index c1b2f00f324b..6bcc52766ea3 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -6404,7 +6404,8 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port, intel_dp_add_properties(intel_dp, connector);

if (is_hdcp_supported(dev_priv, port) && !intel_dp_is_edp(intel_dp)) { - int ret = intel_hdcp_init(intel_connector, &intel_dp_hdcp_shim); + int ret = intel_hdcp_init(intel_connector, &intel_dp_hdcp_shim, + false); if (ret) DRM_DEBUG_KMS("HDCP init failed, skipping.\n"); } diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index b615ea4a44c3..2eeb82b04953 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -441,9 +441,7 @@ struct intel_hdcp { uint32_t seq_num_m;

/* mei interface related information */ - struct mei_cl_device *cldev; struct mei_hdcp_data mei_data; - struct delayed_work hdcp2_check_work; };

@@ -1962,7 +1960,8 @@ void intel_hdcp_atomic_check(struct drm_connector *connector, struct drm_connector_state *old_state, struct drm_connector_state *new_state); int intel_hdcp_init(struct intel_connector *connector, - const struct intel_hdcp_shim *hdcp_shim); + const struct intel_hdcp_shim *hdcp_shim, + bool hdcp2_supported); int intel_hdcp_enable(struct intel_connector *connector); int intel_hdcp_disable(struct intel_connector *connector); int intel_hdcp_check_link(struct intel_connector *connector); diff --git a/drivers/gpu/drm/i915/intel_hdcp.c b/drivers/gpu/drm/i915/intel_hdcp.c index 65bbe5874eee..769560591aa8 100644 --- a/drivers/gpu/drm/i915/intel_hdcp.c +++ b/drivers/gpu/drm/i915/intel_hdcp.c @@ -8,13 +8,19 @@

#include <drm/drmP.h> #include <drm/drm_hdcp.h> +#include <drm/i915_component.h> #include <linux/i2c.h> #include <linux/random.h> +#include <linux/component.h>

#include "intel_drv.h" #include "i915_reg.h"

#define KEY_LOAD_TRIES 5 +#define GET_MEI_DDI_INDEX(port) (((port) == PORT_A) ? DDI_A : \ + (enum hdcp_physical_port)(port)) + +static int intel_hdcp2_init(struct intel_connector *connector);

static int intel_hdcp_poll_ksv_fifo(struct intel_digital_port *intel_dig_port, const struct intel_hdcp_shim *shim) @@ -743,11 +749,15 @@ bool is_hdcp_supported(struct drm_i915_private *dev_priv, enum port port) }

int intel_hdcp_init(struct intel_connector *connector, - const struct intel_hdcp_shim *hdcp_shim) + const struct intel_hdcp_shim *hdcp_shim, + bool hdcp2_supported) { struct intel_hdcp *hdcp = &connector->hdcp; int ret;

+ if (!hdcp_shim) + return -EINVAL; + ret = drm_connector_attach_content_protection_property( &connector->base); if (ret) @@ -757,6 +767,10 @@ int intel_hdcp_init(struct intel_connector *connector, mutex_init(&hdcp->hdcp_mutex); INIT_DELAYED_WORK(&hdcp->hdcp_check_work, intel_hdcp_check_work); INIT_WORK(&hdcp->hdcp_prop_work, intel_hdcp_prop_work); + + if (hdcp2_supported) + intel_hdcp2_init(connector); + return 0; }

@@ -896,3 +910,191 @@ int intel_hdcp_check_link(struct intel_connector *connector) mutex_unlock(&hdcp->hdcp_mutex); return ret; } + +static int i915_hdcp_component_master_bind(struct device *dev) +{ + struct drm_i915_private *dev_priv = kdev_to_i915(dev); + struct i915_hdcp_component *comp = dev_priv->hdcp_comp; + int ret; + + mutex_lock(&comp->mutex); + ret = component_bind_all(dev, comp); + if (ret < 0) + return ret; + + /* + * Atm, we don't support dynamic unbinding initiated by the child + * component, so pin its containing module until we unbind. + */ + if (!try_module_get(comp->ops->owner)) { + ret = -ENODEV; + goto out_unbind; + } + + mutex_unlock(&comp->mutex); + return 0; + +out_unbind: + component_unbind_all(dev, comp); + mutex_unlock(&comp->mutex); + + return ret; +} + +static void i915_hdcp_component_master_unbind(struct device *dev) +{ + struct drm_i915_private *dev_priv = kdev_to_i915(dev); + struct i915_hdcp_component *comp = dev_priv->hdcp_comp; + + mutex_lock(&comp->mutex); + module_put(comp->ops->owner); + component_unbind_all(dev, comp); + WARN_ON(comp->ops); + mutex_unlock(&comp->mutex); +} + +static const struct component_master_ops i915_hdcp_component_master_ops = { + .bind = i915_hdcp_component_master_bind, + .unbind = i915_hdcp_component_master_unbind, +}; + +static void intel_hdcp_component_cleanup(struct drm_i915_private *dev_priv) +{ + component_master_del(dev_priv->drm.dev, + &i915_hdcp_component_master_ops); + kfree(dev_priv->hdcp_comp); +} + +static void intel_hdcp2_exit(struct intel_connector *connector) +{ + struct drm_i915_private *dev_priv = to_i915(connector->base.dev); + + /* TO-DO: Disable the HDCP here */ + kfree(connector->hdcp.mei_data.streams); + + if (dev_priv->hdcp_comp) + intel_hdcp_component_cleanup(dev_priv); +} + +static void intel_pull_down_mei_interface(struct device *kdev) +{ + struct drm_i915_private *dev_priv = kdev_to_i915(kdev); + struct drm_device *dev = &dev_priv->drm; + struct intel_connector *intel_connector; + struct drm_connector *connector; + struct drm_connector_list_iter conn_iter; + + DRM_INFO("MEI Device is Down"); + drm_connector_list_iter_begin(dev, &conn_iter); + drm_for_each_connector_iter(connector, &conn_iter) { + intel_connector = to_intel_connector(connector); + if (!intel_connector->hdcp.hdcp2_supported) + continue; + + intel_hdcp2_exit(intel_connector); + } + drm_connector_list_iter_end(&conn_iter); +} + +struct i915_hdcp_component_master_ops master_ops = { + .pull_down_interface = intel_pull_down_mei_interface, +}; + +static int i915_hdcp_component_master_match(struct device *dev, void *data) +{ + return !strcmp(dev->driver->name, "mei_hdcp"); +} + +static int intel_hdcp_component_init(struct intel_connector *connector) +{ + struct drm_i915_private *dev_priv = to_i915(connector->base.dev); + struct i915_hdcp_component *comp; + struct component_match *match = NULL; + int ret; + + comp = kzalloc(sizeof(*comp), GFP_KERNEL); + if (!comp) + return -ENOMEM; + + mutex_init(&comp->mutex); + comp->master_ops = &master_ops; + dev_priv->hdcp_comp = comp; + + component_match_add(dev_priv->drm.dev, &match, + i915_hdcp_component_master_match, dev_priv); + ret = component_master_add_with_match(dev_priv->drm.dev, + &i915_hdcp_component_master_ops, + match); + if (ret < 0) + goto out_err; + + DRM_INFO("I915 hdcp component master added.\n"); + return ret; + +out_err: + component_master_del(dev_priv->drm.dev, + &i915_hdcp_component_master_ops); + kfree(comp); + dev_priv->hdcp_comp = NULL; + DRM_ERROR("Failed to add i915 hdcp component master (%d)\n", ret); + + return ret; +} + +static int initialize_mei_hdcp_data(struct intel_connector *connector) +{ + struct intel_hdcp *hdcp = &connector->hdcp; + struct mei_hdcp_data *data = &hdcp->mei_data; + enum port port; + + if (connector->encoder) { + port = connector->encoder->port; + data->port = GET_MEI_DDI_INDEX(port); + } + + data->port_type = INTEGRATED; + data->protocol = hdcp->hdcp_shim->hdcp_protocol(); + + data->k = 1; + if (!data->streams) + data->streams = kcalloc(data->k, + sizeof(struct hdcp2_streamid_type), + GFP_KERNEL); + if (!data->streams) { + DRM_ERROR("Out of Memory\n"); + return -ENOMEM; + } + + data->streams[0].stream_id = 0; + data->streams[0].stream_type = hdcp->content_type; + + return 0; +} + +bool is_hdcp2_supported(struct drm_i915_private *dev_priv) +{ + return (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv) || + IS_KABYLAKE(dev_priv)); +} + +static int intel_hdcp2_init(struct intel_connector *connector) +{ + struct drm_i915_private *dev_priv = to_i915(connector->base.dev); + struct intel_hdcp *hdcp = &connector->hdcp; + int ret; + + WARN_ON(!is_hdcp2_supported(dev_priv)); + ret = initialize_mei_hdcp_data(connector); + if (ret) + goto exit; + + if (!dev_priv->hdcp_comp) + ret = intel_hdcp_component_init(connector); + + if (ret) + kfree(hdcp->mei_data.streams); + hdcp->hdcp2_supported = true; + +exit: + return ret; +} diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index 8363fbd18ee8..7988f958d835 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c @@ -2366,7 +2366,7 @@ void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port,

if (is_hdcp_supported(dev_priv, port)) { int ret = intel_hdcp_init(intel_connector, - &intel_hdmi_hdcp_shim); + &intel_hdmi_hdcp_shim, false); if (ret) DRM_DEBUG_KMS("HDCP init failed, skipping.\n"); } diff --git a/include/drm/i915_component.h b/include/drm/i915_component.h index 346b1f5cb180..9986174ee090 100644 --- a/include/drm/i915_component.h +++ b/include/drm/i915_component.h @@ -24,6 +24,10 @@ #ifndef _I915_COMPONENT_H_ #define _I915_COMPONENT_H_

+#include <linux/mei_cl_bus.h> +#include <linux/mei_hdcp.h> +#include <drm/drm_hdcp.h> + /* MAX_PORT is the number of port * It must be sync with I915_MAX_PORTS defined i915_drv.h */ @@ -121,4 +125,88 @@ struct i915_audio_component { const struct i915_audio_component_audio_ops *audio_ops; };

+struct i915_hdcp_component_ops { + /** + * @owner: mei_hdcp module + */ + struct module *owner; + int (*initiate_hdcp2_session)(struct mei_cl_device *cldev, + struct mei_hdcp_data *data, + struct hdcp2_ake_init *ake_data); + int + (*verify_receiver_cert_prepare_km)(struct mei_cl_device *cldev, + struct mei_hdcp_data *data, + struct hdcp2_ake_send_cert *rx_cert, + bool *km_stored, + struct hdcp2_ake_no_stored_km + *ek_pub_km, + size_t *msg_sz); + int (*verify_hprime)(struct mei_cl_device *cldev, + struct mei_hdcp_data *data, + struct hdcp2_ake_send_hprime *rx_hprime); + int (*store_pairing_info)(struct mei_cl_device *cldev, + struct mei_hdcp_data *data, + struct hdcp2_ake_send_pairing_info + *pairing_info); + int (*initiate_locality_check)(struct mei_cl_device *cldev, + struct mei_hdcp_data *data, + struct hdcp2_lc_init *lc_init_data); + int (*verify_lprime)(struct mei_cl_device *cldev, + struct mei_hdcp_data *data, + struct hdcp2_lc_send_lprime *rx_lprime); + int (*get_session_key)(struct mei_cl_device *cldev, + struct mei_hdcp_data *data, + struct hdcp2_ske_send_eks *ske_data); + int + (*repeater_check_flow_prepare_ack)(struct mei_cl_device *cldev, + struct mei_hdcp_data *data, + struct hdcp2_rep_send_receiverid_list + *rep_topology, + struct hdcp2_rep_send_ack + *rep_send_ack); + int (*verify_mprime)(struct mei_cl_device *cldev, + struct mei_hdcp_data *data, + struct hdcp2_rep_stream_ready *stream_ready); + int (*enable_hdcp_authentication)(struct mei_cl_device *cldev, + struct mei_hdcp_data *data); + int (*close_hdcp_session)(struct mei_cl_device *cldev, + struct mei_hdcp_data *data); +}; + +struct i915_hdcp_component_master_ops { + void (*pull_down_interface)(struct device *dev); +}; + +/** + * struct i915_mei_hdcp_component - Used for direct communication between i915 + * and mei_hdcp drivers + */ +struct i915_hdcp_component { + /** + * @dev: Kdev of Slave Component. Passed to bind calls. + */ + struct device *dev; + /** + * @i915_kdev: Kdev of I915. Used from the client component for + * removing the reference to mei_cldev. + */ + struct device *i915_kdev; + /** + * @mei_cldev: mei client device, used as parameter for ops + */ + struct mei_cl_device *mei_cldev; + /** + * @mutex: Mutex to protect the state of mei_cldev + */ + struct mutex mutex; + /** + * @ops: Ops implemented by mei_hdcp driver, used by i915 driver. + */ + const struct i915_hdcp_component_ops *ops; + /** + * @master_ops: Ops implemented by I915 driver, used by mei_hdcp driver. + */ + const struct i915_hdcp_component_master_ops *master_ops; +}; + #endif /* _I915_COMPONENT_H_ */

As a preparation for making the intel_hdcp_enable as common function for both HDCP1.4 and HDCP2.2, HDCP1.4 check_link scheduling is moved into _intel_hdcp_enable() function.

v3: No Changes. v4: Style fix. v5: No Change.

Signed-off-by: Ramalingam C ramalingam.c@intel.com Reviewed-by: Uma Shankar uma.shankar@intel.com --- drivers/gpu/drm/i915/intel_hdcp.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_hdcp.c b/drivers/gpu/drm/i915/intel_hdcp.c index 769560591aa8..4bff74b3bed0 100644 --- a/drivers/gpu/drm/i915/intel_hdcp.c +++ b/drivers/gpu/drm/i915/intel_hdcp.c @@ -688,7 +688,7 @@ static int _intel_hdcp_enable(struct intel_connector *connector) ret = intel_hdcp_auth(conn_to_dig_port(connector), hdcp->hdcp_shim); if (!ret) - return 0; + break;

DRM_DEBUG_KMS("HDCP Auth failure (%d)\n", ret);

@@ -696,7 +696,13 @@ static int _intel_hdcp_enable(struct intel_connector *connector) _intel_hdcp_disable(connector); }

- DRM_ERROR("HDCP authentication failed (%d tries/%d)\n", tries, ret); + if (i != tries) + schedule_delayed_work(&hdcp->hdcp_check_work, + DRM_HDCP_CHECK_PERIOD_MS); + else + DRM_ERROR("HDCP authentication failed (%d tries/%d)\n", + tries, ret); + return ret; }

@@ -790,8 +796,6 @@ int intel_hdcp_enable(struct intel_connector *connector)

hdcp->hdcp_value = DRM_MODE_CONTENT_PROTECTION_ENABLED; schedule_work(&hdcp->hdcp_prop_work); - schedule_delayed_work(&hdcp->hdcp_check_work, - DRM_HDCP_CHECK_PERIOD_MS); out: mutex_unlock(&hdcp->hdcp_mutex); return ret;

When HDCP2.2 enabling fails and HDCP1.4 is supported, HDCP1.4 is enabled.

v2: Rebased. v3: No Changes. v4: Reviewed-by is collected. v5: No Change.

Signed-off-by: Ramalingam C ramalingam.c@intel.com Reviewed-by: Uma Shankar uma.shankar@intel.com --- drivers/gpu/drm/i915/intel_hdcp.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_hdcp.c b/drivers/gpu/drm/i915/intel_hdcp.c index b34e3b1587d6..34bafc2025f7 100644 --- a/drivers/gpu/drm/i915/intel_hdcp.c +++ b/drivers/gpu/drm/i915/intel_hdcp.c @@ -863,7 +863,9 @@ int intel_hdcp_enable(struct intel_connector *connector) */ if (intel_hdcp2_capable(connector)) ret = _intel_hdcp2_enable(connector); - else if (intel_hdcp_capable(connector)) + + /* When HDCP2.2 fails, HDCP1.4 will be attempted */ + if (ret && intel_hdcp_capable(connector)) ret = _intel_hdcp_enable(connector);

if (!ret) {

Implements the enable and disable functions for HDCP2.2 encryption of the PORT.

v2: intel_wait_for_register is used instead of wait_for. [Chris Wilson] v3: No Changes. v4: Debug msg is added for timeout at Disable of Encryption [Uma] %s/HDCP2_CTL/HDCP2_CTL v5: Rebased as part of patch reordering. HW state check is moved into WARN_ON [Daniel]

Signed-off-by: Ramalingam C ramalingam.c@intel.com --- drivers/gpu/drm/i915/intel_hdcp.c | 48 +++++++++++++++++++++++++++++++++++++-- 1 file changed, 46 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_hdcp.c b/drivers/gpu/drm/i915/intel_hdcp.c index f72684488bc7..1e75b4fc978a 100644 --- a/drivers/gpu/drm/i915/intel_hdcp.c +++ b/drivers/gpu/drm/i915/intel_hdcp.c @@ -17,6 +17,7 @@ #include "i915_reg.h"

#define KEY_LOAD_TRIES 5 +#define TIME_FOR_ENCRYPT_STATUS_CHANGE 32 #define GET_MEI_DDI_INDEX(port) (((port) == PORT_A) ? DDI_A : \ (enum hdcp_physical_port)(port))

@@ -1027,12 +1028,55 @@ static int hdcp2_authenticate_sink(struct intel_connector *connector)

static int hdcp2_enable_encryption(struct intel_connector *connector) { - return 0; + struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector); + struct drm_i915_private *dev_priv = to_i915(connector->base.dev); + struct intel_hdcp *hdcp = &connector->hdcp; + enum port port = connector->encoder->port; + int ret; + + WARN_ON(I915_READ(HDCP2_STATUS_DDI(port)) & LINK_ENCRYPTION_STATUS); + + if (hdcp->hdcp_shim->toggle_signalling) + hdcp->hdcp_shim->toggle_signalling(intel_dig_port, true); + + if (I915_READ(HDCP2_STATUS_DDI(port)) & LINK_AUTH_STATUS) { + /* Link is Authenticated. Now set for Encryption */ + I915_WRITE(HDCP2_CTL_DDI(port), + I915_READ(HDCP2_CTL_DDI(port)) | + CTL_LINK_ENCRYPTION_REQ); + } + + ret = intel_wait_for_register(dev_priv, HDCP2_STATUS_DDI(port), + LINK_ENCRYPTION_STATUS, + LINK_ENCRYPTION_STATUS, + TIME_FOR_ENCRYPT_STATUS_CHANGE); + + return ret; }

static int hdcp2_disable_encryption(struct intel_connector *connector) { - return 0; + struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector); + struct drm_i915_private *dev_priv = to_i915(connector->base.dev); + struct intel_hdcp *hdcp = &connector->hdcp; + enum port port = connector->encoder->port; + int ret; + + WARN_ON(!(I915_READ(HDCP2_STATUS_DDI(port)) & LINK_ENCRYPTION_STATUS)); + + I915_WRITE(HDCP2_CTL_DDI(port), + I915_READ(HDCP2_CTL_DDI(port)) & ~CTL_LINK_ENCRYPTION_REQ); + + ret = intel_wait_for_register(dev_priv, HDCP2_STATUS_DDI(port), + LINK_ENCRYPTION_STATUS, 0x0, + TIME_FOR_ENCRYPT_STATUS_CHANGE); + if (ret == -ETIMEDOUT) + DRM_DEBUG_KMS("Disable Encryption Timedout"); + + if (hdcp->hdcp_shim->toggle_signalling) + hdcp->hdcp_shim->toggle_signalling(intel_dig_port, false); + + return ret; }

static int hdcp2_authenticate_and_encrypt(struct intel_connector *connector)

Implements the HDCP2.2 repeaters authentication steps such as verifying the downstream topology and sending stream management information.

v2: Rebased. v3: No Changes. v4: -EINVAL is returned for topology error and rollover scenario. Endianness conversion func from drm_hdcp.h is used [Uma] v5: Rebased as part of patches reordering. Defined the mei service functions [Daniel]

Signed-off-by: Ramalingam C ramalingam.c@intel.com --- drivers/gpu/drm/i915/intel_hdcp.c | 178 ++++++++++++++++++++++++++++++++++++++ include/drm/drm_hdcp.h | 15 ++++ 2 files changed, 193 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_hdcp.c b/drivers/gpu/drm/i915/intel_hdcp.c index bb6e72807060..cf1c5f20b62e 100644 --- a/drivers/gpu/drm/i915/intel_hdcp.c +++ b/drivers/gpu/drm/i915/intel_hdcp.c @@ -1188,6 +1188,63 @@ static int hdcp2_prepare_skey(struct intel_connector *connector, return ret; }

+static int +hdcp2_verify_rep_topology_prepare_ack( + struct intel_connector *connector, + struct hdcp2_rep_send_receiverid_list *rep_topology, + struct hdcp2_rep_send_ack *rep_send_ack) +{ + struct mei_hdcp_data *data = &connector->hdcp.mei_data; + struct drm_i915_private *dev_priv = to_i915(connector->base.dev); + struct i915_hdcp_component *comp = dev_priv->hdcp_comp; + int ret; + + if (!comp) + return -EINVAL; + + mutex_lock(&comp->mutex); + if (!comp->ops || !comp->mei_cldev || data->port == INVALID_PORT) { + mutex_unlock(&comp->mutex); + return -EINVAL; + } + + ret = comp->ops->repeater_check_flow_prepare_ack(comp->mei_cldev, data, + rep_topology, rep_send_ack); + if (ret < 0) + comp->ops->close_hdcp_session(comp->mei_cldev, data); + + mutex_unlock(&comp->mutex); + + return ret; +} + +static int +hdcp2_verify_mprime(struct intel_connector *connector, + struct hdcp2_rep_stream_ready *stream_ready) +{ + struct mei_hdcp_data *data = &connector->hdcp.mei_data; + struct drm_i915_private *dev_priv = to_i915(connector->base.dev); + struct i915_hdcp_component *comp = dev_priv->hdcp_comp; + int ret; + + if (!comp) + return -EINVAL; + + mutex_lock(&comp->mutex); + if (!comp->ops || !comp->mei_cldev || data->port == INVALID_PORT) { + mutex_unlock(&comp->mutex); + return -EINVAL; + } + + ret = comp->ops->verify_mprime(comp->mei_cldev, data, stream_ready); + if (ret < 0) + comp->ops->close_hdcp_session(comp->mei_cldev, data); + + mutex_unlock(&comp->mutex); + + return ret; +} + static int hdcp2_authenticate_port(struct intel_connector *connector) { struct mei_hdcp_data *data = &connector->hdcp.mei_data; @@ -1373,6 +1430,121 @@ static int hdcp2_session_key_exchange(struct intel_connector *connector) return 0; }

+static +int hdcp2_propagate_stream_management_info(struct intel_connector *connector) +{ + struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector); + struct intel_hdcp *hdcp = &connector->hdcp; + union { + struct hdcp2_rep_stream_manage stream_manage; + struct hdcp2_rep_stream_ready stream_ready; + } msgs; + const struct intel_hdcp_shim *shim = hdcp->hdcp_shim; + int ret; + + /* Prepare RepeaterAuth_Stream_Manage msg */ + msgs.stream_manage.msg_id = HDCP_2_2_REP_STREAM_MANAGE; + reverse_endianness(msgs.stream_manage.seq_num_m, HDCP_2_2_SEQ_NUM_LEN, + (u8 *)&hdcp->seq_num_m); + + /* K no of streams is fixed as 1. Stored as big-endian. */ + msgs.stream_manage.k = __swab16(1); + + /* For HDMI this is forced to be 0x0. For DP SST also this is 0x0. */ + msgs.stream_manage.streams[0].stream_id = 0; + msgs.stream_manage.streams[0].stream_type = hdcp->content_type; + + /* Send it to Repeater */ + ret = shim->write_2_2_msg(intel_dig_port, &msgs.stream_manage, + sizeof(msgs.stream_manage)); + if (ret < 0) + return ret; + + ret = shim->read_2_2_msg(intel_dig_port, HDCP_2_2_REP_STREAM_READY, + &msgs.stream_ready, sizeof(msgs.stream_ready)); + if (ret < 0) + return ret; + + hdcp->mei_data.seq_num_m = hdcp->seq_num_m; + hdcp->mei_data.streams[0].stream_type = hdcp->content_type; + + ret = hdcp2_verify_mprime(connector, &msgs.stream_ready); + if (ret < 0) + return ret; + + hdcp->seq_num_m++; + + if (hdcp->seq_num_m > HDCP_2_2_SEQ_NUM_MAX) { + DRM_DEBUG_KMS("seq_num_m roll over.\n"); + return -1; + } + + return 0; +} + +static +int hdcp2_authenticate_repeater_topology(struct intel_connector *connector) +{ + struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector); + struct intel_hdcp *hdcp = &connector->hdcp; + union { + struct hdcp2_rep_send_receiverid_list recvid_list; + struct hdcp2_rep_send_ack rep_ack; + } msgs; + const struct intel_hdcp_shim *shim = hdcp->hdcp_shim; + uint8_t *rx_info; + uint32_t seq_num_v; + int ret; + + ret = shim->read_2_2_msg(intel_dig_port, HDCP_2_2_REP_SEND_RECVID_LIST, + &msgs.recvid_list, sizeof(msgs.recvid_list)); + if (ret < 0) + return ret; + + rx_info = msgs.recvid_list.rx_info; + + if (HDCP_2_2_MAX_CASCADE_EXCEEDED(rx_info[1]) || + HDCP_2_2_MAX_DEVS_EXCEEDED(rx_info[1])) { + DRM_DEBUG_KMS("Topology Max Size Exceeded\n"); + return -EINVAL; + } + + /* Converting and Storing the seq_num_v to local variable as DWORD */ + reverse_endianness((u8 *)&seq_num_v, HDCP_2_2_SEQ_NUM_LEN, + msgs.recvid_list.seq_num_v); + + if (seq_num_v < hdcp->seq_num_v) { + /* Roll over of the seq_num_v from repeater. Reauthenticate. */ + DRM_DEBUG_KMS("Seq_num_v roll over.\n"); + return -EINVAL; + } + + ret = hdcp2_verify_rep_topology_prepare_ack(connector, + &msgs.recvid_list, + &msgs.rep_ack); + if (ret < 0) + return ret; + + hdcp->seq_num_v = seq_num_v; + ret = shim->write_2_2_msg(intel_dig_port, &msgs.rep_ack, + sizeof(msgs.rep_ack)); + if (ret < 0) + return ret; + + return 0; +} + +static int hdcp2_authenticate_repeater(struct intel_connector *connector) +{ + int ret; + + ret = hdcp2_authenticate_repeater_topology(connector); + if (ret < 0) + return ret; + + return hdcp2_propagate_stream_management_info(connector); +} + static int hdcp2_authenticate_sink(struct intel_connector *connector) { struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector); @@ -1414,6 +1586,12 @@ static int hdcp2_authenticate_sink(struct intel_connector *connector) sizeof(stream_type_msg)); if (ret < 0) return ret; + } else if (hdcp->is_repeater) { + ret = hdcp2_authenticate_repeater(connector); + if (ret < 0) { + DRM_DEBUG_KMS("Repeater Auth Failed. Err: %d\n", ret); + return ret; + } }

hdcp->mei_data.streams[0].stream_type = hdcp->content_type; diff --git a/include/drm/drm_hdcp.h b/include/drm/drm_hdcp.h index 2fc6311dc060..0c222b5b685c 100644 --- a/include/drm/drm_hdcp.h +++ b/include/drm/drm_hdcp.h @@ -247,4 +247,19 @@ struct hdcp2_dp_errata_stream_type { #define HDCP_2_2_HDMI_RXSTATUS_READY(x) ((x) & BIT(2)) #define HDCP_2_2_HDMI_RXSTATUS_REAUTH_REQ(x) ((x) & BIT(3))

+/* + * Library functions for endianness are aligned for 16/32/64 bits. + * But hdcp sequence numbers are 24bits. So for their Byte swapping, + * a conversion function is developed. + */ +static inline void reverse_endianness(u8 *dest, size_t sz, u8 *src) +{ + u32 index; + + if (!sz || sz > sizeof(u32)) + return; + for (index = 0; index < sz; index++) + dest[sz - index - 1] = src[index]; +} + #endif

Implements the link integrity check once in 500mSec.

Once encryption is enabled, an ongoing Link Integrity Check is performed by the HDCP Receiver to check that cipher synchronization is maintained between the HDCP Transmitter and the HDCP Receiver.

On the detection of synchronization lost, the HDCP Receiver must assert the corresponding bits of the RxStatus register. The Transmitter polls the RxStatus register and it may initiate re-authentication.

v2: Rebased. v3: No Changes. v4: enum check_link_response is used check the link status [Uma] v5: Rebased as part of patch reordering.

Signed-off-by: Ramalingam C ramalingam.c@intel.com --- drivers/gpu/drm/i915/intel_hdcp.c | 82 +++++++++++++++++++++++++++++++++++++++ include/drm/drm_hdcp.h | 8 ++++ 2 files changed, 90 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_hdcp.c b/drivers/gpu/drm/i915/intel_hdcp.c index cf1c5f20b62e..ec840c1178bb 100644 --- a/drivers/gpu/drm/i915/intel_hdcp.c +++ b/drivers/gpu/drm/i915/intel_hdcp.c @@ -25,6 +25,8 @@ static int intel_hdcp2_init(struct intel_connector *connector); static int _intel_hdcp2_enable(struct intel_connector *connector); static int _intel_hdcp2_disable(struct intel_connector *connector); +static void intel_hdcp2_check_work(struct work_struct *work); +static int intel_hdcp2_check_link(struct intel_connector *connector); static int intel_hdcp_read_valid_bksv(struct intel_digital_port *intel_dig_port, const struct intel_hdcp_shim *shim, u8 *bksv); @@ -841,6 +843,7 @@ int intel_hdcp_init(struct intel_connector *connector, hdcp->hdcp_shim = hdcp_shim; mutex_init(&hdcp->hdcp_mutex); INIT_DELAYED_WORK(&hdcp->hdcp_check_work, intel_hdcp_check_work); + INIT_DELAYED_WORK(&hdcp->hdcp2_check_work, intel_hdcp2_check_work); INIT_WORK(&hdcp->hdcp_prop_work, intel_hdcp_prop_work);

if (hdcp2_supported) @@ -1709,6 +1712,8 @@ static int _intel_hdcp2_enable(struct intel_connector *connector) hdcp->hdcp2_in_use = true; hdcp->hdcp_value = DRM_MODE_CONTENT_PROTECTION_ENABLED; schedule_work(&hdcp->hdcp_prop_work); + schedule_delayed_work(&hdcp->hdcp2_check_work, + DRM_HDCP2_CHECK_PERIOD_MS); return 0; }

@@ -1914,3 +1919,80 @@ static int intel_hdcp2_init(struct intel_connector *connector) exit: return ret; } + +static int intel_hdcp2_check_link(struct intel_connector *connector) +{ + struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector); + struct drm_i915_private *dev_priv = to_i915(connector->base.dev); + struct intel_hdcp *hdcp = &connector->hdcp; + enum port port = connector->encoder->port; + int ret = 0; + + if (!hdcp->hdcp_shim) + return -ENOENT; + + mutex_lock(&hdcp->hdcp_mutex); + + if (hdcp->hdcp_value == DRM_MODE_CONTENT_PROTECTION_UNDESIRED) + goto out; + + if (!(I915_READ(HDCP2_STATUS_DDI(port)) & LINK_ENCRYPTION_STATUS)) { + DRM_ERROR("HDCP check failed: link is not encrypted, %x\n", + I915_READ(HDCP2_STATUS_DDI(port))); + ret = -ENXIO; + hdcp->hdcp_value = DRM_MODE_CONTENT_PROTECTION_DESIRED; + schedule_work(&hdcp->hdcp_prop_work); + goto out; + } + + ret = hdcp->hdcp_shim->check_2_2_link(intel_dig_port); + if (ret == DRM_HDCP_LINK_PROTECTED) { + if (hdcp->hdcp_value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED) { + hdcp->hdcp_value = DRM_MODE_CONTENT_PROTECTION_ENABLED; + schedule_work(&hdcp->hdcp_prop_work); + } + goto out; + } + + DRM_ERROR("[%s:%d] HDCP2.2 link failed, retrying auth\n", + connector->base.name, connector->base.base.id); + + ret = _intel_hdcp2_disable(connector); + if (ret) { + DRM_ERROR("[%s:%d] Failed to disable hdcp2.2 (%d)\n", + connector->base.name, connector->base.base.id, ret); + + hdcp->hdcp_value = DRM_MODE_CONTENT_PROTECTION_DESIRED; + schedule_work(&hdcp->hdcp_prop_work); + goto out; + } + + ret = _intel_hdcp2_enable(connector); + if (ret) { + DRM_ERROR("[%s:%d] Failed to enable hdcp2.2 (%d)\n", + connector->base.name, connector->base.base.id, ret); + + hdcp->hdcp_value = DRM_MODE_CONTENT_PROTECTION_DESIRED; + schedule_work(&hdcp->hdcp_prop_work); + goto out; + } + +out: + mutex_unlock(&hdcp->hdcp_mutex); + + return ret; +} + +static void intel_hdcp2_check_work(struct work_struct *work) +{ + struct intel_hdcp *hdcp = container_of(to_delayed_work(work), + struct intel_hdcp, + hdcp2_check_work); + struct intel_connector *connector = container_of(hdcp, + struct intel_connector, + hdcp); + + if (!intel_hdcp2_check_link(connector)) + schedule_delayed_work(&hdcp->hdcp2_check_work, + DRM_HDCP2_CHECK_PERIOD_MS); +} diff --git a/include/drm/drm_hdcp.h b/include/drm/drm_hdcp.h index 0c222b5b685c..76c84d60202f 100644 --- a/include/drm/drm_hdcp.h +++ b/include/drm/drm_hdcp.h @@ -11,6 +11,14 @@

/* Period of hdcp checks (to ensure we're still authenticated) */ #define DRM_HDCP_CHECK_PERIOD_MS (128 * 16) +#define DRM_HDCP2_CHECK_PERIOD_MS 500 + +enum check_link_response { + DRM_HDCP_LINK_PROTECTED = 0, + DRM_HDCP_TOPOLOGY_CHANGE, + DRM_HDCP_LINK_INTEGRITY_FAILURE, + DRM_HDCP_REAUTH_REQUEST +};

/* Shared lengths/masks between HDMI/DVI/DisplayPort */ #define DRM_HDCP_AN_LEN 8

HDCP check link is invoked only on CP_IRQ detection, instead of all short pulses.

v3: No Changes. v4: Added sean in cc and collected the reviewed-by received. v5: No Change.

Signed-off-by: Ramalingam C ramalingam.c@intel.com cc: Sean Paul seanpaul@chromium.org Reviewed-by: Uma Shankar uma.shankar@intel.com --- drivers/gpu/drm/i915/intel_dp.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 6bcc52766ea3..7467e7b3f2df 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -4483,8 +4483,10 @@ intel_dp_short_pulse(struct intel_dp *intel_dp)

if (sink_irq_vector & DP_AUTOMATED_TEST_REQUEST) intel_dp_handle_test_request(intel_dp); - if (sink_irq_vector & (DP_CP_IRQ | DP_SINK_SPECIFIC_IRQ)) - DRM_DEBUG_DRIVER("CP or sink specific irq unhandled\n"); + if (sink_irq_vector & DP_CP_IRQ) + intel_hdcp_check_link(intel_dp->attached_connector); + if (sink_irq_vector & DP_SINK_SPECIFIC_IRQ) + DRM_DEBUG_DRIVER("Sink specific irq unhandled\n"); }

/* defer to the hotplug work for link retraining if needed */ @@ -5454,9 +5456,6 @@ intel_dp_hpd_pulse(struct intel_digital_port *intel_dig_port, bool long_hpd)

handled = intel_dp_short_pulse(intel_dp);

- /* Short pulse can signify loss of hdcp authentication */ - intel_hdcp_check_link(intel_dp->attached_connector); - if (!handled) { intel_dp->detect_done = false; goto put_power;

On DP HDCP1.4 and 2.2, when CP_IRQ is received, start the link integrity check for the HDCP version that is enabled.

v2: Rebased. Function name is changed. v3: No Changes. v4: No Changes. v5: No Changes.

Signed-off-by: Ramalingam C ramalingam.c@intel.com cc: Sean Paul seanpaul@chromium.org --- drivers/gpu/drm/i915/intel_dp.c | 2 +- drivers/gpu/drm/i915/intel_drv.h | 2 +- drivers/gpu/drm/i915/intel_hdcp.c | 31 ++++++++++++++++++++++++++++++- 3 files changed, 32 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 7467e7b3f2df..a6ba27ef20ae 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -4484,7 +4484,7 @@ intel_dp_short_pulse(struct intel_dp *intel_dp) if (sink_irq_vector & DP_AUTOMATED_TEST_REQUEST) intel_dp_handle_test_request(intel_dp); if (sink_irq_vector & DP_CP_IRQ) - intel_hdcp_check_link(intel_dp->attached_connector); + intel_hdcp_handle_cp_irq(intel_dp->attached_connector); if (sink_irq_vector & DP_SINK_SPECIFIC_IRQ) DRM_DEBUG_DRIVER("Sink specific irq unhandled\n"); } diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 7624388eecd5..875657fd7d3c 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -1965,8 +1965,8 @@ int intel_hdcp_init(struct intel_connector *connector, bool hdcp2_supported); int intel_hdcp_enable(struct intel_connector *connector); int intel_hdcp_disable(struct intel_connector *connector); -int intel_hdcp_check_link(struct intel_connector *connector); bool is_hdcp_supported(struct drm_i915_private *dev_priv, enum port port); +void intel_hdcp_handle_cp_irq(struct intel_connector *connector);

/* intel_psr.c */ #define CAN_PSR(dev_priv) (HAS_PSR(dev_priv) && dev_priv->psr.sink_support) diff --git a/drivers/gpu/drm/i915/intel_hdcp.c b/drivers/gpu/drm/i915/intel_hdcp.c index 790f4a9f4793..b035274785c8 100644 --- a/drivers/gpu/drm/i915/intel_hdcp.c +++ b/drivers/gpu/drm/i915/intel_hdcp.c @@ -32,6 +32,7 @@ int intel_hdcp_read_valid_bksv(struct intel_digital_port *intel_dig_port, const struct intel_hdcp_shim *shim, u8 *bksv); static struct intel_digital_port *conn_to_dig_port(struct intel_connector *connector); +static int intel_hdcp_check_link(struct intel_connector *connector);

static bool panel_supports_hdcp(struct intel_connector *connector) { @@ -80,6 +81,26 @@ static inline bool intel_hdcp2_capable(struct intel_connector *connector) panel_supports_hdcp2(connector)); }

+static inline bool intel_hdcp_in_force(struct intel_connector *connector) +{ + struct drm_i915_private *dev_priv = to_i915(connector->base.dev); + enum port port = connector->encoder->port; + u32 reg; + + reg = I915_READ(PORT_HDCP_STATUS(port)); + return reg & (HDCP_STATUS_AUTH | HDCP_STATUS_ENC); +} + +static inline bool intel_hdcp2_in_force(struct intel_connector *connector) +{ + struct drm_i915_private *dev_priv = to_i915(connector->base.dev); + enum port port = connector->encoder->port; + u32 reg; + + reg = I915_READ(HDCP2_STATUS_DDI(port)); + return reg & (LINK_ENCRYPTION_STATUS | LINK_AUTH_STATUS); +} + static int intel_hdcp_poll_ksv_fifo(struct intel_digital_port *intel_dig_port, const struct intel_hdcp_shim *shim) { @@ -939,7 +960,7 @@ void intel_hdcp_atomic_check(struct drm_connector *connector, }

/* Implements Part 3 of the HDCP authorization procedure */ -int intel_hdcp_check_link(struct intel_connector *connector) +static int intel_hdcp_check_link(struct intel_connector *connector) { struct intel_hdcp *hdcp = &connector->hdcp; struct drm_i915_private *dev_priv = connector->base.dev->dev_private; @@ -2011,3 +2032,11 @@ static void intel_hdcp2_check_work(struct work_struct *work) schedule_delayed_work(&hdcp->hdcp2_check_work, DRM_HDCP2_CHECK_PERIOD_MS); } + +void intel_hdcp_handle_cp_irq(struct intel_connector *connector) +{ + if (intel_hdcp_in_force(connector)) + intel_hdcp_check_link(connector); + else if (intel_hdcp2_in_force(connector)) + intel_hdcp2_check_link(connector); +}

Support for Burst read in HW is added for HDCP2.2 compliance requirement.

This patch enables the burst read for all the gmbus read of more than 511Bytes, on capable platforms.

v2: Extra line is removed. v3: Macro is added for detecting the BURST_READ Support [Jani] Runtime detection of the need for burst_read [Jani] Calculation enhancement. v4: GMBUS0 reg val is passed from caller [ville] Removed a extra var [ville] Extra brackets are removed [ville] Implemented the handling of 512Bytes Burst Read. v5: Burst read max length is fixed at 767Bytes [Ville] v6: No Change.

Signed-off-by: Ramalingam C ramalingam.c@intel.com --- drivers/gpu/drm/i915/i915_drv.h | 3 ++ drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_i2c.c | 62 +++++++++++++++++++++++++++++++++------- 3 files changed, 56 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 0e6fe140dc63..65323f61e590 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2584,6 +2584,9 @@ intel_info(const struct drm_i915_private *dev_priv) IS_SKL_GT3(dev_priv) || IS_SKL_GT4(dev_priv))

#define HAS_GMBUS_IRQ(dev_priv) (INTEL_GEN(dev_priv) >= 4) +#define HAS_GMBUS_BURST_READ(dev_priv) (INTEL_GEN(dev_priv) >= 10 || \ + IS_GEMINILAKE(dev_priv) || \ + IS_KABYLAKE(dev_priv))

/* With the 945 and later, Y tiling got adjusted so that it was 32 128-byte * rows, which changed the alignment requirements and fence programming. diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 91d42b3e39ad..1386356bcfc4 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -3020,6 +3020,7 @@ enum i915_power_well_id { #define GMBUS_RATE_400KHZ (2 << 8) /* reserved on Pineview */ #define GMBUS_RATE_1MHZ (3 << 8) /* reserved on Pineview */ #define GMBUS_HOLD_EXT (1 << 7) /* 300ns hold time, rsvd on Pineview */ +#define GMBUS_BYTE_CNT_OVERRIDE (1 << 6) #define GMBUS_PIN_DISABLED 0 #define GMBUS_PIN_SSC 1 #define GMBUS_PIN_VGADDC 2 diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c index 82bb9c33ab1c..3957988e46d1 100644 --- a/drivers/gpu/drm/i915/intel_i2c.c +++ b/drivers/gpu/drm/i915/intel_i2c.c @@ -371,12 +371,30 @@ unsigned int gmbus_max_xfer_size(struct drm_i915_private *dev_priv) static int gmbus_xfer_read_chunk(struct drm_i915_private *dev_priv, unsigned short addr, u8 *buf, unsigned int len, - u32 gmbus1_index) + u32 gmbus0_reg, u32 gmbus1_index) { + unsigned int size = len; + bool burst_read = len > gmbus_max_xfer_size(dev_priv); + bool extra_byte_added = false; + + if (burst_read) { + + /* + * As per HW Spec, for 512Bytes need to read extra Byte and + * Ignore the extra byte read. + */ + if (len == 512) { + extra_byte_added = true; + len++; + } + size = len % 256 + 256; + I915_WRITE_FW(GMBUS0, gmbus0_reg | GMBUS_BYTE_CNT_OVERRIDE); + } + I915_WRITE_FW(GMBUS1, gmbus1_index | GMBUS_CYCLE_WAIT | - (len << GMBUS_BYTE_COUNT_SHIFT) | + (size << GMBUS_BYTE_COUNT_SHIFT) | (addr << GMBUS_SLAVE_ADDR_SHIFT) | GMBUS_SLAVE_READ | GMBUS_SW_RDY); while (len) { @@ -389,17 +407,34 @@ gmbus_xfer_read_chunk(struct drm_i915_private *dev_priv,

val = I915_READ_FW(GMBUS3); do { + if (extra_byte_added && len == 1) + break; + *buf++ = val & 0xff; val >>= 8; } while (--len && ++loop < 4); + + if (burst_read && len == size - 4) + /* Reset the override bit */ + I915_WRITE_FW(GMBUS0, gmbus0_reg); }

return 0; }

+/* + * HW spec says that 512Bytes in Burst read need special treatment. + * But it doesn't talk about other multiple of 256Bytes. And couldn't locate + * an I2C slave, which supports such a lengthy burst read too for experiments. + * + * So until things get clarified on HW support, to avoid the burst read length + * in fold of 256Bytes except 512, max burst read length is fixed at 767Bytes. + */ +#define INTEL_GMBUS_BURST_READ_MAX_LEN 767U + static int gmbus_xfer_read(struct drm_i915_private *dev_priv, struct i2c_msg *msg, - u32 gmbus1_index) + u32 gmbus0_reg, u32 gmbus1_index) { u8 *buf = msg->buf; unsigned int rx_size = msg->len; @@ -407,10 +442,13 @@ gmbus_xfer_read(struct drm_i915_private *dev_priv, struct i2c_msg *msg, int ret;

do { - len = min(rx_size, gmbus_max_xfer_size(dev_priv)); + if (HAS_GMBUS_BURST_READ(dev_priv)) + len = min(rx_size, INTEL_GMBUS_BURST_READ_MAX_LEN); + else + len = min(rx_size, gmbus_max_xfer_size(dev_priv));

- ret = gmbus_xfer_read_chunk(dev_priv, msg->addr, - buf, len, gmbus1_index); + ret = gmbus_xfer_read_chunk(dev_priv, msg->addr, buf, len, + gmbus0_reg, gmbus1_index); if (ret) return ret;

@@ -498,7 +536,8 @@ gmbus_is_index_xfer(struct i2c_msg *msgs, int i, int num) }

static int -gmbus_index_xfer(struct drm_i915_private *dev_priv, struct i2c_msg *msgs) +gmbus_index_xfer(struct drm_i915_private *dev_priv, struct i2c_msg *msgs, + u32 gmbus0_reg) { u32 gmbus1_index = 0; u32 gmbus5 = 0; @@ -516,7 +555,8 @@ gmbus_index_xfer(struct drm_i915_private *dev_priv, struct i2c_msg *msgs) I915_WRITE_FW(GMBUS5, gmbus5);

if (msgs[1].flags & I2C_M_RD) - ret = gmbus_xfer_read(dev_priv, &msgs[1], gmbus1_index); + ret = gmbus_xfer_read(dev_priv, &msgs[1], gmbus0_reg, + gmbus1_index); else ret = gmbus_xfer_write(dev_priv, &msgs[1], gmbus1_index);

@@ -551,10 +591,12 @@ do_gmbus_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs, int num, for (; i < num; i += inc) { inc = 1; if (gmbus_is_index_xfer(msgs, i, num)) { - ret = gmbus_index_xfer(dev_priv, &msgs[i]); + ret = gmbus_index_xfer(dev_priv, &msgs[i], + gmbus0_source | bus->reg0); inc = 2; /* an index transmission is two msgs */ } else if (msgs[i].flags & I2C_M_RD) { - ret = gmbus_xfer_read(dev_priv, &msgs[i], 0); + ret = gmbus_xfer_read(dev_priv, &msgs[i], + gmbus0_source | bus->reg0, 0); } else { ret = gmbus_xfer_write(dev_priv, &msgs[i], 0); }

Implements the HDMI adaptation specific HDCP2.2 operations.

Basically these are DDC read and write for authenticating through HDCP2.2 messages.

v2: Rebased. v3: No Changes. v4: No more special handling of Gmbus burst read for AKE_SEND_CERT. Style fixed with few naming. [Uma] %s/PARING/PAIRING v5: msg_sz is initialized at definition. Lookup table is defined for HDMI HDCP2.2 msgs [Daniel].

Signed-off-by: Ramalingam C ramalingam.c@intel.com --- drivers/gpu/drm/i915/intel_hdmi.c | 187 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 187 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index 7988f958d835..f3672e192be6 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c @@ -30,6 +30,7 @@ #include <linux/slab.h> #include <linux/delay.h> #include <linux/hdmi.h> +#include <linux/mei_hdcp.h> #include <drm/drmP.h> #include <drm/drm_atomic_helper.h> #include <drm/drm_crtc.h> @@ -1116,6 +1117,187 @@ bool intel_hdmi_hdcp_check_link(struct intel_digital_port *intel_dig_port) return true; }

+static struct hdcp2_hdmi_msg_data { + uint8_t msg_id; + uint32_t timeout; + uint32_t timeout2; + } hdcp2_msg_data[] = { + {HDCP_2_2_AKE_INIT, 0, 0}, + {HDCP_2_2_AKE_SEND_CERT, HDCP_2_2_CERT_TIMEOUT, 0}, + {HDCP_2_2_AKE_NO_STORED_KM, 0, 0}, + {HDCP_2_2_AKE_STORED_KM, 0, 0}, + {HDCP_2_2_AKE_SEND_HPRIME, HDCP_2_2_HPRIME_PAIRED_TIMEOUT, + HDCP_2_2_HPRIME_NO_PAIRED_TIMEOUT}, + {HDCP_2_2_AKE_SEND_PAIRING_INFO, HDCP_2_2_PAIRING_TIMEOUT, 0}, + {HDCP_2_2_LC_INIT, 0, 0}, + {HDCP_2_2_LC_SEND_LPRIME, HDCP_2_2_HDMI_LPRIME_TIMEOUT, 0}, + {HDCP_2_2_SKE_SEND_EKS, 0, 0}, + {HDCP_2_2_REP_SEND_RECVID_LIST, + HDCP_2_2_RECVID_LIST_TIMEOUT, 0}, + {HDCP_2_2_REP_SEND_ACK, 0, 0}, + {HDCP_2_2_REP_STREAM_MANAGE, 0, 0}, + {HDCP_2_2_REP_STREAM_READY, HDCP_2_2_STREAM_READY_TIMEOUT, 0}, + }; + +static +int intel_hdmi_hdcp2_read_rx_status(struct intel_digital_port *intel_dig_port, + uint8_t *rx_status) +{ + return intel_hdmi_hdcp_read(intel_dig_port, + HDCP_2_2_HDMI_REG_RXSTATUS_OFFSET, + rx_status, + HDCP_2_2_HDMI_RXSTATUS_LEN); +} + +static int get_hdcp2_msg_timeout(uint8_t msg_id, bool is_paired) +{ + int i; + + for (i = 0; i < sizeof(hdcp2_msg_data); i++) + if (hdcp2_msg_data[i].msg_id == msg_id && + (msg_id != HDCP_2_2_AKE_SEND_HPRIME || is_paired)) + return hdcp2_msg_data[i].timeout; + else if (hdcp2_msg_data[i].msg_id == msg_id) + return hdcp2_msg_data[i].timeout2; + + return -EINVAL; +} + +static inline +int hdcp2_detect_msg_availability(struct intel_digital_port *intel_digital_port, + uint8_t msg_id, bool *msg_ready, + ssize_t *msg_sz) +{ + uint8_t rx_status[HDCP_2_2_HDMI_RXSTATUS_LEN]; + int ret; + + ret = intel_hdmi_hdcp2_read_rx_status(intel_digital_port, rx_status); + if (ret < 0) { + DRM_DEBUG_KMS("rx_status read failed. Err %d\n", ret); + return ret; + } + + *msg_sz = ((HDCP_2_2_HDMI_RXSTATUS_MSG_SZ_HI(rx_status[1]) << 8) | + rx_status[0]); + + if (msg_id == HDCP_2_2_REP_SEND_RECVID_LIST) + *msg_ready = (HDCP_2_2_HDMI_RXSTATUS_READY(rx_status[1]) && + *msg_sz); + else + *msg_ready = *msg_sz; + + return 0; +} + +static ssize_t +intel_hdmi_hdcp2_wait_for_msg(struct intel_digital_port *intel_dig_port, + uint8_t msg_id, bool paired) +{ + bool msg_ready = false; + int timeout, ret; + ssize_t msg_sz = 0; + + timeout = get_hdcp2_msg_timeout(msg_id, paired); + if (timeout < 0) + return timeout; + + ret = __wait_for(ret = hdcp2_detect_msg_availability(intel_dig_port, + msg_id, &msg_ready, &msg_sz), + !ret && msg_ready && msg_sz, timeout * 1000, + 1000, 5 * 1000); + if (ret) + DRM_ERROR("msg_id: %d, ret: %d, timeout: %d\n", + msg_id, ret, timeout); + + return ret ? ret : msg_sz; +} + +static +int intel_hdmi_hdcp2_write_msg(struct intel_digital_port *intel_dig_port, + void *buf, size_t size) +{ + unsigned int offset; + + offset = HDCP_2_2_HDMI_REG_WR_MSG_OFFSET; + return intel_hdmi_hdcp_write(intel_dig_port, offset, buf, size); +} + +static +int intel_hdmi_hdcp2_read_msg(struct intel_digital_port *intel_dig_port, + uint8_t msg_id, void *buf, size_t size) +{ + struct intel_hdmi *hdmi = &intel_dig_port->hdmi; + struct intel_hdcp *hdcp = &hdmi->attached_connector->hdcp; + unsigned int offset; + ssize_t ret; + + ret = intel_hdmi_hdcp2_wait_for_msg(intel_dig_port, msg_id, + hdcp->is_paired); + if (ret < 0) + return ret; + + /* + * Available msg size should be equal to or lesser than the + * available buffer. + */ + if (ret > size) { + DRM_DEBUG_KMS("msg_sz(%zd) is more than exp size(%zu)\n", + ret, size); + return -1; + } + + offset = HDCP_2_2_HDMI_REG_RD_MSG_OFFSET; + ret = intel_hdmi_hdcp_read(intel_dig_port, offset, buf, ret); + if (ret) + DRM_DEBUG_KMS("Failed to read msg_id: %d(%zd)\n", msg_id, ret); + + return ret; +} + +static +int intel_hdmi_hdcp2_check_link(struct intel_digital_port *intel_dig_port) +{ + uint8_t rx_status[HDCP_2_2_HDMI_RXSTATUS_LEN]; + int ret; + + ret = intel_hdmi_hdcp2_read_rx_status(intel_dig_port, rx_status); + if (ret) + return ret; + + /* + * Re-auth request and Link Integrity Failures are represented by + * same bit. i.e reauth_req. + */ + if (HDCP_2_2_HDMI_RXSTATUS_REAUTH_REQ(rx_status[1])) + ret = DRM_HDCP_REAUTH_REQUEST; + else if (HDCP_2_2_HDMI_RXSTATUS_READY(rx_status[1])) + ret = DRM_HDCP_TOPOLOGY_CHANGE; + + return ret; +} + +static +int intel_hdmi_hdcp2_capable(struct intel_digital_port *intel_dig_port, + bool *capable) +{ + uint8_t hdcp2_version; + int ret; + + *capable = false; + ret = intel_hdmi_hdcp_read(intel_dig_port, HDCP_2_2_HDMI_REG_VER_OFFSET, + &hdcp2_version, sizeof(hdcp2_version)); + if (!ret && hdcp2_version & HDCP_2_2_HDMI_SUPPORT_MASK) + *capable = true; + + return ret; +} + +static +enum hdcp_protocol intel_hdmi_hdcp2_protocol(void) +{ + return HDCP_PROTOCOL_HDMI; +} + static const struct intel_hdcp_shim intel_hdmi_hdcp_shim = { .write_an_aksv = intel_hdmi_hdcp_write_an_aksv, .read_bksv = intel_hdmi_hdcp_read_bksv, @@ -1127,6 +1309,11 @@ static const struct intel_hdcp_shim intel_hdmi_hdcp_shim = { .read_v_prime_part = intel_hdmi_hdcp_read_v_prime_part, .toggle_signalling = intel_hdmi_hdcp_toggle_signalling, .check_link = intel_hdmi_hdcp_check_link, + .write_2_2_msg = intel_hdmi_hdcp2_write_msg, + .read_2_2_msg = intel_hdmi_hdcp2_read_msg, + .check_2_2_link = intel_hdmi_hdcp2_check_link, + .hdcp_2_2_capable = intel_hdmi_hdcp2_capable, + .hdcp_protocol = intel_hdmi_hdcp2_protocol, };

static void intel_hdmi_prepare(struct intel_encoder *encoder,

On HDMI connector init, intel_hdcp_init is passed with a flag for hdcp2.2 support based on the platform capability.

v2: Rebased. v3: No Changes. v4: Collected the reviewed-by received. v5: No change.

Signed-off-by: Ramalingam C ramalingam.c@intel.com Reviewed-by: Uma Shankar uma.shankar@intel.com --- drivers/gpu/drm/i915/intel_hdmi.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index f3672e192be6..05fa1f8da681 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c @@ -2553,7 +2553,8 @@ void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port,

if (is_hdcp_supported(dev_priv, port)) { int ret = intel_hdcp_init(intel_connector, - &intel_hdmi_hdcp_shim, false); + &intel_hdmi_hdcp_shim, + is_hdcp2_supported(dev_priv)); if (ret) DRM_DEBUG_KMS("HDCP init failed, skipping.\n"); }

Mei hdcp driver is designed as component slave for the I915 component master.

v2: Rebased. v3: Notifier chain is adopted for cldev state update [Tomas] v4: Made static dummy functions as inline in mei_hdcp.h API for polling client device status IS_ENABLED used in header, for config status for mei_hdcp. v5: Replacing the notifier with component framework. [Daniel]

Signed-off-by: Ramalingam C ramalingam.c@intel.com --- drivers/misc/mei/hdcp/mei_hdcp.c | 94 +++++++++++++++++++++++++++++++++++++++- 1 file changed, 92 insertions(+), 2 deletions(-)

diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c b/drivers/misc/mei/hdcp/mei_hdcp.c index 4cd6fdd01181..ba7550215b7f 100644 --- a/drivers/misc/mei/hdcp/mei_hdcp.c +++ b/drivers/misc/mei/hdcp/mei_hdcp.c @@ -31,6 +31,83 @@ #include <linux/slab.h> #include <linux/uuid.h> #include <linux/mei_cl_bus.h> +#include <linux/component.h> +#include <drm/i915_component.h> + +bool mei_hdcp_component_registered; +static struct mei_cl_device *mei_cldev; + +struct i915_hdcp_component_ops mei_hdcp_component_ops = { + .owner = THIS_MODULE, + .initiate_hdcp2_session = NULL, + .verify_receiver_cert_prepare_km = NULL, + .verify_hprime = NULL, + .store_pairing_info = NULL, + .initiate_locality_check = NULL, + .verify_lprime = NULL, + .get_session_key = NULL, + .repeater_check_flow_prepare_ack = NULL, + .verify_mprime = NULL, + .enable_hdcp_authentication = NULL, + .close_hdcp_session = NULL, +}; + +static int mei_hdcp_component_bind(struct device *mei_kdev, + struct device *i915_kdev, void *data) +{ + struct i915_hdcp_component *comp = data; + + WARN_ON(!mutex_is_locked(&comp->mutex)); + if (WARN_ON(comp->ops || comp->dev)) + return -EEXIST; + + dev_info(mei_kdev, "MEI HDCP comp bind\n"); + comp->ops = &mei_hdcp_component_ops; + comp->i915_kdev = i915_kdev; + comp->mei_cldev = mei_cldev; + mei_cldev_set_drvdata(mei_cldev, (void *)comp); + + return 0; +} + +static void mei_hdcp_component_unbind(struct device *mei_kdev, + struct device *i915_kdev, void *data) +{ + struct i915_hdcp_component *comp = data; + + WARN_ON(!mutex_is_locked(&comp->mutex)); + dev_info(mei_kdev, "MEI HDCP comp unbind\n"); + comp->ops = NULL; + comp->dev = NULL; + comp->mei_cldev = NULL; +} + +static const struct component_ops mei_hdcp_component_bind_ops = { + .bind = mei_hdcp_component_bind, + .unbind = mei_hdcp_component_unbind, +}; + +void mei_hdcp_component_init(struct device *dev) +{ + int ret; + + ret = component_add(dev, &mei_hdcp_component_bind_ops); + if (ret < 0) { + dev_err(dev, "Failed to add MEI HDCP comp (%d)\n", ret); + return; + } + + mei_hdcp_component_registered = true; +} + +void mei_hdcp_component_cleanup(struct device *dev) +{ + if (!mei_hdcp_component_registered) + return; + + component_del(dev, &mei_hdcp_component_bind_ops); + mei_hdcp_component_registered = false; +}

static int mei_hdcp_probe(struct mei_cl_device *cldev, const struct mei_cl_device_id *id) @@ -38,15 +115,28 @@ static int mei_hdcp_probe(struct mei_cl_device *cldev, int ret;

ret = mei_cldev_enable(cldev); - if (ret < 0) + if (ret < 0) { dev_err(&cldev->dev, "mei_cldev_enable Failed. %d\n", ret); + return ret; + }

- return ret; + mei_cldev = cldev; + mei_hdcp_component_init(&cldev->dev); + return 0; }

static int mei_hdcp_remove(struct mei_cl_device *cldev) { + struct i915_hdcp_component *comp; + + comp = mei_cldev_get_drvdata(cldev); + if (comp && comp->master_ops && comp->master_ops->pull_down_interface) + comp->master_ops->pull_down_interface(comp->i915_kdev); + + mei_cldev = NULL; mei_cldev_set_drvdata(cldev, NULL); + mei_hdcp_component_cleanup(&cldev->dev); + return mei_cldev_disable(cldev); }

Request ME FW to start the HDCP2.2 session for an intel port. Prepares payloads for command WIRED_INITIATE_HDCP2_SESSION and sends to ME FW.

On Success, ME FW will start a HDCP2.2 session for the port and provides the content for HDCP2.2 AKE_Init message.

v2: Rebased. v3: cldev is add as a separate parameter [Tomas] Redundant comment and typecast are removed [Tomas] v4: %zd is used for size [Alexander] %s/return -1/return -EIO [Alexander] Spellings in commit msg is fixed [Uma] v5: Rebased.

Signed-off-by: Ramalingam C ramalingam.c@intel.com --- drivers/misc/mei/hdcp/mei_hdcp.c | 70 +++++++++++++++++++++++++++++++++++++++- 1 file changed, 69 insertions(+), 1 deletion(-)

diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c b/drivers/misc/mei/hdcp/mei_hdcp.c index ba7550215b7f..7311e3095e94 100644 --- a/drivers/misc/mei/hdcp/mei_hdcp.c +++ b/drivers/misc/mei/hdcp/mei_hdcp.c @@ -32,14 +32,82 @@ #include <linux/uuid.h> #include <linux/mei_cl_bus.h> #include <linux/component.h> +#include <linux/mei_hdcp.h> #include <drm/i915_component.h> +#include <drm/drm_connector.h> + +#include "mei_hdcp.h"

bool mei_hdcp_component_registered; static struct mei_cl_device *mei_cldev;

+/* + * mei_initiate_hdcp2_session: + * Function to start a Wired HDCP2.2 Tx Session with ME FW + * + * cldev : Pointer for mei client device + * data : Intel HW specific Data + * ake_data : ptr to store AKE_Init + * + * Returns 0 on Success, <0 on Failure. + */ +static int mei_initiate_hdcp2_session(struct mei_cl_device *cldev, + struct mei_hdcp_data *data, + struct hdcp2_ake_init *ake_data) +{ + struct wired_cmd_initiate_hdcp2_session_in session_init_in = { { 0 } }; + struct wired_cmd_initiate_hdcp2_session_out + session_init_out = { { 0 } }; + struct device *dev; + ssize_t byte; + + if (!data || !ake_data) + return -EINVAL; + + dev = &cldev->dev; + + session_init_in.header.api_version = HDCP_API_VERSION; + session_init_in.header.command_id = WIRED_INITIATE_HDCP2_SESSION; + session_init_in.header.status = ME_HDCP_STATUS_SUCCESS; + session_init_in.header.buffer_len = + WIRED_CMD_BUF_LEN_INITIATE_HDCP2_SESSION_IN; + + session_init_in.port.integrated_port_type = data->port_type; + session_init_in.port.physical_port = data->port; + session_init_in.protocol = (uint8_t)data->protocol; + + byte = mei_cldev_send(cldev, (u8 *)&session_init_in, + sizeof(session_init_in)); + if (byte < 0) { + dev_dbg(dev, "mei_cldev_send failed. %zd\n", byte); + return byte; + } + + byte = mei_cldev_recv(cldev, (u8 *)&session_init_out, + sizeof(session_init_out)); + if (byte < 0) { + dev_dbg(dev, "mei_cldev_recv failed. %zd\n", byte); + return byte; + } + + if (session_init_out.header.status != ME_HDCP_STATUS_SUCCESS) { + dev_dbg(dev, "ME cmd 0x%08X Failed. Status: 0x%X\n", + WIRED_INITIATE_HDCP2_SESSION, + session_init_out.header.status); + return -EIO; + } + + ake_data->msg_id = HDCP_2_2_AKE_INIT; + ake_data->tx_caps = session_init_out.tx_caps; + memcpy(ake_data->r_tx, session_init_out.r_tx, + sizeof(session_init_out.r_tx)); + + return 0; +} + struct i915_hdcp_component_ops mei_hdcp_component_ops = { .owner = THIS_MODULE, - .initiate_hdcp2_session = NULL, + .initiate_hdcp2_session = mei_initiate_hdcp2_session, .verify_receiver_cert_prepare_km = NULL, .verify_hprime = NULL, .store_pairing_info = NULL,

Requests for the verification of AKE_Send_H_prime.

ME will calculate the H and comparing it with received H_Prime. The result will be returned as status.

Here AKE_Send_H_prime is a HDCP2.2 Authentication msg.

v2: Rebased. v3: cldev is passed as first parameter [Tomas] Redundant comments and cast are removed [Tomas] v4: %zd for ssize_t [Alexander] %s/return -1/return -EIO [Alexander] Styles and typos fixed [Uma] v5: Rebased.

Signed-off-by: Ramalingam C ramalingam.c@intel.com --- drivers/misc/mei/hdcp/mei_hdcp.c | 61 +++++++++++++++++++++++++++++++++++++++- 1 file changed, 60 insertions(+), 1 deletion(-)

diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c b/drivers/misc/mei/hdcp/mei_hdcp.c index fb717a7ff249..fb8b7ed889f5 100644 --- a/drivers/misc/mei/hdcp/mei_hdcp.c +++ b/drivers/misc/mei/hdcp/mei_hdcp.c @@ -187,12 +187,71 @@ mei_verify_receiver_cert_prepare_km(struct mei_cl_device *cldev, return 0; }

+/* + * mei_verify_hprime: + * Function to verify AKE_Send_H_prime received, through ME FW. + * + * cldev : Pointer for mei client device + * data : Intel HW specific Data + * rx_hprime : Pointer for AKE_Send_H_prime + * hprime_sz : Input buffer size + * + * Returns 0 on Success, <0 on Failure + */ +static int mei_verify_hprime(struct mei_cl_device *cldev, + struct mei_hdcp_data *data, + struct hdcp2_ake_send_hprime *rx_hprime) +{ + struct wired_cmd_ake_send_hprime_in send_hprime_in = { { 0 } }; + struct wired_cmd_ake_send_hprime_out send_hprime_out = { { 0 } }; + struct device *dev; + ssize_t byte; + + if (!data || !rx_hprime) + return -EINVAL; + + dev = &cldev->dev; + + send_hprime_in.header.api_version = HDCP_API_VERSION; + send_hprime_in.header.command_id = WIRED_AKE_SEND_HPRIME; + send_hprime_in.header.status = ME_HDCP_STATUS_SUCCESS; + send_hprime_in.header.buffer_len = WIRED_CMD_BUF_LEN_AKE_SEND_HPRIME_IN; + + send_hprime_in.port.integrated_port_type = data->port_type; + send_hprime_in.port.physical_port = data->port; + + memcpy(send_hprime_in.h_prime, rx_hprime->h_prime, + sizeof(rx_hprime->h_prime)); + + byte = mei_cldev_send(cldev, (u8 *)&send_hprime_in, + sizeof(send_hprime_in)); + if (byte < 0) { + dev_dbg(dev, "mei_cldev_send failed. %zd\n", byte); + return byte; + } + + byte = mei_cldev_recv(cldev, (u8 *)&send_hprime_out, + sizeof(send_hprime_out)); + if (byte < 0) { + dev_dbg(dev, "mei_cldev_recv failed. %zd\n", byte); + return byte; + } + + if (send_hprime_out.header.status != ME_HDCP_STATUS_SUCCESS) { + dev_dbg(dev, "ME cmd 0x%08X Failed. Status: 0x%X\n", + WIRED_AKE_SEND_HPRIME, send_hprime_out.header.status); + return -EIO; + } + + return 0; +} + struct i915_hdcp_component_ops mei_hdcp_component_ops = { .owner = THIS_MODULE, .initiate_hdcp2_session = mei_initiate_hdcp2_session, .verify_receiver_cert_prepare_km = mei_verify_receiver_cert_prepare_km, - .verify_hprime = NULL, + .verify_hprime = mei_verify_hprime, .store_pairing_info = NULL, .initiate_locality_check = NULL, .verify_lprime = NULL,

Requests ME to start the second stage of HDCP2.2 authentication, called Locality Check.

On Success, ME FW will provide LC_Init message to send to hdcp sink.

v2: Rebased. v3: cldev is passed as first parameter [Tomas] Redundant comments and cast are removed [Tomas] v4: %zd used for ssize_t [Alexander] %s/return -1/return -EIO [Alexander] Style fixed [Uma] v5: Rebased.

Signed-off-by: Ramalingam C ramalingam.c@intel.com --- drivers/misc/mei/hdcp/mei_hdcp.c | 58 +++++++++++++++++++++++++++++++++++++++- 1 file changed, 57 insertions(+), 1 deletion(-)

diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c b/drivers/misc/mei/hdcp/mei_hdcp.c index 7c833378bc60..2a0369f46326 100644 --- a/drivers/misc/mei/hdcp/mei_hdcp.c +++ b/drivers/misc/mei/hdcp/mei_hdcp.c @@ -307,6 +307,62 @@ mei_store_pairing_info(struct mei_cl_device *cldev, return 0; }

+/* + * mei_initiate_locality_check: + * Function to prepare LC_Init. + * + * cldev : Pointer for mei client device + * data : Intel HW specific Data + * hdcp2_lc_init : Pointer for storing LC_Init + * + * Returns 0 on Success, <0 on Failure + */ +static int mei_initiate_locality_check(struct mei_cl_device *cldev, + struct mei_hdcp_data *data, + struct hdcp2_lc_init *lc_init_data) +{ + struct wired_cmd_init_locality_check_in lc_init_in = { { 0 } }; + struct wired_cmd_init_locality_check_out lc_init_out = { { 0 } }; + struct device *dev; + ssize_t byte; + + if (!data || !lc_init_data) + return -EINVAL; + + dev = &cldev->dev; + + lc_init_in.header.api_version = HDCP_API_VERSION; + lc_init_in.header.command_id = WIRED_INIT_LOCALITY_CHECK; + lc_init_in.header.status = ME_HDCP_STATUS_SUCCESS; + lc_init_in.header.buffer_len = WIRED_CMD_BUF_LEN_INIT_LOCALITY_CHECK_IN; + + lc_init_in.port.integrated_port_type = data->port_type; + lc_init_in.port.physical_port = data->port; + + byte = mei_cldev_send(cldev, (u8 *)&lc_init_in, sizeof(lc_init_in)); + if (byte < 0) { + dev_dbg(dev, "mei_cldev_send failed. %zd\n", byte); + return byte; + } + + byte = mei_cldev_recv(cldev, (u8 *)&lc_init_out, sizeof(lc_init_out)); + if (byte < 0) { + dev_dbg(dev, "mei_cldev_recv failed. %zd\n", byte); + return byte; + } + + if (lc_init_out.header.status != ME_HDCP_STATUS_SUCCESS) { + dev_dbg(dev, "ME cmd 0x%08X Failed. status: 0x%X\n", + WIRED_INIT_LOCALITY_CHECK, lc_init_out.header.status); + return -EIO; + } + + lc_init_data->msg_id = HDCP_2_2_LC_INIT; + memcpy(lc_init_data->r_n, lc_init_out.r_n, HDCP_2_2_RN_LEN); + + return 0; +} + struct i915_hdcp_component_ops mei_hdcp_component_ops = { .owner = THIS_MODULE, .initiate_hdcp2_session = mei_initiate_hdcp2_session, @@ -314,7 +370,7 @@ struct i915_hdcp_component_ops mei_hdcp_component_ops = { mei_verify_receiver_cert_prepare_km, .verify_hprime = mei_verify_hprime, .store_pairing_info = mei_store_pairing_info, - .initiate_locality_check = NULL, + .initiate_locality_check = mei_initiate_locality_check, .verify_lprime = NULL, .get_session_key = NULL, .repeater_check_flow_prepare_ack = NULL,

Request to ME to prepare the encrypted session key.

On Success, ME provides Encrypted session key. Function populates the HDCP2.2 authentication msg SKE_Send_Eks.

v2: Rebased. v3: cldev is passed as first parameter [Tomas] Redundant comments and cast are removed [Tomas] v4: %zd for ssize_t [Alexander] %s/return -1/return -EIO [Alexander] Style fixed [Uma] v5: Rebased.

Signed-off-by: Ramalingam C ramalingam.c@intel.com --- drivers/misc/mei/hdcp/mei_hdcp.c | 62 ++++++++++++++++++++++++++++++++++++++-- 1 file changed, 60 insertions(+), 2 deletions(-)

diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c b/drivers/misc/mei/hdcp/mei_hdcp.c index de8ffb589ca4..8a065f17d6c9 100644 --- a/drivers/misc/mei/hdcp/mei_hdcp.c +++ b/drivers/misc/mei/hdcp/mei_hdcp.c @@ -423,6 +423,65 @@ static int mei_verify_lprime(struct mei_cl_device *cldev, return 0; }

+/* + * mei_get_session_key: + * Function to prepare SKE_Send_Eks. + * + * cldev : Pointer for mei client device + * data : Intel HW specific Data + * ske_data : Pointer for SKE_Send_Eks. + * + * Returns 0 on Success, <0 on Failure + */ +static int mei_get_session_key(struct mei_cl_device *cldev, + struct mei_hdcp_data *data, + struct hdcp2_ske_send_eks *ske_data) +{ + struct wired_cmd_get_session_key_in get_skey_in = { { 0 } }; + struct wired_cmd_get_session_key_out get_skey_out = { { 0 } }; + struct device *dev; + ssize_t byte; + + if (!data || !ske_data) + return -EINVAL; + + dev = &cldev->dev; + + get_skey_in.header.api_version = HDCP_API_VERSION; + get_skey_in.header.command_id = WIRED_GET_SESSION_KEY; + get_skey_in.header.status = ME_HDCP_STATUS_SUCCESS; + get_skey_in.header.buffer_len = WIRED_CMD_BUF_LEN_GET_SESSION_KEY_IN; + + get_skey_in.port.integrated_port_type = data->port_type; + get_skey_in.port.physical_port = data->port; + + byte = mei_cldev_send(cldev, (u8 *)&get_skey_in, sizeof(get_skey_in)); + if (byte < 0) { + dev_dbg(dev, "mei_cldev_send failed. %zd\n", byte); + return byte; + } + + byte = mei_cldev_recv(cldev, (u8 *)&get_skey_out, sizeof(get_skey_out)); + + if (byte < 0) { + dev_dbg(dev, "mei_cldev_recv failed. %zd\n", byte); + return byte; + } + + if (get_skey_out.header.status != ME_HDCP_STATUS_SUCCESS) { + dev_dbg(dev, "ME cmd 0x%08X failed. status: 0x%X\n", + WIRED_GET_SESSION_KEY, get_skey_out.header.status); + return -EIO; + } + + ske_data->msg_id = HDCP_2_2_SKE_SEND_EKS; + memcpy(ske_data->e_dkey_ks, get_skey_out.e_dkey_ks, + HDCP_2_2_E_DKEY_KS_LEN); + memcpy(ske_data->riv, get_skey_out.r_iv, HDCP_2_2_RIV_LEN); + + return 0; +} + struct i915_hdcp_component_ops mei_hdcp_component_ops = { .owner = THIS_MODULE, .initiate_hdcp2_session = mei_initiate_hdcp2_session, @@ -432,7 +491,7 @@ struct i915_hdcp_component_ops mei_hdcp_component_ops = { .store_pairing_info = mei_store_pairing_info, .initiate_locality_check = mei_initiate_locality_check, .verify_lprime = mei_verify_lprime, - .get_session_key = NULL, + .get_session_key = mei_get_session_key, .repeater_check_flow_prepare_ack = NULL, .verify_mprime = NULL, .enable_hdcp_authentication = NULL, @@ -441,7 +500,6 @@ struct i915_hdcp_component_ops mei_hdcp_component_ops = {

static int mei_hdcp_component_bind(struct device *mei_kdev, struct device *i915_kdev, void *data) - { struct i915_hdcp_component *comp = data;

Request to ME to verify the M_Prime received from the HDCP sink.

ME FW will calculate the M and compare with M_prime received as part of RepeaterAuth_Stream_Ready, which is HDCP2.2 protocol msg.

On successful completion of this stage, downstream propagation of the stream management info is completed.

v2: Rebased. v3: cldev is passed as first parameter [Tomas] Redundant comments and cast are removed [Tomas] v4: %zd for ssize_t [Alexander] %s/return -1/return -EIO [Alexander] endianness conversion func is moved to drm_hdcp.h [Uma] v5: Rebased.

Signed-off-by: Ramalingam C ramalingam.c@intel.com --- drivers/misc/mei/hdcp/mei_hdcp.c | 70 +++++++++++++++++++++++++++++++++++++++- 1 file changed, 69 insertions(+), 1 deletion(-)

diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c b/drivers/misc/mei/hdcp/mei_hdcp.c index 1fa668a5f437..3ff4de75ff21 100644 --- a/drivers/misc/mei/hdcp/mei_hdcp.c +++ b/drivers/misc/mei/hdcp/mei_hdcp.c @@ -556,6 +556,74 @@ mei_repeater_check_flow_prepare_ack(struct mei_cl_device *cldev, return 0; }

+/* + * mei_verify_mprime: + * Function to verify mprime. + * + * cldev : Pointer for mei client device + * data : Intel HW specific Data + * stream_ready : pointer for RepeaterAuth_Stream_Ready message. + * + * Returns 0 on Success, <0 on Failure + */ +static int mei_verify_mprime(struct mei_cl_device *cldev, + struct mei_hdcp_data *data, + struct hdcp2_rep_stream_ready *stream_ready) +{ + struct wired_cmd_repeater_auth_stream_req_in + verify_mprime_in = { { 0 } }; + struct wired_cmd_repeater_auth_stream_req_out + verify_mprime_out = { { 0 } }; + struct device *dev; + ssize_t byte; + + if (!stream_ready || !data) + return -EINVAL; + + dev = &cldev->dev; + + verify_mprime_in.header.api_version = HDCP_API_VERSION; + verify_mprime_in.header.command_id = WIRED_REPEATER_AUTH_STREAM_REQ; + verify_mprime_in.header.status = ME_HDCP_STATUS_SUCCESS; + verify_mprime_in.header.buffer_len = + WIRED_CMD_BUF_LEN_REPEATER_AUTH_STREAM_REQ_MIN_IN; + + verify_mprime_in.port.integrated_port_type = data->port_type; + verify_mprime_in.port.physical_port = data->port; + + memcpy(verify_mprime_in.m_prime, stream_ready->m_prime, + HDCP_2_2_MPRIME_LEN); + reverse_endianness((u8 *)&verify_mprime_in.seq_num_m, + HDCP_2_2_SEQ_NUM_LEN, (u8 *)&data->seq_num_m); + memcpy(verify_mprime_in.streams, data->streams, + (data->k * sizeof(struct hdcp2_streamid_type))); + + verify_mprime_in.k = __swab16(data->k); + + byte = mei_cldev_send(cldev, (u8 *)&verify_mprime_in, + sizeof(verify_mprime_in)); + if (byte < 0) { + dev_dbg(dev, "mei_cldev_send failed. %zd\n", byte); + return byte; + } + + byte = mei_cldev_recv(cldev, (u8 *)&verify_mprime_out, + sizeof(verify_mprime_out)); + if (byte < 0) { + dev_dbg(dev, "mei_cldev_recv failed. %zd\n", byte); + return byte; + } + + if (verify_mprime_out.header.status != ME_HDCP_STATUS_SUCCESS) { + dev_dbg(dev, "ME cmd 0x%08X failed. status: 0x%X\n", + WIRED_REPEATER_AUTH_STREAM_REQ, + verify_mprime_out.header.status); + return -EIO; + } + + return 0; +} + struct i915_hdcp_component_ops mei_hdcp_component_ops = { .owner = THIS_MODULE, .initiate_hdcp2_session = mei_initiate_hdcp2_session, @@ -568,7 +636,7 @@ struct i915_hdcp_component_ops mei_hdcp_component_ops = { .get_session_key = mei_get_session_key, .repeater_check_flow_prepare_ack = mei_repeater_check_flow_prepare_ack, - .verify_mprime = NULL, + .verify_mprime = mei_verify_mprime, .enable_hdcp_authentication = NULL, .close_hdcp_session = NULL, };

Request the ME to terminate the HDCP2.2 session for a port.

On Success, ME FW will mark the intel port as Deauthenticated and terminate the wired HDCP2.2 Tx session started due to the cmd WIRED_INITIATE_HDCP2_SESSION.

v2: Rebased. v3: cldev is passed as first parameter [Tomas] Redundant comments and cast are removed [Tomas] v4: %zd for ssize_t [Alexander] %s/return -1/return -EIO [Alexander] Style and typos fixed [Uma] v5: Extra line is removed.

Signed-off-by: Ramalingam C ramalingam.c@intel.com --- drivers/misc/mei/hdcp/mei_hdcp.c | 56 +++++++++++++++++++++++++++++++++++++++- 1 file changed, 55 insertions(+), 1 deletion(-)

diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c b/drivers/misc/mei/hdcp/mei_hdcp.c index c3d97a848c67..8f5797e2eb51 100644 --- a/drivers/misc/mei/hdcp/mei_hdcp.c +++ b/drivers/misc/mei/hdcp/mei_hdcp.c @@ -678,6 +678,60 @@ static int mei_enable_hdcp_authentication(struct mei_cl_device *cldev, return 0; }

+/* + * mei_close_hdcp_session: + * Function to close the Wired HDCP Tx session of ME FW. + * This also disables the authenticated state of the port. + * + * data : Intel HW specific Data + * + * Returns 0 on Success, <0 on Failure + */ +static int mei_close_hdcp_session(struct mei_cl_device *cldev, + struct mei_hdcp_data *data) +{ + struct wired_cmd_close_session_in session_close_in = { { 0 } }; + struct wired_cmd_close_session_out session_close_out = { { 0 } }; + struct device *dev; + ssize_t byte; + + if (!data) + return -EINVAL; + + dev = &cldev->dev; + + session_close_in.header.api_version = HDCP_API_VERSION; + session_close_in.header.command_id = WIRED_CLOSE_SESSION; + session_close_in.header.status = ME_HDCP_STATUS_SUCCESS; + session_close_in.header.buffer_len = + WIRED_CMD_BUF_LEN_CLOSE_SESSION_IN; + + session_close_in.port.integrated_port_type = data->port_type; + session_close_in.port.physical_port = data->port; + + byte = mei_cldev_send(cldev, (u8 *)&session_close_in, + sizeof(session_close_in)); + if (byte < 0) { + dev_dbg(dev, "mei_cldev_send failed. %zd\n", byte); + return byte; + } + + byte = mei_cldev_recv(cldev, (u8 *)&session_close_out, + sizeof(session_close_out)); + if (byte < 0) { + dev_dbg(dev, "mei_cldev_recv failed. %zd\n", byte); + return byte; + } + + if (session_close_out.header.status != ME_HDCP_STATUS_SUCCESS) { + dev_dbg(dev, "Session Close Failed. status: 0x%X\n", + session_close_out.header.status); + return -EIO; + } + + return 0; +} + struct i915_hdcp_component_ops mei_hdcp_component_ops = { .owner = THIS_MODULE, .initiate_hdcp2_session = mei_initiate_hdcp2_session, @@ -693,7 +747,7 @@ struct i915_hdcp_component_ops mei_hdcp_component_ops = { .verify_mprime = mei_verify_mprime, .enable_hdcp_authentication = mei_enable_hdcp_authentication, - .close_hdcp_session = NULL, + .close_hdcp_session = mei_close_hdcp_session, };

static int mei_hdcp_component_bind(struct device *mei_kdev,