On 2021-09-06 13:25, Marijn Suijten wrote:

div_u64_rem provides the result of the divison and additonally the remainder; don't use this function to solely calculate the remainder while calculating the division again with div_u64.

A similar improvement was applied earlier to the 10nm pll in 5c191fef4ce2 ("drm/msm/dsi_pll_10nm: Fix dividing the same numbers twice").

Signed-off-by: Marijn Suijten marijn.suijten@somainline.org

Reviewed-by: Abhinav Kumar abhinavk@codeaurora.org

---

drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c | 4 +--- drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c | 4 +--- 2 files changed, 2 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c index 3c1e2106d962..8905f365c932 100644 --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c @@ -213,9 +213,7 @@ static void pll_14nm_dec_frac_calc(struct dsi_pll_14nm *pll, struct dsi_pll_conf DBG("vco_clk_rate=%lld ref_clk_rate=%lld", vco_clk_rate, fref);

dec_start_multiple = div_u64(vco_clk_rate * multiplier, fref);

• div_u64_rem(dec_start_multiple, multiplier, &div_frac_start);
• dec_start = div_u64(dec_start_multiple, multiplier);

• dec_start = div_u64_rem(dec_start_multiple, multiplier,

&div_frac_start);

pconf->dec_start = (u32)dec_start; pconf->div_frac_start = div_frac_start; diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c index c77c30628cca..1a5abbd9fb76 100644 --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c @@ -114,9 +114,7 @@ static void dsi_pll_calc_dec_frac(struct dsi_pll_7nm *pll, struct dsi_pll_config

multiplier = 1 << FRAC_BITS; dec_multiple = div_u64(pll_freq * multiplier, divider);

• div_u64_rem(dec_multiple, multiplier, &frac);
• dec = div_u64(dec_multiple, multiplier);

• dec = div_u64_rem(dec_multiple, multiplier, &frac);

  if (!(pll->phy->cfg->quirks & DSI_PHY_7NM_QUIRK_V4_1)) config->pll_clock_inverters = 0x28;