Replacing magic numbers in calculation of sleep divider id for fiji and polaris.
Signed-off-by: Nils Wallménius nils.wallmenius@gmail.com --- drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c | 3 ++- drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c | 4 ++-- 2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c index d05a5e0..c574afd 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c @@ -1903,7 +1903,8 @@ static uint8_t fiji_get_sleep_divider_id_from_clock(struct pp_hwmgr *hwmgr, { uint8_t i; uint32_t temp; - uint32_t min = clock_insr > 2500 ? clock_insr : 2500; + uint32_t min = clock_insr > FIJI_MINIMUM_ENGINE_CLOCK ? + clock_insr : FIJI_MINIMUM_ENGINE_CLOCK;
PP_ASSERT_WITH_CODE((clock >= min), "Engine clock can't satisfy stutter requirement!", return 0); for (i = FIJI_MAX_DEEPSLEEP_DIVIDER_ID; ; i--) { diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c index dbdcc68..c911ab8 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c @@ -1175,11 +1175,11 @@ static int polaris10_populate_single_graphic_level(struct pp_hwmgr *hwmgr, if (phm_cap_enabled(hwmgr->platformDescriptor.platformCaps, PHM_PlatformCaps_SclkDeepSleep)) level->DeepSleepDivId = PhwFiji_GetSleepDividerIdFromClock(hwmgr, clock, minClocks.engineClockInSR); */ - PP_ASSERT_WITH_CODE((clock >= 2500), "Engine clock can't satisfy stutter requirement!", return 0); + PP_ASSERT_WITH_CODE((clock >= POLARIS10_MINIMUM_ENGINE_CLOCK), "Engine clock can't satisfy stutter requirement!", return 0); for (i = POLARIS10_MAX_DEEPSLEEP_DIVIDER_ID; ; i--) { temp = clock / (1UL << i);
- if (temp >= 2500 || i == 0) + if (temp >= POLARIS10_MINIMUM_ENGINE_CLOCK || i == 0) break; }
Signed-off-by: Nils Wallménius nils.wallmenius@gmail.com --- drivers/gpu/drm/amd/amdgpu/ci_dpm.c | 3 +-- drivers/gpu/drm/amd/amdgpu/kv_dpm.c | 3 +-- drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c | 3 +-- drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c | 3 +-- 4 files changed, 4 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c index 2f24797..4d50c43 100644 --- a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c +++ b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c @@ -2554,8 +2554,7 @@ static u8 ci_get_sleep_divider_id_from_clock(struct amdgpu_device *adev, { u32 i; u32 tmp; - u32 min = (min_sclk_in_sr > CISLAND_MINIMUM_ENGINE_CLOCK) ? - min_sclk_in_sr : CISLAND_MINIMUM_ENGINE_CLOCK; + u32 min = max(min_sclk_in_sr, (u32)CISLAND_MINIMUM_ENGINE_CLOCK);
if (sclk < min) return 0; diff --git a/drivers/gpu/drm/amd/amdgpu/kv_dpm.c b/drivers/gpu/drm/amd/amdgpu/kv_dpm.c index 4bd1e55..4bc107a 100644 --- a/drivers/gpu/drm/amd/amdgpu/kv_dpm.c +++ b/drivers/gpu/drm/amd/amdgpu/kv_dpm.c @@ -2176,8 +2176,7 @@ static u8 kv_get_sleep_divider_id_from_clock(struct amdgpu_device *adev, struct kv_power_info *pi = kv_get_pi(adev); u32 i; u32 temp; - u32 min = (min_sclk_in_sr > KV_MINIMUM_ENGINE_CLOCK) ? - min_sclk_in_sr : KV_MINIMUM_ENGINE_CLOCK; + u32 min = max(min_sclk_in_sr, (u32)KV_MINIMUM_ENGINE_CLOCK);
if (sclk < min) return 0; diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c index c574afd..9847e20 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c @@ -1903,8 +1903,7 @@ static uint8_t fiji_get_sleep_divider_id_from_clock(struct pp_hwmgr *hwmgr, { uint8_t i; uint32_t temp; - uint32_t min = clock_insr > FIJI_MINIMUM_ENGINE_CLOCK ? - clock_insr : FIJI_MINIMUM_ENGINE_CLOCK; + uint32_t min = max(clock_insr, (uint32_t)FIJI_MINIMUM_ENGINE_CLOCK);
PP_ASSERT_WITH_CODE((clock >= min), "Engine clock can't satisfy stutter requirement!", return 0); for (i = FIJI_MAX_DEEPSLEEP_DIVIDER_ID; ; i--) { diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c index d79af48..8969f1e 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c @@ -2420,8 +2420,7 @@ static uint8_t tonga_get_sleep_divider_id_from_clock(struct pp_hwmgr *hwmgr, uint32_t engine_clock, uint32_t min_engine_clock_in_sr) { uint32_t i, temp; - uint32_t min = (min_engine_clock_in_sr > TONGA_MINIMUM_ENGINE_CLOCK) ? - min_engine_clock_in_sr : TONGA_MINIMUM_ENGINE_CLOCK; + uint32_t min = max(min_engine_clock_in_sr, (uint32_t)TONGA_MINIMUM_ENGINE_CLOCK);
PP_ASSERT_WITH_CODE((engine_clock >= min), "Engine clock can't satisfy stutter requirement!", return 0);
a / (1 << b) is equivalent to a >> b for unsigned values
Signed-off-by: Nils Wallménius nils.wallmenius@gmail.com --- drivers/gpu/drm/amd/amdgpu/ci_dpm.c | 2 +- drivers/gpu/drm/amd/amdgpu/kv_dpm.c | 7 +------ drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c | 2 +- drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c | 2 +- drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c | 2 +- 5 files changed, 5 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c index 4d50c43..b2c2f37 100644 --- a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c +++ b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c @@ -2560,7 +2560,7 @@ static u8 ci_get_sleep_divider_id_from_clock(struct amdgpu_device *adev, return 0;
for (i = CISLAND_MAX_DEEPSLEEP_DIVIDER_ID; ; i--) { - tmp = sclk / (1 << i); + tmp = sclk >> i; if (tmp >= min || i == 0) break; } diff --git a/drivers/gpu/drm/amd/amdgpu/kv_dpm.c b/drivers/gpu/drm/amd/amdgpu/kv_dpm.c index 4bc107a..bc7997b 100644 --- a/drivers/gpu/drm/amd/amdgpu/kv_dpm.c +++ b/drivers/gpu/drm/amd/amdgpu/kv_dpm.c @@ -135,11 +135,6 @@ static void sumo_take_smu_control(struct amdgpu_device *adev, bool enable) #endif }
-static u32 sumo_get_sleep_divider_from_id(u32 id) -{ - return 1 << id; -} - static void sumo_construct_sclk_voltage_mapping_table(struct amdgpu_device *adev, struct sumo_sclk_voltage_mapping_table *sclk_voltage_mapping_table, ATOM_AVAILABLE_SCLK_LIST *table) @@ -2185,7 +2180,7 @@ static u8 kv_get_sleep_divider_id_from_clock(struct amdgpu_device *adev, return 0;
for (i = KV_MAX_DEEPSLEEP_DIVIDER_ID; i > 0; i--) { - temp = sclk / sumo_get_sleep_divider_from_id(i); + temp = sclk >> i; if (temp >= min) break; } diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c index 9847e20..cc4b714 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c @@ -1907,7 +1907,7 @@ static uint8_t fiji_get_sleep_divider_id_from_clock(struct pp_hwmgr *hwmgr,
PP_ASSERT_WITH_CODE((clock >= min), "Engine clock can't satisfy stutter requirement!", return 0); for (i = FIJI_MAX_DEEPSLEEP_DIVIDER_ID; ; i--) { - temp = clock / (1UL << i); + temp = clock >> i;
if (temp >= min || i == 0) break; diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c index c911ab8..93768fa 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c @@ -1177,7 +1177,7 @@ static int polaris10_populate_single_graphic_level(struct pp_hwmgr *hwmgr, */ PP_ASSERT_WITH_CODE((clock >= POLARIS10_MINIMUM_ENGINE_CLOCK), "Engine clock can't satisfy stutter requirement!", return 0); for (i = POLARIS10_MAX_DEEPSLEEP_DIVIDER_ID; ; i--) { - temp = clock / (1UL << i); + temp = clock >> i;
if (temp >= POLARIS10_MINIMUM_ENGINE_CLOCK || i == 0) break; diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c index 8969f1e..13f97708 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c @@ -2426,7 +2426,7 @@ static uint8_t tonga_get_sleep_divider_id_from_clock(struct pp_hwmgr *hwmgr, "Engine clock can't satisfy stutter requirement!", return 0);
for (i = TONGA_MAX_DEEPSLEEP_DIVIDER_ID;; i--) { - temp = engine_clock / (1 << i); + temp = engine_clock >> i;
if(temp >= min || i == 0) break;
Signed-off-by: Nils Wallménius nils.wallmenius@gmail.com --- drivers/gpu/drm/amd/amdgpu/ci_dpm.c | 6 ++---- drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c | 6 +++--- drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c | 6 +++--- 3 files changed, 8 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c index b2c2f37..31b38bd 100644 --- a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c +++ b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c @@ -2549,8 +2549,7 @@ static int ci_get_dependency_volt_by_clk(struct amdgpu_device *adev, return 0; }
-static u8 ci_get_sleep_divider_id_from_clock(struct amdgpu_device *adev, - u32 sclk, u32 min_sclk_in_sr) +static u8 ci_get_sleep_divider_id_from_clock(u32 sclk, u32 min_sclk_in_sr) { u32 i; u32 tmp; @@ -3357,8 +3356,7 @@ static int ci_populate_single_graphic_level(struct amdgpu_device *adev, graphic_level->PowerThrottle = 0;
if (pi->caps_sclk_ds) - graphic_level->DeepSleepDivId = ci_get_sleep_divider_id_from_clock(adev, - engine_clock, + graphic_level->DeepSleepDivId = ci_get_sleep_divider_id_from_clock(engine_clock, CISLAND_MINIMUM_ENGINE_CLOCK);
graphic_level->DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW; diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c index cc4b714..c94f9fa 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c @@ -1898,8 +1898,8 @@ static int fiji_get_dependency_volt_by_clk(struct pp_hwmgr *hwmgr, return 0; }
-static uint8_t fiji_get_sleep_divider_id_from_clock(struct pp_hwmgr *hwmgr, - uint32_t clock, uint32_t clock_insr) +static uint8_t fiji_get_sleep_divider_id_from_clock(uint32_t clock, + uint32_t clock_insr) { uint8_t i; uint32_t temp; @@ -1961,7 +1961,7 @@ static int fiji_populate_single_graphic_level(struct pp_hwmgr *hwmgr, data->display_timing.min_clock_in_sr = hwmgr->display_config.min_core_set_clock_in_sr;
if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_SclkDeepSleep)) - level->DeepSleepDivId = fiji_get_sleep_divider_id_from_clock(hwmgr, clock, + level->DeepSleepDivId = fiji_get_sleep_divider_id_from_clock(clock, hwmgr->display_config.min_core_set_clock_in_sr);
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c index 13f97708..1faad92 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c @@ -2416,8 +2416,8 @@ int tonga_calculate_sclk_params(struct pp_hwmgr *hwmgr, return 0; }
-static uint8_t tonga_get_sleep_divider_id_from_clock(struct pp_hwmgr *hwmgr, - uint32_t engine_clock, uint32_t min_engine_clock_in_sr) +static uint8_t tonga_get_sleep_divider_id_from_clock(uint32_t engine_clock, + uint32_t min_engine_clock_in_sr) { uint32_t i, temp; uint32_t min = max(min_engine_clock_in_sr, (uint32_t)TONGA_MINIMUM_ENGINE_CLOCK); @@ -2486,7 +2486,7 @@ static int tonga_populate_single_graphic_level(struct pp_hwmgr *hwmgr, uint32_t if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_SclkDeepSleep)) graphic_level->DeepSleepDivId = - tonga_get_sleep_divider_id_from_clock(hwmgr, engine_clock, + tonga_get_sleep_divider_id_from_clock(engine_clock, data->display_timing.min_clock_insr);
/* Default to slow, highest DPM level will be set to PPSMC_DISPLAY_WATERMARK_LOW later.*/
On Thu, May 5, 2016 at 3:07 AM, Nils Wallménius nils.wallmenius@gmail.com wrote:
Replacing magic numbers in calculation of sleep divider id for fiji and polaris.
Signed-off-by: Nils Wallménius nils.wallmenius@gmail.com
Applied. Thanks,
Alex
drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c | 3 ++- drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c | 4 ++-- 2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c index d05a5e0..c574afd 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c @@ -1903,7 +1903,8 @@ static uint8_t fiji_get_sleep_divider_id_from_clock(struct pp_hwmgr *hwmgr, { uint8_t i; uint32_t temp;
uint32_t min = clock_insr > 2500 ? clock_insr : 2500;
uint32_t min = clock_insr > FIJI_MINIMUM_ENGINE_CLOCK ?clock_insr : FIJI_MINIMUM_ENGINE_CLOCK; PP_ASSERT_WITH_CODE((clock >= min), "Engine clock can't satisfy stutter requirement!", return 0); for (i = FIJI_MAX_DEEPSLEEP_DIVIDER_ID; ; i--) {diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c index dbdcc68..c911ab8 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c @@ -1175,11 +1175,11 @@ static int polaris10_populate_single_graphic_level(struct pp_hwmgr *hwmgr, if (phm_cap_enabled(hwmgr->platformDescriptor.platformCaps, PHM_PlatformCaps_SclkDeepSleep)) level->DeepSleepDivId = PhwFiji_GetSleepDividerIdFromClock(hwmgr, clock, minClocks.engineClockInSR); */
PP_ASSERT_WITH_CODE((clock >= 2500), "Engine clock can't satisfy stutter requirement!", return 0);
PP_ASSERT_WITH_CODE((clock >= POLARIS10_MINIMUM_ENGINE_CLOCK), "Engine clock can't satisfy stutter requirement!", return 0); for (i = POLARIS10_MAX_DEEPSLEEP_DIVIDER_ID; ; i--) { temp = clock / (1UL << i);
if (temp >= 2500 || i == 0)
if (temp >= POLARIS10_MINIMUM_ENGINE_CLOCK || i == 0) break; }-- 2.8.1
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