[Bug 94445] Tonga llvm assert since RegisterCoalescer: Need to check DstReg+SrcReg for missing undef flags
https://bugs.freedesktop.org/show_bug.cgi?id=94445
Bug ID: 94445 Summary: Tonga llvm assert since RegisterCoalescer: Need to check DstReg+SrcReg for missing undef flags Product: Mesa Version: git Hardware: x86-64 (AMD64) OS: Linux (All) Status: NEW Severity: normal Priority: medium Component: Drivers/Gallium/radeonsi Assignee: dri-devel@lists.freedesktop.org Reporter: adf.lists@gmail.com QA Contact: dri-devel@lists.freedesktop.org
R9285 since llvm commit
commit 817178adc78bbd36ba635d3147cca53070558def Author: Matthias Braun matze@braunis.de Date: Sat Mar 5 04:36:10 2016 +0000
RegisterCoalescer: Need to check DstReg+SrcReg for missing undef flags
copy coalescing with enabled subregister liveness can reveal undef uses, previously this was only checked for the SrcReg in updateRegDefsUses() but we need to check DstReg as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262767 91177308-0d34-0410-b5e6-96231b3b80d8
Unigine Valley will assert at start of rendering.
valley_x64: /mnt/sdb1/Gits/llvm/lib/CodeGen/MachineScheduler.cpp:1046: void llvm::ScheduleDAGMILive::updatePressureDiffs(llvm::ArrayRefllvm::RegisterMaskPair): Assertion `VNI && "No live value at use."' failed.
Other demos don't trigger this.
Valley is running 1920x1080 fullscreen ultra quality + 8x AA.
https://bugs.freedesktop.org/show_bug.cgi?id=94445
--- Comment #1 from Michel Dänzer michel@daenzer.net --- Please attach the stderr output from running Valley with R600_DEBUG=vs,ps .
Did you report this to Matthias and/or the llvm-commits mailing list?
https://bugs.freedesktop.org/show_bug.cgi?id=94445
--- Comment #2 from Andy Furniss adf.lists@gmail.com --- Created attachment 122186 --> https://bugs.freedesktop.org/attachment.cgi?id=122186&action=edit R600_DEBUG=vs,ps bz2
https://bugs.freedesktop.org/show_bug.cgi?id=94445
--- Comment #3 from Andy Furniss adf.lists@gmail.com --- I am not on/familiar with any llvm lists.
Adding Matthias to cc doesn't work for me here - I guess it only does fdo known addresses?
https://bugs.freedesktop.org/show_bug.cgi?id=94445
Vedran Miletić rivanvx@gmail.com changed:
What |Removed |Added ---------------------------------------------------------------------------- CC| |rivanvx@gmail.com
--- Comment #4 from Vedran Miletić rivanvx@gmail.com --- Happens on Bonaire and Kabini as well when running GROMACS OpenCL. I can provide .ll if useful.
https://bugs.freedesktop.org/show_bug.cgi?id=94445
--- Comment #5 from Nicolai Hähnle nhaehnle@gmail.com --- Created attachment 122385 --> https://bugs.freedesktop.org/attachment.cgi?id=122385&action=edit Failing shader
The shader still fails to compile. I've contacted Matthias about this.
https://bugs.freedesktop.org/show_bug.cgi?id=94445
--- Comment #6 from Vedran Miletić rivanvx@gmail.com --- (In reply to Nicolai Hähnle from comment #5)
Created attachment 122385 [details] Failing shader
The shader still fails to compile. I've contacted Matthias about this.
Any news?
https://bugs.freedesktop.org/show_bug.cgi?id=94445
--- Comment #7 from Andy Furniss adf.lists@gmail.com --- Working for me with current llvm/mesa.
https://bugs.freedesktop.org/show_bug.cgi?id=94445
--- Comment #8 from Andy Furniss adf.lists@gmail.com --- Fixing commit =
commit d3adac51fcce66e8c79b77299fef9e5f6c4c646e Author: Tom Stellard thomas.stellard@amd.com Date: Wed Mar 30 16:35:09 2016 +0000
AMDGPU/SI: Enable lanemask tracking in misched
Summary: This results in higher register usage, but should make it easier for the compiler to hide latency.
This pass is a prerequisite for some more scheduler improvements, and I think the increase register usage with this patch is acceptable, because when combined with the scheduler improvements, the total register usage will decrease.
shader-db stats:
2382 shaders in 478 tests Totals: SGPRS: 48672 -> 49088 (0.85 %) VGPRS: 34148 -> 34847 (2.05 %) Code Size: 1285816 -> 1289128 (0.26 %) bytes LDS: 28 -> 28 (0.00 %) blocks Scratch: 492544 -> 573440 (16.42 %) bytes per wave Max Waves: 6856 -> 6846 (-0.15 %) Wait states: 0 -> 0 (0.00 %)
Depends on D18451
Reviewers: nhaehnle, arsenm
Subscribers: arsenm, llvm-commits
Differential Revision: http://reviews.llvm.org/D18452
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264876 91177308-0d34-0410-b5e6-96231b3b80d8
https://bugs.freedesktop.org/show_bug.cgi?id=94445
--- Comment #9 from Andy Furniss adf.lists@gmail.com --- Leaving open to see if other peoples test cases are also fixed.
Or maybe the "fixing" commit is just hiding some other issue?
https://bugs.freedesktop.org/show_bug.cgi?id=94445
--- Comment #10 from Vedran Miletić rivanvx@gmail.com --- (In reply to Andy Furniss from comment #7)
Working for me with current llvm/mesa.
Same here, tested on Kabini and Bonaire.
https://bugs.freedesktop.org/show_bug.cgi?id=94445
Nicolai Hähnle nhaehnle@gmail.com changed:
What |Removed |Added ---------------------------------------------------------------------------- Status|NEW |RESOLVED Resolution|--- |FIXED
--- Comment #11 from Nicolai Hähnle nhaehnle@gmail.com --- This has been fixed for some time.
dri-devel@lists.freedesktop.org
-
bugzilla-daemon＠freedesktop.org