This patch series adds support for the Pine64 touch panel to the rockpro64 single board computer. This panel attaches to the dsi port and includes an i2c touch screen.
The first two patches involve making the reset pin to the Feiyang fy07024di26a30d panel optional. On the rockpro64 and quartz64-a this pin is tied to dvdd and automatically comes high when power is applied. The third patch adds the device tree nodes to rockpro64 to permit the panel to be used. The fourth patch is an example patch to enable this support, tagged do not merge as this is something for the end user to enable only when they have the panel attached.
Peter Geis (4): dt-bindings: display: panel: feiyang,fy07024di26a30d: make reset gpio optional drm/panel: feiyang-fy07024di26a30d: make reset gpio optional arm64: dts: rockchip: add pine64 touch panel display to rockpro64 arm64: dts: rockchip: enable the pine64 touch screen on rockpro64
.../panel/feiyang,fy07024di26a30d.yaml | 1 - .../boot/dts/rockchip/rk3399-rockpro64.dtsi | 80 ++++++++++++++++++- .../drm/panel/panel-feiyang-fy07024di26a30d.c | 11 ++- 3 files changed, 83 insertions(+), 9 deletions(-)
Some implementations do not use the reset signal, instead tying it to dvdd. Make the reset gpio optional to permit this.
Signed-off-by: Peter Geis pgwipeout@gmail.com --- .../bindings/display/panel/feiyang,fy07024di26a30d.yaml | 1 - 1 file changed, 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/display/panel/feiyang,fy07024di26a30d.yaml b/Documentation/devicetree/bindings/display/panel/feiyang,fy07024di26a30d.yaml index 95acf9e96f1c..1cf84c8dd85e 100644 --- a/Documentation/devicetree/bindings/display/panel/feiyang,fy07024di26a30d.yaml +++ b/Documentation/devicetree/bindings/display/panel/feiyang,fy07024di26a30d.yaml @@ -35,7 +35,6 @@ required: - reg - avdd-supply - dvdd-supply - - reset-gpios
additionalProperties: false
On Fri, 07 Jan 2022 00:13:32 -0500, Peter Geis wrote:
Some implementations do not use the reset signal, instead tying it to dvdd. Make the reset gpio optional to permit this.
Signed-off-by: Peter Geis pgwipeout@gmail.com
.../bindings/display/panel/feiyang,fy07024di26a30d.yaml | 1 - 1 file changed, 1 deletion(-)
Acked-by: Rob Herring robh@kernel.org
Some implementations do not use the reset signal, instead tying it to dvdd. Make the reset gpio optional to permit this.
Signed-off-by: Peter Geis pgwipeout@gmail.com --- drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c b/drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c index 581661b506f8..1c88d752b14e 100644 --- a/drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c +++ b/drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c @@ -65,7 +65,8 @@ static int feiyang_prepare(struct drm_panel *panel) /* T3 (dvdd rise + avdd start + avdd rise) T3 >= 20ms */ msleep(20);
- gpiod_set_value(ctx->reset, 0); + if (ctx->reset) + gpiod_set_value(ctx->reset, 0);
/* * T5 + T6 (avdd rise + video & logic signal rise) @@ -73,7 +74,8 @@ static int feiyang_prepare(struct drm_panel *panel) */ msleep(20);
- gpiod_set_value(ctx->reset, 1); + if (ctx->reset) + gpiod_set_value(ctx->reset, 1);
/* T12 (video & logic signal rise + backlight rise) T12 >= 200ms */ msleep(200); @@ -126,7 +128,8 @@ static int feiyang_unprepare(struct drm_panel *panel) /* T13 (backlight fall + video & logic signal fall) T13 >= 200ms */ msleep(200);
- gpiod_set_value(ctx->reset, 0); + if (ctx->reset) + gpiod_set_value(ctx->reset, 0);
regulator_disable(ctx->avdd);
@@ -211,7 +214,7 @@ static int feiyang_dsi_probe(struct mipi_dsi_device *dsi) return PTR_ERR(ctx->avdd); }
- ctx->reset = devm_gpiod_get(&dsi->dev, "reset", GPIOD_OUT_LOW); + ctx->reset = devm_gpiod_get_optional(&dsi->dev, "reset", GPIOD_OUT_LOW); if (IS_ERR(ctx->reset)) { dev_err(&dsi->dev, "Couldn't get our reset GPIO\n"); return PTR_ERR(ctx->reset);
Hi Peter,
Am Freitag, 7. Januar 2022, 06:13:33 CET schrieb Peter Geis:
Some implementations do not use the reset signal, instead tying it to dvdd. Make the reset gpio optional to permit this.
Signed-off-by: Peter Geis pgwipeout@gmail.com
drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c b/drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c index 581661b506f8..1c88d752b14e 100644 --- a/drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c +++ b/drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c @@ -65,7 +65,8 @@ static int feiyang_prepare(struct drm_panel *panel) /* T3 (dvdd rise + avdd start + avdd rise) T3 >= 20ms */ msleep(20);
- gpiod_set_value(ctx->reset, 0);
- if (ctx->reset)
gpiod_set_value(ctx->reset, 0);
gpio_set_value does VALIDATE_DESC_VOID(desc);
which checks for "desc" (ctx->reset in this case) to be valid and especially not null and simply returns when this is the case.
So from what I see, we don't need all the added conditionals here and below and would just need the switch to devm_gpiod_get_optional alone.
Heiko
/* * T5 + T6 (avdd rise + video & logic signal rise) @@ -73,7 +74,8 @@ static int feiyang_prepare(struct drm_panel *panel) */ msleep(20);
- gpiod_set_value(ctx->reset, 1);
if (ctx->reset)
gpiod_set_value(ctx->reset, 1);
/* T12 (video & logic signal rise + backlight rise) T12 >= 200ms */ msleep(200);
@@ -126,7 +128,8 @@ static int feiyang_unprepare(struct drm_panel *panel) /* T13 (backlight fall + video & logic signal fall) T13 >= 200ms */ msleep(200);
- gpiod_set_value(ctx->reset, 0);
if (ctx->reset)
gpiod_set_value(ctx->reset, 0);
regulator_disable(ctx->avdd);
@@ -211,7 +214,7 @@ static int feiyang_dsi_probe(struct mipi_dsi_device *dsi) return PTR_ERR(ctx->avdd); }
- ctx->reset = devm_gpiod_get(&dsi->dev, "reset", GPIOD_OUT_LOW);
- ctx->reset = devm_gpiod_get_optional(&dsi->dev, "reset", GPIOD_OUT_LOW); if (IS_ERR(ctx->reset)) { dev_err(&dsi->dev, "Couldn't get our reset GPIO\n"); return PTR_ERR(ctx->reset);
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