broken by: drm/radeon/r600: fix tiling issues in CS checker.
Signed-off-by: Alex Deucher alexdeucher@gmail.com --- drivers/gpu/drm/radeon/r600_cs.c | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c index 7e44b5a..aec0944 100644 --- a/drivers/gpu/drm/radeon/r600_cs.c +++ b/drivers/gpu/drm/radeon/r600_cs.c @@ -190,6 +190,8 @@ static inline int r600_cs_track_validate_cb(struct radeon_cs_parser *p, int i) height = slice_tile_max / (pitch * 8); if (height > 8192) height = 8192; + if (height > 7) + height &= ~0x7; array_mode = G_0280A0_ARRAY_MODE(track->cb_color_info[i]); switch (array_mode) { case V_0280A0_ARRAY_LINEAR_GENERAL:
broken by: drm/radeon/r600: fix tiling issues in CS checker.
v2: only apply it to 1D tiling case.
Signed-off-by: Alex Deucher alexdeucher@gmail.com --- drivers/gpu/drm/radeon/r600_cs.c | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c index 7e44b5a..0d29065 100644 --- a/drivers/gpu/drm/radeon/r600_cs.c +++ b/drivers/gpu/drm/radeon/r600_cs.c @@ -215,6 +215,9 @@ static inline int r600_cs_track_validate_cb(struct radeon_cs_parser *p, int i) __func__, __LINE__, pitch); return -EINVAL; } + /* avoid breaking userspace */ + if (height > 7) + height &= ~0x7; if (!IS_ALIGNED(height, 8)) { dev_warn(p->dev, "%s:%d cb height (%d) invalid\n", __func__, __LINE__, height);
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Alex Deucher